Method and system for realizing small-capacity RAM (Random Access Memory) suitable for software-defined accelerator

Abstract

The invention discloses a method and a system for realizing a small-capacity RAM (Random Access Memory) suitable for a software-defined accelerator. The method comprises the following steps of: 1, compiling a given C program to obtain an IR (Infrared Response) of an LLVM (Logical Link Virtual Machine) corresponding to the given C program; 2, obtaining array names of a plurality of arrays contained in a given C program according to the IR of the LLVM, and obtaining instantiable parameters of the corresponding arrays according to the array names; and step 3, instantiating the RAM according to the instantiable parameters of each array. The difficulty of programming implementation under the SODA framework is reduced, the implementation process is simplified, and high-quality RTL-level storage design can be realized.

Description

Technical Field

[0001] The present invention relates to the field of software-defined accelerator and high-level synthesis technology, and in particular to a small-capacity RAM implementation method and system suitable for a software-defined accelerator. Background Art

[0002] For the cross-integration applications of emerging disciplines, including network analysis (such as power grids, communications, and transportation), environmental monitoring, high-energy physics, material synthesis, and general experimental science workflows, it is necessary to effectively combine algorithms in various fields such as data analysis, machine learning, and scientific computing. Systems in all these fields need to analyze continuous multimodal data streams and make decisions in real time to achieve autonomous control of experiments of different scales. To achieve all the indicators that these diverse edge systems need to meet in terms of energy consumption, performance, area, size, and latency, field-specific accelerator solutions are widely used.

[0003] The implementation process of a typical domain-specific accelerator requires hardware designers to extract key computing patterns from the algorithm to be accelerated, identify parallelism and data reuse, and manually design custom functional units for specific acceleration cores using hardware description languages ​​(HDL) at the register transfer level (RTL). However, the traditional hardware design cycle has significant productivity limitations, and each time a new algorithm or model appears, a new design cycle is often required.

[0004] A common alternative is to implement functional units in C / C++ and convert them to HDL using a commercial High Level Synthesis (HLS) tool (Vitis HLS, Catapult C or Stratus HLS). After functional verification, the HDL core is passed to downstream logic synthesis and physical design tools and finally integrated into a system. This design flow that combines manual coding with some automated processing is a standard practice for HLS design hardware.

[0005] However, even within the framework of the SODA (Software Defined Accelerators) approach, designing high-quality acceleration cores that meet all indicators in terms of energy consumption, performance, area, size, and latency still relies heavily on the designer's expertise and tremendous efforts in both software and hardware. In addition, computing and storage generally account for about 70% of the chip area, and this proportion is even higher in domain-specific accelerators. For high-quality implementations involving data storage, design cycles and quality remain severe challenges.

[0006] Academia and industry have been researching high-level synthesis for decades, but the technology has not been widely accepted by the industry. Its main disadvantages are that the SODA framework lacks comprehensive C / C++ language support and requires users to have extremely professional knowledge of software and hardware, which affects the popularity of this framework. Summary of the invention

[0007] In order to at least partially solve the problems that software-defined accelerators lack comprehensive C / C++ language support, are too difficult to implement in the SODA framework, have complex implementation processes, and are difficult to implement high-quality RTL-level storage design, the present invention provides a small-capacity RAM implementation method and system suitable for software-defined accelerators. The present invention obtains the array names of multiple arrays through the IR of the LLVM of a given C program, and obtains the instantiable parameters of the corresponding arrays according to the respective array names, and finally instantiates the RAM. The present invention can obtain the support of the C / C++ language, reduce the difficulty of programming implementation in the SODA framework, simplify the implementation process, and can achieve high-quality RTL-level storage design.

[0008] In order to achieve the above object, the technical solution of the present invention is: The first aspect of the present invention proposes a small-capacity RAM implementation method suitable for a software-defined accelerator, comprising: Step 1: Compile the given C program to obtain the LLVM IR corresponding to the given C program, so as to obtain the corresponding array information according to the LLVM IR; Step 2: Get the array names of multiple arrays contained in a given C program according to the IR of LLVM, and obtain the instantiable parameters of the corresponding array according to each array name, so as to facilitate the instantiation of RAM; Step 3: Instantiate the RAM according to the instantiable parameters of each array.

[0009] Furthermore, the instantiable parameters include array name, initialization data file, array element type, array size and RAM depth, which facilitates the subsequent instantiation of RAM.

[0010] Furthermore, the initialization data file is a file generated by initializing an array; wherein the file name of the initialization data file is named using the array variable name, and the corresponding instantiation name is named using the function name and the array variable name together.

[0011] Furthermore, obtaining the IR of the LLVM of the given C program from the given C program specifically includes: Use Clang to compile a given C program and get the corresponding abstract syntax tree, so as to get the corresponding LLVM IR. The abstract syntax tree is converted to obtain the LLVM IR of the given C program, so as to obtain the corresponding array name and the instantiable parameters of the corresponding array.

[0012] Furthermore, the syntax format of the abstract syntax tree includes a node name, a memory address of the node, source code information, an array variable name, an array element type, and an initialized array element value.

[0013] Furthermore, the syntax format of the LLVM IR includes array name, array attributes, array size and array element type, initialized array element value and alignment.

[0014] Furthermore, the RAM is a dual-port RAM.

[0015] A second aspect of the present invention provides a system for a small-capacity RAM suitable for a software-defined accelerator, comprising: The compilation module is used to compile a given C program to obtain the LLVM IR corresponding to the given C program, so as to obtain the corresponding array information according to the LLVM IR; The collection module is used to obtain the array names of multiple arrays contained in a given C program according to the IR of LLVM, and obtain the instantiable parameters of the corresponding array according to each array name, so as to facilitate the instantiation of RAM; An instantiation module is used to instantiate the RAM according to the instantiable parameters of each array.

[0016] The third aspect of the present invention proposes an electronic device, comprising a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein when the processor executes the computer program, it implements a small-capacity RAM implementation method suitable for a software-defined accelerator as described in the first aspect above.

[0017] The fourth aspect of the present invention proposes a computer-readable storage medium, which includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute a small-capacity RAM implementation method suitable for a software-defined accelerator as described in the first aspect above.

[0018] Beneficial effects of the present invention: (1) The present invention obtains the intermediate representation (IR) of LLVM through the abstract syntax tree, and then obtains the array information in the given C program to complete the instantiation of RAM. This method overcomes the problem of insufficient universality of the existing SODA method, meets the realization of high-quality storage design, can reduce the difficulty of programming implementation under the SODA framework, simplify the implementation process, and can realize high-quality RTL-level storage design.

[0019] (2) The present invention stores a single array in a given C program in a separate RAM, making it easier for software and hardware designers to find the data of a single array, which will help debug the entire code.

[0020] (3) The present invention supports more general C language development, especially in terms of array to hardware storage unit. The compilation process is simple and the generated RTL-level storage module can adapt to the configuration of the array. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 A flowchart of a method for implementing a small-capacity RAM suitable for a software-defined accelerator provided in an embodiment of the present invention.

[0022] Figure 2 A schematic diagram of a given C program provided by an embodiment of the present invention.

[0023] Figure 3 A schematic diagram of the grammar of the AST provided in an embodiment of the present invention.

[0024] Figure 4 A schematic diagram of the grammar of the IR of the LLVM provided in an embodiment of the present invention.

[0025] Figure 5 A schematic diagram of a hexadecimal initialization data format provided in an embodiment of the present invention.

[0026] Figure 6 A schematic diagram of an instantiated RAM provided in accordance with an embodiment of the present invention.

[0027] Figure 7 A schematic diagram of a RAM instantiation result provided by an embodiment of the present invention.

[0028] Figure 8 A specific flow chart of a method for implementing a small-capacity RAM suitable for a software-defined accelerator provided in an embodiment of the present invention.

[0029] Fig. 9 An architectural diagram of a small-capacity RAM system suitable for a software-defined accelerator provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0030] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution in the embodiment of the present invention will be clearly described below in conjunction with the drawings in the embodiment of the present invention. Obviously, the described embodiment is a part of the embodiment of the present invention, not all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] Example 1 like Figure 1 As shown, a small-capacity RAM implementation method suitable for a software-defined accelerator includes: S101: Compile a given C program to obtain the LLVM IR corresponding to the given C program.

[0032] Specifically, according to the variable declaration node (VarDecl) and array type node (ArrayType) of the abstract syntax tree (AST) in the open source compiler LLVM Clang (LLVM Compiler Infrastructure: CLanguage Family Frontend), the syntax representation of the variable declaration node and array type node of the array in the given C program is abstracted to obtain the abstract syntax tree of the given C program. The abstract syntax tree is transformed to obtain the LLVM IR of the given C program. The given C program is as follows Figure 2 shown.

[0033] The syntax format of the abstract syntax tree includes the node name, the node's memory address, source code information, array variable name, array element type, and initialized array element value.

[0034] like Figure 3 As shown, the information in the syntax format of the abstract syntax tree is represented as follows: Node name: VarDecl, meaning this is a variable declaration.

[0035] Memory address of the node: The compiler internally stores the address of this node at 0x2ee7010.

[0036] Source code information:<line:4:1,col:35> , the corresponding row and column of the variable in the source code file.

[0037] Array variable name: used input, the variable name of input is used.

[0038] Array element type: int [8], 8 integer data.

[0039] Initialized array element value: such as 0x2ee7068<col:20> 'int' 0 and 0x2ee7088<col:22> 'int'1, etc., 8 specific values ​​and their corresponding positions in the source code files.

[0040] The semantic information of AST includes the data array element type, the number of data elements, and the initialized array element value.

[0041] S102: Obtain array names of multiple arrays included in a given C program according to LLVM's IR, and obtain instantiable parameters of corresponding arrays according to each array name.

[0042] Specifically, the syntax format of LLVM's IR includes array name, array attributes, array size and array element type, initialized array element value and alignment.

[0043] like Figure 4 As shown, the information in the syntax format of LLVM's IR is represented as follows: Array name: @input, means the variable name.

[0044] Array attribute: global, global array.

[0045] Array size and array element type: [8 x i32], 8 32-bit integer data.

[0046] Initialized array element values: [i32 0, i32 1 ... i32 7, i32 8], 8 specific initialized integer values.

[0047] Alignment: align 4, 4-byte alignment.

[0048] The semantic information of LLVM's IR includes the type of data elements, the number of data elements, and the initialized data element values.

[0049] The instantiation parameters obtained include array name, initialization data file, array element type, array size and RAM depth.

[0050] Before obtaining the array name of the array, it is necessary to perform array identification on the LLVM IR. If the array in the LLVM IR is found, the array name of the array is obtained. If the array in the LLVM IR is not found, the operation ends.

[0051] The initialization data file is a file generated by initializing the array. Figure 5 As shown in the figure, the file name of the initialization data file is named with the array variable name (such as array variable name.dat), and the corresponding instance name is named with the function name and array variable name (such as function name + array variable name.dat). Figure 5 The file content is 32-bit hexadecimal data.

[0052] If the array is a non-zero value array, the non-zero value array is initialized to obtain the initialization data of the non-zero value array. If the array is a zero value array, an unused memory initialization file (UNUSED.mif) is generated as the initialization data of the zero value array for the default value of the RAM parameter.

[0053] According to LLVM's IR, the array element type is obtained, and the array data bit width information is obtained according to the array element type. The corresponding relationship between the array element type and the array data bit width information is expressed as follows: Character type = 8 bits; Short integer = 16 bits; Integer = 32 bits; Long integer = 64 bits; Single precision = 32 bits; Double precision = 64 bits.

[0054] Get the array size based on LLVM's IR, and get the RAM depth and RAM address width based on the array size. The RAM address width is the smallest power of 2 value that is greater than or equal to the array size.

[0055] S103: Instantiate the RAM according to the instantiable parameters of each array.

[0056] The present invention uses the module structure of parameterized dual-port RAM as a template and the compilation architecture of LLVM as a basis. The front end uses Clang's AST and LLVM's IR, and the back end uses a custom RAM generation method to convert the information obtained through LLVM's IR into the instantiation parameters of the RAM module. The process of instantiating RAM is as follows: Figure 6 and Figure 7 As shown. Among them, Figure 6 Enter the parameter values ​​as follows: parameter width_a = data width information.

[0057] parameter width_b = data bit width information.

[0058] parameter widthad_a = RAM depth information.

[0059] parameter widthad_b = RAM depth information.

[0060] parameter numwords_a = RAM depth information.

[0061] parameter numwords_b = RAM depth information.

[0062] parameter init_file = the value of the initialized array element.

[0063] parameter latency = 1.

[0064] like Figure 8 As shown, the present invention obtains the array names of multiple arrays in a given C program through the IR of the LLVM of the given C program, obtains the instantiable parameters of the corresponding array according to each array name, and instantiates it according to the instantiable parameters. The present invention stores a single array in a given C program in a separate RAM, which is convenient for code debugging, and can reduce the difficulty of programming implementation under the SODA framework, simplify the implementation process, and can solve the high-quality RTL-level storage design implementation.

[0065] Example 2 Based on the above embodiments, Fig. 9 As shown, an embodiment of the present invention provides a system of a small-capacity RAM suitable for a software-defined accelerator, including: The compilation module is used to compile a given C program to obtain the LLVM IR corresponding to the given C program; The collection module is used to obtain the array names of multiple arrays contained in a given C program according to the IR of LLVM, and obtain the instantiable parameters of the corresponding array according to each array name; An instantiation module is used to instantiate the RAM according to the instantiable parameters of each array.

[0066] It should be noted that the system of a small-capacity RAM suitable for a software-defined accelerator provided in an embodiment of the present invention is for implementing a small-capacity RAM implementation method suitable for a software-defined accelerator in the above embodiment. Its specific functions can be referred to the above method embodiments and will not be repeated here.

[0067] Example 3 Corresponding to the above method, an embodiment of the present invention provides an electronic device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor. When the processor executes the computer program, it implements a small-capacity RAM implementation method suitable for a software-defined accelerator as described in the above embodiment.

[0068] An embodiment of the present invention provides a computer-readable storage medium, the storage medium including a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute a small-capacity RAM implementation method suitable for a software-defined accelerator as described in the above embodiment.

[0069] In summary, the present invention obtains the intermediate representation (IR) of LLVM through the abstract syntax tree, and then obtains the array information in the given C program to complete the instantiation of RAM. This method overcomes the problem of insufficient universalization of the existing SODA method, meets the realization of high-quality storage design, can reduce the difficulty of programming implementation under the SODA framework, simplifies the implementation process, and can achieve high-quality RTL-level storage design. The present invention stores a single array in a given C program in a separate RAM, which is convenient for software and hardware designers to find the data of a single array, which will help debug the overall code. The present invention supports more general C language development, especially in terms of array to hardware storage unit. The compilation process is concise, and the generated RTL-level storage module can adapt to the configuration of the array.

[0070] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for implementing a small-capacity RAM suitable for a software-defined accelerator, characterized in that: include: Step 1: Compile the given C program to obtain the LLVM IR corresponding to the given C program; Step 2: Get the array names of multiple arrays contained in a given C program according to LLVM's IR, and obtain the instantiable parameters of the corresponding arrays according to each array name; Step 3: Instantiate the RAM according to the instantiable parameters of each array.

2. A method for implementing a small-capacity RAM suitable for a software-defined accelerator according to claim 1, characterized in that: The instantiable parameters include array name, initialization data file, array element type, array size and RAM depth.

3. A method for implementing a small-capacity RAM suitable for a software-defined accelerator according to claim 2, characterized in that: The initialization data file is a file generated by initializing an array; wherein the file name of the initialization data file is named by the array variable name, and the corresponding instantiation name is named by the function name and the array variable name.

4. The method for implementing a small-capacity RAM suitable for a software-defined accelerator according to claim 1, characterized in that: The step of obtaining the LLVM IR of a given C program from a given C program specifically includes: Use Clang to compile a given C program and get the corresponding abstract syntax tree; Transform the abstract syntax tree to obtain the LLVM IR of the given C program.

5. A method for implementing a small-capacity RAM suitable for a software-defined accelerator according to claim 4, characterized in that: The syntax format of the abstract syntax tree includes a node name, a memory address of the node, source code information, an array variable name, an array element type, and an initialized array element value.

6. A method for implementing a small-capacity RAM suitable for a software-defined accelerator according to claim 4, characterized in that: The syntax format of the LLVM IR includes array name, array attributes, array size and array element type, initialized array element value and alignment.

7. A method for implementing a small-capacity RAM suitable for a software-defined accelerator according to any one of claims 1 to 6, characterized in that: The RAM is a dual-port RAM.

8. A system for small-capacity RAM suitable for software-defined accelerators, characterized in that: include: The compilation module is used to compile a given C program to obtain the LLVM IR corresponding to the given C program; The collection module is used to obtain the array names of multiple arrays contained in a given C program according to the IR of LLVM, and obtain the instantiable parameters of the corresponding array according to each array name; An instantiation module is used to instantiate the RAM according to the instantiable parameters of each array.

9. An electronic device, characterized in that: It includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, and when the processor executes the computer program, it implements a small-capacity RAM implementation method suitable for a software-defined accelerator as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: The storage medium includes a stored computer program, wherein when the computer program is running, the device where the storage medium is located is controlled to execute a small-capacity RAM implementation method suitable for a software-defined accelerator as described in any one of claims 1 to 7.

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