Optical chip process flow management method and device

Abstract

The invention provides an optical chip technological process management method and device, belongs to the technical field of semiconductor manufacturing, and can solve the problem that an existing semiconductor wafer manufacturing management system and an existing semiconductor wafer sealing and testing system cannot completely meet optical chip technological process management. The optical chip technological process disclosed by the invention comprises a plurality of technological sites; the plurality of process stations are sequentially arranged according to a product processing sequence; the optical chip process flow management method comprises the following steps: determining a key process station in a plurality of process stations according to a product processing sequence; the key process site is a process site of which the form and / or quantity of the current batch of products are / is changed; and in response to the fact that the current batch of products are processed to the key process site, updating the form and / or quantity of the current batch of products on the function page corresponding to the key process site.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor manufacturing technology, and specifically relates to an optical chip process management method and device. Background Art

[0002] In the semiconductor manufacturing industry, optical chips are semiconductor devices manufactured based on compound semiconductor materials (such as indium phosphide InP and gallium arsenide GaAs). Unlike traditional wafer manufacturing, the shape of the processed products will change during the manufacturing process of optical chips. For example, it will change from a wafer shape to an optical chip bar shape, and from a bar shape to an optical chip shape. In addition, the number of products will change all the time during the manufacturing process of optical chips, and the quality also needs to be strictly controlled. Such management points cannot be fully met by either the semiconductor wafer manufacturing management system or the semiconductor wafer packaging and testing system, and the management difficulties are becoming increasingly prominent. Summary of the invention

[0003] The present disclosure aims to solve at least one of the technical problems existing in the prior art, and provides an optical chip process management method and device.

[0004] In a first aspect, an embodiment of the present disclosure provides a method for managing an optical chip process flow, wherein the optical chip process flow includes: a plurality of process sites; the plurality of process sites are arranged in sequence according to a product processing order; the optical chip process flow management method includes:

[0005] Determine a key process site among the plurality of process sites according to the product processing sequence; the key process site is a process site where the form and / or quantity of the current batch of products changes;

[0006] In response to the current batch of products being processed to the key process site, the form and / or quantity of the current batch of products is updated on the function page corresponding to the key process site.

[0007] In some embodiments, the determining of the key process sites among the plurality of process sites according to the product processing sequence further comprises:

[0008] In response to the current batch of products being processed to the process station corresponding to the scrap detection, performing a scrap detection on the current batch of products according to the scrap detection logic;

[0009] According to the scrap detection results, obtain the scrap information of the current batch of products;

[0010] On the function page of the process site corresponding to the scrap detection, the scrap information of the current batch of products is recorded.

[0011] In some embodiments, the function page of each process site records the scrapping information of the current batch of products, and then further includes:

[0012] In response to the current batch of products being processed to the process site corresponding to the defect detection, performing defect detection on the current batch of products according to the defect detection logic;

[0013] According to the defect detection results, obtain the defect information of the current batch of products;

[0014] On the function page of the process site corresponding to the defect detection, the defect information of the current batch of products is recorded.

[0015] In some embodiments, the defect detection corresponds to the function page of the process site, recording the defect information of the current batch of products, and then further comprising:

[0016] According to the shape and quantity of the current batch of products, the carrier information corresponding to the current batch of products is updated on the function page corresponding to the process site corresponding to the scrap detection and defect detection.

[0017] In some embodiments, the process flow is disassembled into a plurality of process flow sections; each of the process flow sections at least includes: a starting process site and an ending process site;

[0018] In two adjacent process flow segments, the ending process site in the previous process flow segment serves as the starting process site in the next process flow segment.

[0019] In some embodiments, the plurality of process stations include: slicing, optical chip bar cleavage, optical chip bar arrangement, coating, optical chip bar transfer, visual inspection, quality inspection, optical chip bar warehousing, optical chip cleavage, sorting, and optical chip warehousing.

[0020] In some embodiments, the plurality of process sites further include: outsourcing / receiving, life testing, and optical chip packaging;

[0021] The outsourcing / receiving is after the optical chip strips are put into storage and / or the optical chips are put into storage;

[0022] The optical chip is packaged after the optical chip is put into storage and / or outsourced / received;

[0023] The lifetime test was performed after the sorting.

[0024] In a second aspect, an embodiment of the present disclosure provides an optical chip process flow management device, wherein the optical chip process flow includes: a plurality of process sites; the plurality of process sites are arranged in sequence according to a product processing sequence; the optical chip process flow management device includes:

[0025] A determination module is configured to determine a key process site among the plurality of process sites according to a product processing sequence; the key process site is a process site where the form and / or quantity of the current batch of products changes;

[0026] The update module is configured to update the form and / or quantity of the current batch of products on the function page corresponding to the key process site in response to the current batch of products being processed to the key process site.

[0027] In a third aspect, an embodiment of the present disclosure provides an electronic device, the electronic device comprising:

[0028] at least one processor; and

[0029] a memory communicatively connected to the at least one processor; wherein,

[0030] The memory stores one or more computer programs that can be executed by the at least one processor, and the one or more computer programs are executed by the at least one processor so that the at least one processor can execute the optical chip process flow management method provided above.

[0031] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the optical chip process flow management method provided above is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 The figure is a schematic diagram of an optical chip process flow.

[0033] Figure 2 A schematic diagram of a process flow of an optical chip process management method provided in an embodiment of the present disclosure.

[0034] Figure 3 A schematic diagram of a process flow for scrap detection in an optical chip process flow provided in an embodiment of the present disclosure.

[0035] Figure 4 A schematic diagram of a process flow for defect detection in an optical chip process provided in an embodiment of the present disclosure.

[0036] Figure 5a to Figure 5e A schematic diagram of different process flow sections in the process flow provided in an embodiment of the present disclosure.

[0037] Figure 6 The following is a logical flow chart of the sharding function.

[0038] Figure 7 This is a schematic diagram of the sharding function page.

[0039] Figure 8 This is the logic flow chart of the Bar decomposition function.

[0040] Fig. 9 This is a diagram of the Bar cleavage function page.

[0041] Fig.10 This is the logic flow chart of the Bar function.

[0042] Fig.11 This is a schematic diagram of the Bar function page.

[0043] Fig.12 A schematic diagram for generating a fixture function page.

[0044] Fig.13 It is the logic flow chart of the coating function.

[0045] Fig.14 This is a schematic diagram of the coating function page.

[0046] Fig.15 This is the logic flow chart of the Bar uninstallation function.

[0047] Fig.16 This is a schematic diagram of the Bar uninstallation function page.

[0048] Fig.17 This is the logic flow chart of the visual inspection function.

[0049] Fig.18 This is a diagram of the visual inspection function page.

[0050] Fig.19 This is the logical flow chart of the quality inspection function.

[0051] Fig. 20 This is a schematic diagram of the quality inspection function page.

[0052] Fig.21 This is the logic flow chart of the Bar storage function.

[0053] Fig. 22 This is a schematic diagram of the Bar inventory function page.

[0054] Fig.23 This is the logic flow chart of the Bar storage function.

[0055] Fig.24 This is a schematic diagram of the Bar inventory function page.

[0056] Fig.25 This is the logic flow chart of the sorting function.

[0057] Fig.26 This is a schematic diagram of the sorting function page.

[0058] Fig. 27This is the logic flow chart of the Chip storage function.

[0059] Fig.28 This is a schematic diagram of the Chip storage function page.

[0060] Fig.29 This is the logic flow chart for the outsourced receiving function.

[0061] Fig.30 and Fig.31 This is a schematic diagram of the outsourcing receiving function page.

[0062] Fig.32 A schematic diagram of the structure of an optical chip process flow management device provided in an embodiment of the present disclosure.

[0063] Fig.33 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0064] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all of the embodiments. The components of the embodiments of the present disclosure generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present disclosure provided in the drawings is not intended to limit the scope of the present disclosure claimed for protection, but merely represents the selected embodiments of the present disclosure. Based on the embodiments of the present disclosure, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present disclosure. In the absence of conflict, the various embodiments of the present disclosure and the various features in the embodiments can be combined with each other.

[0065] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantitative restrictions, but indicate that there is at least one. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0066] The "multiple or several" mentioned in this disclosure refers to two or more. "And / or" describes the association relationship of the associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0067] In order to facilitate understanding of the embodiments of the present disclosure, special terms involved in the embodiments of the present disclosure are first described in detail.

[0068] MES: Manufacturing Execution System, MES is a production information management system for the execution layer of the workshop of manufacturing enterprises. MES can provide enterprises with management modules including manufacturing data management, planning and scheduling management, production scheduling management, inventory management, quality management, human resources management, work center / equipment management, tool and fixture management, procurement management, cost management, project kanban management, production process control, bottom-level data integration analysis, and upper-level data integration decomposition.

[0069] Process site: usually refers to a specific process link or work point in the process flow, responsible for completing a specific manufacturing task.

[0070] Wafer: A silicon wafer used to make silicon semiconductor circuits. Its raw material is silicon. High-purity polysilicon is dissolved and doped with silicon crystal seeds, and then slowly pulled out to form a cylindrical single crystal silicon. After grinding, polishing, and slicing, the silicon crystal rod forms a silicon wafer, also known as a wafer.

[0071] Bar: An optical chip bar is an intermediate form in the optical chip manufacturing process. It is in the shape of a long strip and is mostly cleaved from a wafer.

[0072] Chip: The final form of an optical chip during the manufacturing process, which has a smaller granularity than a bar.

[0073] TO: Transmitter Outline, a type of optical module packaging, usually refers to the transmitter outline package.

[0074] TOSA: Transmitter Optical Sub-Assembly, the transmitting optical sub-assembly in the optical module, its main function is to convert electrical signals into optical signals.

[0075] COC: Chip on Chip, a type of optical module packaging, in which the chip is directly mounted on another chip instead of on a substrate. This packaging form is used in optical modules to closely integrate multiple chips together to improve performance and efficiency.

[0076] WIP accumulation bottleneck: WIP in the MES system means work in progress. The WIP accumulation bottleneck means that if multiple batches wait for a long time at a process station during the wafer manufacturing process, it will affect the subsequent process stations to passively wait for a long time, making the entire manufacturing process inefficient and consuming a lot of resources.

[0077] The current management points of semiconductor wafer manufacturing management systems or semiconductor wafer packaging and testing management systems only involve the wafer form, which cannot adapt well to the changes in product form during the entire optical chip manufacturing process. In addition, in the entire optical chip production process, a large number of batches may be accumulated at certain process sites, and these batches will have a long waiting time after the products are put into storage. In this way, the subsequent process sites of these process sites will also be in a state of waiting, resulting in the suspension of some machines in the production line. Secondly, there will also be a long waiting phenomenon in the data management of the system, which will prevent the system resources from being released, resulting in a waste of resources.

[0078] In order to solve at least one of the above-mentioned technical problems, the embodiment of the present disclosure provides an optical chip process flow management method and device. The optical chip process flow management method and device provided by the embodiment of the present disclosure will be further described in detail in combination with the accompanying drawings and specific implementation methods.

[0079] In a first aspect, the present disclosure provides a method for managing an optical chip process flow. Figure 1 A schematic diagram of an optical chip process flow chart is shown in FIG. Figure 1As shown, the optical chip process flow includes: multiple process sites; multiple process sites are arranged in sequence according to the product processing order. Specifically, multiple process flows include: slicing, optical chip bar cleavage (Bar cleavage), optical chip bar arrangement (Bar arrangement), coating, optical chip bar transfer (Bar unloading), visual inspection (AOI), quality inspection (QA), optical chip bar warehousing (Bar warehousing), optical chip cleavage (Chip cleavage), sorting, optical chip warehousing (Chip warehousing). Among them, visual inspection (AOI) and quality inspection (QA) can be performed before the optical chip bar is warehousing (Bar warehousing), and visual inspection (AOI) and quality inspection (QA) can also be performed before the optical chip is warehousing (Chip warehousing). The above-mentioned process sites can constitute the main process flow. Multiple process sites also include: outsourcing / receiving, life testing (life test) and optical chip packaging (Packing). Outsourcing / receiving is after the optical chip bar storage (Bar storage) and / or optical chip storage (Chip storage); optical chip packaging (Packing) is after the optical chip storage (Chip storage) and / or outsourcing / receiving; life test (life test) is after sorting. The above-mentioned various process sites can form a branch process flow.

[0080] It is understandable that in Figure 1 In the process, other process stations are set before slicing, such as start lot, wafer start, dielectric film deposition, P metal photolithography, P metal deposition, P metal stripping, etc. These process stations are process stations in the wafer manufacturing process, and are before each process station of the optical chip process provided by the present disclosure.

[0081] Figure 2 A schematic diagram of a process flow diagram of an optical chip process management method provided by an embodiment of the present disclosure, such as Figure 2 As shown, the chip process management method includes steps S201 to S202.

[0082] S201, determining a key process site among multiple process sites according to a product processing sequence; a key process site is a process site where the shape and / or quantity of the current batch of products changes.

[0083] In the above step S201, key process sites can be selected from multiple process sites. The shape and / or quantity of the corresponding products of the key process sites change, and key management is required. In the embodiment of the present disclosure, the key process sites can be slicing, chip cleaving, and outsourcing / receiving. At the slicing process site, the shape of the product changes from Wafer to Bar, at the chip cleaving process site, the shape of the product changes from Bar to Chip, and at the outsourcing / receiving process site, the shape of the product changes from Bar to Chip, or from Chip to TO / TOSA / COC. The outsourcing / receiving process site will also involve changes in shape. This shape change occurs during processing in the foundry, and its process will not be reflected in the embodiment of the present disclosure. In the embodiment of the present disclosure, the outsourcing / receiving process site provides a selection interval. When the product is sent out in the form of Bar, the product shape of the received batch must be changed to Chip. When the product is sent out in the form of Chip, the product shape of the received batch will become COC / TO / TOSA. The specific shape change is selected by the user.

[0084] S202, in response to the current batch of products being processed to the key process site, updating the form and / or quantity of the current batch of products on the function page corresponding to the key process site.

[0085] In the above step S202, in response to the current batch of products being processed to the key process site, the form and / or quantity of the current batch of products are updated on the function page corresponding to the key process site. Specifically, the ProductType field will be updated to the new form value. At the same time, the theoretical quantity of the products after the respective form changes will be calculated based on the value of the BarCount or ChipCount field configured on the corresponding product of the current batch, and the quantity will be updated to the SubProductQuantity of the batch. The calculation method is as follows: The quantity after updating to the Bar form = BarCount - the scrapped quantity of the current process site. The quantity after updating to the Chip form = ChipCount * the number of Bars in the current batch - the scrapped quantity of the current process site.

[0086] At the slicing process site, the batch needs to update the product form of the current batch to Bar when passing through the site, and the theoretical maximum number of Bars needs to be calculated according to the formula. The number of Bars after the current batch leaves the site is calculated based on the maximum number of Bars and the number of Bars that need to be scrapped uploaded during slicing.

[0087] At the chip cleavage process site, the products in the batch are bars, and the bars need to be cleaved into chips. The number will be updated to the maximum number of chips according to the configuration on the product (this will be directly reflected on the function page). Then the number of chips that should be displayed on the batch is calculated based on the number of scrapped chips by users at the current process site.

[0088] In the optical chip process flow management method provided by the embodiment of the present disclosure, the station-by-station mode of the semiconductor wafer manufacturing system is adopted for management. When the current batch of products is processed to the key process site, the shape of the product will change, for example, from Wafer to Bar, Bar to Chip, and its quantity may also change. On the function page corresponding to the key process site, the shape and / or quantity of the current batch is updated. In this way, in the optical chip process flow, the management unit is expanded from the original Wafer state to the Bar shape and the Chip shape, and products of different shapes and quantities in the entire process can be managed to meet the requirements of optical chip process flow management.

[0089] In some embodiments, Figure 3 A schematic diagram of a process flow of scrap detection in an optical chip process provided by an embodiment of the present disclosure, such as Figure 3 As shown, step S201, according to the product processing sequence, determines the key process site among multiple process sites, and also includes: step S301 to step S303.

[0090] S301, in response to the current batch of products being processed to a process station corresponding to the scrap detection, the current batch of products is subjected to a scrap detection according to the scrap detection logic.

[0091] In the above step S301, the scrap detection logic is added to the function page of each process station in the process flow. When the current batch of products is processed to the process station corresponding to the scrap detection, the operator can perform preliminary detection on the products according to the scrap detection logic, that is, scrap detection, to detect the products that need to be scrapped in the current batch. It should be noted here that in the entire optical chip production process, the intermediate form Bar or Chip often exists in large quantities. Unlike the Wafer level station passing, when the Wafer level station passes, if an abnormality occurs, the smallest scrap unit is the Wafer. However, in the optical chip production process management process, using a whole wafer as the smallest scrap unit when an abnormality occurs is obviously too heavy. Because after the optical chip slicing process, all its products are derived from a piece of Wafer, so the smallest scrap unit when handling abnormalities in the optical chip process management is Bar or Chip.

[0092] S302, obtaining scrap information of the current batch of products according to the scrap detection result.

[0093] S303, recording the scrap information of the current batch of products on the function page of the process site corresponding to the scrap detection.

[0094] In the above steps S302 to S303, after scrap detection, products that need to be scrapped can be detected from the current batch of products, and scrap information can be recorded in the function page of the corresponding process site. The scrap information record can be as shown in Table 1 below.

[0095] Table 1: Basic fields of scrap table

[0096] Field Name describe lotName Scrapped batches waferName Scrapped source wafer productSpecName Product Name mainProcessFlowName Process Name processOperationName Process site name stepSequence Process steps (serial number) reasonCode Scrap reason code quantity Scrap Quantity durableName Scrapped vehicle durableType Vehicle type at scrapping

[0097] From the above, it can be seen that by adding scrap detection logic to each process site, scrapped products can be removed in time to prevent scrapped products from flowing into the next process site. This can manage the quality of products passing through each process site in a more standardized and systematic manner.

[0098] In some embodiments, Figure 4 A schematic diagram of a defect detection process in an optical chip process provided by an embodiment of the present disclosure, such as Figure 4 As shown, the above step S303 records the scrap information of the current batch of products on the function page of the process site corresponding to the scrap detection, and then also includes: steps S401 to S403.

[0099] S401, in response to the current batch of products being processed to a process site corresponding to defect detection, defect detection is performed on the current batch of products according to defect detection logic.

[0100] In the above step S401, a process station corresponding to defect detection can be added to the process flow to perform defect detection, such as the above-mentioned visual inspection (AOI), quality inspection (QA) and other process stations. At these two process stations, users will conduct professional tests on the processed products, and quality inspection may even require a dedicated testing department to complete.

[0101] S402, obtaining defect information of the current batch of products according to the defect detection result.

[0102] S403, recording defect information of the current batch of products on the function page of the process site corresponding to the defect detection.

[0103] In the above steps S402 to S403, in the process site corresponding to the defect detection, the defect situation will be filled in according to the detection results, and the system will record it. The defect model can be extracted according to the defect type found in actual production and managed in the Enum module in the system. Before using the optical chip process flow management, the user will define all possible defects in the Enum module in advance, and model them according to different products and forms. After the modeling is completed, when the optical chip process flow management runs to the process site corresponding to the defect detection, it will be handed over to the tester for testing to ensure quality. The defect information record can be as shown in Table 2.

[0104] Table 2: Basic fields of scrap table

[0105] Fields describe lotName Batch Name subProductQuantity Number of products in the batch productType Product form inspectCount Number of random inspections finalGoodCount Number of good products testGoodCount Number of tests factoryName Factory Name productSpecName product mainProcessFlowName Main Process processFlowName Subprocess processOperationName Craft Site stepSequence Process steps detailProcessOperationType Process site type defectCode Defect Name DefectCodeCount Number of defects durableName Vehicle Name durableType Vehicle Type

[0106] In some embodiments, Figure 2 As shown, step S403 records the defect information of the current batch of products on the function page of the process site corresponding to the defect detection, and then also includes: according to the shape and quantity of the current batch of products, on the function page corresponding to the process site corresponding to the scrap detection and defect detection, updating the carrier information corresponding to the current batch of products.

[0107] It should be noted that during the manufacturing process of optical chips, the carriers change frequently. In practical applications, only a part of the carriers can be managed systematically, which can improve management efficiency and reduce process management costs.

[0108] In some embodiments, the process flow is broken down into multiple process flow segments; each process flow segment includes at least: a starting process site and an ending process site; in two adjacent process flow segments, the ending process site in the previous process flow segment serves as the starting process site in the next process flow segment.

[0109] Figure 5a to Figure 5e A schematic diagram of different process flow sections in the process flow provided in the embodiment of the present disclosure, in Figure 5a In the process flow, the process stations of this process flow section include: slicing, optical chip bar cleavage (Bar cleavage), optical chip bar arrangement (Bar arrangement), coating, optical chip bar transfer (Bar unloading), visual inspection (AOI), quality inspection (QA), optical chip bar storage (Bar storage), among which the starting process station is slicing, and the ending process station is optical chip bar storage (Bar storage). Figure 5bIn the process flow, the process stations of this process flow section include: optical chip cleavage (Chip cleavage), sorting, visual inspection (AOI), quality inspection (QA), optical chip storage (Chip storage), and life test (life test). The starting process station is optical chip cleavage (Chip cleavage), and the ending process station is optical chip storage (Chip storage). Figure 5c In the process flow, the process stations of this process flow section include: optical chip bar storage (Bar storage), outsourcing processing / receiving, optical chip storage (Chip storage), among which the starting process station is the optical chip bar storage (Bar storage), and the ending process station is the optical chip storage (Chip storage). Figure 5d In the process flow, the process stations of this process flow segment include: chip storage, outsourcing / receiving, and chip packaging. The starting process station is chip storage, and the ending process station is chip packaging. Figure 5e In the process flow section, the process sites include: optical chip warehousing (Chip warehousing) and optical chip packaging (Packing), among which the starting process site is the optical chip warehousing (Chip warehousing) and the ending process site is the optical chip packaging (Packing).

[0110] by Figure 5a and Figure 5b Taking the process flow segment shown as an example, each time the optical chip bar is put into storage (Bar storage) as the end process site of the previous process flow segment, the batch after the end will be stored in the warehouse. When the next process flow segment is to be used, the corresponding batch of raw materials is directly taken from the warehouse to start the process. The two process flow segments can run separately. The previous process flow segment will end directly after it is completed. The next process flow segment does not need to wait. As long as there are batches produced by the previous process flow segment in the warehouse, it can start directly. In this way, the process sites in the next process flow segment do not have to be in a waiting state, avoiding the shelving of the sub-machines in the production line. And it can prevent the system resources from being released, avoiding the waste of system resources and preventing the WIP accumulation bottleneck.

[0111] The process flow management of optical chips involves 12 main process sites. Except for the function page corresponding to the coating, which can be used universally, other function pages have their own functional logic. The functions of each process site in the process flow will be further described in detail in conjunction with the accompanying drawings. For example, the function of slicing includes sub-batch generation, morphological changes, carrier generation and binding; Bar cleavage includes sub-batch generation, carrier generation and binding, but does not include morphological changes, etc. Therefore, these special functions need to be distinguished. In the embodiment of the present disclosure, the process site type and the current product type are used as the restriction conditions for each function page. For example, the slicing function can only process batches whose current process site type is SplitWafer and whose product type is Bar. The specific process site types and batch types are shown in Table 3.

[0112] Table 3: Various process site types and batch types

[0113] Function ProcessOperationType DetailProcessOperationType ProcessOperationUnit Sharding Process SplitWafer Bar Bar cleavage Process BarCleavage Bar Bar Process StackBar Bar Coating Process Bar Unloading Bar Process UnStackBar Bar Visual inspection Inspection AOI Bar / Chip Quality Inspection Inspection QA Bar / Chip Bar storage Process BarPack Bar Chip Cleavage Process ChipCleavage Chip Sorting Process Sorting Chip Chip storage Process ChipPack Chip Outsourcing / receiving Process Receive Bar / Chip

[0114] 1. Sharding

[0115] Slicing means that after the front-end wafer process is completed, before the wafer is cut into bar shape, a wafer in the corresponding Foup (Front Opening Unified Pod) is placed in the Column WafflePak (waffle box) to generate a new batch for downstream wafer flow for subsequent bar cleavage operations (the batch shape is converted from wafer to bar during slicing).

[0116] When slicing, new sub-batches will be generated based on the wafers selected by the user. The number of sub-batches generated will be the same as the number of wafers selected. After these sub-batches are generated, carriers will be generated and uniformly passed through the station. After passing through the station, the form of the current batch will be set to Bar form, the quantity will be updated to the Bar quantity, and the scrapped quantity will be deducted. Then it will be checked whether the sub-batch has become 0. If it has become 0, the batch will execute the Teninate (end) operation and release the carrier information (that is, create new carrier information in the BarCarrierInfo table and bind the current sub-batch that has passed through the station). When all the wafers in the parent batch are separated, the parent batch will also execute the Teninate operation and release the carrier at the same time. Figure 6 It is the logical flow chart of the sharding function. Figure 7 This is a schematic diagram of the sharding function page.

[0117] 2. Bar cleavage

[0118] Bar cleavage is to cleave the whole wafer into bars based on the slicing function, and then cleave the bars into rings according to a certain number to generate new sub-batches for passing through the station. The master batch will be retained at the Bar cleavage process station for the next cleavage. This function page can also perform scrapping operations, but the scrapping is performed on the current master batch, that is, the number of bars in the master batch is deducted after filling in the scrapped quantity.

[0119] The bar splitting function will use the sub-batch separated in the sharding step as the master batch to separate a certain number of bars as a new batch. The number of this master batch is the total number of bars after sharding. On this basis, we separate a new sub-batch or scrap some bars, and the number of bars in the master batch will be deducted accordingly. When the deduction is 0, the master batch will execute the Teninate operation and release the carrier. Figure 8 This is the logic flow chart of Bar decomposition function. Fig. 9 This is a diagram of the Bar cleavage function page.

[0120] 3. Bar

[0121] Bar arranging is a process operation after bar cleavage and before coating. The bars cleaved in the previous step will be neatly arranged on the fixture for the next coating operation. Bar arranging only involves the switching of carriers and does not involve batch updates.

[0122] The fixture used for bar arrangement needs to be created in the CreateStackCarrier page in MES, and its carrier specification information is pre-configured in the system.

[0123] The bar arrangement function allows the user to decide which fixtures the current batch needs to be assigned to. The assigned fixtures cannot be selected again. When allocating, the number of bars in the entire batch needs to be fully allocated. If there are any remaining bars, the bar arrangement cannot be performed. If all bars are scrapped when filling in the scrapping, the current batch will be terminated. Fig.10 This is the logic flow chart of the Bar function. Fig.11 This is a schematic diagram of the Bar function page. Fig.12 A schematic diagram for generating a fixture function page.

[0124] 4. Coating

[0125] The coating process is an important process station in the optical chip process flow. The bars neatly arranged at the bar arrangement process station are uniformly formed into a thin film in the coating machine. After the first side is coated, the second side will be coated immediately.

[0126] The coating machine has a special management point, namely the furnace. This information is recorded on the coating machine. As long as the coating machine performs a coating (each side is counted as one), the furnace will be added to the machine information. When the batch is undergoing the coating process, the furnace information will be recorded twice, once for the front side and once for the back side, separated by " / ". It is convenient for users to track the furnaces of all produced bars, correct the process, and increase production.

[0127] After the Bar is arranged, it can be coated. The coating function uses the general exit page of the Bar process site for exit operation. In this system, except for the special operation pages such as slicing, cleavage, visual inspection, etc. mentioned in the embodiment of this disclosure, the rest of the pages that do not involve batch morphology changes can use the general exit page for exit.

[0128] The coating process station is not only for the coating process step, but also for all Bar module process stations that do not involve carrier and batch changes. Therefore, the coating function is also called the Bar module general exit function.

[0129] The coating function page can only be used to process process sites that do not have special process requirements. Therefore, refer to Table 1, which limits it to batches whose DetailProcessOperationType of the current process site is empty. The corresponding batch only needs to fill in the scrap quantity of each carrier in the current batch at this process site. After confirmation, start the station transfer. If the product quantity of any carrier is found to be 0 during the process, the carrier will be released. After leaving the station, if the product quantity of the current batch is 0, the current batch will be tented (the process of the optical chip segment cannot use the batch scrapping function in MES, and scrapping can only be triggered by reducing the product quantity to 0 when passing the station). Fig.13 It is the logic flow chart of the coating function. Fig.14 This is a schematic diagram of the coating function page.

[0130] 5. Remove the Bar

[0131] Bar unloading refers to the process of transferring the bar from the fixture to the Bar Waffle Pak after the coating process is completed, so that the bar can continue to flow down after coating. The bar unloading function is relative to the bar arranging function, which is to replace the fixture used for coating and use the Bar Waffle Pak to load the coated bar for subsequent testing and outsourcing. Therefore, the bar unloading can only be successful if the current batch of products are fully allocated.

[0132] The main thing to deal with when unloading a bar is the replacement of carriers and scrapped products. After passing the station, all fixtures need to be released, and then new carriers are regenerated and bound to batches based on the user's input. There are two steps to release the fixture. First, delete the fixture information in BarCarrierInfo, and then set the fixture information in durable to an available state for use when arranging the bar next time. The scrapping process is the same as the coating page. If the batch quantity is 0 after deduction, it will be tented. Fig.15 This is the logic flow chart of the Bar uninstallation function. Fig.16 This is a schematic diagram of the Bar uninstallation function page.

[0133] 6. Visual inspection

[0134] Visual inspection is an inspection process station distributed between various main process stations. Its main function is to manually inspect the bars or chips after functions such as slicing, bar cleavage, and coating. Fill in the number of bars or chips with corresponding defects according to the pre-defined defect type. At the same time, the bars or chips that cannot flow to the next process station can be scrapped. If the scrapped number is the total number of bars or chips in the batch, the complete operation is performed on the entire batch, and the wafer cannot be continued.

[0135] The visual inspection process site introduces a new management point for optical chip modules, namely defect management. Users plan all possible defect categories that may occur during the inspection process in advance by product and form in the system. If a defect is found in a bar or chip during the inspection, the user will select the corresponding defect category and fill in the defect quantity. This achieves the purpose of recording defects.

[0136] In the visual inspection function page, defect records and scrap records exist at the same time. Defect records will not affect the number of products in the batch. The product quantity will only be deducted when the scrap is filled in.

[0137] The visual inspection function exists regardless of whether the products in the batch have reached the bar form or the chip form. In the entire process flow, the more visual inspection process stations there are, the more the quality of the produced products can be ensured. Fig.17 This is the logic flow chart of the visual inspection function. Fig.18 This is a diagram of the visual inspection function page.

[0138] 7. Quality inspection

[0139] Quality inspection is used for detailed inspection after some major processes are completed. Generally, the quality department systematically and thoroughly inspects the quality of products produced by the previous processes and records the number of defects. The main operation logic of its page is the same as that of the visual inspection (AOI) page. The difference is that the quality inspection process site cannot scrap the bar or chip, and the sampling quantity and yield rate card control must be filled in.

[0140] The quality inspection function will verify whether the current user is a member of the quality inspection department when passing the station. Only if the user is a member of the quality inspection department, the quality inspection can be successfully passed. During the quality inspection process, the yield rate will be calculated based on the number of random inspections filled in by the user and the final number of defects, and the sub-yield rate will be compared with the yield limit configured for the current quality inspection process site. If the yield rate does not meet the yield rate requirements of the current quality inspection process site, the batch will be paused (held) after leaving the station.

[0141] After the batch is paused (held), the batch will return to the visual inspection process station of the previous step. The user will take corresponding measures on the current batch based on the results of the quality inspection, such as scrapping some products or re-inspecting. Fig.19 This is the logic flow chart of the quality inspection function. Fig. 20 This is a schematic diagram of the quality inspection function page.

[0142] 8. Bar storage

[0143] When the Bar is put into storage, the batch is the last process station of the Bar form. The process station is divided into one storage action and one outbound action. In this system, the storage action is abstracted as TrackIn action, which is performed on the multi-batch entry page of the Bar module; the outbound operation is TrackOut operation, which is completed on the BarPack page. On this page, the batches to be shipped need to be divided into batches, and the divided sub-batches will be processed in-plant and outsourced respectively. Up to 4 batches can be divided at the same time.

[0144] The main function of the Bar warehousing function is to split the bars processed by the previous process into multiple batches by carrier, so that they can be used in the chip process in the factory or sent out for use. The bottleneck of WIP accumulation appears at this process station.

[0145] The Bar entry function will allocate all the batches that have been coated into sub-batches. Users can choose how many sub-batches to generate, and use the shipCode field to determine where the generated sub-batches will be used. Selecting InSide will generate batches to continue the in-factory process, and selecting the corresponding manufacturer number will generate batches for outsourcing to the corresponding manufacturer. The outsourced batches will be held after leaving the station, and need to enter the outsourcing process to continue the wafer production. Fig.21 This is the logic flow chart of the Bar storage function. Fig. 22 This is a schematic diagram of the Bar inventory function page.

[0146] 9. Chip cleavage

[0147] After the Bar is put into the process station, the process flow of Bar shape is also completed. Next, the processed Bar must be cleaved into chips one by one for chip shape process processing and outsourcing processing and performance testing.

[0148] Bars are sorted into batches in the factory and then enter the chip cleavage process station. The chip cleavage process station is the process station that turns bars into chips. At this process station, bars are turned into chips through dicing and splitting operations and placed in rings. This process station involves changes in the form and quantity of batch products, but does not involve changes in batches.

[0149] When chip is cleaved, the number of chips cut out will be calculated based on the number of bars in the current batch, and will be updated to the batch when passing the station. Fig.23 This is the logic flow chart of the Bar storage function. Fig.24 This is a schematic diagram of the Bar inventory function page.

[0150] 10. Sorting

[0151] After chip cleavage, a series of tests need to be performed on the current chip, such as aging test, push-pull test, etc. These tests generally cause certain damage to the chip, so the entire batch of chips cannot be used for testing. Therefore, it is necessary to use the sorting function to separate the current mother batch into corresponding sub-batches to enter the branch to perform the test process. The batch that performs the test process does not have a specific carrier, and the general entry and exit station of the Bar module is used for station operation.

[0152] The sub-batches separated during sorting are fixed, and sub-batches with different names will be held after the generation of the pass station, and then they will enter their own testing process. These tests are mostly destructive, so after this part of the process is completed, the sub-batches will be scrapped through the general pass station page. Fig.25 It is the logic flow chart of the sorting function. Fig.26 This is a schematic diagram of the sorting function page.

[0153] 11. Chip storage

[0154] The chip entry operation is the last process station of the chip flow in the factory. This process station is divided into one entry action and one exit action. In this system, the entry action is abstracted as TrackIn action, which is performed on the multi-batch entry page of the bar module; the exit operation is TrackOut operation, which is completed on the BarPack page. On this page, the batches to be exited need to be divided into batches, and the divided sub-batches will be processed in the factory and outsourced respectively. Up to 4 batches can be divided at the same time. Fig. 27 This is the logic flow chart of the Chip storage function. Fig.28 This is a schematic diagram of the Chip storage function page.

[0155] 12. Outsourcing

[0156] The outsourcing receiving process site only exists in the branch process (Branch) in the process of the Bar module, and is divided into the outsourcing receiving of the BarPack segment and the outsourcing receiving of the Chip Pack segment. The two outsourcing receiving process sites can receive different product forms, so please pay attention to the distinction when building the process. The outsourcing receiving of the Bar Pack segment will correspond the outsourced Bar-shaped batches to the received Chip-shaped batches; the outsourcing receiving of the Chip Pack segment will correspond the outsourced Chip-shaped batches to the received COC / TO / TOSA-shaped batches.

[0157] Defect information will also be recorded during outsourcing acceptance, but the defect information recorded here is based on batches, that is, the defect information here records all defects in a batch.

[0158] In the outsourcing receiving function, whether the current batch needs to be transferred or regenerated will be determined based on whether the batch received by the factory is the same as the batch it sent out. Fig.29 This is the logic flow chart of the outsourced receiving function. Fig.30 and Fig.31 This is a schematic diagram of the outsourcing receiving function page.

[0159] It can be understood that the above-mentioned various method embodiments mentioned in the present disclosure can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present disclosure will not repeat them. It can be understood by those skilled in the art that in the above-mentioned method of the specific implementation method, the specific execution order of each step should be determined according to its function and possible internal logic.

[0160] In a second aspect, an embodiment of the present disclosure provides an optical chip process flow management device, wherein the optical chip process flow includes: a plurality of process sites; the plurality of process sites are arranged in sequence according to a product processing sequence; Fig.32 A schematic diagram of the structure of an optical chip process flow management device provided by an embodiment of the present disclosure, such as Fig.32 As shown, the optical chip process flow management device includes: a determination module 3001 and an update module 3002.

[0161] The determination module 3001 is configured to determine a key process site among multiple process sites according to a product processing sequence; the key process site is a process site where the shape and / or quantity of the current batch of products changes.

[0162] The updating module 3002 is configured to update the form and / or quantity of the current batch of products on the function page corresponding to the key process site in response to the current batch of products being processed to the key process site.

[0163] It should be noted that the various modules in the above optical chip process flow management device can be implemented in whole or in part by software, hardware, or a combination thereof. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules to implement the optical chip process flow management method provided in any of the above embodiments.

[0164] In a third aspect, an embodiment of the present disclosure provides an electronic device, Fig.33 A schematic diagram of the structure of an electronic device provided by an embodiment of the present disclosure is shown in FIG. Fig.33 As shown, the electronic device provided by the embodiment of the present disclosure includes: at least one processor 3011; at least one memory 3012, and one or more I / O interfaces 3013, connected between the processor 3011 and the memory 3012; wherein the memory 3012 stores one or more computer programs that can be executed by at least one processor 3011, and the one or more computer programs are executed by at least one processor 3011, so that at least one processor 3011 can execute the optical chip process flow management method provided in any of the above embodiments.

[0165] Each module in the above electronic device can be implemented in whole or in part by software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module to implement the optical chip process flow management method provided in any of the above embodiments.

[0166] In a fourth aspect, an embodiment of the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor / processing core, implements the optical chip process flow management method provided in any of the above embodiments. The computer-readable storage medium may be a volatile or non-volatile computer-readable storage medium.

[0167] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In a hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable storage medium, which may include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium).

[0168] As is known to those of ordinary skill in the art, the term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable program instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technology, portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. In addition, it is known to those of ordinary skill in the art that communication media typically contain computer-readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery medium.

[0169] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0170] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed entirely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0171] The computer program product described herein may be implemented in hardware, software, or a combination thereof. In one optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK), etc.

[0172] Various aspects of the present disclosure are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0173] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0174] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0175] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of a module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0176] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly noted, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, those skilled in the art will appreciate that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.

[0177] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. A method for managing an optical chip process flow, characterized in that: The optical chip process flow includes: a plurality of process sites; the plurality of process sites are arranged in sequence according to the product processing sequence; the optical chip process flow management method includes: Determine a key process site among the plurality of process sites according to the product processing sequence; the key process site is a process site where the form and / or quantity of the current batch of products changes; In response to the current batch of products being processed to the key process site, the form and / or quantity of the current batch of products is updated on the function page corresponding to the key process site.

2. The optical chip process management method according to claim 1, characterized in that: The step of determining a key process site among the plurality of process sites according to the product processing sequence may also include: In response to the current batch of products being processed to the process site corresponding to the scrap detection, performing a scrap detection on the current batch of products according to the scrap detection logic; According to the scrap detection results, obtain the scrap information of the current batch of products; On the function page of the process site corresponding to the scrap detection, the scrap information of the current batch of products is recorded.

3. The optical chip process management method according to claim 2, characterized in that: The function page of the process site corresponding to the scrap detection records the scrap information of the current batch of products, and then also includes: In response to the current batch of products being processed to the process site corresponding to the defect detection, performing defect detection on the current batch of products according to the defect detection logic; According to the defect detection results, obtain the defect information of the current batch of products; On the function page of the process site corresponding to the defect detection, the defect information of the current batch of products is recorded.

4. The optical chip process management method according to claim 3 is characterized in that: The function page of the process site corresponding to the defect detection records the defect information of the current batch of products, and then also includes: According to the shape and quantity of the current batch of products, the carrier information corresponding to the current batch of products is updated on the function page corresponding to the process site corresponding to the scrap detection and defect detection.

5. The optical chip process management method according to claim 1, characterized in that: The process flow is disassembled into multiple process flow sections; Each of the process flow sections at least includes: a starting process site and an ending process site; In two adjacent process flow segments, the ending process site in the previous process flow segment serves as the starting process site in the next process flow segment.

6. The optical chip process management method according to claim 1, characterized in that: The multiple process sites include: slicing, optical chip bar cleavage, optical chip bar arrangement, coating, optical chip bar transfer, visual inspection, quality inspection, optical chip bar warehousing, optical chip cleavage, sorting, and optical chip warehousing.

7. The optical chip process management method according to claim 6, characterized in that: A plurality of said process sites also include: outsourcing / receiving, life testing and optical chip packaging; The outsourcing / receiving is after the optical chip strips are put into storage and / or the optical chips are put into storage; The optical chip is packaged after the optical chip is put into storage and / or outsourced / received; The lifetime test was performed after the sorting.

8. An optical chip process management device, characterized in that: The optical chip process flow includes: a plurality of process sites; the plurality of process sites are arranged in sequence according to the product processing sequence; the optical chip process flow management device includes: A determination module is configured to determine a key process site among the plurality of process sites according to a product processing sequence; the key process site is a process site where the form and / or quantity of the current batch of products changes; The update module is configured to update the form and / or quantity of the current batch of products on the function page corresponding to the key process site in response to the current batch of products being processed to the key process site.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores one or more computer programs that can be executed by the at least one processor, and the one or more computer programs are executed by the at least one processor so that the at least one processor can execute the optical chip process flow management method as described in any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the computer program implements the optical chip process management method according to any one of claims 1 to 7.

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