A semiconductor structure and a semiconductor process method

Abstract

The application provides a semiconductor structure and a semiconductor process method, which comprises the following steps: pre-bonding a first substrate and a second substrate to obtain a bonding structure; pre-annealing the obtained bonding structure; inserting a sharp object between the first substrate and the second substrate to open the bonding interface and remove bubbles in the bonding interface; extracting the sharp object to re-bond the bonding interface; and annealing the bonding structure after the bubbles are removed to reinforce the bonding. The application inserts a sharp object into the pre-bonding bonding interface to remove the bubbles in the bonding interface between the heterogeneous silicon substrates, and obtains a bonding interface without bubbles without affecting the performance of the semiconductor structure, improves the bonding rate of the heterogeneous bonding structure, is simple and easy to operate, has no influence on other processes, and has no influence on the bonding strength. In addition, the repeated pre-annealing and the increasing temperature can remove the bubbles and reduce the energy consumption.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of semiconductor integrated circuit manufacturing, and particularly relates to a semiconductor structure and a semiconductor process method. BACKGROUND

[0002] Due to the limitation of the thermal conductivity of traditional Si material (the thermal conductivity of silicon is 148 W·m -1 ·K -1 ), in the working scenarios of high-power radio frequency and high-temperature circuits, silicon-based devices will fail due to the failure of heat dissipation and the over-high temperature rise of the devices, which affects the application of silicon-based devices in such working conditions. In order to solve this problem, silicon material is usually integrated with semiconductor materials with excellent heat conduction performance to make up for each other's shortcomings. SiC has attracted widespread attention in society due to its excellent physical properties: wide band gap, high thermal conductivity (490 W·m -1 ·K -1 ), high critical breakdown field, and high electron mobility. Combining Si and SiC through wafer bonding technology into a new generation of semiconductor material will be expected to be used in high-frequency, high-power, high-temperature operating devices, modules and integrated circuits.

[0003] However, the -OH (hydroxyl) groups formed on the surface of the wafer after hydrophilic treatment will generate H2O during high-temperature annealing, and H2O will further react with Si to generate H2, so that a large number of bubbles mainly in the form of H2O and H2 exist in the bonding interface, causing a great reduction in wafer bonding rate.

[0004] In the prior art, the oxidation layer or groove is introduced to absorb or discharge the bubbles in the bonding interface, but the scheme of introducing the oxidation layer has a serious impact on the heat dissipation performance of the formed device, and the scheme of setting the groove will affect the cleanliness and bonding strength of the device, so it cannot be widely and efficiently applied in production.

[0005] Therefore, there is an urgent need for a process method that can remove the bubbles generated in the bonding interface while not having a substantial impact on the performance of the device and the bonding effect.

[0006] It should be noted that the above introduction to the technical background is only for the convenience of clearly and completely describing the technical scheme of the present application and facilitating the understanding of those skilled in the art, and the above technical scheme cannot be considered as known to those skilled in the art only because it is described in the background section of the present application. SUMMARY

[0007] In view of the shortcomings of the prior art, the purpose of the present application is to provide a semiconductor structure and a semiconductor process method for solving the problem of bubbles existing in the bonding interface of the heterogeneous first substrate in the prior art.

[0008] To achieve the above object, the present application provides a semiconductor process method, which comprises the following steps:

[0009] Step 1: providing a first substrate and a second substrate, the first substrate and the second substrate being two silicon-containing substrates with different materials, and neither of the first substrate and the second substrate containing an oxide layer; pre-bonding the first substrate and the second substrate to obtain a bonding structure;

[0010] Step 2: pre-annealing the obtained bonding structure;

[0011] Step 3: inserting a sharp object between the bonding interface of the first substrate and the second substrate, the sharp object opening the bonding interface to remove bubbles in the bonding interface; extracting the sharp object to re-bond the bonding interface;

[0012] Step 4: annealing the bonding structure after removing the bubbles to reinforce the bonding.

[0013] Optionally, before pre-bonding in Step 1, megasonic cleaning is performed on the first substrate and the second substrate.

[0014] Optionally, the pre-bonding temperature in Step 1 is 22-28℃.

[0015] Optionally, the annealing temperature in Step 2 is 300-600℃, and the pre-annealing time is 1-8 hours.

[0016] Optionally, after Step 3, Steps 2 and 3 are repeatedly cycled until the bubbles in the bonding interface are completely removed.

[0017] Optionally, the number of times of repeating Steps 2 and 3 is 2-3 times, and the pre-annealing temperature in Step 2 is increased in turn.

[0018] Optionally, after extracting the sharp object in Step 3 to re-bond the bonding interface, the bonding structure is left standing for more than 8 seconds to restore the bonding of the bonding structure.

[0019] Optionally, the annealing temperature in Step 4 is 700-1000℃, and the annealing time is 1-8 hours.

[0020] Optionally, the first substrate is a silicon substrate, and the second substrate is a silicon carbide substrate.

[0021] The present application also provides a semiconductor structure, the preparation method of which adopts any one of the semiconductor process methods described above.

[0022] As described above, the semiconductor structure and the semiconductor process method of the present application have the following beneficial effects:

[0023] The present application removes the bubbles of the bonding interface between the hetero-substrates by inserting a sharp object to the pre-bonding bonding interface, and obtains the bonding interface without bubbles without affecting the performance of the semiconductor structure, improves the bonding rate of the hetero-bonding structure, and the process equipment is simple and easy to operate, has no influence on other processes, and the bonding strength is not affected.

[0024] The present application utilizes repeated pre-annealing and increasing temperature to remove the bubbles and reduce energy consumption. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 The structure diagram shown in the pre-bonding step in the semiconductor process method of the present application is shown.

[0026] Figure 2 The structure diagram shown in the pre-annealing step in the semiconductor process method of the present application is shown.

[0027] Figure 3 The structure diagram shown in the insertion of the sharp object step in the semiconductor process method of the present application is shown.

[0028] Figure 4 The structure diagram shown in the standing of the bonding structure step in the optional example of the semiconductor process method of the present application is shown.

[0029] Figure 5 The structure diagram shown in the repeated pre-annealing step in the optional example of the semiconductor process method of the present application is shown.

[0030] Figure 6 The structure diagram shown in the repeated insertion of the sharp object step in the optional example of the semiconductor process method of the present application is shown.

[0031] Figure 7 The structure diagram shown in the standing of the bonding structure step in the optional example of the semiconductor process method of the present application is shown.

[0032] Figure 8 The structure diagram shown in the annealing and reinforcement of the bonding step in the semiconductor process method of the present application is shown.

[0033] Figure 9 (a) The structure micrograph obtained after the pre-bonding step in the semiconductor process method of the present application is shown.

[0034] Figure 9 (b) The structure micrograph obtained after the pre-annealing step in the optional example of the semiconductor process method of the present application is shown.

[0035] Figure 9 (c) shows a microstructure of the structure after pre-annealing at 500°C in step 3 of the semiconductor process method of the present application.

[0036] Figure 9 (d) shows a microstructure of the structure after pre-annealing at 700°C in step 4 of the semiconductor process method of the present application.

[0037] Figure 9 (e) shows a microstructure of the structure after testing the bonding energy after pre-annealing at 700°C in step 4 of the semiconductor process method of the present application.

[0038] Figure 9 (f) shows a microstructure infrared image of the structure after pre-annealing at 700°C in step 4 of the semiconductor process method of the present application.

[0039] Element Number Description

[0040] 1. First substrate; 2. Second substrate; 3. Bubble; 4. Sharp object; 5. Bonding interface. DETAILED DESCRIPTION

[0041] The present application is herein described, by way of example only, with reference to the accompanying drawings, wherein:

[0042] As will be realized, the application is capable of modifications in various obvious aspects, all without departing from the application. The application also is capable of other embodiments and of being practiced or being carried out in various ways. Examples of specific implementations are described in detail herein. These and other embodiments of the application are described in detail below.

[0043] To facilitate the description of the embodiments, the use of terms such as "above," "below," "lower," "down," "upper," "up," etc. will be used herein in relation to the drawings. It will be understood that these terms are intended to encompass different orientations of the device in addition to the orientation depicted in the drawings.

[0044] In the context of this document, structures described as being "on" a second feature can include embodiments in which the first and second features form direct contact, as well as embodiments in which additional features are present between the first and second features such that the first and second features do not form direct contact. Thus, the present application is well adapted to carry out the objects and attain the ends and advantages mentioned above as well as those inherent therein. While the application has been depicted, described and is defined by reference to exemplary embodiments of the application, such references do not imply a limitation on the scope of the application, and no such limitation is to be inferred. The spirit and scope of the application are limited only by the claims and the following appended claims, and equivalents thereof.

[0045] It is to be noted that the diagram provided in the present embodiment only schematically illustrates the basic concept of the present application, and thus only components related to the present application are shown in the diagram, rather than being drawn according to the number, shape and size of the components in actual implementation, the type, number and proportion of each component in actual implementation can be arbitrarily changed, and the component layout type can also be more complex.

[0046] As shown in Figures 1-9 The present application provides a semiconductor process method, which comprises:

[0047] Step 1: providing a first substrate 1 and a second substrate 2, the first substrate 1 and the second substrate 2 being two silicon-containing substrates with different materials, neither of the first substrate 1 and the second substrate 2 containing an oxide layer; pre-bonding the first substrate 1 and the second substrate 2 to obtain a bonding structure;

[0048] Step 2: pre-annealing the obtained bonding structure;

[0049] Step 3: inserting a sharp object 4 between the bonding interface 5 of the first substrate 1 and the second substrate 2, the sharp object 4 opening the bonding interface 5 to remove bubbles 3 of the bonding interface 5; extracting the sharp object 4 to make the bonding interface 5 bond again;

[0050] Step 4: annealing the bonding structure after removing the bubbles 3 to reinforce the bonding.

[0051] The semiconductor process method of the present application will be described in detail below with reference to the accompanying drawings, and it is to be noted that the above sequence does not strictly represent the sequence of the semiconductor process method protected by the present application, and those skilled in the art can change it according to the actual preparation steps.

[0052] First, as shown in Figure 1 Step 1 is performed, a first substrate 1 and a second substrate 2 are provided, the first substrate 1 and the second substrate 2 being two silicon-containing substrates with different materials, neither of the first substrate 1 and the second substrate 2 containing an oxide layer; the first substrate 1 and the second substrate 2 are pre-bonded to obtain a bonding structure.

[0053] Specifically, before the bonding of the two silicon-containing substrates, a pre-process is performed to hydrophilicize the substrates, so that the surface of the substrate is covered with -OH (hydroxyl), forming Si-OH (silanol) groups, and these two groups will undergo a polymerization reaction under room temperature and higher temperature annealing in subsequent processes:

[0054] Si-OH + Si-OH → Si-O-Si + H2O (1-1)

[0055] The reaction is reversible at an annealing temperature lower than 425℃, so a subsequent annealing at a higher temperature is needed to form firm Si-O-Si (siloxane) covalent bonds. Under high-temperature annealing, water molecules generated by the polymerization reaction diffuse away from the bonding interface 5 on one hand, and diffuse to the silicon-containing substrate on the other hand, and further react with the Si element therein:

[0056] Si + 2H2O → SiO2+ 2H2 (1-2)

[0057] When the bonding interfaces 5 of the two silicon-containing substrates are bonded, bubbles 3 mainly composed of H2O and H2 are formed, and the existence of the bubbles 3 causes a decrease in the bonding rate, thereby affecting the production efficiency and increasing the production cost.

[0058] In the prior art, a certain thickness of an oxide layer is arranged on the surface of the substrate to be bonded to improve the problem of the bubbles 3 of the interface, and the loose and porous structure of the oxide layer can effectively absorb the generated gas in the annealing process, thereby avoiding the generation of the bubbles 3. However, the oxide layer for absorbing the gas needs to satisfy a certain thickness (about several hundred nanometers), and the thermal conductivity of the oxide layer is very low, only 1.4 W·m -1 K -1 , which has a great influence on the heat dissipation of the subsequent device; and a groove with a certain depth and width is etched on one of the silicon-containing substrates by a photolithography etching process, and then the other silicon-containing substrate is bonded and annealed, the etched groove can be used as an exhaust passage to exhaust part of the gas. However, the etched groove needs to be etched relatively densely to achieve a certain effect, which causes the waste of the substrate in the etched area, and since part of the silicon-containing substrate is etched into the groove, a part of the suspended area is formed between the other substrate, and the etching process easily introduces a certain amount of organic pollutants, which has an influence on the bonding strength and the performance of the subsequently prepared device.

[0059] Therefore, in the present application, the substrate containing the oxide layer is not arranged to avoid the heat dissipation problem, and the groove is not arranged to avoid the problems of the bonding strength and the performance of the device, but the bubbles 3 are removed by the sharp object 4 in the subsequent step 3.

[0060] In one embodiment, before the pre-bonding in step 1, the first substrate 1 and the second substrate 2 are subjected to megasonic cleaning.

[0061] In the present application, the first substrate 1 and the second substrate 2 are subjected to megasonic cleaning before bonding to wash away the particles attached to the surface of the wafer, so as to avoid too many holes during pre-bonding due to too many surface particles, thereby affecting the bonding quality.

[0062] In one embodiment, the temperature for pre-bonding in step 1 is 22-28℃.

[0063] In one embodiment, the temperature for pre-bonding in step 1 is 25°C.

[0064] Specifically, since the polymerization reaction of -OH (hydroxyl) and Si-OH (silanol) in the above formula (1-1) to form Si-O-Si (siloxane) covalent bond can occur at room temperature, the first substrate 1 and the second substrate 2 are spontaneously bonded by van der Waals force without activation.

[0065] In one embodiment, the first substrate 1 is a silicon substrate, and the second substrate 2 is a silicon carbide substrate.

[0066] Then, as shown in FIG. 2, step 2 is performed to pre-anneal the obtained bonding structure. Figure 2

[0067] In one embodiment, the annealing temperature for pre-annealing in step 2 is 300-600°C, and the pre-annealing time is 1-8 hours.

[0068] In one embodiment, the annealing temperature for pre-annealing in step 3 is 400°C, and the annealing time is 6 hours.

[0069] When the annealing temperature is less than 700°C, the bonding between the first substrate 1 and the second substrate 2 is relatively weak, and the strength of the bulk silicon does not reach 2.5 J / m 2 Therefore, the bonded pair can be opened by inserting the sharp object 4 into the bonding interface 5 in the subsequent step. Specifically, when the first substrate 1 or the second substrate 2 is silicon carbide, since silicon carbide has good light transmittance, the change of the bubble 3 in the bonding interface 5 can be directly observed through the silicon carbide substrate.

[0070] Next, as shown in FIG. 3, step 3 is performed to insert a sharp object 4 into the bonding interface 5 between the first substrate 1 and the second substrate 2, open the bonding interface 5 to remove the bubble 3 in the bonding interface 5, and then extract the sharp object 4 to re-bond the bonding interface 5. Figure 3

[0071] The present application inserts a sharp object 4 into the bonding interface 5 in the pre-annealed bonding state, opens the bonding interface 5 by the push of the bonding wave, discharges the bubble 3 generated in the bonding interface 5, and then extracts the sharp object 4 to re-close the bonding interface 5 by the push of the bonding wave, thereby achieving the discharge of the bubble 3 without affecting the heat dissipation performance, cleanliness, and bonding strength of the device.

[0072] In one embodiment, the sharp object 4 is a razor.

[0073] ​​In one embodiment, the thickness of the sharp object 4 is less than or equal to 0.1 mm.

[0074] In one embodiment, as shown in Fig. 4, after the sharp object 4 is extracted in step 3 to re-bond the bonding interface 5, the bonding structure is left to stand for more than 8 seconds to restore the bonding of the bonding structure.

[0075] In one embodiment, the standing time is 10 seconds.

[0076] In one embodiment, after step 3, as shown in Fig. 5, steps 2 and 3 are repeated in a loop until the bubbles 3 in the bonding interface 5 are completely removed. Figures 5-6

[0077] The present application can completely remove the bubbles 3 in the bonding interface 5 by repeating steps 2 and 3 in a loop.

[0078] Specifically, as shown in Fig. 6, when step 3 is performed multiple times, standing is performed after the sharp object 4 is extracted each time. Figure 7

[0079] In one embodiment, steps 2 and 3 are repeated 2-3 times, and the pre-annealing temperature of step 2 is increased each time.

[0080] In one embodiment, steps 2 and 3 are repeated twice, the pre-annealing temperature of step 2 is 400°C in the first time, and the annealing time is 6 hours; the pre-annealing temperature of step 2 is 500°C in the second time, and the annealing time is 6 hours.

[0081] By increasing the pre-annealing temperature in the process of repeating steps 2 and 3 multiple times, the present application can completely remove the bubbles 3. Since the heating temperature needs to be higher than 425°C to completely remove the bubbles 3, only part of the bubbles 3 can be removed in the first pre-annealing at a temperature lower than 425°C, and all of the bubbles 3 can be removed in the second pre-annealing at a temperature higher than 425°C. The first pre-annealing can remove part of the bubbles 3, reducing the number of bubbles 3 that need to be removed in the second pre-annealing. The increase of the annealing temperature can reduce the energy consumption for heating and completely remove the bubbles 3, improving the overall process efficiency.

[0082] Finally, as shown in Fig. 7, step 4 is performed to anneal the bonding structure after the bubbles 3 are removed to reinforce the bonding. Figure 8

[0083] In one embodiment, the annealing temperature in step 4 is 700-1000°C, and the annealing time is 1-8 hours.

[0084] In one embodiment, the annealing temperature in step 4 is 700°C, and the annealing time is 6 hours. ​​​

[0085] The present application makes the bonding strength of the bonding interface 5 reach the body silicon strength by performing the last step of annealing at a temperature above 700 DEG C, makes the bonding interface 5 reach permanent bonding, and makes the intervention of the sharp object 4 during the removal of the bubble 3 not affect the bonding strength between the first substrate 1 and the second substrate 2.

[0086] In one embodiment, as shown in Figs. (a)-(f) in the drawings, Figure 9 Fig. (a) is a microstructure diagram of the bonding structure observed after pre-bonding; Fig. (b) is a microstructure diagram of the bonding structure observed after the first pre-annealing at 400 DEG C; Fig. (c) is a microstructure diagram of the bonding structure observed after the second pre-annealing at 500 DEG C; Fig. (d) is a microstructure diagram of the bonding structure observed after the last annealing at 700 DEG C; Fig. (e) is a bonding energy test of the structure after the last annealing, and when the sharp object 4 is inserted again, the bonding interface 5 is difficult to open and the edge is broken, proving that the bonding energy is greater than 2.5 J / m 2 ; and Fig. (f) is an infrared imaging diagram of the microstructure of the structure after the last annealing, and it can be observed that the bubbles 3 exist in a large amount after the first pre-annealing, and almost all of the bubbles 3 disappear after the last annealing, proving that the scheme in the present application has a good effect on removing the bubbles 3 of the bonding interface 5, and the bonding strength of the bonding interface 5 obtained finally is strong.

[0087] The present application also provides a semiconductor structure, and a semiconductor process method for manufacturing the semiconductor structure.

[0088] In summary, the semiconductor structure and the semiconductor process method of the present application can remove the bubbles of the bonding interface between the hetero-silicon substrates by inserting a sharp object into the pre-bonding bonding interface, obtain a bubble-free bonding interface without affecting the performance of the semiconductor structure, improve the bonding rate of the hetero-bonding structure, the process equipment is simple and easy to operate, has no influence on other processes, and the bonding strength is not affected; in addition, the bubbles are removed while the energy consumption is reduced by repeatedly pre-annealing and increasing the temperature.

[0089] Therefore, the present application effectively overcomes the various shortcomings in the prior art and has high industrial utilization value.

[0090] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical thought disclosed by the present application should be covered by the claims of the present application.

Claims

1. A semiconductor manufacturing process, characterized in that, The semiconductor process method includes: Step 1: Provide a first substrate and a second substrate, which are two silicon-containing substrates of different materials, and neither the first substrate nor the second substrate contains an oxide layer; pre-bond the first substrate and the second substrate to obtain a bonding structure; Step 2: Pre-anneal the obtained bonding structure; Step 3: Insert a sharp object into the bonding interface between the first substrate and the second substrate. The sharp object opens the bonding interface to remove air bubbles. Remove the sharp object to re-bond the bonding interface. After removing the sharp object and re-bonding the bonding interface, let the bonding structure stand for more than 8 seconds to restore the bonding structure. Step 4: Anneal the bonded structure after removing air bubbles to strengthen the bond.

2. The semiconductor process method according to claim 1, characterized in that, Before pre-bonding in step 1, the first substrate and the second substrate are subjected to megasonic cleaning.

3. The semiconductor process method according to claim 1, characterized in that, The temperature for pre-bonding in step 1 is 22-28℃.

4. The semiconductor process method according to claim 1, characterized in that, In step 2, the pre-annealing temperature is 300-600℃, and the pre-annealing time is 1-8 hours.

5. The semiconductor process method according to claim 1, characterized in that, After performing step 3, repeat steps 2 and 3 in a loop until the bubbles at the bonding interface are completely removed.

6. The semiconductor process method according to claim 5, characterized in that, Repeat steps 2 and 3 2-3 times, with the pre-annealing temperature for step 2 increasing sequentially.

7. The semiconductor process method according to claim 1, characterized in that, In step 4, the annealing temperature is 700-1000℃ and the annealing time is 1-8 hours.

8. The semiconductor process method according to claim 1, characterized in that, The first substrate is a silicon substrate, and the second substrate is a silicon carbide substrate.

9. A semiconductor structure, characterized in that, The semiconductor structure is prepared by using the semiconductor process method described in any one of claims 1-8.

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