Double-loop laser automatic frequency locking method constructed by using FPGA based on Pound-Drever-Hall principle

Abstract

The invention discloses an automatic locking method of a double-loop laser, which is constructed by using an FPGA (Field Programmable Gate Array) on the basis of a Pound-Drever-Hall principle. Comprising the steps that a high-carrier-suppression single-side-band modulator is added to a classical Pound-Drever-Hall system, a second control loop jointly composed of a voltage-controlled crystal oscillator, a frequency divider, a frequency mixer and a low-pass filter is newly added, error signals of laser resonant frequency and resonant cavity resonant frequency in an FPGA are divided into a high frequency part and a low frequency part, and the high-carrier-suppression single-side-band modulator is added to the high-carrier-suppression single-side-band modulator. The low-frequency signal controls a PZT of a laser resonant cavity through a control loop constructed by the FPGA, and the high-frequency signal controls a single-sideband modulator through a high-frequency control loop constructed by the FPGA; and meanwhile, an automatic relocking mechanism is added in the system, an automatic relocking algorithm is constructed by utilizing an FPGA (Field Programmable Gate Array), the signal is output only when the signal is in a controllable linear interval, and otherwise, the locking mode is quitted and scanning is restarted until the linear interval is entered. According to the invention, the problem of low frequency locking precision caused by simple locking of the laser PZT in a traditional PDH scheme is solved by constructing a dual-control loop.

Description

Technical Field

[0001] The present invention belongs to the technical field of precision optical sensing and precision test and measurement, and more specifically, relates to a dual-loop frequency automatic locking method and device based on Pound-Drever-Hall (PDH) technology and constructed using a Field Programmable Gate Array (FPGA). Background Art

[0002] With the rapid development of optical technology and the continuous improvement of precision manufacturing technology, optical resonators, as indispensable key components in modern optical research and applications, are important in many key fields such as laser physics, quantum optics exploration, spectral analysis and precision measurement. In these fields, the resonant frequency of the resonant cavity is not only the core of information transmission, but also the key to promoting the performance optimization of many complex optical systems. Therefore, achieving accurate matching and locking of the laser output frequency and the resonant frequency of the resonant cavity has become an important issue that researchers need to solve urgently.

[0003] In order to achieve this goal, researchers need to rely on a technology that can generate an error signal that reflects the frequency difference between the two in real time, and use advanced servo control systems to dynamically adjust the output frequency of the laser to ensure that it can closely track the resonant frequency of the resonant cavity. However, in practical applications, due to the limitations of the equipment itself and the interference of the external environment, the laser often encounters challenges in stably tracking the resonant frequency of the resonant cavity. In response to this problem, scholars at home and abroad have invested a lot of research and are committed to developing new technologies that can achieve high-precision frequency tracking and locking in a wider range. Especially in cutting-edge fields such as optical metrology and optical sensing, there is an urgent need for accurate tracking and locking technology for the resonant cavity frequency, and the shortcomings of current technology highlight the urgency of innovative solutions. Among many technologies, PDH technology has become one of the current research hotspots with its broad application base and mature technical system. Although PDH technology has achieved certain results, its performance in complex environments is still restricted by many factors. It is urgent to overcome these challenges through technical optimization and innovation to further improve its reliability and stability in practical applications.

[0004] In traditional PDH systems, the laser and cavity resonant frequencies are usually locked by adjusting the laser resonant frequency, but this is highly dependent on the performance of the laser. When the laser performance is too poor, precise locking cannot be achieved. Summary of the invention

[0005] The core purpose of the present invention is to make up for the shortcomings of current technology and equipment in the field of high-end equipment manufacturing in terms of precise locking of the resonant frequency of the laser and the resonant cavity. To this end, we innovatively proposed a dual-loop frequency automatic tracking method based on the Pound-Drever-Hall principle and implemented using FPGA technology, which is specially designed for the efficient and accurate tracking and locking of the laser to the resonant frequency of the resonant cavity. This method constructs a high-frequency and low-frequency dual control loop system, and through the powerful processing power of FPGA, it realizes flexible configuration and optimization of the control loop. Combined with the self-designed automatic relocking algorithm, the system can monitor and adjust the output frequency of the laser in real time to ensure that it is highly consistent with the resonant frequency of the resonant cavity, thereby achieving high-precision and high-stability frequency tracking and locking, providing strong support for technological progress in the field of high-end equipment manufacturing.

[0006] The specific scheme of the present invention is that we added a single-sideband modulator constructed by a dual Mach-Zehnder electro-optical modulator to the system, which provides a stable frequency reference for the laser; secondly, we constructed a dual control loop based on FPGA, in which the low-frequency control loop adjusts the laser PZT, that is, the first control loop realizes the preliminary adjustment of the system, and the high-frequency control module completes the adjustment of the single-sideband modulator, that is, the second control loop completes the fine adjustment of the system; finally, based on the above work and combined with actual needs, we added an automatic relocking algorithm to the system to ensure that the system can run smoothly in complex environments.

[0007] The following steps are involved:

[0008] (1) A dual-loop PDH laser frequency locking system is composed of laser, single-sideband modulator, electro-optic modulator, fiber resonator, photodetector, phase-locked loop, PZT, analog-to-digital converter, digital-to-analog converter, low-pass filter, mixer, band-pass filter, high-frequency controller, low-frequency controller, and automatic relocking module constructed by FPGA.

[0009] (2) After the system is powered on, the host computer first transmits the initial voltage control information to the FPGA through the optical fiber port combined with the QSFP module, and then the FPGA output voltage drives the laser through the control circuit to complete the laser frequency sweep;

[0010] (3) After the frequency sweep is completed, the error signal is obtained by using a photodetector and transmitted to the FPGA for processing through an analog-to-digital converter. After passing through a bandpass filter, a mixer, and a low-pass filter, a DC signal and a frequency-doubled signal are obtained;

[0011] (4) A low-pass filter is used to distinguish between a DC signal and a double-frequency signal. The DC signal is transmitted to the first control loop and judged by the automatic relocking module. If it is in the linear range, a control signal is output through the low-frequency controller. Otherwise, a triangular wave is output to continue the frequency sweep. The double-frequency signal is transmitted to the second control loop and output through the high-frequency controller;

[0012] In order to improve the accuracy of the PDH frequency locking system, the single sideband modulator in step (1) is an IQ modulator. By accurately modulating its five voltage signals, a high carrier suppression single sideband signal is obtained, thereby providing a stable frequency reference for the laser. The IQ modulator consists of three Mach-Zehnder modulators. By reasonably setting the control voltage of the Mach-Zehnder modulator, a high carrier suppression single sideband modulation signal is obtained. We set the first two sub-modulators to work at the minimum point and the third modulator to work at the orthogonal point to obtain the +1-order sideband. At this time, other high-order signals and carrier signals can be ignored. The modulation index of the electro-optic modulator is selected as 1.082 to ensure that the energy is concentrated on the carrier and the positive and negative first-order sidebands, and to ensure the signal-to-noise ratio of the signal. The conversion rate of the analog-to-digital converter and the digital-to-analog converter is 250MHz / s, with an accuracy of 16 bits.

[0013] (5) The main goal of the QSPF plus fiber port design in step (2) is to use the parallel processing capabilities of the FPGA to implement a low-latency, high-throughput UDP protocol stack. This requires us to optimize the data path during design, reduce the processing time of each data packet, and effectively manage memory resources to support high-speed data flows. The main design contents include:

[0014] 1) Datagram encapsulation and parsing: In order to achieve efficient datagram encapsulation and parsing, a set of high-speed logic is designed to quickly process the data from the application layer, add the UDP header, and then send the datagram to the physical layer. Similarly, the receiving path needs to quickly remove the UDP header and pass the data to the application layer. Specific hardware logic is designed in the FPGA to take advantage of parallel computing to efficiently calculate the checksum.

[0015] 2) Datagram encapsulation and transmission: Application layer data is first sent to a pre-processing module, which is responsible for adding the UDP protocol header. The parallel processing capability of FPGA allows multiple data packets to be added with headers and checksums to be calculated at the same time to speed up data processing.

[0016] 3) Datagram reception and parsing: When a datagram arrives at the FPGA, it first enters the receive buffer. Then, a dedicated parsing module is built to remove the UDP header and verify the checksum to ensure data integrity. The checksum calculation is completed by processing a large number of data bits in parallel.

[0017] (6) In step (3), the expression of the laser signal is shown in formula (1), the signal after being modulated by the single-sideband modulator is shown in formula (2), the expression of the signal detected by the photodetector after passing through the resonant cavity is shown in formula (3), and the error signal is shown in formula (4).

[0018] E in = E0e iω0t (1)

[0019] where E in is the output signal of the laser, E0 is the laser intensity, and ω0 represents the angular frequency of the laser output signal.

[0020]

[0021] where E SSB is the signal output by the laser through the single-sideband modulator, J N (β SSB ) is the Nth-order Bessel function, β SSB is the modulation degree of the single-sideband modulator and is related to the half-wave voltage of the modulator.

[0022]

[0023] where I PD is the output signal of the photodetector, P and Q are both loss parameters of the fiber optic resonant cavity, and ω m is the modulation frequency of the electro-optic modulator.

[0024]

[0025] where Error out is the error signal

[0026] (7) To save FPGA resources, the FIR filter constructed by the FPGA used in step (4) ensures that the filter order is less than 200 by reasonably optimizing the stopband and passband frequencies. The automatic relocking module analyzes whether the intensity V FRR of the transmission spectrum line of the resonant cavity is between the upper limit V1 and the lower limit V2 of the linear interval. Only when V2 < V FRR < V1 is the system in the linear interval. If it is within the interval, the low-frequency controller outputs a control signal; otherwise, the frequency sweep is restarted. The signal output by the high-frequency controller passes through an arbitrary signal generator constructed by the FPGA to output a sine wave signal, which is mixed with the phase-locked loop signal, and the mixing result is output as the control signal of the single-sideband modulator to achieve precise adjustment of the single-sideband modulator. Description of the Drawings

[0027] Figure 1 is the flowchart of the dual-loop laser automatic frequency locking system provided by this application;

[0028] Figure 2 It is a block diagram of the dual-loop laser automatic frequency locking system provided by the present application;

[0029] Figure 3 It is a signal transmission flow chart provided by this application;

[0030] Figure 4 This application provides an MZM single sideband modulator

[0031] Figure 5 It is a flow chart of the automatic relocking algorithm provided by this application; DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the following will further describe in detail the automatic frequency locking method of a dual-loop laser constructed based on the Pound-Drever-Hall principle using FPGA in conjunction with the accompanying drawings and specific implementation methods of the present invention.

[0033] See also Figure 1 :This application provides a dual-loop laser automatic frequency locking method constructed based on the Pound-Drever-Hall principle using FPGA, including the following steps: first, a dual-loop PDH system is constructed using a laser, a single-sideband modulator, an electro-optical modulator, an optical fiber resonator, and a phase-locked loop to obtain an error curve, and the deviation signal is transmitted to the FPGA for processing through an analog-to-digital converter, and a discriminator composed of a bandpass filter, a mixer, and a low-pass filter is constructed using the FPGA to obtain an error signal, and an automatic relocking algorithm is used to determine whether the current system is in a linear range. If so, it enters the locking mode for automatic processing, otherwise it re-scans the frequency until it enters the linear range, and finally a low-pass filter is used to distinguish between high-frequency signals and low-frequency error signals, and transmit them to the low-frequency controller and the high-frequency controller respectively, so as to realize the construction of a high-precision dual-loop laser frequency locking system.

[0034] See also Figure 2 , which is a structural diagram of the dual-loop laser automatic frequency locking system provided in this application, specifically including a laser, a single-sideband modulator, an electro-optical modulator, a fiber resonant cavity, a digital-to-analog converter, an analog-to-digital converter, a PZT, a phase-locked loop, a data processing module composed of a bandpass filter, a mixer, and a low-pass filter designed based on FPGA, and a high-frequency control loop and a low-frequency control loop constructed by FPGA.

[0035] See also Figure 3, which is a signal transmission flow chart of the implementation case of this application, describes the signal transmission process during use. First: after the system is powered on, the host computer transmits the initial voltage control information to the FPGA through the optical fiber port combined with the QSPF protocol, and then the FPGA outputs the voltage through the arbitrary signal generator 1 to drive the laser PZT through the laser's own control circuit. This process realizes the open-loop control of the laser, completes the laser's frequency sweep and obtains the error signal; secondly: the error signal is captured by the photoelectric detector and passed to the FPGA for processing through the analog-to-digital converter; then: the FPGA processes the error signal, and successively obtains the DC control signal and the frequency multiplication signal through bandpass filtering and mixing, wherein the high-frequency signal outputs the sinusoidal signal through the high-frequency controller and the arbitrary signal generator 3 to become the input signal of the phase-locked loop, completes the precise modulation of the single-sideband modulator, and the DC signal is input to the automatic relocking mechanism, and the automatic relocking algorithm is used to determine whether the current system is running in the linear range. If so, the DC control signal is output through the low-frequency controller, otherwise the laser is restarted to scan until it enters the linear range, and finally the above-mentioned dual-loop control system completes the precise control of the laser.

[0036] See also Figure 4 The single sideband modulator used in this application is a dual Mach-Zehnder modulator, which is controlled by a total of five control signals. Specifically, by reasonably configuring three DC control voltages and two RF control voltages, the output of a high carrier suppressed single sideband signal is achieved.

[0037] See also Figure 5 , is a flowchart of the automatic relocking algorithm provided by the present application. Specifically, the system first analyzes the relationship between the resonant cavity transmission spectrum and the error curve to obtain the intensity V of the resonant cavity transmission spectrum when the system is in the linear range. FRR The upper limit V1 and the lower limit V2 are only valid when V2 <V FRR

Claims

1. A dual-loop laser automatic frequency locking method based on the Pound-Drever-Hall principle using FPGA, characterized in that: The following steps are involved: (1) Fiber laser, single sideband modulator, electro-optic modulator, fiber resonator, photodetector, programmable gate array (FPGA), PZT actuator, and phase-locked loop composed of voltage-controlled crystal oscillator, frequency divider, mixer, and low-pass filter together constitute a dual-loop laser automatic frequency locking system. (2) The resonant cavity, photodetector, and data processing module built on FPGA together constitute the frequency discrimination module, in which the photodetector collects the error signal of the resonant frequency of the reaction laser and the resonant cavity, and transmits it to the FPGA via the analog-to-digital converter. (3) The error signal inside the FPGA is demodulated by a bandpass filter, a mixer, and a low-pass filter and is divided into a high-frequency part and a DC part. (4) The DC part passes through the automatic relocking module constructed by FPGA and then through the low-frequency control loop and the analog-to-digital converter to the laser PZT, completing the construction of the first loop and achieving preliminary adjustment of the laser frequency locking system. (5) The high-frequency error part is output to the single-sideband modulator as a radio frequency control signal through the high-frequency control loop constructed by FPGA, completing the construction of the second loop and achieving fine adjustment of the laser frequency locking system. (6) The error signal obtained in step (2) is transmitted to the host computer through the optical fiber interface combined with the QSPF technology, thereby optimizing the performance of the PDH frequency tracking system, realizing real-time observation of the frequency locking effect, and further completing the construction of a high-precision PDH frequency tracking system.

2. According to claim 1, a dual-loop laser automatic frequency locking method constructed based on the Pound-Drever-Hall principle using FPGA is characterized in that: The single sideband modulator in step (1) is a dual parallel Mach-Zehnder (MZM) interferometer modulator, and a single sideband modulated signal with high carrier suppression is obtained by reasonably configuring two RF signals and three DC signals.

3. A dual-loop laser automatic frequency locking method based on the Pound-Drever-Hall principle using FPGA according to claim 1 or claim 2, characterized in that: The specific process of obtaining the error signal in step (2) is as follows: the laser output signal is modulated into a stable high-carrier suppressed single-sideband signal after passing through a single-sideband modulator, and then transmitted to the resonant cavity after passing through an electro-optical modulator. By reasonably configuring the parameters of the optical fiber resonant cavity, an error signal reflecting the resonant frequency of the laser and the resonant cavity is obtained. The signal is converted from an optical signal to an electrical signal through a photodetector and then transmitted to the PFGA through an analog-to-digital converter.

4. A dual-loop laser automatic frequency locking method based on the Pound-Drever-Hall principle using FPGA according to claims 1 to 3, characterized in that: Step (3) is specifically as follows: first, a bandpass filter is used to extract an error signal of the reaction laser and the resonant cavity whose frequency is equal to the modulation frequency of the electro-optic modulator, the error signal is mixed with a mixer, and then a low-pass filter is used to divide the error signal into a high-frequency part and a low-frequency part.

5. A dual-loop laser automatic frequency locking method constructed based on the Pound-Drever-Hall principle using FPGA according to claims 1 to 4, characterized in that: The construction of the first loop in step (4) specifically includes: after the DC signal extracted by the low-pass filter passes through the PID module constructed by the FPGA, the error signal is converted into a control signal. Because the PDH system is only effective in the linear range of the system, in order to ensure the stable operation of the system, we added an automatic relocking algorithm in the first loop to determine whether the current system is running in the linear range. If the system is in the linear range, the PID signal output is maintained, otherwise the current mode is exited, and the FPGA outputs a triangle wave to start the scanning mode, and the above process is continued until the system enters the linear range.

6. A dual-loop laser automatic frequency locking method based on the Pound-Drever-Hall principle using FPGA according to claims 1 to 5, characterized in that: The high-frequency control loop constructed using FPGA in step (5) is specifically as follows: the high-frequency signal is adjusted by the controller and then output to the phase-locked loop through the arbitrary signal generator of the FPGA to complete the fine control of the single-sideband modulator, wherein the phase-locked loop is composed of a voltage-controlled crystal oscillator, a low-pass filter, a frequency divider, and a mixer.

7. A dual-loop laser automatic frequency locking system based on the Pound-Drever-Hall principle using FPGA, characterized in that: The hardware includes two major modules: the first module is a hardware system composed of a laser, a single-sideband modulator, an electro-optic modulator, a fiber resonant cavity, and a photodetector, which completes the acquisition of the error signal of the reaction laser and the resonant cavity resonance peak; the second module is a dual control loop composed of FPGA, PZT, and a phase-locked loop, in which the low-frequency controller and PZT in the FPGA constitute the first control loop, and the high-frequency controller and phase-locked loop in the FPGA constitute the second control loop.

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