Seven-level inverter topology and control method thereof

Abstract

The invention discloses a seven-level inverter topology and a control method thereof, and relates to the technical field of multi-level structures, the topology comprises an upper bridge arm and a lower bridge arm which are mutually symmetrical except the diode direction, and a plurality of switch tubes, a direct current bus capacitor and a flying capacitor of the topology are connected according to a specific rule. Working modes with seven different output voltages are realized by controlling the conduction state of the switch tube; the topology realizes voltage division through the DC bus capacitor, realizes intermediate level transition through the flying capacitor, combines an optimized circuit structure and a control strategy, has the advantages of simple circuit design, high efficiency, stable output voltage and the like, and is widely applicable to high-voltage and high-power inverter systems.

Description

Technical Field

[0001] The present invention relates to the technical field of multi-level structures, and in particular to a seven-level inverter topology and a control method thereof. Background Art

[0002] Three-level and multi-level converters have become one of the hot topics of research and application at home and abroad in recent years due to their outstanding advantages in high voltage, high quality and high efficiency. Among them, the diode clamped (NPC) three-level structure has been the most widely studied and applied due to its simple structure and high reliability.

[0003] In addition to MMC, typical medium-voltage inverters include diode-clamped (Neutral Point Clamped, NPC) and H-bridge cascade (Cascaded H-Bridge, CHB) multi-level inverters. Ansalda, ABB, Siemens, GE and other companies have medium-voltage high-power converter products for ships based on NPC and CHB. Generally speaking, the main topology used in systems below 6kV is the diode-clamped three-level converter topology, such as ABB's PCS6000 series products (power 32MW) and ACS6000 series products (power 27MW). In order to improve the conversion performance of multi-level inverter circuits, ABB has also launched 5L-NPC products (ACS5000 series, etc.). Systems above 6kV can use CHB or a hybrid topology of NPC+CHB.

[0004] In the integrated power system of ships with a DC voltage of 4kV, NPC three-level inverters can select 3300VIGBT devices, which can achieve high voltage and high power output without connecting devices in series. However, as the power demand of ships gradually increases, the ship power system is developing towards 10kV, and the existing NPC topology and power device level can no longer meet the requirements. Summary of the invention

[0005] The object of the present invention is to provide a seven-level inverter topology and a control method thereof, so as to achieve high voltage and high power output while improving circuit efficiency and output voltage stability.

[0006] The technical solution of the present invention is: to provide a seven-level inverter topology, which includes: an upper bridge arm and a lower bridge arm; one end of the upper bridge arm and the lower bridge arm are connected to the bus, and the other end is connected to the inverter, and the bus voltage is U dc ;

[0007] The upper bridge arm includes the DC bus capacitor C d1 、Flying capacitor C f1 、Diode D 1 , D 3 , switch tube S1 , S 2 , S 5 , S 6 , S 7 ; The lower bridge arm includes the DC bus capacitor C d2 、Flying capacitor C f2 、Diode D 2 , D 4 , switch tube S 3 , S 4 , S 8 , S 9 , S 10 ;

[0008] For the upper bridge arm: DC bus capacitor C d1 The negative electrode is grounded, and the positive electrode is connected to the switch tube S 5 , S 6 , S 7 Connected to the inverter, DC bus capacitor C d1 The negative electrode also passes through the switch tube S 2 , S 1 Connect to the flying capacitor C f1 Positive electrode, flying capacitor C f1 The positive electrode is also connected to the switch tube S 5 , S 6 Between; flying capacitor C f1 The cathode of the diode D is connected 1 The anode of the diode D 1 The cathode is connected to the switch tube S 1 , S 2 Between; flying capacitor C f1 The cathode of the diode D 3 The anode of the diode D 3 The cathode is connected to the switch tube S 6 , S 7 between;

[0009] For the lower bridge arm: DC bus capacitor C d2 The positive electrode is grounded, and the negative electrode is connected to the switch tube S 10 , S 9 , S 8 Connected to the inverter, DC bus capacitor C d2 The positive electrode also passes through the switch tube S 3 , S 4 Connect to the flying capacitor C f2 Negative electrode, flying capacitor C f2 The negative electrode is also connected to the switch tube S 10 , S 9 Between; flying capacitor C f2 The positive pole of the diode D is connected 2The cathode of diode D 2 The anode of the switch tube S 3 , S 4 Between; flying capacitor C f2 The positive pole of the diode D 4 The cathode of diode D 4 The anode of the switch tube S 8 , S 9 between;

[0010] For the connection of the upper and lower bridge arms: DC bus capacitor C d1 The negative pole of the DC bus capacitor C is connected d2 The positive electrode of the flying capacitor C f1 The negative terminal of the flying capacitor C f2 The positive pole of diode D 1 The anode of the diode D is connected 2 The cathode of diode D 3 The anode of the diode D is connected 4 The cathode of the switch tube S 2 Connect switch tube S 3 , switch tube S 7 Connect switch tube S 8 .

[0011] In any of the above technical solutions, further, the DC bus capacitor C d1 and C d2 Located at the positive and negative ends of the DC bus, C d1 and C d2 The voltage of the bus is half of the bus voltage, that is, U dc / 2; two flying capacitors C f1 and C f2 Located between bus capacitors, at U dc / 2 and 0 produce an intermediate voltage, C f1 and C f2 The voltage is 1 / 3 of the DC bus voltage, that is, U dc / 3; Each switch tube only needs to withstand the voltage of a flying capacitor or the voltage difference of adjacent levels. The maximum voltage stress of each switch tube and diode is U dc / 3.

[0012] A seven-level inverter topology control method based on any of the above-mentioned seven-level inverter topologies is also provided, the control method comprising: controlling the switching state of each switch tube to form several working schemes with a total of 7 different output voltages, and outputting different voltages to subsequent inverters.

[0013] In any of the above technical solutions, further, the topology outputs 1 / 2U to the subsequent inverter dc The work plan is:

[0014] Switching tube S 5 , S 6 , S 7 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is 1 / 2U dc .

[0015] In any of the above technical solutions, further, the topology outputs 1 / 3U to the subsequent inverter dc There are four work plans, in order:

[0016] Switching tube S 3 , S 6 , S 7 Open, other switch tubes are turned off, diode D 2 Flying capacitor C f1 Discharge, current flows out to the inverter, the output level is 1 / 3U dc ;

[0017] Switching tube S 2 , S 6 , S 7 Open, other switch tubes are turned off, diode D 1 Flying capacitor C f1 Charging, current flows from the inverter, the output level is 1 / 3U dc ;

[0018] Switching tube S 3 , S 4 , S 7 Open, other switch tubes are turned off, diode D 3 Flying capacitor C f2 Discharge, current flows out to the inverter, the output level is 1 / 3U dc ;

[0019] Switching tube S 3 , S 4 , S 8 Open, other switch tubes are turned off, diode D 4 Flying capacitor C f2 Charging, current flows from the inverter, the output level is 1 / 3U dc .

[0020] In any of the above technical solutions, further, the topology outputs 1 / 6U to the subsequent inverter dc There are three working plans, in order:

[0021] Switching tube S 5 , S 7Open, other switch tubes are turned off, diode D 3 Flying capacitor C f1 Charging, current flows out to the inverter, the output level is 1 / 6U dc ;

[0022] Switching tube S 5 , S 8 Open, other switch tubes are turned off, diode D 4 Flying capacitor C f1 Discharge, current flows from the inverter, the output level is 1 / 6U dc ;

[0023] Switching tube S 6 , S 7 , S 10 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is 1 / 6U dc .

[0024] In any of the above technical solutions, further, there are two working solutions for the topology to output 0 to the subsequent inverter, which are:

[0025] Switching tube S 3 , S 7 Open, other switch tubes are turned off, diode D 2 , D 3 Flying capacitor C f1 , C f2 All are discharged, the current flows out to the inverter, and the output level is 0;

[0026] Switching tube S 2 , S 8 Open, other switch tubes are turned off, diode D 1 , D 4 Flying capacitor C f1 , C f2 The current flows into the inverter and the output level is 0.

[0027] In any of the above technical solutions, further, the topology outputs -1 / 6U to the subsequent inverter dc There are three working plans, in order:

[0028] Switching tube S 7 , S 10 Open, other switch tubes are turned off, diode D 3 Flying capacitor C f2 Discharge, current flows out to the inverter, the output level is -1 / 6U dc ;

[0029] Switching tube S 8 , S 10 Open, other switch tubes are turned off, diode D 4 Flying capacitor C f2 Charging, current flows from the inverter, the output level is -1 / 6U dc ;

[0030] Switching tube S 5 , S 8 , S 9 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is -1 / 6U dc .

[0031] In any of the above technical solutions, further, the topology outputs -1 / 3U to the subsequent inverter dc There are four work plans, in order:

[0032] Switches S1, S2, and S7 are turned on, and other switches are turned off. Diode D3 is turned on, flying capacitor Cf1 is charged, and current flows out to the inverter. The output level is -1 / 3Udc.

[0033] Switches S1, S2, and S8 are turned on, other switches are turned off, and diode D4 is turned on. Flying capacitor Cf1 is discharged, current flows from the inverter, and the output level is -1 / 3Udc;

[0034] Switches S3, S8, and S9 are turned on, and other switches are turned off. Diode D2 is turned on, flying capacitor Cf2 is charged, and current flows out to the inverter. The output level is -1 / 3Udc.

[0035] The switch tubes S2, S8, and S9 are turned on, and the other switch tubes are turned off. The diode D1 is turned on, the flying capacitor Cf2 is discharged, and the current flows into the inverter. The output level is -1 / 3Udc.

[0036] In any of the above technical solutions, further, the topology outputs 1 / 2U to the subsequent inverter dc The work plan is:

[0037] Switching tube S 8 , S 9 , S 10 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is -1 / 2U dc .

[0038] The beneficial effects of the present invention are:

[0039] The technical solution in the present invention realizes precise grading of the output voltage by constructing a seven-level inverter topology and utilizing DC bus capacitor voltage division and flying capacitor intermediate level transition. It has the advantages of simple circuit structure, high efficiency, good voltage stability, and high power device utilization, and is suitable for high voltage and high power application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The advantages of the above and additional aspects of the present invention will become apparent and easily understood in the description of the embodiments in conjunction with the following drawings, in which:

[0041] Figure 1 is a structural schematic diagram of a seven-level inverter topology according to an embodiment of the present invention;

[0042] Figure 2 is 1 / 2U of a seven-level inverter topology according to an embodiment of the present invention. dc Equivalent circuit diagram;

[0043] Figure 3 The first 1 / 3U of the seven-level inverter topology according to an embodiment of the present invention is dc Equivalent circuit diagram;

[0044] Figure 4 The second 1 / 3U of the seven-level inverter topology according to an embodiment of the present invention dc Equivalent circuit diagram;

[0045] Figure 5 The third 1 / 3U of the seven-level inverter topology according to an embodiment of the present invention is dc Equivalent circuit diagram;

[0046] Figure 6 The fourth 1 / 3U of the seven-level inverter topology according to an embodiment of the present invention dc Equivalent circuit diagram;

[0047] Figure 7 The first 1 / 6U seven-level inverter topology according to an embodiment of the present invention is dc Equivalent circuit diagram;

[0048] Figure 8 The second 1 / 6U seven-level inverter topology according to an embodiment of the present invention is dc Equivalent circuit diagram;

[0049] Fig. 9 The third 1 / 6U of the seven-level inverter topology according to an embodiment of the present invention dc Equivalent circuit diagram;

[0050] Fig.10 is a schematic diagram of a first zero output voltage equivalent circuit of a seven-level inverter topology according to an embodiment of the present invention;

[0051] Fig.11 is a schematic diagram of a second zero output voltage equivalent circuit of a seven-level inverter topology according to an embodiment of the present invention;

[0052] Fig.12 The first type of seven-level inverter topology according to an embodiment of the present invention is 1 / 6U dc Equivalent circuit diagram;

[0053] Fig.13 The second type of seven-level inverter topology according to an embodiment of the present invention is 1 / 6U dc Equivalent circuit diagram;

[0054] Fig.14 It is the third type of the seven-level inverter topology according to an embodiment of the present invention - 1 / 6U dc Equivalent circuit diagram;

[0055] Fig.15 The first type of seven-level inverter topology according to an embodiment of the present invention is 1 / 3U dc Equivalent circuit diagram;

[0056] Fig.16 The second type of seven-level inverter topology according to an embodiment of the present invention is 1 / 3U dc Equivalent circuit diagram;

[0057] Fig.17 It is the third type of the seven-level inverter topology according to an embodiment of the present invention - 1 / 3U dc Equivalent circuit diagram;

[0058] Fig.18 It is the fourth type of the seven-level inverter topology according to an embodiment of the present invention - 1 / 3U dc Equivalent circuit diagram;

[0059] Fig.19 is a -1 / 2U of a seven-level inverter topology according to an embodiment of the present invention. dc Schematic diagram of the equivalent circuit. DETAILED DESCRIPTION

[0060] In order to more clearly understand the above-mentioned purpose, features and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

[0061] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited to the specific embodiments disclosed below.

[0062] like Figure 1 As shown, this embodiment provides a seven-level inverter topology and a control method thereof, and the topology includes:

[0063] Two DC bus capacitors C d1 , C d2 , two flying capacitors C f1 , C f2 , 10 switch tubes S 1 To S 10 and four diodes D 1 To D 4 .

[0064] Two DC bus capacitors C d1 and C d2 They are located at the positive and negative ends of the DC bus respectively, playing a voltage dividing role, making the bus voltage U dc Remains stable at different levels. C d1 and C d2 The voltage of the bus is half of the bus voltage (i.e. U dc / 2), thereby providing grading support for the output voltage of the circuit.

[0065] Two flying capacitors C f1 and C f2 The intermediate level transition is achieved at the output level by charging and discharging the capacitor. The two flying capacitors C f1 and C f2 Located between bus capacitors, at U dc / 2 and 0 to generate an intermediate voltage. In this voltage divider topology, C f1 and C f2 The voltage is 1 / 3 of the DC bus voltage (i.e. U dc / 3) to achieve voltage grading between different levels.

[0066] In addition, the voltage stress of the switch tube and the diode is determined by the maximum voltage difference between their two ends. Each switch tube only needs to withstand the voltage of a flying capacitor or the voltage difference of adjacent levels. Since the voltage of the flying capacitor is U dc / 3, so the maximum voltage stress of each switch tube and diode is U dc / 3. This effectively increases the maximum withstand voltage range of the topology.

[0067] Each switch tube in the circuit is controlled by a gate signal to control its on or off state, thereby changing the current flow direction and output level. These switch tubes form multiple different paths according to their connection positions, forming a total of seven levels of voltage output.

[0068] The circuit connects diodes D in different branches 1 To D 4 , control the direction of current and prevent the generation of reverse current.

[0069] The circuit is divided into an upper bridge arm and a lower bridge arm, which are symmetrical to each other except for the direction of the diode. The upper bridge arm includes the DC bus capacitor C d1 、Flying capacitor C f1 、Diode D 1 , D 3 , switch tube S 1 , S 2 , S 5 , S 6 , S 7 ; The lower bridge arm includes the DC bus capacitor C d2 、Flying capacitor C f2 、Diode D 2 , D 4 , switch tube S 3 , S 4 , S 8 , S 9 , S 10 .

[0070] Specifically, for the upper bridge arm: DC bus capacitor C d1 The negative electrode is grounded, and the positive electrode is connected to the switch tube S 5 , S 6 , S 7 Connected to the inverter, DC bus capacitor C d1 The negative electrode also passes through the switch tube S 2 , S 1 Connect to the flying capacitor C f1 Positive electrode, flying capacitor C f1 The positive electrode is also connected to the switch tube S 5 , S 6 Between; flying capacitor C f1 The cathode of the diode D is connected 1 The anode of the diode D 1 The cathode is connected to the switch tube S 1 , S 2 Between; flying capacitor C f1 The cathode of the diode D 3 The anode of the diode D 3 The cathode is connected to the switch tube S 6 , S 7between.

[0071] For the lower bridge arm: DC bus capacitor C d2 The positive electrode is grounded, and the negative electrode is connected to the switch tube S 10 , S 9 , S 8 Connected to the inverter, DC bus capacitor C d2 The positive electrode also passes through the switch tube S 3 , S 4 Connect to the flying capacitor C f2 Negative electrode, flying capacitor C f2 The negative electrode is also connected to the switch tube S 10 , S 9 Between; flying capacitor C f2 The positive pole of the diode D is connected 2 The cathode of diode D 2 The anode of the switch tube S 3 , S 4 Between; flying capacitor C f2 The positive pole of the diode D 4 The cathode of diode D 4 The anode of the switch tube S 8 , S 9 between.

[0072] For the connection of the upper and lower bridge arms: DC bus capacitor C d1 The negative pole of the DC bus capacitor C is connected d2 The positive electrode of the flying capacitor C f1 The negative electrode of the flying capacitor C f2 The positive pole of diode D 1 The anode of the diode D is connected 2 The cathode of diode D 3 The anode of the diode D is connected 4 The cathode of the switch tube S 2 Connect switch tube S 3 , switch tube S 7 Connect switch tube S 8 .

[0073] Control the switch state of each switch tube to form 18 voltage output schemes, as shown in Table 1 below:

[0074] Table 1 18 voltage output solutions

[0075]

[0076] like Figures 2 to 19 As shown, the above schemes are all represented by the attached figure with their actual connected equivalent circuits. There are 7 different output levels in 18 schemes: 1 / 2U dc 、1 / 3Udc 、1 / 6U dc ,0,-1 / 6U dc 、-1 / 3U dc 、-1 / 2U dc .

[0077] like Figure 2 As shown, the switch tube S 5 , S 6 , S 7 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is 1 / 2U dc .

[0078] like Figure 3 As shown, the switch tube S 3 , S 6 , S 7 Open, other switch tubes are turned off, diode D 2 Flying capacitor C f1 Discharge, current flows out to the inverter, the output level is 1 / 3U dc .

[0079] like Figure 4 As shown, the switch tube S 2 , S 6 , S 7 Open, other switch tubes are turned off, diode D 1 Flying capacitor C f1 Charging, current flows from the inverter, the output level is 1 / 3U dc .

[0080] like Figure 5 As shown, the switch tube S 3 , S 4 , S 7 Open, other switch tubes are turned off, diode D 3 Flying capacitor C f2 Discharge, current flows out to the inverter, the output level is 1 / 3U dc .

[0081] like Figure 6 As shown, the switch tube S 3 , S 4 , S 8 Open, other switch tubes are turned off, diode D 4 Flying capacitor C f2 Charging, current flows from the inverter, the output level is 1 / 3U dc .

[0082] like Figure 7As shown, the switch tube S 5 , S 7 Open, other switch tubes are turned off, diode D 3 Flying capacitor C f1 Charging, current flows out to the inverter, the output level is 1 / 6U dc .

[0083] like Figure 8 As shown, the switch tube S 5 , S 8 Open, other switch tubes are turned off, diode D 4 Flying capacitor C f1 Discharge, current flows from the inverter, the output level is 1 / 6U dc .

[0084] like Fig. 9 As shown, the switch tube S 6 , S 7 , S 10 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is 1 / 6U dc .

[0085] like Fig.10 As shown, the switch tube S 3 , S 7 Open, other switch tubes are turned off, diode D 2 , D 3 Flying capacitor C f1 , C f2 The current is discharged, flows out to the inverter, and the output level is 0.

[0086] like Fig.11 As shown, the switch tube S 2 , S 8 Open, other switch tubes are turned off, diode D 1 , D 4 Flying capacitor C f1 , C f2 The current flows into the inverter and the output level is 0.

[0087] like Fig.12 As shown, the switch tube S 7 , S 10 Open, other switch tubes are turned off, diode D 3 Flying capacitor C f2 Discharge, current flows out to the inverter, the output level is -1 / 6U dc .

[0088] like Fig.13As shown, the switch tube S 8 , S 10 Open, other switch tubes are turned off, diode D 4 Flying capacitor C f2 Charging, current flows from the inverter, the output level is -1 / 6U dc .

[0089] like Fig.14 As shown, the switch tube S 5 , S 8 , S 9 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is -1 / 6U dc .

[0090] like Fig.15 As shown, the switch tube S 1 , S 2 , S 7 Open, other switch tubes are turned off, diode D 3 Flying capacitor C f1 Charging, current flows out to the inverter, the output level is -1 / 3U dc .

[0091] like Fig.16 As shown, the switch tube S 1 , S 2 , S 8 Open, other switch tubes are turned off, diode D 4 Flying capacitor C f1 Discharge, current flows into the inverter, the output level is -1 / 3U dc .

[0092] like Fig.17 As shown, the switch tube S 3 , S 8 , S 9 Open, other switch tubes are turned off, diode D 2 Flying capacitor C f2 Charging, current flows out to the inverter, the output level is -1 / 3U dc .

[0093] like Fig.18 As shown, the switch tube S 2 , S 8 , S 9 Open, other switch tubes are turned off, diode D 1 Flying capacitor C f2 Discharge, current flows into the inverter, the output level is -1 / 3U dc .

[0094] like Fig.19 As shown, the switch tube S 8 , S 9 , S 10 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is -1 / 2U dc .

[0095] In summary, the present invention provides a seven-level inverter topology and a control method thereof, the topology comprising: an upper bridge arm and a lower bridge arm; one end of the upper bridge arm and the lower bridge arm are connected to a bus, and the other end is connected to an inverter, and the bus voltage is U dc .

[0096] The upper bridge arm includes the DC bus capacitor C d1 、Flying capacitor C f1 、Diode D 1 , D 3 , switch tube S 1 , S 2 , S 5 , S 6 , S 7 ; The lower bridge arm includes the DC bus capacitor C d2 、Flying capacitor C f2 、Diode D 2 , D 4 , switch tube S 3 , S 4 , S 8 , S 9 , S 10 .

[0097] For the upper bridge arm: DC bus capacitor C d1 The negative electrode is grounded, and the positive electrode is connected to the switch tube S 5 , S 6 , S 7 Connected to the inverter, DC bus capacitor C d1 The negative electrode also passes through the switch tube S 2 , S 1 Connect to the flying capacitor C f1 Positive electrode, flying capacitor C f1 The positive electrode is also connected to the switch tube S 5 , S 6 Between. Flying capacitor C f1 The cathode of the diode D is connected 1 The anode of the diode D 1 The cathode is connected to the switch tube S 1 , S 2 Between; flying capacitor C f1The cathode of the diode D 3 The anode of the diode D 3 The cathode is connected to the switch tube S 6 , S 7 between.

[0098] For the lower bridge arm: DC bus capacitor C d2 The positive electrode is grounded, and the negative electrode is connected to the switch tube S 10 , S 9 , S 8 Connected to the inverter, DC bus capacitor C d2 The positive electrode also passes through the switch tube S 3 , S 4 Connect to the flying capacitor C f2 Negative electrode, flying capacitor C f2 The negative electrode is also connected to the switch tube S 10 , S 9 Between; flying capacitor C f2 The positive pole of the diode D is connected 2 The cathode of diode D 2 The anode of the switch tube S 3 , S 4 Between; flying capacitor C f2 The positive pole of the diode D 4 The cathode of diode D 4 The anode of the switch tube S 8 , S 9 between.

[0099] For the connection of the upper and lower bridge arms: DC bus capacitor C d1 The negative pole of the DC bus capacitor C is connected d2 The positive electrode of the flying capacitor C f1 The negative electrode of the flying capacitor C f2 The positive pole of diode D 1 The anode of the diode D is connected 2 The cathode of diode D 3 The anode of the diode D is connected 4 The cathode of the switch tube S 2 Connect switch tube S 3 , switch tube S 7 Connect switch tube S 8 .

[0100] The switching state of each switch tube is controlled to form several working schemes with a total of 7 different output voltages, and different voltages are output to the subsequent inverter.

[0101] The steps in the present invention can be adjusted in order, combined or deleted according to actual needs.

[0102] The units in the device of the present invention can be combined, divided and deleted according to actual needs.

[0103] Although the present invention is disclosed in detail with reference to the accompanying drawings, it should be understood that these descriptions are merely exemplary and are not intended to limit the application of the present invention. The scope of protection of the present invention is defined by the appended claims and may include various modifications, alterations and equivalents made to the invention without departing from the scope and spirit of the present invention.

Claims

1. A seven-level inverter topology, characterized in that: The topology includes: an upper bridge arm and a lower bridge arm; one end of the upper bridge arm and the lower bridge arm are connected to the bus, and the other end is connected to the inverter, and the bus voltage is U dc ; The upper bridge arm includes the DC bus capacitor C d1 、Flying capacitor C f1 , diodes D1, D3, switches S1, S2, S5, S6, S7; the lower bridge arm includes the DC bus capacitor C d2 、Flying capacitor C f2 , diodes D2, D4, switches S3, S4, S8, S9, S 10 ; For the upper bridge arm: DC bus capacitor C d1 The negative electrode is grounded, and the positive electrode is connected to the inverter through the switch tubes S5, S6, and S7 in sequence. The DC bus capacitor C d1 The negative electrode is also connected to the flying capacitor C through the switch tubes S2 and S1 in turn. f1 Positive electrode, flying capacitor C f1 The positive electrode is connected to the switch tubes S5 and S6 at the same time; the flying capacitor C f1 The negative electrode of is connected to the anode of diode D1, and the cathode of diode D1 is connected between switch tubes S1 and S2; the flying capacitor C f1 The negative electrode is also connected to the anode of the diode D3, and the cathode of the diode D3 is connected between the switch tubes S6 and S7; For the lower bridge arm: DC bus capacitor C d2 The positive electrode is grounded, and the negative electrode is connected to the switch tube S 10 , S9, S8 are connected to the inverter, the DC bus capacitor C d2 The positive electrode is also connected to the flying capacitor C through the switch tubes S3 and S4 in turn. f2 Negative electrode, flying capacitor C f2 The negative electrode is also connected to the switch tube S 10 , S9; flying capacitor C f2 The positive electrode of is connected to the cathode of diode D2, and the anode of diode D2 is connected between switch tubes S3 and S4; the flying capacitor C f2 The positive electrode is also connected to the cathode of the diode D4, and the anode of the diode D4 is connected between the switch tubes S8 and S9; For the connection of the upper and lower bridge arms: DC bus capacitor C d1 The negative pole of the DC bus capacitor C is connected d2 The positive electrode of the flying capacitor C f1 The negative terminal of the flying capacitor C f2 The positive electrode of the diode D1 is connected to the cathode of the diode D2, the anode of the diode D3 is connected to the cathode of the diode D4, the switch tube S2 is connected to the switch tube S3, and the switch tube S7 is connected to the switch tube S8.

2. The seven-level inverter topology according to claim 1, characterized in that: The DC bus capacitor C d1 and C d2 Located at the positive and negative ends of the DC bus, C d1 and C d2 The voltage of the bus is half of the bus voltage, that is, U dc / 2; two flying capacitors C f1 and C f2 Located between bus capacitors, at U dc / 2 and 0 produce an intermediate voltage, C f1 and C f2 The voltage is 1 / 3 of the DC bus voltage, that is, U dc / 3; Each switch tube only needs to withstand the voltage of a flying capacitor or the voltage difference of adjacent levels. The maximum voltage stress of each switch tube and diode is U dc / 3.

3. A seven-level inverter topology control method based on the seven-level inverter topology according to any one of claims 1 and 2, characterized in that: The control method includes: controlling the switch state of each switch tube to form a total of 7 working schemes with different output voltages, and outputting different voltages to subsequent inverters.

4. The seven-level inverter topology control method according to claim 3, characterized in that: The topology outputs 1 / 2U to the subsequent inverter dc The work plan is: Switches S5, S6, and S7 are turned on, and other switches are turned off. The flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is 1 / 2U dc .

5. The seven-level inverter topology control method according to claim 3, characterized in that: The topology outputs 1 / 3U to the subsequent inverter dc There are four work plans, in order: Switches S3, S6, and S7 are turned on, and other switches are turned off. Diode D2 is turned on, and the flying capacitor C f1 Discharge, current flows out to the inverter, the output level is 1 / 3U dc ; Switches S2, S6, and S7 are turned on, and other switches are turned off. Diode D1 is turned on, and the flying capacitor C f1 Charging, current flows from the inverter, the output level is 1 / 3U dc ; Switches S3, S4, and S7 are turned on, and other switches are turned off. Diode D3 is turned on, and the flying capacitor C f2 Discharge, current flows out to the inverter, the output level is 1 / 3U dc ; Switches S3, S4, and S8 are turned on, and other switches are turned off. Diode D4 is turned on, and the flying capacitor C f2 Charging, current flows from the inverter, the output level is 1 / 3U dc .

6. The seven-level inverter topology control method according to claim 3, characterized in that: The topology outputs 1 / 6U to the subsequent inverter dc There are three working plans, in order: Switches S5 and S7 are turned on, other switches are turned off, diode D3 is turned on, and flying capacitor C f1 Charging, current flows out to the inverter, the output level is 1 / 6U dc ; Switches S5 and S8 are turned on, other switches are turned off, diode D4 is turned on, and flying capacitor C f1 Discharge, current flows from the inverter, the output level is 1 / 6U dc ; Switch tube S6, S7, S 10 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is 1 / 6U dc .

7. The seven-level inverter topology control method according to claim 3, characterized in that: There are two working schemes for the topology to output 0 to the subsequent inverter, which are: Switches S3 and S7 are turned on, other switches are turned off, diodes D2 and D3 are turned on, and flying capacitor C f1 , C f2 All are discharged, the current flows out to the inverter, and the output level is 0; Switches S2 and S8 are turned on, other switches are turned off, diodes D1 and D4 are turned on, and the flying capacitor C f1 , C f2 The current flows into the inverter and the output level is 0.

8. The seven-level inverter topology control method according to claim 3, characterized in that: The topology outputs -1 / 6U to the subsequent inverter dc There are three working plans, in order: Switch tube S7, S 10 The other switches are turned off, the diode D3 is turned on, and the flying capacitor C f2 Discharge, current flows out to the inverter, the output level is -1 / 6U dc ; Switch tube S8, S 10 The other switches are turned off, the diode D4 is turned on, and the flying capacitor C f2 Charging, current flows from the inverter, the output level is -1 / 6U dc ; Switches S5, S8, and S9 are turned on, and other switches are turned off. The flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is -1 / 6U dc .

9. The seven-level inverter topology control method according to claim 3, characterized in that: The topology outputs -1 / 3U to the subsequent inverter dc There are four work plans, in order: Switches S1, S2, and S7 are turned on, and other switches are turned off. Diode D3 is turned on, flying capacitor Cf1 is charged, and current flows out to the inverter. The output level is -1 / 3Udc. Switches S1, S2, and S8 are turned on, other switches are turned off, and diode D4 is turned on. Flying capacitor Cf1 is discharged, current flows from the inverter, and the output level is -1 / 3Udc; Switches S3, S8, and S9 are turned on, and other switches are turned off. Diode D2 is turned on, flying capacitor Cf2 is charged, and current flows out to the inverter. The output level is -1 / 3Udc. The switch tubes S2, S8, and S9 are turned on, and the other switch tubes are turned off. The diode D1 is turned on, the flying capacitor Cf2 is discharged, and the current flows into the inverter. The output level is -1 / 3Udc.

10. The seven-level inverter topology control method according to claim 3, characterized in that: The topology outputs 1 / 2U to the subsequent inverter dc The work plan is: Switch tube S8, S9, S 10 Open, other switch tubes are turned off, flying capacitor C f1 , C f2 No charging or discharging is performed, and the output level is -1 / 2U dc .

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