Method for manufacturing a surface acoustic wave resonator and surface acoustic wave resonator

By simultaneously forming interdigitated electrode grooves and mass block grooves on the substrate, and forming the interdigitated electrodes and mass blocks through an integrated process, the problem of complex fabrication of surface acoustic wave resonators is solved, thereby improving production efficiency and performance.

CN119727642BActive Publication Date: 2026-02-06NINGBO SEMICON INT CORP
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Patent Information

Application Number
CN202411805061.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-09
Publication Date
2026-02-06
Estimated Expiration
2044-12-09

AI Technical Summary

Technical Problem

Existing surface acoustic wave resonators have complex manufacturing processes, resulting in low production efficiency.

Method used

Interdigitated electrode grooves and mass block grooves are formed simultaneously on the substrate, and interdigitated electrodes and mass blocks are formed by filling them with metal material through an integrated process, which simplifies the processing steps.

Benefits of technology

This improves the performance and stability of surface acoustic wave resonators, reduces processing steps, and increases production efficiency.

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Abstract

The application provides a manufacturing method of a surface acoustic wave resonator and the surface acoustic wave resonator, and the manufacturing method comprises the following steps: providing a substrate; forming a plurality of interdigital electrode grooves and mass block grooves on the substrate, at least one mass block groove in communication with the interdigital electrode groove is arranged on each interdigital electrode groove; and arranging metal material in the interdigital electrode groove and the mass block groove to integrally form an interdigital electrode and a mass block. By forming a plurality of interdigital electrode grooves and mass block grooves on the substrate first, and then arranging metal material in the interdigital electrode groove and the mass block groove to integrally form an interdigital electrode and a mass block, the interdigital electrode and the mass block are formed simultaneously through one step, the processing steps are reduced, the production efficiency is improved, there is no separated interface between the integrally formed interdigital electrode and the mass block, the suppression effect of the mass block on the second harmonic wave can be ensured, the stability of the surface acoustic wave resonator is improved, and the product yield is ensured.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a method for manufacturing a surface acoustic wave (SAW) resonator and a SAW resonator. Background Technology

[0002] Surface acoustic wave (SAW) filters have input and output electrodes fabricated on a piezoelectric substrate. An alternating voltage is applied to the input terminal, and electrical energy is converted into acoustic energy using the piezoelectric effect. They offer advantages such as low insertion loss, wide bandwidth, and low cost, and are widely used in communication RF front-end modules. To reduce spurious effects, suppress second harmonics, and improve the filter's passband performance, a common practice is to thicken the regions at both ends of the interdigital electrodes (piston structure) to reduce the propagation speed in the end regions.

[0003] However, the current processing technology for adding mass blocks usually involves attaching the mass blocks to the interdigital electrodes using a lift-off process after the interdigital electrodes have been fabricated. This process is complex and not conducive to improving production efficiency. Summary of the Invention

[0004] The problem addressed by this application is that existing processing technologies are complex and not conducive to improving production efficiency.

[0005] To address the above problems, this application provides a method for manufacturing a surface acoustic wave resonator, the method comprising:

[0006] Provide substrate;

[0007] A plurality of interdigitated electrode slots and mass block slots are formed on the substrate, and each interdigitated electrode slot is provided with at least one mass block slot communicating with the interdigitated electrode slot.

[0008] Metal materials are integrally formed into the interdigitated electrode and the mass block in the interdigitated electrode groove and the mass block groove.

[0009] Optionally, forming a plurality of interdigitated electrode grooves and mass block grooves on the substrate includes:

[0010] A dielectric layer is formed on one side of the substrate;

[0011] The dielectric layer is etched to obtain a plurality of interdigitated electrode trenches. Each interdigitated electrode trench includes a transducer region and a decay region. The transducer region is a region in which the plurality of interdigitated electrode trenches alternate with each other. The transducer region includes a middle region and edge regions disposed at both ends of the middle region.

[0012] The dielectric layer located in the edge region is etched along the width direction of the interdigital electrode trench to form at least one mass block trench on the side of each interdigital electrode trench away from the substrate.

[0013] Technical effect: By setting at least one mass block slot in the edge region of the interdigital electrode slot, and setting at least one mass block on one side of the interdigital electrode, the sound waves propagating parallel to the direction of the interdigital electrode can be reduced, the transverse mode can be suppressed, and the performance of the surface acoustic wave resonator can be improved.

[0014] Optionally, etching the dielectric layer to obtain the plurality of interdigitated electrode trenches includes:

[0015] A patterned photoresist is formed on the side of the dielectric layer away from the substrate;

[0016] The dielectric layer not covered by the patterned photoresist is etched by dry etching to form a plurality of interdigital electrode trenches, the bottom of each interdigital electrode trench extending to the substrate.

[0017] Technical advantages: Multiple interdigitated electrode trenches exposing the substrate are obtained on the dielectric layer by dry etching, a simple and easy-to-operate process. Furthermore, by extending the bottom of the interdigitated electrode trenches to the substrate, contact between the interdigitated electrodes formed in the trenches and the substrate can be ensured.

[0018] Optionally, etching the dielectric layer located in the edge region along the width direction of the interdigital electrode trench to form at least one mass block trench on the side of each interdigital electrode trench away from the substrate includes:

[0019] An anti-reflective layer is coated inside the interdigitated electrode grooves and on the dielectric layer;

[0020] Photoresist is coated on the anti-reflective layer, and a portion of the anti-reflective layer disposed in the edge region is exposed by a photolithography process.

[0021] The exposed antireflective layer and a portion of the dielectric layer are etched using a dry etching process to form at least one mass block groove.

[0022] Technical benefits: By coating an anti-reflective layer, light reflection during photolithography can be effectively reduced, protecting the dielectric layer. In addition, this application can flexibly control the shape, size, and position of the mass block by adjusting the parameters of the photoresist, anti-reflective layer, and etching process, meeting the needs of different applications and improving compatibility and flexibility.

[0023] Optionally, before integrally forming the interdigitated electrode and the mass block with metal material in the interdigitated electrode groove and the mass block groove, the manufacturing method further includes:

[0024] A metal diffusion barrier layer is formed on the surface of the interdigitated electrode groove and the mass block groove using a physical vapor deposition process.

[0025] Technical benefits: By setting a metal diffusion barrier layer, copper diffusion into the dielectric layer and device can be effectively prevented, protecting the basic structure and performance of the device. Furthermore, PVD is a highly efficient surface treatment technology that can rapidly form uniform and dense metal films at low temperatures, which helps simplify the manufacturing process of interdigitated electrodes and mass blocks.

[0026] Optionally, the step of integrally forming the interdigitated electrode and the mass block with metal material in the interdigitated electrode groove and the mass block groove includes:

[0027] The metal material is filled into the interdigitated electrode groove and the mass block groove by a chemical electroplating process;

[0028] The interdigitated electrodes and the mass block are formed by removing the metal material outside the interdigitated electrode slots and the mass block slots through a planarization process.

[0029] Technical benefits: This application uses a chemical electroplating process to integrally form interdigitated electrodes and mass blocks with metal materials, resulting in a tighter, more uniform, and void-free connection between the interdigitated electrodes and mass blocks. This also reduces signal loss caused by loose connections or excessive gaps. In addition, the integral formation of interdigitated electrodes and mass blocks reduces the traditional step-by-step processing, such as processing the interdigitated electrodes and mass blocks separately and then assembling them. This helps to simplify the manufacturing process and improve production efficiency.

[0030] Optionally, the metallic material includes any one or more of copper, aluminum, silver, platinum, and chromium.

[0031] Optionally, in the width direction of the interdigital electrode groove, the size of the interdigital electrode groove is smaller than the size of the mass block groove.

[0032] Technical effect: It can ensure that the formed mass block can completely cover the interdigitated electrodes, which can better suppress transverse modes, thereby improving the performance of the surface acoustic wave resonator.

[0033] Optionally, the symmetry line of the interdigitated electrode groove coincides with the symmetry line of the mass block groove.

[0034] Technical effects: It can uniformly and evenly reduce the sound waves propagating parallel to the electrode direction, weaken stray effects, improve the stability of sound waves, and further suppress transverse modes, thereby improving the performance of surface acoustic wave resonators.

[0035] This application embodiment also provides a surface acoustic wave (SAW) resonator, which is manufactured by the manufacturing method of the SAW resonator described in any of the above claims, and the SAW resonator includes:

[0036] Substrate;

[0037] A dielectric layer is disposed on one side of the substrate. A plurality of interdigital electrodes and a plurality of mass blocks are disposed within the dielectric layer. At least one mass block is disposed on each interdigital electrode, and the interdigital electrode and the mass block are integrally formed.

[0038] Optionally, the surface acoustic wave resonator further includes a metal diffusion barrier layer disposed between each interdigitated electrode and the dielectric layer.

[0039] The surface acoustic wave (SAW) resonator manufacturing method provided in this application involves first forming multiple interdigitated electrode slots and mass block slots on a substrate, and then integrally forming the interdigitated electrodes and mass blocks by placing metal material in the interdigitated electrode slots and mass block slots. By forming the interdigitated electrodes and mass blocks simultaneously in one step, the processing steps are reduced, production efficiency is improved, and there is no separation interface between the integrally formed interdigitated electrodes and mass blocks, which ensures the suppression effect of the mass blocks on second harmonics, improves the stability of the SAW resonator, and ensures product yield. Attached Figure Description

[0040] Figure 1 A schematic flowchart illustrating the manufacturing method of a surface acoustic wave resonator provided in an embodiment of this application;

[0041] Figure 2 A schematic diagram of the manufacturing method provided in the embodiments of this application;

[0042] Figure 3 for Figure 1 A schematic diagram of the process for fabricating the interdigitated electrode groove and the mass block groove in the manufacturing method shown.

[0043] Figure 4 for Figure 1 A schematic diagram of the process for integrally forming the interdigitated electrodes and mass blocks in the manufacturing method shown;

[0044] Figure 5 for Figure 4 A schematic diagram of the structure of the interdigitated electrode and mass block formed in the manufacturing method shown.

[0045] Explanation of reference numerals in the attached figures:

[0046] 100. Surface acoustic wave resonator; 10. Substrate; 20. Dielectric layer; 30. Photoresist; 40. Anti-reflection layer; 50. Interdigitated electrode groove; 60. Mass block groove; 70. Metal diffusion barrier layer; 80. Interdigitated electrode; 90. Mass block; 101. Metal material. Detailed Implementation

[0047] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, specific embodiments of this application will be described in detail below.

[0048] Please see Figure 1 and Figure 2 , Figure 1 This is a schematic flowchart illustrating the manufacturing method of the surface acoustic wave resonator provided in an embodiment of this application. Figure 2 This is a schematic diagram of the manufacturing process of the manufacturing method provided in the embodiments of this application; the embodiments of this application provide a manufacturing method for a surface acoustic wave resonator 100, which includes the following steps:

[0049] 110. Provide a substrate.

[0050] The substrate 10 can be made of lithium niobate or lithium tantalate.

[0051] 120. Multiple interdigitated electrode slots and mass block slots are formed on a substrate, and each interdigitated electrode slot is provided with at least one mass block slot communicating with the interdigitated electrode slot.

[0052] By providing at least one mass block slot 60 on one side of the interdigital electrode slot 50, and providing at least one mass block 90 on one side of the interdigital electrode 80, the sound waves propagating parallel to the direction of the interdigital electrode 80 can be reduced, the transverse mode can be suppressed, and the performance of the surface acoustic wave resonator 100 can be improved.

[0053] For details on the specific steps involved in forming the interdigitated electrode groove 50 and the mass block groove 60, please refer to [link / reference needed]. Figure 2 , Figure 2 for Figure 1 The diagram illustrates the process of fabricating the interdigitated electrode grooves and mass block grooves in the manufacturing method shown. The specific steps are as follows:

[0054] 111. A dielectric layer is formed on one side of the substrate.

[0055] A dielectric layer 20 is formed on one side of the substrate 10 using a physical vapor deposition process, and the dielectric layer 20 is then planarized. In some embodiments, the material of the dielectric layer 20 includes oxides.

[0056] 112. The dielectric layer is etched to obtain multiple interdigitated electrode trenches. Each interdigitated electrode trench includes a transducer region and a decay region. The transducer region is an area where multiple interdigitated electrode trenches alternate with each other. The transducer region includes a middle region and edge regions set at both ends of the middle region.

[0057] Etching the dielectric layer 20 to obtain multiple interdigitated electrode trenches includes: forming a patterned photoresist 30 on the side of the dielectric layer 20 away from the substrate 10; and etching the dielectric layer 20 not covered by the patterned photoresist 30 using dry etching to form multiple interdigitated electrode trenches 50, with the bottom of each interdigitated electrode trench 50 extending to the substrate 10. The process of forming the patterned photoresist 30 by coating, exposing, and developing the photoresist 30, and then obtaining multiple interdigitated electrode trenches 50 exposing the substrate 10 on the dielectric layer 20 using dry etching, is simple and easy to operate. Furthermore, by setting the bottom of the interdigitated electrode trenches 50 to extend to the substrate 10, contact between the interdigitated electrodes 80 formed in the interdigitated electrode trenches 50 and the substrate 10 can be ensured.

[0058] Each interdigitated electrode slot 50 includes a transducer region and an attenuation region. The transducer region is the area where two interdigitated electrode slots 50 alternate with each other. The attenuation region is the area located on both sides of the transducer region in the arrangement direction of the multiple interdigitated electrode slots 50. The transducer region includes a middle region and edge regions set on both sides of the middle region. One edge region is connected to the attenuation region, and the other edge region is a free end.

[0059] 113. The dielectric layer located in the edge region is etched along the width direction of the interdigital electrode trench to form at least one mass block trench on the side of each interdigital electrode trench away from the substrate.

[0060] An anti-reflective layer 40 is coated within the interdigitated electrode groove 50 and on the dielectric layer 20. Photoresist 30 is coated on the anti-reflective layer 40, and a portion of the anti-reflective layer 40 located in the edge region is exposed using a photolithography process. The exposed anti-reflective layer 40 is etched using a dry etching process, and a portion of the dielectric layer 20 is also etched to form at least one mass block groove 60. Coating the anti-reflective layer 40 effectively reduces light reflection during photolithography, protecting the dielectric layer 20. Furthermore, this application allows for flexible control of the shape, size, and position of the mass block 90 by adjusting the parameters of the photoresist 30, the anti-reflective layer 40, and the etching process, meeting the needs of different applications and improving compatibility and flexibility.

[0061] It is understood that the specific number, location, shape, and size of the exposed antireflective layer 40 need to correspond to the actual situation of the mass block slot 60, and the specific number, location, shape, and size of the mass block slot 60 need to be set according to the actual situation of the surface acoustic wave resonator 100. For example, in some embodiments, a mass block 90 is provided on any area of ​​the interdigital electrode 80, so the antireflective layer 40 provided in the corresponding area needs to be exposed to provide a mass block slot 60 on the area corresponding to the interdigital electrode slot 50. For another example, in some embodiments, two mass blocks 90 are provided on the interdigital electrode 80, and the two mass blocks 90 are respectively provided in the edge area, so the antireflective layer 40 provided in the corresponding edge area needs to be exposed to provide two mass block slots 60 on the area corresponding to the interdigital electrode slot 50; for another example, in some other embodiments, multiple mass blocks 90 are provided on the interdigital electrode 80, and the multiple mass blocks 90 are provided at any position in the edge area, so the antireflective layer 40 provided in multiple corresponding areas needs to be exposed to provide multiple mass block slots 60 on the area corresponding to the interdigital electrode slot 50. In this embodiment, two mass blocks 90 are provided on the interdigitated electrode 80 as an example for illustration, and should not be construed as a limitation of this solution.

[0062] The width direction of the interdigital electrode groove 50 can be understood as the direction perpendicular to the extension direction of the interdigital electrode groove 50.

[0063] In some embodiments, the size of the interdigital electrode groove 50 is smaller than the size of the mass block groove 60 in the width direction of the interdigital electrode groove 50, thereby ensuring that the formed mass block 90 can completely cover the interdigital electrode 80, which can better suppress transverse modes and thus improve the performance of the surface acoustic wave resonator 100.

[0064] In some embodiments, the symmetry line of the interdigital electrode slot 50 coincides with the symmetry line of the mass block slot 60, and the symmetry line of the interdigital electrode 80 coincides with the symmetry line of the mass block 90, thereby improving the structural symmetry of the entire surface acoustic wave filter. This symmetry helps to ensure the stability and reliability of the device during operation, reduces performance fluctuations caused by structural asymmetry, and can also uniformly and evenly reduce sound waves propagating parallel to the electrode direction, weaken stray effects, further suppress transverse modes, thereby improving the performance of the surface acoustic wave resonator 100.

[0065] In some embodiments, the mass block slots 60 are symmetrically arranged at both ends of the transducer region, such that the mass blocks 90 are symmetrically arranged at both ends of the transducer region of the interdigital electrode 80, thereby simultaneously reducing the propagation speed at both ends of the interdigital electrode 80, quickly suppressing the transverse mode, and improving the performance of the surface acoustic wave resonator 100.

[0066] 130. Metal materials are integrally formed into interdigitated electrodes and mass blocks in the interdigitated electrode slots and mass block slots.

[0067] The steps for integrally forming the interdigitated electrode 80 and the mass block 90 can be further referred to. Figure 4 , Figure 4 for Figure 1 The flowchart illustrating the integrated formation of the interdigitated electrodes and the mass block in the manufacturing method is as follows:

[0068] 131. Metal materials are filled into the interdigital electrode tank and the mass block tank by chemical electroplating.

[0069] Metallic material 101 includes any one or more of copper, aluminum, silver, platinum, and chromium.

[0070] It should be noted that the metal material filled in the interdigital electrode groove and the metal material filled in the mass block groove can be completely the same, partially the same, or completely different. For example, in some embodiments, the metal material filled in the interdigital electrode groove and the metal material filled in the mass block groove are the same one selected from copper, aluminum, silver, platinum, and chromium; in other embodiments, the metal material filled in the interdigital electrode groove is multiple selected from copper, aluminum, silver, platinum, and chromium, and the metal material filled in the mass block groove is one selected from copper, aluminum, silver, platinum, and chromium; in other embodiments, the metal material filled in the interdigital electrode groove is multiple selected from copper, aluminum, silver, platinum, and chromium, and the metal material filled in the mass block groove is multiple selected from copper, aluminum, silver, platinum, and chromium; in other embodiments, the metal material filled in the mass block groove is multiple selected from copper, aluminum, silver, platinum, and chromium, and the metal material filled in the interdigital electrode groove is one selected from copper, aluminum, silver, platinum, and chromium.

[0071] In this embodiment of the application, copper is used as an example of the interdigital electrode groove metal material 101, and should not be construed as a limitation on the metal material 101.

[0072] Compared to the interdigitated electrode 80 and mass block 90 obtained by the traditional PVD process, this application uses a chemical electroplating process to fill the metal material 101 to integrally form the interdigitated electrode 80 and mass block 90, which makes the connection between the interdigitated electrode 80 and mass block 90 tighter, more uniform and without voids, and also reduces signal loss caused by loose connection or excessive gap.

[0073] 132. The metal material outside the interdigitated electrode slots and mass block slots is removed by a planarization process to form the interdigitated electrodes and mass blocks.

[0074] Mechanical grinding removes the metal material 101, excluding the interdigital electrode groove 50 and the mass block 90, down to the dielectric layer 20, thereby forming the interdigital electrode 80 and the mass block 90 in one piece. This reduces the traditional step-by-step processing, such as processing the interdigital electrode 80 and the mass block 90 separately and then assembling them, which helps to simplify the manufacturing process and improve production efficiency.

[0075] A cross-sectional view of the formed interdigitated electrode 80 and mass block 90 along the extending direction of the interdigitated electrode 80 can be found in [reference needed]. Figure 5 , Figure 5 for Figure 4 A schematic diagram of the interdigitated electrodes and mass block formed in the manufacturing method shown. (See diagram below.) Figure 5 As shown, mass blocks 90 are disposed at both ends of interdigital electrodes 80, and the highest surface of mass blocks 90 is flush with the highest surface of interdigital electrodes 80.

[0076] In some embodiments, before the interdigital electrode 80 and mass block 90 are integrally formed by placing metal material 101 in the interdigital electrode trench 50 and mass block trench 60, the manufacturing method further includes forming a metal diffusion barrier layer 70 on the surface of the interdigital electrode trench 50 and mass block trench 60 by a physical vapor deposition process. In copper wiring processes, copper readily diffuses in the silicon dioxide dielectric layer 20, is incompatible with silicon, and may poison the device. By setting the metal diffusion barrier layer 70, copper can be effectively prevented from diffusing into the dielectric layer 20 and the device, protecting the basic structure and performance of the device. In addition, PVD is a highly efficient surface treatment technology that can rapidly form a uniform and dense metal film at low temperatures, which helps to simplify the manufacturing process of the interdigital electrode 80 and mass block 90.

[0077] The metal diffusion barrier layer 70 can be made of tantalum.

[0078] This application embodiment also provides a surface acoustic wave resonator 100, which is manufactured by the manufacturing method of the surface acoustic wave resonator 100 described in any of the above embodiments. The surface acoustic wave resonator 100 includes a substrate 10 and a dielectric layer 20. The dielectric layer 20 is disposed on one side of the substrate 10. A plurality of interdigitated electrodes 80 and a plurality of mass blocks 90 are disposed in the dielectric layer 20. At least one mass block 90 is disposed on each interdigitated electrode 80, and the interdigitated electrode 80 and the mass block 90 are integrally formed.

[0079] In some embodiments, each interdigital electrode 80 is provided with two mass blocks 90, and the two mass blocks 90 are respectively provided in the edge region of the interdigital electrode 80.

[0080] In some embodiments, the surface acoustic wave resonator 100 further includes a metal diffusion barrier layer 70 disposed between each interdigital electrode 80 and the dielectric layer 20.

[0081] While this application discloses the above information, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this application; therefore, the scope of protection of this application shall be determined by the scope defined in the claims.

Claims

1. A method for manufacturing a surface acoustic wave resonator, characterized in that, The manufacturing method includes: Provide substrate; Multiple interdigitated electrode slots and mass block slots are formed on the substrate. Each interdigitated electrode slot is provided with at least one mass block slot communicating with it. Each interdigitated electrode slot includes a transducer region and an attenuation region. The transducer region is a region in which the multiple interdigitated electrode slots alternate with each other. The transducer region includes a middle region and edge regions disposed at both ends of the middle region. The mass block slot is located in the edge region. Metal materials are integrally formed into the interdigitated electrode and the mass block in the interdigitated electrode groove and the mass block groove.

2. The manufacturing method according to claim 1, characterized in that, The formation of multiple interdigitated electrode grooves and mass block grooves on the substrate includes: A dielectric layer is formed on one side of the substrate; The dielectric layer is etched to obtain a plurality of interdigitated electrode grooves; The dielectric layer located in the edge region is etched along the width direction of the interdigital electrode trench to form at least one mass block trench on the side of each interdigital electrode trench away from the substrate.

3. The manufacturing method according to claim 2, characterized in that, The etching of the dielectric layer to obtain the plurality of interdigitated electrode trenches includes: A patterned photoresist is formed on the side of the dielectric layer away from the substrate; The dielectric layer not covered by the patterned photoresist is etched by dry etching to form a plurality of interdigital electrode trenches, the bottom of each interdigital electrode trench extending to the substrate.

4. The manufacturing method according to claim 2, characterized in that, The etching of the dielectric layer located in the edge region along the width direction of the interdigital electrode trenches to form at least one mass block trench on the side of each interdigital electrode trench away from the substrate includes: An anti-reflective layer is coated inside the interdigitated electrode grooves and on the dielectric layer; Photoresist is coated on the anti-reflective layer, and a portion of the anti-reflective layer disposed in the edge region is exposed by a photolithography process. The exposed antireflective layer and a portion of the dielectric layer are etched using a dry etching process to form at least one mass block groove.

5. The manufacturing method according to any one of claims 1 to 4, characterized in that, Before integrally forming the interdigitated electrode and the mass block with metal material in the interdigitated electrode groove and the mass block groove, the manufacturing method further includes: A metal diffusion barrier layer is formed on the surface of the interdigitated electrode groove and the mass block groove using a physical vapor deposition process.

6. The manufacturing method according to any one of claims 1 to 4, characterized in that, The step of integrally forming interdigitated electrodes and mass blocks with metallic material in the interdigitated electrode slots and the mass block slots includes: The metal material is filled into the interdigitated electrode groove and the mass block groove by a chemical electroplating process; The interdigitated electrodes and the mass block are formed by removing the metal material outside the interdigitated electrode slots and the mass block slots through a planarization process.

7. The manufacturing method according to claim 6, characterized in that, The metallic material includes any one or more of copper, aluminum, silver, platinum, and chromium.

8. The manufacturing method according to any one of claims 1 to 4, characterized in that, In the width direction of the interdigitated electrode groove, the size of the interdigitated electrode groove is smaller than the size of the mass block groove.

9. The manufacturing method according to claim 8, characterized in that, The symmetry line of the interdigitated electrode groove coincides with the symmetry line of the mass block groove.

10. A surface acoustic wave resonator, characterized in that, The surface acoustic wave resonator is manufactured by the manufacturing method of the surface acoustic wave resonator according to any one of claims 1 to 9, and the surface acoustic wave resonator comprises: Substrate; A dielectric layer is disposed on one side of the substrate. A plurality of interdigital electrodes and a plurality of mass blocks are disposed within the dielectric layer. At least one mass block is disposed on each interdigital electrode. Each interdigital electrode includes a transducer region and an attenuation region. The transducer region is an area where the plurality of interdigital electrodes alternate with each other. The transducer region includes a middle region and edge regions disposed at both ends of the middle region. The mass block is located in the edge region, and the interdigital electrode and the mass block are integrally formed.

11. The surface acoustic wave resonator according to claim 10, characterized in that, The surface acoustic wave resonator further includes a metal diffusion barrier layer disposed between each interdigitated electrode and the dielectric layer.

Citation Information

Patent Citations

  • Surface acoustic wave resonator device and method for manufacturing the same and filter

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