Radio frequency switch circuit, integrated circuit chip, radio frequency front-end module and communication equipment

Abstract

The embodiment of the invention provides a radio frequency switch circuit, an integrated circuit chip, a radio frequency front-end module and communication equipment, relates to the technical field of electronics, and is used for improving the voltage endurance capability of the radio frequency switch circuit. The radio frequency switch circuit comprises a bias voltage output circuit, a level conversion circuit and a switch circuit. The bias voltage output circuit comprises a plurality of body end bias voltage output ends and is used for outputting body end bias voltage. And the level conversion circuit is used for receiving the signal output by the bias voltage output circuit and outputting a plurality of body end bias voltages of which the values are not completely the same or completely different. The switching circuit comprises a plurality of body ends and a plurality of device groups, the switching devices in the same device group receive body end bias voltages through the same body end, and the switching devices in different device groups receive different body end bias voltages, so that source body stray capacitance and drain body stray capacitance of the switching devices at all levels tend to be equal, and the switching devices in the same device group receive the different body end bias voltages. And the voltage endurance capability of the radio frequency switch circuit is improved by balancing the amplitude of the source-drain voltage of the first switch device of the stage.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to a radio frequency switching circuit, an integrated circuit chip, a radio frequency front-end module, and a communication device. Background Art

[0002] With the rapid development of information communication, wireless communication technology has been widely used and has become an indispensable part of information communication. In wireless communication technology, radio frequency switching circuit is one of the components.

[0003] The switch circuit in the RF switch circuit usually includes multiple switching devices connected in series to withstand the RF high voltage to improve the voltage resistance of the RF switch circuit. However, due to the parasitic effects of the switching devices, the swing of the source-drain voltage borne by each stage of the switching devices is unbalanced, resulting in different voltage resistance of the switching devices at different stages (for example, the previous stage switching device is easy to break down, and then the entire RF switch circuit is burned out and failed), thus affecting the voltage resistance of the RF switch circuit. Summary of the invention

[0004] The embodiments of the present application provide a radio frequency switch circuit, an integrated circuit chip, a radio frequency front-end module, and a communication device, which are used to improve the voltage resistance of the radio frequency switch circuit.

[0005] In order to achieve the above objectives, this application adopts the following technical solutions:

[0006] In a first aspect of an embodiment of the present application, a radio frequency switch circuit is provided. The radio frequency switch circuit can be a single-pole single-throw switch circuit or a single-pole multiple-throw switch circuit. The radio frequency switch circuit includes a bias voltage output circuit, a first level conversion circuit, and a first switch circuit. The bias voltage output circuit includes a plurality of body-end bias voltage output terminals for outputting body-end bias voltages. The first level conversion circuit includes a first control terminal, a plurality of first input terminals, a reference ground voltage terminal, and a plurality of first output terminals; the plurality of first input terminals are coupled to the plurality of body-end bias voltage output terminals in a one-to-one correspondence; the first control terminal is used to receive a first control signal, and the first level conversion circuit is used to output a reference ground voltage or a first body-end bias voltage from the first output terminal under the control of the first control signal; at least two of the plurality of first body-end bias voltages outputted from the plurality of first output terminals have different values. The first switching circuit includes multiple first body terminals and multiple first device groups; the multiple first body terminals are coupled to the multiple first output terminals in a one-to-one correspondence; the first switching circuit includes multiple stages of first switching devices coupled in series, each first device group includes at least one stage of first switching devices, and the first switching devices in the same first device group are coupled to the same first body terminal.

[0007] In the radio frequency switch circuit provided by the embodiment of the present application, the multi-stage first switch devices are divided into a plurality of first device groups, the first switch devices in the plurality of first device groups are coupled to different first body terminals, and the first body terminal bias voltages received by the plurality of first body terminals are not completely the same or completely different. In this way, the source voltage and the drain voltage of each stage of the first switch device are not fixed, and the body voltage of each stage of the first switch device is also not fixed. In combination with the source voltage and the drain voltage of each stage of the first switch device, the body voltage of each stage of the first switch device is matched and adjusted to change the source body voltage and the drain body voltage of each stage of the first switch device, so that the source body parasitic capacitance and the drain body parasitic capacitance of each stage of the first switch device are close to equal, so as to balance the swing of the source-drain voltage of each stage of the first switch device and improve the voltage resistance of the radio frequency switch circuit. In addition, the first body-end bias voltage required by the first switching circuit is output by analog circuits such as the bias voltage output circuit and the first level conversion circuit. The analog circuit has high design stability and processing consistency, and the compensation consistency of the body-source parasitic capacitance and the body-drain parasitic capacitance is good. The source-drain voltage balance consistency of the first switching circuit is good, and the problem of poor source-drain voltage balance effect caused by process parameter fluctuations is avoided.

[0008] In a possible implementation, along the direction of the first switch device cascade, the first body terminal bias voltage received by the plurality of first body terminals gradually decreases.

[0009] The source voltage and drain voltage of each stage of the first switching device in the first switching circuit decrease step by step. After the first body-end bias voltage received by the body electrode of the first switching devices in the multiple first device groups is set to gradually decrease, the source body parasitic capacitance and the drain body parasitic capacitance of each stage or every few stages of the first switching devices can be made close to equal, further balancing the swing of the source-drain voltage of each stage of the first switching devices and improving the voltage resistance of the first switching circuit.

[0010] In a possible implementation, the difference between the first body terminal bias voltages received by two adjacent first body terminals is a fixed value. When the first body terminal bias voltage decreases according to a fixed rule, the design difficulty of the first switch circuit can be reduced, which helps to further optimize the swing of the source-drain voltage borne by the multi-stage first switch device.

[0011] In one possible implementation, the bias voltage output circuit also includes a gate bias voltage output terminal, and the first switching circuit also includes a first gate terminal; the first gate terminal is coupled to the gate bias voltage output terminal, and the gates of the multi-stage first switching devices are respectively coupled to the first gate terminal.

[0012] By coupling the gates of the multi-stage first switching devices to the same first gate terminal, the multi-stage first switching devices receive the same first gate terminal bias voltage, which can avoid the problem that when the multi-stage first switching devices receive different first gate terminal bias voltages, the switching harmonic performance is greatly deteriorated because the first few first device groups receive larger first gate terminal bias voltages and the switching static point is close to the threshold voltage.

[0013] In a possible implementation manner, a plurality of first switch devices in the same first device group are sequentially coupled in series.

[0014] For the first switch circuit, the source voltage and drain voltage borne by the multiple first switch devices connected in series in sequence show a decreasing trend. The first body-end bias voltage received by the first switch circuit also gradually decreases. Therefore, after the first switch devices are grouped step by step, the first body-end bias voltage received by the first switch device at the next stage will not be higher than the first body-end bias voltage received by the first switch device at the previous stage. In this way, the body-source parasitic capacitance and body-drain parasitic capacitance generated by each first switch device are close to the same, so that the voltage drop of each first switch device is close to the same, so as to balance the swing of the source-drain voltage borne by each first switch device.

[0015] In a possible implementation, the plurality of body-end bias voltage output terminals are used to output a plurality of body-end bias voltages, and at least two of the plurality of body-end bias voltages have different values. The body-end bias voltage terminal directly outputs different body-end bias voltages, and the first level conversion circuit only plays a selection role, which can simplify the structure of the first level conversion circuit.

[0016] In a possible implementation, the bias voltage output circuit includes a negative voltage circuit; the negative voltage circuit includes a plurality of body-end bias voltage output terminals and a plurality of charge pumps coupled in series, and the plurality of body-end bias voltage output terminals are coupled to the output terminals of the plurality of charge pumps in a one-to-one correspondence. This is an implementation with a simple structure.

[0017] In a possible implementation, the bias voltage output circuit further includes an oscillation signal generating circuit and a voltage doubling circuit; the oscillation signal generating circuit is used to receive a reference voltage and generate an oscillation signal; the voltage doubling circuit is used to receive the reference voltage and the oscillation signal and output the gate bias voltage from the gate bias voltage output terminal; the negative voltage circuit is used to receive the oscillation signal and output the body bias voltage from the body gate bias voltage output terminal. This is a simple implementation.

[0018] In a possible implementation, the reference voltage is 0.5V-2.5V. If the reference voltage is too large, the difference in the body bias voltage of adjacent device groups is too large, the source-drain voltage balancing effect is poor, and the power supply voltage needs to be increased, which consumes a lot of power. If the reference voltage is too small, the number of voltage multiplication stages required will increase, which will lead to a sharp increase in the number of negative charge pumps.

[0019] In a possible implementation, the difference between the first body terminal bias voltages received by two adjacent first body terminals is an integer multiple of the reference voltage. By limiting the difference between the first body terminal bias voltages received by different first device groups to be the same as the reference voltage, or to be a multiple of the reference voltage, the source-drain voltage of the first switch device can be effectively balanced.

[0020] In a possible implementation, the first switch circuit further includes a plurality of voltage-dividing structures, and the two ends of the voltage-dividing structures are respectively coupled to the first source and the first drain of the same first switch device. By setting a voltage-dividing structure corresponding to each stage of the switch device in the switch circuit, and adjusting the equivalent resistance of the voltage-dividing structure, the voltage drop of each stage of the switch device can be equal or have an obvious regularity.

[0021] In a possible implementation, the theoretical breakdown voltage of the first switch circuit is MV, the actual breakdown voltage of the first switch circuit is NV, and the value of M / N is 1-2. After the embodiment of the present application groups the multi-stage first switch devices and receives different first body terminal bias voltages, the swing amplitude of the source-drain voltage of each stage of the first switch device is relatively balanced. Therefore, under the condition of bearing the same RF voltage, the number of stages of the first switch devices included in the first switch circuit provided by the embodiment of the present application can be reduced, the value of M / N can be reduced, and the optimization of insertion loss and area can be achieved.

[0022] In a possible implementation, the radio frequency voltage received by the first-stage first switch device is 40V, and the number of stages of the first switch devices in the first switch circuit is less than or equal to 11. This is a common application scenario.

[0023] In a possible implementation, the radio frequency voltage received by the first-stage first switch device is 35V, and the number of stages of the first switch devices in the first switch circuit is less than or equal to 11. This is a common application scenario.

[0024] In a possible implementation, the radio frequency voltage received by the first-stage first switch device is 30V, and the number of stages of the first switch devices in the first switch circuit is less than or equal to 10. This is a common application scenario.

[0025] In a possible implementation, the RF switching circuit also includes a second level conversion circuit and a second switching circuit; the second level conversion circuit includes a second control terminal, multiple second input terminals, a reference ground voltage terminal and multiple second output terminals; the multiple second input terminals are coupled one-to-one with the multiple body-end bias voltage output terminals; the second control terminal is used to receive a second control signal, and the second level conversion circuit is used to output a reference ground voltage or a second body-end bias voltage from the second output terminal under the control of the second control signal; at least two of the multiple second body-end bias voltages output by the multiple second output terminals have different values; the second switching circuit includes multiple second body terminals and multiple second device groups; the multiple second body terminals are coupled one-to-one with the multiple second output terminals; the second switching circuit includes multiple stages of second switching devices coupled in series, each second device group includes at least one stage of second switching device, and the second switching devices in the same second device group are coupled to the same second body terminal.

[0026] When the radio frequency switch circuit includes multiple groups of switch circuits, the multiple groups of switch circuits can share the same bias voltage output circuit, which can save device area.

[0027] According to a second aspect of an embodiment of the present application, an integrated circuit chip is provided, comprising a radio frequency switching circuit and a packaging layer, wherein the packaging layer covers the radio frequency switching circuit; the radio frequency switching circuit comprises the radio frequency switching circuit of any one of the first aspects.

[0028] According to a third aspect of an embodiment of the present application, a radio frequency front-end module is provided, comprising a radio frequency switching circuit and a filter, wherein the radio frequency switching circuit is coupled to the filter; the radio frequency switching circuit comprises the radio frequency switching circuit of any one of the first aspects.

[0029] According to a fourth aspect of an embodiment of the present application, a communication device is provided, comprising an antenna and a radio frequency switching circuit, wherein the antenna and the radio frequency switching circuit are coupled; the radio frequency switching circuit comprises the radio frequency switching circuit of any one of the first aspects. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of the structure of a communication device provided in an embodiment of the present application;

[0031] Figure 2A A schematic diagram of the structure of an RF front-end module provided in an embodiment of the present application;

[0032] Figure 2B A schematic diagram of an application of a radio frequency switch circuit in an RF front-end module provided in an embodiment of the present application;

[0033] Figure 3 An application schematic diagram of a wireless communication system front end provided in an embodiment of the present application;

[0034] Figure 4AA schematic diagram of a topological structure of a switch circuit according to an embodiment of the present application;

[0035] Figure 4B for Figure 4A Equivalent capacitance model diagram of the switching device when it is turned off;

[0036] Figure 4C for Figure 4A Equivalent capacitance model diagram of the switch circuit when it is turned off;

[0037] Figure 5A and Figure 5B A schematic diagram of a topological structure of a switch circuit according to an embodiment of the present application;

[0038] Figure 5C for Figure 5A and Figure 5B The simulated yield curve of the switching circuit shown;

[0039] Figure 6 A schematic diagram of a topological structure of another switching circuit according to an embodiment of the present application;

[0040] Figure 7 A schematic diagram of a topological structure of another switching circuit according to an embodiment of the present application;

[0041] Fig. 8A and Figure 8B A schematic diagram of a topological structure of a switch circuit provided in an embodiment of the present application;

[0042] Fig. 9 An architecture diagram of a radio frequency switch circuit provided in an embodiment of the present application;

[0043] Fig.10 An architecture diagram of a radio frequency switch circuit provided in an embodiment of the present application;

[0044] Fig.11 A schematic diagram of a topological circuit of a negative voltage circuit provided in an embodiment of the present application;

[0045] Fig.12 A topological circuit diagram of a first level conversion circuit provided in an embodiment of the present application

[0046] Fig.13 This is a schematic diagram of an RF switch circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0047] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0048] In the following, the terms "second", "first", etc. are used only for convenience of description and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "second", "first", etc. may explicitly or implicitly include one or more of the feature. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0049] In the embodiments of the present application, directional terms such as "up", "down", "left" and "right" may be defined including but not limited to the orientation relative to the schematic placement of the components in the drawings. It should be understood that these directional terms may be relative concepts, which are used for relative description and clarification, and may change accordingly according to the change of the orientation of the components in the drawings.

[0050] In the embodiments of the present application, unless otherwise clearly specified and limited, the term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. In addition, the term "coupled" can be a direct electrical connection or an indirect electrical connection through an intermediate medium. The term "contact" can be a direct contact or an indirect contact through an intermediate medium.

[0051] In the embodiments of the present application, "and / or" describes the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B may represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B may be singular or plural. The character " / " generally indicates that the associated objects are in an "or" relationship.

[0052] The technical solution of the present application can be applied to various communication devices including radio frequency switches. The communication device can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted. It can also be deployed on the water surface (such as a ship, etc.). It can also be deployed in the air (for example, on an airplane, a balloon, and a satellite, etc.). For example, the channel device can be a terminal or a base station. For example, the terminal includes but is not limited to: mobile phones, tablet computers, laptop computers, PDAs, mobile internet devices (MID), wearable devices (such as smart watches, smart bracelets, pedometers, etc.), vehicle-mounted devices (such as cars, bicycles, electric vehicles, airplanes, ships, trains, high-speed railways, etc.), virtual reality (VR) equipment, augmented reality (AR) equipment, wireless terminals in industrial control, smart home devices (such as refrigerators, televisions, air conditioners, electric meters, etc.), intelligent robots, workshop equipment, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, or wireless terminals in smart homes, flight equipment (such as intelligent robots, hot air balloons, drones, airplanes), RF front-end modules, low-noise amplifiers, etc.

[0053] Figure 1 The present invention provides a schematic diagram of the structure of a communication device provided in an embodiment of the present invention, wherein the communication device is described by taking a mobile phone as an example. The communication device includes: a radio frequency (RF) front-end module 101, a memory 102, a processor 103, a sensor component 104, a multimedia component 105, a power supply component 106, an input / output interface 107, and an antenna radiator 108.

[0054] Combine the following Figure 1 The following is a detailed introduction to the various components of the mobile phone:

[0055] The RF front-end module 101 can be used to receive and send signals during information transmission or calls. For example, after receiving downlink data received from the outside by the communication device through the antenna radiator 108, it is sent to the processor 103 for processing, and uplink data is sent to the antenna radiator 108 and sent out of the communication device through the antenna radiator 108.

[0056] The memory 102 may be used to store data, software programs and modules. The mobile phone may include a high-speed random access memory and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0057] The processor 103 is the control center of the mobile phone. It uses various interfaces and lines to connect various parts of the entire device. It executes various functions of the mobile phone and processes data by running or executing software programs and / or modules stored in the memory 102 and calling data stored in the memory 102, thereby monitoring the mobile phone as a whole.

[0058] The sensor assembly 104 includes one or more sensors for providing status assessment of various aspects of the mobile phone. The sensor assembly 104 may include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor or a temperature sensor, and the acceleration / deceleration, orientation, opening / closing state of the mobile phone, the relative positioning of components, or the temperature change of the mobile phone can be detected by the sensor assembly 104. In addition, the sensor assembly 104 may also include a light sensor for use in imaging applications.

[0059] The multimedia component 105 provides a screen of an output interface between the mobile phone and the user, and the screen can be a touch panel, and when the screen is a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. In addition, the multimedia component 105 also includes at least one camera, for example, the multimedia component 105 includes a front camera and / or a rear camera.

[0060] The power supply component 106 is used to provide power to various components of the mobile phone. The power supply component 106 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the mobile phone.

[0061] The input / output interface 107 provides an interface between the processor 103 and a peripheral interface module, for example, the peripheral interface module may be a keyboard, a mouse, etc.

[0062] Although not shown, the mobile phone may also include an audio component and a communication module, for example, the audio component includes a microphone and a speaker, and the communication module may include a wireless fidelity (WiFi) module, a Bluetooth module, a near field communication (NFC) module, a global navigation satellite system (GNSS) module, or a frequency modulation (FM) module. One or more of the modules will not be described in detail in the embodiments of the present application. Those skilled in the art will understand that Figure 1 The mobile phone structure shown in the figure does not constitute a limitation on the mobile phone, and may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0063] With the rapid development of information communication, wireless communication technology has been widely used and has become an indispensable part of information communication. In wireless communication technology, radio frequency switching circuit is one of the components. Below, the position where the radio frequency switching circuit may be used in the communication device provided in the embodiment of the present application is schematically described.

[0064] In some embodiments, the RF front-end module 101 generally includes a transmitting channel and a receiving channel, and switching between the transmitting channel and the receiving channel can be achieved by a radio frequency switching circuit 2.

[0065] Figure 2A A schematic diagram of the structure of an RF front-end module provided in an embodiment of the present application.

[0066] Typically, the RF front-end module 101 includes but is not limited to a radio frequency switch circuit 2, a filter, a power amplifier circuit (PA), a low noise amplifier (LNA), etc. For example, Figure 2A As shown, the RF front-end module 101 may include: a radio frequency switch circuit 2, a filter, a PA and a LNA.

[0067] The RF front-end module 101 may include a transmitting channel (transmitter, TX) and a receiving channel (receiver, RX), the transmitting channel TX includes a PA and a transmitting channel filter, the RF output end of the PA is coupled to the input end of the transmitting channel filter, the receiving channel RX includes an LNA and a receiving channel filter, the output end of the receiving channel filter is coupled to the RF input end of the LNA.

[0068] The RF switch circuit 2 is responsible for switching between the receiving channel RX and the transmitting channel TX. The baseband signal is transmitted to the transmitting channel TX via the transceiver, and the transmitting channel TX amplifies the received RF signal and outputs it to the antenna radiator 108, and transmits it via the antenna radiator 108. The PA is responsible for amplifying the RF signal of the transmitting channel TX, and the transmitting channel filter is responsible for filtering the RF signal of the transmitting channel TX.

[0069] The receiving channel RX receives the RF signal from the antenna radiator 108. The RF signal is amplified by the receiving channel RX and then output and transmitted to the baseband through the transceiver. The LNA is responsible for amplifying the RF signal of the receiving channel RX, and the receiving channel filter is responsible for filtering the RF signal of the receiving channel RX.

[0070] Figure 2B A schematic diagram of an application of a radio frequency switching circuit in an RF front-end module provided in an embodiment of the present application.

[0071] In some embodiments, Figure 2B As shown, the transmitting channel TX includes a series RF switch circuit 2 coupled in the transmitting channel TX and a parallel RF switch circuit 2 coupled between the transmitting channel TX and a reference ground voltage terminal (grounding, GND). The receiving channel RX includes a series RF switch circuit 2 coupled in the receiving channel RX and a parallel RF switch circuit 2 coupled between the receiving channel RX and a reference ground voltage terminal GND.

[0072] During the operation of the RF front-end module 101, when the transmitting channel TX is working, the parallel RF switch circuit 2 to the ground in the transmitting channel TX is turned off, and the series RF switch circuit 2 in the receiving channel RX is turned off. When the receiving channel RX is working, the parallel RF switch circuit 2 to the ground in the receiving channel RX is turned off, and the series RF switch circuit 2 in the transmitting channel TX is turned off. The RF switch circuit 2 is responsible for switching between the receiving channel RX and the transmitting channel TX.

[0073] When the RF switch circuit 2 is turned off, both ends of the RF switch circuit 2 will be subjected to a relatively high power (tens of volts) RF voltage. The voltage resistance of the RF switch circuit 2 has a direct impact on the performance of the RF front-end module 101 .

[0074] With the development of wireless communication technology, communication standards have evolved from 3G, 4G, 5G to 6G, from the early single-standard covering several frequency bands to today's multi-standard covering more than a dozen or even dozens of frequency bands. Switching between different frequency bands and standards can be achieved through RF switching circuits.

[0075] In some other embodiments, the front end of the wireless communication system changes the electrical length of the antenna radiator 108 and tunes the impedance and aperture of the antenna radiator 108 through the RF switch circuit 2 .

[0076] Figure 3 An application schematic diagram of a wireless communication system front end provided in an embodiment of the present application.

[0077] like Figure 3 As shown, the front end of the wireless communication system includes an antenna radiator 108 , an antenna feed line 109 and a tuned load 110 .

[0078] One end of the antenna radiator 108 is coupled to the reference ground voltage terminal GND, and there is a feed point in the middle of the antenna radiator 108, and the antenna feed line 109 is coupled to the feed point. One or more RF switch circuits 2 are coupled in parallel to the antenna feed line 109, and a tuned load 110 is coupled between the RF switch circuit 2 and the reference ground voltage terminal GND. One or more RF switch circuits 2 are coupled in parallel to the arm of the antenna radiator 108, and a tuned load 110 is coupled between the RF switch circuit 2 and the reference ground voltage terminal GND. The tuned load 110 may include passive components such as capacitors and inductors.

[0079] When the communication device is in use, the electrical length of the antenna radiator 108 can be changed by combining the on and off switches of the plurality of RF switch circuits 2 to achieve adjustable resonant frequency of the antenna radiator 108 .

[0080] The RF voltage swing at the location of the tuned load 110 is relatively large (up to 80V at most), and the RF voltage of several tens of volts will be directly applied to both ends of the RF switch circuit 2 in the off state. The voltage resistance of the RF switch circuit 2 has a direct impact on the performance of the front end of the wireless communication system.

[0081] Based on this, improving the voltage resistance of the RF switch circuit 2 is a technical problem that technical personnel in this field need to solve, and the voltage resistance of the switch circuit in the RF switch circuit 2 directly affects the voltage resistance of the RF switch circuit 2 .

[0082] Figure 4A A schematic diagram of a topological structure of a switch circuit according to an embodiment of the present application is shown in FIG. Figure 4B for Figure 4A The equivalent capacitance model of the switching device when it is turned off, Figure 4C for Figure 4A Equivalent capacitance model of the switch circuit when it is turned off.

[0083] The present application embodiment provides a switch circuit 20, such as Figure 4A As shown, the switch circuit 20 includes a plurality of switch devices T coupled in series, a gate bias circuit 21 , a body bias circuit 22 and a voltage divider circuit 23 .

[0084] The switch device T includes a gate g, a source s, a drain d and a body (body, b), the gate g is coupled to the gate bias circuit 21, and the body b is coupled to the body bias circuit 22. The drain d (or source s) of the current stage switch device T is coupled to the source s (or drain d) of the next stage switch device T to realize the series connection of multiple switch devices T. The source s (or drain d) of the first stage switch device T and the drain d (or source s) of the last stage switch device T serve as two ends of the switch circuit 20, which are used to realize the series or parallel coupling of the switch circuit 20 with other circuits.

[0085] The gate bias circuit 21 includes a plurality of gate resistors Rg. A gate resistor Rg is connected in series between the gate g of each stage of the switching device T and the first node A1 , and a common gate resistor Rg is connected in series between the first node A1 and the gate terminal G of the switching circuit 20 .

[0086] The body bias circuit 22 includes multiple body resistors Rb. A body resistor Rb is connected in series between the body terminal b of each stage of the switching device T and the second node A2, and a common body resistor Rb is connected in series between the second node A2 and the body terminal B of the switching circuit 20.

[0087] The voltage divider circuit 23 includes a plurality of resistors R. A resistor R is connected in series between the source s and the drain d of each stage of the switch device T, so that the voltage drop of each stage of the switch device T is equal.

[0088] like Figure 4B As shown in FIG. 1 , when the switch device T is in the off state, the parasitic capacitance in the switch device T includes gate-source parasitic capacitance Cgs, gate-body parasitic capacitance Cgb, gate-drain parasitic capacitance Cgd, source-drain parasitic capacitance Cds, body-source parasitic capacitance Cbs, body-drain parasitic capacitance Cbd, source-substrate parasitic capacitance Csx, body-substrate parasitic capacitance Cbx, and drain-substrate parasitic capacitance Cdx. After multiple switch devices T are connected in series, the equivalent capacitance model of the switch circuit 20 when it is turned off is as follows: Figure 4C After multiple switch devices T are connected in series, parasitic capacitance will also be generated between the switch device T and the reference ground. The parasitic capacitance in the switch device T includes gate-source parasitic capacitance Cgs, gate-drain parasitic capacitance Cgd, body-source parasitic capacitance Cbs, body-drain parasitic capacitance Cbd, gate-ground parasitic capacitance Cgp and body-ground parasitic capacitance Cbp.

[0089] When the voltage swing borne by the switching circuit 20 increases, the source-drain voltage borne by each switching device T increases accordingly, causing the switching device T to easily break down. Within a certain range, the RF voltage borne by a single switching device T can be reduced by increasing the number of cascaded switching devices T. However, increasing the number of stages of switching devices T will lead to a deterioration in area and insertion loss. Moreover, when the switching device T is in the off state, the above-mentioned parasitic capacitance of the switching device T will cause the source-drain voltage swing borne by each stage of the switching device T to be unequal, usually the source-drain voltage swing borne by the front-stage switching device T is large, and the source-drain voltage swing borne by the rear-stage switching device T is small. This causes the front-stage switching device T to easily break down, and then the entire switching circuit 20 burns out and fails.

[0090] Figure 5A and Figure 5B A schematic diagram of a topological structure of a switch circuit according to an embodiment of the present application is shown in FIG. Figure 5C for Figure 5A and Figure 5B The simulated gain curve of the switching circuit is shown.

[0091] The present application also provides a switch circuit 20, such as Figure 5A and Figure 5B As shown, the switch circuit 20 includes a plurality of switch devices T coupled in series, a gate bias circuit 21, a body bias circuit 22, and a body feedforward capacitor Cfwd.

[0092] The gate bias circuit 21 includes a plurality of gate resistors Rg. A gate resistor Rg is connected in series between the gate g of each stage of the switching device T and the gate terminal G of the switching circuit 20 .

[0093] In some embodiments, Figure 5A As shown, the body bias circuit 22 includes multiple body resistors Rb and body capacitors Cb. A body resistor Rb is connected in series between the body b of each stage of the switching device T and the body terminal B of the switching circuit 20, and a body capacitor Cb is connected in series between the body b of two adjacent stages of the switching devices T.

[0094] The bulk feedforward capacitor Cfwd is connected in series between the source s (or drain d) and the bulk b of the first-stage switching device T.

[0095] A body capacitor Cb is connected in series between the body electrodes b of the two adjacent first-stage switching devices T, and a body feedforward capacitor Cfwd is connected in series between the source electrode s (or drain electrode d) and the body electrode b of the first-stage switching device T. The body feedforward capacitor Cfwd compensates for the body-drain parasitic capacitance Cbd of the first-stage switching device T, and further compensates for the source-drain parasitic capacitance Cds of the first-stage switching device T. The body capacitor Cb can equivalently compensate for the source-drain parasitic capacitance Cds of each subsequent stage of the switching device T, so as to balance the parasitic capacitance of each stage, and balance the source-drain voltage borne by each stage of the switching device T.

[0096] In other embodiments, Figure 5B As shown, the body bias circuit 22 includes a plurality of body resistors Rb, a body resistor Rb is connected in series between the body b of each stage of the switching device T and the body terminal B of the switching circuit 20, and a body resistor Rb is connected in series between the body b of two adjacent stages of the switching devices T. A body resistor Rb is also connected in series between the source s (or drain d) of the first stage switching device T and the body b. The body feedforward capacitor Cfwd is connected in series between the source s (or drain d) of the first stage switching device T and the body b.

[0097] A body resistor Rb is connected in series between the body electrodes b of the two adjacent first-stage switching devices T, and a body feedforward capacitor Cfwd is connected in series between the source electrode s (or drain electrode d) and the body electrode b of the first-stage switching device T. The body feedforward capacitor Cfwd compensates for the body-drain parasitic capacitance Cbd of the first-stage switching device T, and further compensates for the source-drain parasitic capacitance Cds of the first-stage switching device T. The body resistor Rb is connected between the body electrodes b of the adjacent-stage switching devices T, and the source-drain voltage borne by each stage of the switching device T can be balanced.

[0098] Figure 5C The horizontal axis is the number of switching devices T, and the vertical axis is the source-drain voltage. Figure 5C As shown, Figure 4A In the switch circuit 20 shown, the swing amplitude of the source-drain voltage borne by the switch device T tends to decrease. Figure 5A and Figure 5B In the switch circuit 20 shown, the swing amplitudes of the source-drain voltages borne by the switch devices T at each stage are substantially the same.

[0099] In order to improve the uniformity of the source-drain voltage borne by each level of switching devices T, the actual values ​​of the bulk feedforward capacitor Cfwd, bulk resistance Rb, and bulk capacitance Cb need to be simulated and calculated to obtain specific values. Generally, the bulk feedforward capacitor Cfwd and bulk capacitance Cb are in the order of fF. However, during the processing, fluctuations in processing parameters will cause large fluctuations in the actual capacitance and resistance values, and the consistency of the actual capacitance and resistance compensation is poor, affecting the source-drain voltage balancing effect.

[0100] Figure 6 A schematic diagram of a topological structure of another switching circuit illustrated in an embodiment of the present application.

[0101] The present application also provides a switch circuit 20, such as Figure 6 As shown, the switch circuit 20 includes a plurality of switch devices T coupled in series, a gate bias circuit 21 , a body bias circuit 22 and an impedance compensation network 24 .

[0102] The gate bias circuit 21 includes a plurality of gate resistors Rg, and a gate resistor Rg is connected in series between the gates g of two adjacent switching devices T.

[0103] The body bias circuit 22 includes a plurality of body resistors Rb, and a body resistor Rb is connected in series between the body electrodes b of two adjacent switching devices T.

[0104] The impedance compensation network 24 includes a variable capacitor C′ and a resistor R coupled in series. An impedance compensation network 24 is connected in series between the gate g of the first-stage switching device T and the source s (or drain d) of the first-stage switching device T, and an impedance compensation network 24 is connected in series between the body b of the first-stage switching device T and the source s (or drain d) of the first-stage switching device T. An impedance compensation network 24 is connected in series between the gate g of the last-stage switching device T and the drain d (or source s) of the last-stage switching device T, and an impedance compensation network 24 is connected in series between the body b of the last-stage switching device T and the drain d (or source s) of the last-stage switching device T.

[0105] By setting up multiple impedance compensation networks 24, symmetrical RF impedance is provided at both ends of each stage of the switching device T. The symmetrical RF impedance makes the voltages of the source gate sg, drain gate dg, source s, and drain d of each stage of the switching device T equal, so that the swing amplitude of the source-drain voltage borne by each stage of the switching device T is equal.

[0106] However, the impedance compensation network 24 is composed of a resistor R and a variable capacitor C′. During the processing, fluctuations in processing parameters will cause large fluctuations in actual capacitance and resistance, and the consistency of actual capacitance and resistance compensation will be poor, affecting the source-drain voltage balancing effect.

[0107] Figure 7 A schematic diagram of a topological structure of another switching circuit illustrated in an embodiment of the present application.

[0108] The present application also provides a switch circuit 20, such as Figure 6 As shown, the switch circuit 20 includes a plurality of switch devices T coupled in series, a gate bias circuit 21 , a body bias circuit 22 and a voltage divider circuit 23 .

[0109] The switch circuit 20 includes two gate terminals G and two body terminals B, the two gate terminals G receive the same signal, and the two body terminals B receive the same signal. The gate bias circuit 21 includes two first nodes A1, and the body bias circuit 22 includes two second nodes A2. The multi-stage switch device T is divided into two groups, each group corresponds to a first node A1, a second node A2, a gate terminal G and a body terminal B.

[0110] The gate bias circuit 21 includes a plurality of gate resistors Rg. The gates g of the switch devices T in the same group are coupled to the same first node A1. A gate resistor Rg is connected in series between the gate g of each switch device T and the first node A1. A common gate resistor Rg is connected in series between each first node A1 and a gate terminal G.

[0111] The body bias circuit 22 includes a plurality of body resistors Rb. The body electrodes b of the switch devices T in the same group are coupled to the same second node A2. A body resistor Rb is connected in series between the body electrode b and the second node A2 of each switch device T. A common body resistor Rb is connected in series between each second node A2 and a body terminal B.

[0112] The voltage divider circuit 23 includes a plurality of resistors R. A resistor R is connected in series between the source s and the drain d of each stage of the switch device T, so that the voltage drop of each stage of the switch device T is equal.

[0113] By dividing the multi-stage switching device T into two groups, the gate terminal G and the body terminal B of each group receive the same signal, and there is no need to increase the capacitance and resistance, and the influence of the process fluctuation on the source-drain voltage balancing effect can be ignored. Through simulation, it is found that after the switching circuit 20 is grouped, the source-drain voltage balancing effect can be slightly improved and the swing of the source-drain voltage can be reduced, but the effect is not obvious. For example, the switching circuit 20 includes 12 levels of switching devices T, and the switching devices T are not grouped. When the RF voltage is 40V, the gate terminal G and the body terminal B voltage are -3V, the maximum swing of the source-drain voltage is 4.465V. After the switching devices T are grouped under the same process, the RF voltage is 40V, the gate terminal G and the body terminal B voltage are -3V, and the maximum swing of the source-drain voltage is 4.464V, and the balancing effect of the source-drain voltage is not obvious.

[0114] Based on this, the embodiment of the present application provides a new switch circuit 20 to improve the source-drain voltage balancing effect, thereby improving the voltage resistance of the switch circuit 20.

[0115] Fig. 8A and Figure 8B A schematic diagram of a topological structure of a switching circuit provided in an embodiment of the present application.

[0116] like Fig. 8A As shown, the switch circuit 20 includes a plurality of switch devices T coupled in series, and the plurality of switch devices T are divided into a plurality of device groups Q. Correspondingly, the switch circuit 20 includes a plurality of body terminals B and a plurality of device groups Q, each device group Q includes one or more switch devices T, and the switch devices T in the same device group Q are coupled to the same body terminal B, and the body terminal B is used to receive a body terminal bias voltage, and at least two of the body terminal bias voltages received by the plurality of body terminals B have different values.

[0117] For example, each device group Q in the switch circuit 20 includes only one level of switch devices T. Or for example, each device group Q in the switch circuit 20 includes multiple levels of switch devices T. Or for example, some device groups Q in the switch circuit 20 include one level of switch devices T, and some device groups Q include multiple levels of switch devices T.

[0118] In the embodiment of the present application, there is no limit on the number of stages of the switch devices T included in the switch circuit 20, and there is no limit on the number of divided device groups Q. For example, the switch circuit 20 includes more than two device groups Q. Each device group Q may include one or more stages of switch devices T, but there is no restrictive requirement for the number of stages of the switch devices T included in each device group Q, and the number of stages of the switch devices T included in the multiple device groups Q may be completely different, completely the same, or partially the same.

[0119] In addition, when the RF switching circuit 2 includes multiple switching circuits 20, there are no restrictive requirements on the number of levels of switching devices T included in the multiple switching circuits 20, the number of divided device groups Q, and the number of levels of switching devices T included in each device group Q. They can be reasonably set in combination with specific application scenarios.

[0120] The switch devices T in the same device group Q are coupled to the same body terminal B for receiving the same body terminal bias voltage, and the body terminal bias voltages received by the switch devices T in different device groups Q are not completely the same or are completely different.

[0121] In some embodiments, Fig. 8A As shown, the switch circuit 20 further includes a gate terminal G, and the gates g of the multi-stage switch devices T are all coupled to the same gate terminal G, and the gate terminal G is used to receive a gate bias voltage.

[0122] By coupling the gates g of the multi-stage switching devices T to the same gate terminal G, the multi-stage switching devices T receive the same gate bias voltage, which can avoid the problem that when the multi-stage switching devices T receive different gate bias voltages, the switching harmonic performance is greatly deteriorated because the gate bias voltages received by the first few device groups Q are large and the static point of the switch is close to the threshold voltage, which causes the problem.

[0123] In other embodiments, Figure 8B As shown, the switch circuit 20 further includes a plurality of gate terminals G, and the switch devices T in the same device group Q are coupled to the same gate terminal G. The gate terminal G is used to receive a gate terminal bias voltage, and the gate terminal bias voltages received by the switch devices T in different device groups Q may be the same, completely different, or not completely the same.

[0124] In some embodiments, the switch circuit 20 further includes a gate bias circuit 21 , a body bias circuit 22 , and a voltage divider circuit 23 .

[0125] like Fig. 8A As shown, the gate bias circuit 21 includes a first node A1. The multi-stage switch device T is divided into a plurality of device groups Q, and the plurality of device groups Q correspond to the same first node A1 and gate terminal G. The gate bias circuit 21 includes a plurality of gate resistors Rg, and the gates g of the multi-stage switch devices T of the switch circuit 20 are coupled to the first node A1, and a gate resistor Rg is connected in series between the gate g of each switch device T and the first node A1. A common gate resistor Rg is connected in series between the first node A1 and a gate terminal G.

[0126] Or, if Figure 8B As shown, the gate bias circuit 21 includes a plurality of first nodes A1, and the multi-stage switching devices T are divided into a plurality of device groups Q, each device group Q corresponds to a first node A1 and a gate terminal G. The gate bias circuit 21 includes a plurality of gate resistors Rg, the gates g of the switching devices T in the same group are coupled to the same first node A1, and a gate resistor Rg is connected in series between the gate g of each switching device T and the first node A1. A common gate resistor Rg is connected in series between each first node A1 and a gate terminal G.

[0127] like Fig. 8A As shown, the body bias circuit 22 includes a plurality of second nodes A2, each device group Q corresponds to a second node A2 and a body terminal B, the body bias circuit 22 includes a plurality of body resistors Rb, the body electrodes b of the switch devices T in the same group are coupled to the same second node A2, and a body resistor Rb is connected in series between the body electrode b of each switch device T and the second node A2. A common body resistor Rb is connected in series between each second node A2 and a body terminal B.

[0128] The voltage divider circuit 23 includes a plurality of voltage divider structures. A voltage divider structure is connected in series between the source s and the drain d of each switching device T. That is, the two ends of the voltage divider structure are coupled to the source s and the drain d of the same switching device T respectively.

[0129] For example, the voltage-dividing structure includes one or more passive components such as a resistor R, a capacitor, and an inductor, and the resistance, capacitance, or inductance of the voltage-dividing structure coupled to different switch devices T may be unequal.

[0130] A voltage-dividing structure corresponding to each level of switch device T is provided in the switch circuit 20, and by adjusting the equivalent resistance value of the voltage-dividing structure, the voltage drop of each level of switch device T can be equal or have an obvious regularity. By using passive devices such as resistors R, capacitors, and inductors as the voltage-dividing structure, the circuit structure is simple and easy to implement.

[0131] The source-body parasitic capacitance Csb of the switching device T is The leakage parasitic capacitance Cdb is Among them, Csbo is the parasitic capacitance when the source body has zero voltage difference, Vsb is the source body voltage, is the voltage influencing factor, Cdbo is the parasitic capacitance when the drain body has zero voltage difference, and Vdb is the drain body voltage. From the formulas of the source body parasitic capacitance Csb and the drain body parasitic capacitance Cdb, it can be seen that the values ​​of the source body parasitic capacitance Csb and the drain body parasitic capacitance Cdb of the switching device T are inversely proportional to the source body voltage Vsb and the drain body voltage Vdb. However, since the source voltage and the drain voltage of each level of the switching device T are not fixed, in order to ensure that the voltage drop of each level of the switching device T is equal, the source body parasitic capacitance Csb and the drain body parasitic capacitance Cdb of each level of the switching device T are required to be equal, which requires that the body pole b of each level of the switching device T receives different body pole bias voltages. In the embodiment of the present application, the multi-stage switching device T is divided into a plurality of device groups Q, and the switching devices T in the plurality of device groups Q are coupled to different body terminals B, and the body terminal bias voltages received by the plurality of body terminals B are not completely the same or completely different. In this way, the source voltage and drain voltage of each stage of the switch device T are not fixed, and the body voltage of each stage of the switch device T is also not fixed. In combination with the source voltage and drain voltage of each stage of the switch device T, the body voltage of each stage of the switch device T is matched and adjusted to change the source body voltage Vsb and the drain body voltage Vdb of each stage of the switch device T, so that the source body parasitic capacitance Csb and the drain body parasitic capacitance Cdb of each stage of the switch device T are close to equal, so as to balance the swing of the source-drain voltage of each stage of the switch device T and improve the withstand voltage capability of the switch circuit 20. In addition, after the embodiment of the present application groups the multi-stage switch devices T and receives different body-end bias voltages, the swing of the source-drain voltage of each stage of the switch device T is more balanced. Therefore, under the condition of bearing the same RF voltage, the number of stages of the switch devices T included in the switch circuit 20 provided by the embodiment of the present application can be reduced to achieve optimization of insertion loss and area. Furthermore, the switching circuit 20 of the embodiment of the present application does not innovate the switching circuit 20 itself, but innovates the body-end feeding network, so that the body end B receives different body-end bias voltages to balance the source-drain voltage, thereby avoiding the problem of poor voltage balancing effect caused by process parameter fluctuations when changing the switching circuit 20.

[0132] Based on the switching circuit 20 with body-end B group bias provided in the embodiment of the present application, it is found through simulation that under the conditions of the same process, the same RF high voltage, and the same number of switching devices T, based on Figure 4A The switching circuit architecture shown has the smallest maximum swing and the largest harmonic inflection point, and both the maximum swing and the harmonic inflection point are significantly improved.

[0133] In some embodiments, along the direction of the cascade of the switching devices T (that is, the direction in which the signal is transmitted in the switching circuit 20 ), the body terminal bias voltages received by the plurality of body terminals B gradually decrease.

[0134] It should be understood that when the switch device T is in the on state, the body terminals B of the multiple switch devices T all receive the reference ground voltage (0V). When the switch device T is in the off state, the body terminals B of the multiple switch devices T receive completely unequal or incompletely equal body terminal bias voltages, and the body terminal bias voltage is a negative voltage. Based on this, when the body terminal bias voltage shows a decreasing trend, the absolute value of the body terminal bias voltage shows an increasing trend. The body terminal bias voltages received by the multiple body terminals B may be regularly reduced, for example, the body terminal voltage received by device group 1 is -1V, the body terminal bias voltage received by device group 2 is -2V, and the body terminal bias voltage received by device group 3 is -3V, etc. The multiple body terminal bias voltages may also be irregularly reduced. For example, the body terminal voltage received by device group 1 is -1V, the body terminal bias voltage received by device group 2 is -1.5V, and the body terminal bias voltage received by device group 3 is -2.5V, etc. In addition, the body terminal bias voltages received by multiple body terminals B can be reduced in sequence (for example, reduced step by step). For example, the body terminal voltage received by device group one is -1V, the body terminal bias voltage received by device group two is -2V, and the body terminal bias voltage received by device group three is -3V, etc.

[0135] The body-end bias voltages received by multiple body-ends B may also decrease in a step-by-step manner (for example, they show a decreasing trend as a whole, but they do not decrease step by step. For example, they have a decreasing-decreasing-equal-decreasing trend). For example, the body-end voltage received by device group one is -1V, the body-end bias voltage received by device group two is -2V, the body-end bias voltage received by device group three is -2V, the body-end bias voltage received by device group four is -3V, and so on.

[0136] If the source voltage and drain voltage of each stage of the switching device T in the switching circuit 20 decrease step by step, the body-end bias voltage received by the body electrodes b of the switching devices T in the multiple device groups Q is set to gradually decrease, so that the source-body parasitic capacitance Csb and the drain-body parasitic capacitance Cdb of each stage or every several stages of the switching devices T can be made close to the same, and the swing of the source-drain voltage of each stage of the switching device T is further balanced, thereby improving the withstand voltage capability of the switching circuit 20. The fewer the number of switching devices T included in each device group Q, the more obvious the trend of the body-end bias voltage of the switching device T decreasing step by step, and the better the swing of the source-drain voltage of the switching device T is balanced.

[0137] In some embodiments, the difference between the body terminal bias voltages received by two adjacent body terminals B is a fixed value.

[0138] It should be understood that the embodiments of the present application are not limited to the difference between the body terminal bias voltages received by two adjacent body terminals B being equal to the value "W". Due to the existence of process errors, the values ​​within the range of W±0.1 are all "fixed values" referred to in the embodiments of the present application.

[0139] For example, the body terminal voltage received by device group one is -1V, the body terminal bias voltage received by device group two is -2V, the body terminal bias voltage received by device group three is -3V, and so on. The difference between the body terminal bias voltages received by two adjacent body terminals B is equal to 1.

[0140] When the body-end bias voltage decreases in a fixed pattern, the design difficulty of the switch circuit 20 can be reduced, which helps to further optimize the swing of the source-drain voltage borne by the multi-stage switch device T.

[0141] In some other embodiments, the difference between the body terminal bias voltages received by two adjacent body terminals B is not a fixed value.

[0142] For example, the body terminal voltage received by device group one is -1V, the body terminal bias voltage received by device group two is -2V, the body terminal bias voltage received by device group three is -4V, the body terminal bias voltage received by device group four is -5V, and so on. The difference between the body terminal bias voltages received by two adjacent body terminals B is not equal.

[0143] In some embodiments, Fig. 8A As shown, in the case where the device group Q includes multiple levels of switch devices T, the multiple levels of switch devices T in the same device group Q are sequentially coupled in series. Or it can be understood that the switch devices T are grouped sequentially along the cascade direction of the multiple levels of switch devices T. For example, the 1st to 3rd level switch devices T are divided into device group 1, the 4th to 5th level switch devices T are divided into device group 2, the 6th to 9th level switch devices T are divided into device group 3, the 10th level switch devices T are divided into device group 4, and so on.

[0144] For the switch circuit 20, the source voltage and drain voltage borne by the multiple stages of switch devices T connected in series in sequence show a decreasing trend. The body-end bias voltage received by the switch circuit 20 also shows a decreasing trend. Therefore, after the switch devices T are grouped step by step, the body-end bias voltage received by the subsequent switch devices T will not be higher than the body-end bias voltage received by the previous switch devices T. In this way, the body-source parasitic capacitance Cbs and body-drain parasitic capacitance Cbd generated by each stage of the switch devices T can be nearly equal, so that the voltage drop of each stage of the switch devices T can be nearly equal, so as to balance the swing of the source-drain voltage borne by each stage of the switch devices T.

[0145] For example, based on Figure 4A In the switching circuit 20 shown, the source body parasitic capacitance Csb1 of the first-stage switching device T is less than the source body parasitic capacitance Csb2 of the second-stage switching device T is less than the source body parasitic capacitance Csb3 of the third-stage switching device T is less than…the source body parasitic capacitance CsbW of the last-stage (Wth-stage) switching device T is less than the source body parasitic capacitance Csb1 of the first-stage switching device T is less than the source body parasitic capacitance Csb2 of the second-stage switching device T is less than the source body parasitic capacitance Csb3 of the third-stage switching device T is less than the source body parasitic capacitance CsbW of the last-stage (Wth-stage) switching device T is less than the source body parasitic capacitance CsbW of the third-stage switching device T is less than the source body parasitic capacitance Csb3 of the third-stage switching device T is less than the source body parasitic capacitance Csb3 of the

[0146] based on Fig. 8AThe switching circuit 20 shown can make the source body parasitic capacitance Csb1 of the first-stage switching device T ≈ the source body parasitic capacitance Csb2 of the second-stage switching device T ≈ the source body parasitic capacitance Csb3 of the third-stage switching device T ≈ … ≈ the source body parasitic capacitance CsbW of the last-stage (Wth-stage) switching device T by adjusting the source body voltage Vsb of each stage or every few stages of the switching device T.

[0147] Similarly, based on Figure 4A In the switching circuit 20 shown, the drain parasitic capacitance Cdb1 of the first-stage switching device T is less than the drain parasitic capacitance Cdb2 of the second-stage switching device T is less than the drain parasitic capacitance Cdb3 of the third-stage switching device T is less than…the drain parasitic capacitance CdbW of the last-stage (Wth-stage) switching device T is less than.

[0148] based on Fig. 8A The switching circuit 20 shown can make the drain parasitic capacitance Cdb1 of the first-stage switching device T ≈ the drain parasitic capacitance Cdb2 of the second-stage switching device T ≈ the drain parasitic capacitance Cdb3 of the third-stage switching device T ≈ … ≈ the drain parasitic capacitance CdbW of the last-stage (Wth-stage) switching device T by adjusting the drain voltage Vdb of each stage or every several stages of the switching device T.

[0149] After the multi-stage switching devices T are grouped and receive different body-end bias voltages in the embodiment of the present application, the swing amplitude of the source-drain voltage of each stage of the switching devices T is more balanced. Therefore, under the condition of being subjected to the same RF voltage, the number of stages of the switching devices T included in the switching circuit 20 provided in the embodiment of the present application can be reduced.

[0150] In some embodiments, the theoretical breakdown voltage of the switch circuit 20 is MV, the actual breakdown voltage of the switch circuit 20 is NV, and the value of M / N is 1-2.

[0151] For example, the value of M / N can be 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, or 1.9.

[0152] The theoretical breakdown voltage of the switching circuit 20 can be obtained by multiplying the theoretical withstand voltage of each stage of the switching device T by the number of stages of the switching device T. Since the swing amplitude of the source-drain voltage of each stage of the switching device T is relatively balanced, the number of stages of the switching device T in the switching circuit 20 can be reduced, so the value of M / N can be 1-2.

[0153] For example, the RF voltage received by the first-stage switching device T is 40V, and the number of stages of the switching devices T in the switching circuit 20 is less than or equal to 11.

[0154] For example, the RF voltage (actual breakdown voltage) received by the first-stage switch device T is N=40V, and the breakdown voltage of each switch device T is 5.5V. Figure 4A The switch circuit 20 shown in the figure requires a 19-level switch device T, a theoretical breakdown voltage of M = 104.5 V, and M / N = 2.6. Fig. 8A The switching device T required for the switching circuit 20 shown is level 10, the theoretical breakdown voltage is M=55V, and M / N=1.9.

[0155] Or, for example, the RF voltage received by the first-stage switching device T is 35V, and the number of stages of the switching devices T in the switching circuit 20 is less than or equal to 11.

[0156] For example, the RF voltage (actual breakdown voltage) received by the first-stage switch device T is N=35V, and the breakdown voltage of each switch device T is 5V. Figure 4A The switching device T required for the switching circuit 20 shown is 14 levels, the theoretical breakdown voltage is M=70V, and M / N=2. Fig. 8A The switching device T required for the switching circuit 20 shown is level 10, the theoretical breakdown voltage is M=50V, and M / N=1.4.

[0157] Or, for example, the first-stage switching device T is used to receive a radio frequency voltage of 30V, and the number of stages of the switching devices T in the switching circuit 20 is less than or equal to 10.

[0158] For example, the RF voltage (actual breakdown voltage) received by the first-stage switch device T is N=30V, and the breakdown voltage of each switch device T is 4.25V. Figure 4A The switching device T required for the switching circuit 20 shown is 12 levels, the theoretical breakdown voltage is M=51V, and M / N=1.7. Fig. 8A The switching device T required for the switching circuit 20 shown is level 8, the theoretical breakdown voltage is M=34V, and M / N=1.5.

[0159] The switch circuit 20 with body-side B group bias provided in the embodiment of the present application can not only improve the withstand voltage characteristics of the switch circuit 20, but also optimize the insertion loss and area. Figure 4A The switch circuit architecture shown requires 13 levels of switch devices T to meet the withstand voltage requirements. Fig. 8A The switch circuit architecture shown requires 10 levels of switch devices T to meet the withstand voltage requirement. The switch circuit 20 can reduce 3 levels of switch devices T, the maximum voltage swing can be reduced by about 0.347V, the insertion loss can be reduced by about 0.38dB, and the area can be reduced by about 23%.

[0160] Fig. 9This is a schematic diagram of an RF switch circuit provided in an embodiment of the present application.

[0161] In some embodiments, Fig. 9 As shown, the radio frequency switch circuit 2 includes a first switch circuit 20 ′, a bias voltage output circuit 30 and a first level conversion circuit 41 .

[0162] The structure of the first switch circuit 20 ′ is the same as the structure of the switch circuit 20 illustrated above. In the embodiment of the present application, the multiple switch circuits are distinguished in naming only to distinguish the multiple switch circuits included in the RF switch circuit 2, but the structure does not change.

[0163] For example, the first switch circuit 20′ includes a plurality of first body terminals B1 and a plurality of first switch devices, and the plurality of first switch devices are divided into a plurality of first device groups. The first body terminal B1 of the first switch circuit 20′ is the body terminal B in the switch circuit 20, the first switch device in the first switch circuit 20′ is the switch device T in the switch circuit 20, and the first device group in the first switch circuit 20′ is the device group Q in the switch circuit 20.

[0164] The bias voltage output circuit 30 includes a plurality of body-end bias voltage output terminals Vb. By way of example, the plurality of body-end bias voltage output terminals Vb are respectively used to output body-end bias voltages vb. The plurality of body-end bias voltages vb output by the plurality of body-end bias voltage output terminals Vb may be the same or different.

[0165] In some embodiments, the multiple body-end bias voltages vb output by the bias voltage output circuit 30 have the same characteristics as the body-end bias voltage received by the body terminal B of the switch circuit 20. For example, the values ​​of at least two of the multiple body-end bias voltages vb output by the bias voltage output circuit 30 are different. It can also be understood that the values ​​of the multiple body-end bias voltages vb output by the bias voltage output circuit 30 are not completely the same or completely different.

[0166] For example, the plurality of body-end bias voltages vb outputted by the bias voltage output circuit 30 gradually decrease. For example, the difference between any two adjacent body-end bias voltages vb is a fixed value.

[0167] The first level conversion circuit 41 includes a first control terminal P1, a plurality of first input terminals I1, a reference ground voltage terminal GND, and a plurality of first output terminals O1. The plurality of first input terminals I1 are coupled to a plurality of body-end bias voltage output terminals Vb in a one-to-one correspondence, and the plurality of first input terminals I1 are used to receive the body-end bias voltage output by the plurality of body-end bias voltage output terminals Vb. The reference ground voltage terminal GND is used to receive the reference ground voltage gnd, and both the body-end bias voltage and the reference ground voltage gnd are used as input signals of the first level conversion circuit 41.

[0168] The first control terminal P1 is used to receive a first control signal, and a plurality of first level conversion circuits 41 can be coupled to the same first control terminal P1 to receive the same first control signal. The first level conversion circuit 41 is used to output a reference ground voltage gnd or a first body-end bias voltage vb1 from the first output terminal O1 under the control of the first control signal. For example, when the first switch circuit 20′ is turned on, the first level conversion circuit 41 is used to output the reference ground voltage gnd from the first output terminal O1 under the control of the first control signal, and the body pole b of the first switch device in the first switch circuit 20′ receives the reference ground voltage gnd. When the first switch circuit 20′ is turned off, the first level conversion circuit 41 is used to output the first body-end bias voltage vb1 from the first output terminal O1 under the control of the first control signal, and the voltage received by the body pole b of the first switch device in the first switch circuit 20′ is the first body-end bias voltage vb1.

[0169] It can be seen from the above description of the switch circuit 20 that at least two of the multiple first body-end bias voltages vb1 outputted by the multiple first output terminals O1 are different. In some embodiments, the multiple first body-end bias voltages vb1 outputted by the first output terminal O1 are the same as the multiple body-end bias voltages vb outputted by the bias voltage output circuit 30, and the first level conversion circuit 41 only selects to output the reference ground voltage gnd or output the body-end bias voltage vb as the first body-end bias voltage vb1 according to the on-off status of the first switch circuit 20′.

[0170] In the RF switch circuit 2 provided in the embodiment of the present application, the first switch circuit 20′ receives completely different or non-completely the same first body-end bias voltage vb1, which can balance the body-source parasitic capacitance Cbs and body-drain parasitic capacitance Cbd of each level of the first switch device in the first switch circuit 20′, and then balance the swing of the source-drain voltage of each level of the first switch device, thereby improving the withstand voltage characteristics of the first switch circuit 20′. The first body-end bias voltage vb1 required by the first switch circuit 20′ is output by analog circuits such as the bias voltage output circuit 30 and the first level conversion circuit 41. The design stability and processing consistency of the analog circuit are high, the compensation consistency of the body-source parasitic capacitance Cbs and the body-drain parasitic capacitance Cbd is good, and the source-drain voltage balance consistency of the first switch circuit 20′ is good, which also avoids the problem of poor source-drain voltage balance effect caused by process parameter fluctuations.

[0171] Fig.10 This is a schematic diagram of an RF switch circuit provided in an embodiment of the present application.

[0172] In some embodiments, Fig.10As shown, the RF switch circuit 2 further includes a bandgap reference (BG) and a low dropout regulator (LDO).

[0173] The bandgap reference source BG and the low-dropout linear regulator LDO are used to generate a stable reference voltage Vbase. The reference voltage Vbase can generate multiple negative voltage signals in different voltage domains as body-end bias voltages vb through the bias voltage output circuit 30 to supply different first device groups of the first switch circuit 20′.

[0174] It should be understood that when the first switch circuit 20' is in the off state, the first switch circuit 20' receives the body terminal bias voltage vb, which can be understood as the off body terminal bias voltage. When the first switch circuit 20' is in the on state, the first switch circuit 20' receives the reference ground voltage (0V), which can be understood as the on body terminal bias voltage.

[0175] In an exemplary embodiment, a bandgap reference source BG is coupled to a power source for generating a bandgap voltage. A low dropout linear regulator LDO is coupled to the power source and the bandgap reference source BG for receiving the bandgap voltage and generating a reference voltage Vbase.

[0176] The embodiments of the present application do not limit the structures of the bandgap reference source BG and the low-dropout linear regulator LDO. The bandgap reference source BG and the low-dropout linear regulator LDO in the related art are applicable to the embodiments of the present application.

[0177] In some embodiments, Fig.10 As shown, the bias voltage output circuit 30 includes a negative voltage circuit 31, and the negative voltage circuit 31 includes a plurality of body-end bias voltage output terminals Vb, and is used to output a body-end bias voltage vb from the body-end bias voltage output terminals Vb.

[0178] In some embodiments, the bias voltage output circuit 30 further includes an oscillation signal generating circuit 32 and a voltage doubling circuit 33 .

[0179] The oscillation signal generating circuit 32 is used to receive the reference voltage Vbase and generate an oscillation signal. For example, the oscillation signal generating circuit 32 is coupled to a low-dropout linear regulator LDO and is used to receive the reference voltage Vbase output by the low-dropout linear regulator LDO.

[0180] The voltage doubler circuit 33 is used to receive the reference voltage Vbase and the oscillation signal, and output a gate bias voltage from a gate bias voltage output terminal Vg, and transmit the gate bias voltage to the first gate terminal G1 of the first switch circuit 20 ′.

[0181] For example, one end of the voltage doubler circuit 33 is coupled to the oscillation signal generating circuit 32 and the low dropout linear regulator LDO respectively, and the gate bias voltage output terminal Vg of the voltage doubler circuit 33 is coupled to the first gate terminal G1 of the first switch circuit 20 ′.

[0182] The negative voltage circuit 31 is used to receive an oscillation signal and output a body-end bias voltage vb from a body-end gate-end bias voltage output terminal Vb. For example, the negative voltage circuit 31 is coupled to an oscillation signal generating circuit 32 .

[0183] Fig.11 A topological circuit diagram of a negative voltage circuit provided in an embodiment of the present application.

[0184] In some embodiments, the negative voltage circuit 31 includes a plurality of charge pumps coupled in series, and a plurality of body-end bias voltage output terminals Vb are coupled to output terminals of the plurality of charge pumps in a one-to-one correspondence.

[0185] For example, the charge pump includes capacitor C1, capacitor C2, two capacitors Cpb, two capacitors Cpt, capacitor CL, transistor NM1, transistor NM2, transistor PM1, and transistor PM2, and the connection relationship is shown in the figure. The first oscillation signal terminal CLK1 receives the oscillation signal, the second oscillation signal terminal CLK2 receives the anti-oscillation signal, and the output terminal Vo is coupled to the body-end bias voltage output terminal Vb. The first oscillation signal terminal CLK1 of the next charge pump is coupled to the output terminal Vo of the previous charge pump.

[0186] In some embodiments, the difference vb between the body terminal bias voltages received by two adjacent body terminals B is an integer multiple of the reference voltage Vbase.

[0187] For example, the output end of each charge pump in the negative voltage circuit 31 may be coupled to the body bias voltage output end Vb, respectively, and then the difference between the body bias voltages vb of two adjacent body bias voltage output ends Vb is 1 times the reference voltage Vbase. Alternatively, the output end of some charge pumps in the negative voltage circuit 31 may be coupled to the body bias voltage output end Vb, and then the difference between the body bias voltages vb of two adjacent body bias voltage output ends Vb is 2 times or more of the reference voltage Vbase.

[0188] It should be understood that the embodiments of the present application do not limit the integer multiples of the reference voltage Vbase to "n*Vbase". Due to the existence of process errors, the values ​​within the range of n*Vbase±0.1 all belong to the "integer multiples of the reference voltage Vbase" referred to in the embodiments of the present application.

[0189] In some embodiments, the body-end bias voltage vb outputted by the body-end bias voltage output terminal Vb is a negative multiple of the reference voltage Vbase. For example, the difference between the first body-end bias voltages vb1 received by two adjacent first body terminals B1 is the reference voltage Vbase.

[0190] In some embodiments, the reference voltage Vbase is 0.5 V to 2.5 V. For example, the reference voltage Vbase may be 0.5 V, 0.7 V, 1.0 V, 1.3 V, 1.5 V, 1.7 V, 2.0 V, 2.3 V, or 2.5 V.

[0191] For example, the difference between the first body terminal bias voltages vb1 received by two adjacent first body terminals B1 is an integer multiple of any value between 0.5 V and 2.5 V. For example, the difference between the first body terminal bias voltages vb1 received by two adjacent first body terminals B1 can be an integer multiple of any value between 0.5 V, 0.7 V, 1.0 V, 1.3 V, 1.5 V, 1.7 V, 2.0 V, 2.3 V, and 2.5 V.

[0192] If the reference voltage Vbase is too large, the difference in the body bias voltage vb of adjacent device groups Q is too large, the source-drain voltage balancing effect is poor, and the power supply voltage needs to be increased, which consumes a lot of power. If the reference voltage Vbase is too small, the number of voltage multiplication stages required will increase, which will lead to a sharp increase in the number of negative charge pumps.

[0193] Of course, the implementation method of the negative voltage circuit 31 is only an illustration and is not limited in any way. The structures in the related technology are all applicable to the embodiments of the present application.

[0194] Fig.12 A schematic diagram of a topological circuit of a first level conversion circuit provided in an embodiment of the present application.

[0195] In some embodiments, Fig.12 As shown, the first level conversion circuit 41 includes a NOT gate N1, a NOT gate N2, a NOT gate N3, a transistor NM1, and a transistor NM2, and the connection relationship is shown in the figure. The first control terminal P1 is used to receive a first control signal, the first output terminal O1 is used to output a first body-end bias voltage vb1, and the first input terminal I1 is coupled to the body-end bias voltage terminal Vb of the negative voltage circuit 31.

[0196] Of course, the implementation of the first level conversion circuit 41 is only an illustration and is not limited in any way. The structures in the related art are all applicable to the embodiments of the present application.

[0197] Fig.13 This is a schematic diagram of an RF switch circuit provided in an embodiment of the present application.

[0198] In some embodiments, Fig.13 As shown, the RF switch circuit 20 also includes a second level conversion circuit 42 and a second switch circuit 20″. The second level conversion circuit 42 includes a second control terminal P2, multiple second input terminals I2, a reference ground voltage terminal GND and multiple second output terminals O2. The multiple second input terminals I2 are coupled to the multiple body-end bias voltage output terminals Vb in a one-to-one correspondence, and are used to receive the same body-end bias voltage as the first level conversion circuit 41.

[0199] The second control terminal P2 is used to receive a second control signal, and the second level conversion circuit 42 is used to output a reference ground voltage gnd or a second body-end bias voltage vb2 from the second output terminal O2 under the control of the second control signal. For example, when the second switch circuit 20″ is turned on, the second level conversion circuit 42 is used to output the reference ground voltage gnd from the second output terminal O2 under the control of the second control signal, and the body electrode b of the second switch device in the second switch circuit 20″ receives the reference ground voltage gnd. When the second switch circuit 20″ is turned off, the second level conversion circuit 42 is used to output the second body-end bias voltage vb2 from the second output terminal O2 under the control of the second control signal, and the voltage received by the body electrode b of the second switch device in the second switch circuit 20″ is the second body-end bias voltage vb2.

[0200] It can be seen from the above description of the switch circuit 20 that at least two of the multiple second body-end bias voltages vb2 output by the multiple second output terminals O2 are different. In some embodiments, the multiple second body-end bias voltages vb2 output by the second output terminal O2 are the same as the multiple body-end bias voltages vb output by the bias voltage output circuit 30, and the second level conversion circuit 42 only selects to output the reference ground voltage gnd or output the body-end bias voltage vb as the second body-end bias voltage vb2 according to the on-off condition of the second switch circuit 20″.

[0201] The structure of the second switch circuit 20 ″ is the same as the structure of the switch circuit 20 illustrated above. In the embodiment of the present application, the multiple switch circuits are distinguished in naming only to distinguish the multiple switch circuits included in the radio frequency switch circuit 2, but the structure does not change.

[0202] For example, the second switch circuit 20″ includes multiple second body terminals B2 and multiple stages of second switch devices, and the multiple stages of second switch devices are divided into multiple second device groups. The second body terminal B2 of the second switch circuit 20″ is the body terminal B in the switch circuit 20, the second switch device in the second switch circuit 20″ is the switch device T in the switch circuit 20, and the second device group in the second switch circuit 20″ is the device group Q in the switch circuit 20. The second switch devices in the same second device group are coupled to the same second body terminal B2.

[0203] When the RF switch circuit 2 includes multiple switch circuits, the multiple switch circuits can share the same bias voltage output circuit 30, which can save device area. Of course, the multiple switch circuits may not share the same bias voltage output circuit 30, so that the multiple switch circuits receive different body bias voltages vb.

[0204] When the RF switch circuit 2 provided in the embodiment of the present application is applied to the RF front-end module provided in the embodiment of the present application, the RF switch circuit 2 can evenly distribute the transmit RF voltage of tens of volts on the switch devices T of all levels in the parallel RF switch circuit 2 of the transmit channel TX and the series RF switch circuit 2 of the receive channel RX, thereby improving the power capacity of the RF switch circuit 2 in the transmit channel TX and the receive channel RX, and also achieving the benefit of reducing the number of levels under the same transmit RF power. Similarly, the RF switch circuit 2 can evenly distribute the receive RF voltage of tens of volts on the switch devices T of all levels in the series RF switch circuit 2 of the transmit channel TX and the parallel RF switch circuit 2 of the receive channel RX, thereby improving the power capacity of the RF switch circuit 2 in the transmit channel TX and the receive channel RX, and also achieving the benefit of reducing the number of levels under the same transmit RF power.

[0205] When the RF switch circuit 2 provided in the embodiment of the present application is applied to Figure 3 In the front end of the wireless communication system shown in the figure, the RF switch circuit 2 can reduce the number of stages of the switch device T and reduce the occupied area of ​​the RF switch circuit 2 while ensuring the same withstand voltage.

[0206] Of course, the radio frequency switch circuit 2 provided in the embodiment of the present application can also be directly applied to the communication device provided in the embodiment of the present application without being integrated with other devices.

[0207] The embodiment of the present application also provides an integrated circuit chip, including the above-mentioned radio frequency switch circuit 2 and a packaging layer provided in the embodiment of the present application, wherein the packaging layer covers the radio frequency switch circuit 2 and packages the radio frequency switch circuit 2. The integrated circuit chip may only be integrated with the radio frequency switch circuit 2 as a radio frequency switch circuit chip. Other functional devices may also be integrated in the integrated circuit chip, for example, the integrated circuit chip may be a low noise amplifier. Of course, the embodiment of the present application is not limited to this, and the above is only an illustration.

[0208] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A radio frequency switching circuit, characterized in that: include: A bias voltage output circuit, comprising a plurality of body-end bias voltage output terminals; A first level conversion circuit includes a first control terminal, a plurality of first input terminals, a reference ground voltage terminal, and a plurality of first output terminals; The multiple first input terminals are coupled to the multiple body-end bias voltage output terminals in a one-to-one correspondence; the first control terminal is used to receive a first control signal, and the first level conversion circuit is used to output a reference ground voltage or a first body-end bias voltage from the first output terminal under the control of the first control signal; at least two of the multiple first body-end bias voltages outputted from the multiple first output terminals have different values; The first switching circuit includes multiple first body terminals and multiple first device groups; the multiple first body terminals are coupled to the multiple first output terminals in a one-to-one correspondence; the first switching circuit includes multiple stages of first switching devices coupled in series, each of the first device groups includes at least one stage of the first switching device, and the first switching devices in the same first device group are coupled to the same first body terminal.

2. The radio frequency switch circuit according to claim 1, characterized in that: Along the direction of the first switch device cascade, the first body terminal bias voltage received by the plurality of first body terminals gradually decreases.

3. The radio frequency switch circuit according to claim 2, characterized in that: The difference between the first body terminal bias voltages received by two adjacent first body terminals is a fixed value.

4. The radio frequency switch circuit according to any one of claims 1 to 3, characterized in that: The bias voltage output circuit also includes a gate bias voltage output terminal, and the first switch circuit also includes a first gate terminal; the first gate terminal is coupled to the gate bias voltage output terminal, and the gates of the multi-stage first switch devices are respectively coupled to the first gate terminal.

5. The radio frequency switch circuit according to any one of claims 1 to 4, characterized in that: The multiple stages of the first switch devices in the same first device group are coupled in series in sequence.

6. The radio frequency switch circuit according to any one of claims 1 to 5, characterized in that: The multiple body-end bias voltage output terminals are used to output multiple body-end bias voltages, and at least two of the multiple body-end bias voltages have different values.

7. The radio frequency switch circuit according to any one of claims 1 to 6, characterized in that: The bias voltage output circuit includes a negative voltage circuit; the negative voltage circuit includes the multiple body-end bias voltage output terminals and multiple charge pumps coupled in series, and the multiple body-end bias voltage output terminals are coupled to the output terminals of the multiple charge pumps in a one-to-one correspondence.

8. The radio frequency switch circuit according to claim 7, characterized in that: The bias voltage output circuit also includes an oscillation signal generating circuit and a voltage doubling circuit; The oscillation signal generating circuit is used to receive a reference voltage and generate an oscillation signal; The voltage doubler circuit is used to receive the reference voltage and the oscillation signal, and output a gate bias voltage from a gate bias voltage output terminal; The negative voltage circuit is used to receive the oscillation signal and output a body-end bias voltage from the body-end gate-end bias voltage output terminal.

9. The radio frequency switch circuit according to claim 8, characterized in that: The reference voltage has a value of 0.5V-2.5V.

10. The radio frequency switch circuit according to claim 8 or 9, characterized in that: A difference between the first body terminal bias voltages received by two adjacent first body terminals is an integer multiple of the reference voltage.

11. The radio frequency switch circuit according to any one of claims 1 to 10, characterized in that: The first switch circuit further includes a plurality of voltage-dividing structures, and two ends of the voltage-dividing structures are respectively coupled to a first source and a first drain of the same first switch device.

12. The radio frequency switch circuit according to any one of claims 1 to 11, characterized in that: The theoretical breakdown voltage of the first switch circuit is MV, the actual breakdown voltage of the first switch circuit is NV, and the value of M / N is 1-2.

13. The radio frequency switch circuit according to claim 12, characterized in that: The first switching device of the first stage is used to receive a radio frequency voltage of 40V, and the number of stages of the first switching devices in the first switching circuit is less than or equal to 11; or, The first switching device of the first stage is used to receive a radio frequency voltage of 35V, and the number of stages of the first switching devices in the first switching circuit is less than or equal to 11; or, The radio frequency voltage received by the first switching device in the first stage is 30V, and the number of stages of the first switching devices in the first switching circuit is less than or equal to 10.

14. The radio frequency switch circuit according to any one of claims 1 to 13, characterized in that: The radio frequency switch circuit also includes a second level conversion circuit and a second switch circuit; The second level conversion circuit comprises a second control terminal, a plurality of second input terminals, a reference ground voltage terminal and a plurality of second output terminals; the plurality of second input terminals are coupled to the plurality of body-end bias voltage output terminals in a one-to-one correspondence; the second control terminal is used to receive a second control signal, and the second level conversion circuit is used to output the reference ground voltage or the second body-end bias voltage from the second output terminal under the control of the second control signal; At least two of the plurality of second body terminal bias voltages outputted by the plurality of second output terminals have different values; A second switch circuit includes a plurality of second body terminals and a plurality of second device groups; The multiple second body terminals are coupled to the multiple second output terminals in a one-to-one correspondence; the second switching circuit includes a plurality of stages of second switching devices coupled in series, each second device group includes at least one stage of second switching device, and the second switching devices located in the same second device group are coupled to the same second body terminal.

15. An integrated circuit chip, characterized in that: It comprises a radio frequency switch circuit and a packaging layer, wherein the packaging layer covers the radio frequency switch circuit; the radio frequency switch circuit comprises the radio frequency switch circuit according to any one of claims 1 to 14.

16. A radio frequency front-end module, characterized in that: It comprises a radio frequency switching circuit and a filter, wherein the radio frequency switching circuit is coupled to the filter; the radio frequency switching circuit comprises the radio frequency switching circuit according to any one of claims 1 to 14.

17. A communication device, characterized in that: It comprises an antenna and a radio frequency switching circuit, wherein the antenna and the radio frequency switching circuit are coupled; the radio frequency switching circuit comprises the radio frequency switching circuit according to any one of claims 1 to 14.

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