Data transmission method and device

Abstract

The invention provides a data transmission method and device, and the method comprises the steps: responding to a first instruction, and controlling a first core in a first processor and a first core of a second processor in second equipment to carry out data transmission through a transmission link under the condition that single-link transmission is carried out between the first processor and the second equipment; determining a data transceiving rate between a first core in the first processor and a first core in the second processor; controlling to switch the cores used for data transmission in the first processor and / or the second processor, and repeatedly executing the above steps until the data transceiving rates among all the cores are determined; determining a target core combination based on data transceiving rates between different cores in the first processor and the second processor; and in response to the second instruction, controlling the target core combination to execute a transmission task of target data, the target data being determined based on the second instruction. According to the data transmission method provided by the invention, when the transmission type between the two devices is a single link transmission type, the transmission rate can be changed so as to adapt to different transmission requirements and devices.

Description

Technical Field

[0001] The present invention belongs to the field of computer technology, and in particular relates to a data transmission method and device. Background Art

[0002] The Transmission Control Protocol (TCP) is a transmission protocol specially designed to provide reliable end-to-end byte streams on unreliable Internet networks.

[0003] The application layer sends a data stream represented by 8-bit bytes for transmission across the internet to the TCP layer. TCP partitions the data stream into segments of appropriate length (usually limited by the maximum transmission unit (MTU) of the data link layer of the network to which the computer is connected). TCP passes the resulting packet to the IP layer, which transmits the packet to the TCP layer of the receiving entity through the network. In order to ensure that no packet is lost, TCP assigns a sequence number to each packet, and the sequence number also ensures that the packets transmitted to the receiving entity are received in order. The receiving entity sends back a corresponding confirmation (ACK) for the successfully received packet; if the sending entity does not receive the confirmation within a reasonable round-trip time (RTT), the corresponding data packet is assumed to be lost and will be retransmitted.

[0004] Every machine that supports TCP has a TCP transport entity. The TCP entity can be a library procedure, a user process, or part of the kernel.

[0005] Direct memory access (DMA) is a working mode in which I / O exchange is completely performed by hardware. In this mode, the DMA controller completely takes over the control of the bus from the CPU, and data exchange is performed directly between the memory and the IO device without passing through the CPU. When DMA is working, the DMA controller sends address and control signals to the memory, performs address modification, counts the number of transferred words, and reports the end of the transfer operation to the CPU in interrupt mode.

[0006] The purpose of using DMA is to reduce CPU overhead during large-scale data transmission. A dedicated DMA controller (DMAC) is used to generate memory access addresses and control the memory access process. The advantages are that all operations are implemented by hardware circuits, and the transmission speed is fast; the CPU basically does not intervene and only participates at initialization and termination; the CPU and peripherals work in parallel, and the efficiency is high.

[0007] RDMA is a technology that transfers data directly to the memory of the peer computer through DMA over the network, quickly moving data from one system to the memory of a remote system.

[0008] The working process of RDMA is as follows:

[0009] 1) When an application performs an RDMA read or write request, no data copying is performed. RDMA requests are sent from applications running in user space to the local NIC (network interface card) without any kernel memory involvement.

[0010] 2) The NIC reads the buffered contents and transmits them over the network to the remote NIC.

[0011] 3) The RDMA information transmitted over the network contains the target virtual address, the memory key, and the data itself. Request completion can be handled entirely in user space (by polling the user-level completion queue) or through kernel memory in which case the application sleeps until the request is completed. RDMA operations allow applications to read data from or write data to the memory of a remote application.

[0012] 4) The target NIC confirms the memory key and writes the data directly into the application cache. The remote virtual memory address used for the operation is included in the RDMA information.

[0013] The Internet, cloud platform, big data and communication fields usually need to transfer large amounts of data from data carrier A to data carrier B through TCP or RDMA technology.

[0014] To achieve the above goals, it is necessary to select and verify the hardware platform infrastructure, such as high-performance servers, routing and switching equipment, cabinets, and supporting facilities in the computer room. Then select the software platform, including operating system, system software, application software, development platform, etc. At the same time, it is necessary to select efficient and appropriate programming languages, such as C, C++, Java, Python, C#, etc., to realize the data transmission functions of TCP and RDMA through programming languages.

[0015] After selecting a programming language, in order to maximize the transmission rate, traditional solutions will increase the transmission rate as much as possible by increasing the CPU frequency, increasing the memory frequency, increasing the cache, etc.

[0016] Traditional solutions improve transmission efficiency from aspects such as programming languages ​​(Python, Java, C#, C++, C), operating systems, and server main frequencies. The main principles and methods are the efficiency of programming languages, operating systems, and hardware upgrades. The data transmission solutions for the Internet and cloud platforms are based on multiple TCP / RDMA connections, and clients are distributed on different user devices, which are composed of computers, mobile phones, and tablets. The server side deals with high concurrency and high traffic issues. Its high concurrency is reflected in the high randomness and large number of connection opportunities on the user side, and its high traffic is reflected in n clients sending and receiving data. Since the cardinality of n is large, the sum of the data packet sizes is large.

[0017] Most existing solutions are to improve the performance of the server and use multiple CPUs and multiple cores to provide efficient TCP / RDMA transmission. Existing technical solutions have outstanding performance in solving multi-connection and high-concurrency business scenarios, but in the following Figure 1 In the application scenario, there is currently no mature solution to further increase the transmission rate. Figure 1 This is a data transmission and processing business scenario. Due to business needs and customer data processing requirements, two servers A and B are only allowed to establish one TCP or RDMA link to achieve high-speed data transmission from server A to server B. At the same time, the CPU main frequency of server A is a domestic model, the CPU model is clear, the programming language is also clear as C language, and the data transmission unit is small (16KB or less). Under this constraint, the traditional solution using multi-connection technology, concurrency and high traffic methods is obviously ineffective. Summary of the invention

[0018] The technical problem to be solved by the present invention is to provide a data transmission method and device which can change the transmission rate to adapt to different transmission requirements when the transmission type is a single link between two devices.

[0019] The present invention includes a data transmission method, which is applied to a first device including a first processor, and the method includes:

[0020] In the case of single-link transmission with the second device, in response to the first instruction, controlling the first core in the first processor and the first core of the second processor in the second device to perform data transmission using the transmission link between the first device and the second device, wherein both the first processor and the second processor are multi-core processors;

[0021] Determining a data transmission and reception rate between a first core in the first processor and a first core in a second processor;

[0022] Control switching of the cores used for data transmission in the first processor and / or the second processor, and repeat the above steps until each core in the first processor cooperates with each core in the second processor to perform the data transmission task and determines the corresponding data transmission and reception rate;

[0023] Determine a target core combination based on data transmission and reception rates between different cores in the first processor and the second processor, the target core combination comprising a target core in the first processor and a target core in the second processor;

[0024] In response to the second instruction, the target core combination is controlled to perform a transmission task of target data, where the target data is determined based on the second instruction.

[0025] In some embodiments, controlling the first core in the first processor and the first core of the second processor in the second device to perform data transmission using a transmission link between the first device and the second device includes:

[0026] Creating a first thread for executing the data transmission task on a first core of the first processor;

[0027] Sending an instruction to the second device to instruct the second device to create a second thread for executing the data transmission task for the first core of the second processor;

[0028] The test data is transmitted based on the first thread, the transmission link, and the second thread.

[0029] In some embodiments, determining the data transmission and reception rate between the first core in the first processor and the first core in the second processor includes:

[0030] Determine the testing period;

[0031] The timing starts when the first core executes the data transmission task, and stops when the test duration is reached;

[0032] Counting the amount of test data sent by the first core during the test period and the amount of test data received by the second core during the test period;

[0033] The data transmission and reception rate is determined based on the test data transmission amount, the test data reception amount, and the test period.

[0034] In some embodiments, when the first core executes the first thread, the test data sending amount is recorded, and when the second core executes the second thread, the test data receiving amount is recorded;

[0035] The method further comprises:

[0036] Sending a start timing signal and an end timing signal to the second core of the second processor to control the second processor to start and stop receiving test data;

[0037] The test data reception amount fed back by the second core of the second processor is obtained.

[0038] In some embodiments, the test period is the duration of a test, and the method further includes:

[0039] In response to the end of the current test, instructing the first core of the first processor and the first core of the second processor to clear the recorded test data sending amount and test data receiving amount;

[0040] Recording the number of tests and data receiving and sending rates corresponding to the current test of the first core of the first processor and the first core of the second processor, where the number of tests is the cumulative number of tests;

[0041] The next test is initiated on the first core of the first processor and the first core of the second processor.

[0042] In some embodiments, the method further comprises:

[0043] Determine whether the current cumulative number of tests of the first core of the first processor and the first core of the second processor has reached a threshold; if not, continue to start the next test; if so, perform average processing on all data receiving and sending rates corresponding to the cumulative number of tests to obtain the average of the data receiving and sending rates corresponding to the first core of the first processor and the first core of the second processor.

[0044] In some embodiments, the method further comprises:

[0045] Determine whether the current cumulative number of tests of the first core of the first processor and the first core of the second processor reaches a threshold, if not, continue to start the next test, if so, clear the cumulative number of tests to zero, and notify the second processor of the second device to switch the first core to the second core, so as to test the first core of the first processor and the second core of the second processor;

[0046] When the first core of the first processor and each core of the second processor have completed testing, the first processor is controlled to switch the first core to the second core, and at the same time, the second processor of the second device is notified to switch the core currently corresponding to the test to the first core, so as to test the second core of the first processor and the first core of the second processor.

[0047] In some embodiments, determining the target core combination based on data transmission and reception rates between different cores in the first processor and the second processor includes:

[0048] Determine an average value of data transmission and reception rates between different cores in the first processor and the second processor;

[0049] Determine two target cores corresponding to the maximum value of the mean data receiving and sending rate based on the mean data receiving and sending rate between different cores in the first processor and the second processor, wherein the two target cores include the target core in the first processor and the target core in the second processor;

[0050] The target core combination is determined based on a target core in the first processor and a target core in the second processor.

[0051] In some embodiments, the responding to the first instruction includes:

[0052] In response to a user input to initiate a test; or

[0053] In response to obtaining a transmission task for data of a specified type; or

[0054] in response to the initiation of a specified program; or

[0055] When the execution result of the data transmission task performed by the first processor and the second processor in cooperation with two randomly selected cores is judged to not meet the preset transmission requirement, responding to an instruction generated by the judgment result;

[0056] The responding to the second instruction comprises:

[0057] In response to the transmission request of the target data, the target data is instruction type data, or is any type of data.

[0058] Another embodiment of the present invention also provides a data transmission device, which is applied to a first device including a first processor, and the device includes:

[0059] A first response module, configured to, in response to a first instruction, control a first core in the first processor and a first core in a second processor in the second device to perform data transmission using a transmission link between the first device and the second device, in the case of single-link transmission with the second device, wherein both the first processor and the second processor are multi-core processors;

[0060] A first determining module, configured to determine a data transmission and reception rate between a first core in the first processor and a first core in a second processor;

[0061] a control module, used for controlling the switching of the cores used for data transmission in the first processor and / or the second processor, and repeatedly performing the above steps until each core in the first processor cooperates with each core in the second processor to perform the data transmission task and determines the corresponding data transmission and reception rate;

[0062] A second determining module, configured to determine a target core combination according to a data transmission and reception rate between different cores in the first processor and the second processor, wherein the target core combination includes a target core in the first processor and a target core in the second processor;

[0063] The second response module is used to control the target core combination to perform a target data transmission task in response to a second instruction, where the target data is determined based on the second instruction.

[0064] The beneficial effects of the present invention include achieving adjustable transmission efficiency of a device or computer system, and even achieving optimal transmission rate, by optimally integrating computer software technology with computer hardware resources. The present application mainly solves the problem of a single-link transmission service scenario, in which the system automatically selects cores by polling and measuring the data transmission and reception rates between different cores of two devices, so that the communication rate is adjustable and the transmission performance can be optimized. This not only maximizes the use of computer hardware resources, but also provides more flexible options for different forms of data transmission.

[0065] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained by the structures specifically pointed out in the written description, claims, and drawings.

[0066] The technical solution of the present application is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0067] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings in the following description are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0068] Figure 1 This is a flow chart of the existing solution.

[0069] Figure 2 This is an application scenario diagram of the data transmission method according to an embodiment of the present invention.

[0070] Figure 3 The present invention is a flowchart of a data transmission method according to an embodiment of the present invention.

[0071] Figure 4 The figure is a schematic diagram of an application flow of a data transmission method according to another embodiment of the present invention.

[0072] Figure 5 The present invention is another embodiment of the data transmission method of the present invention.

[0073] Figure 6 4 is a structural block diagram of a data transmission device according to an embodiment of the present invention. DETAILED DESCRIPTION

[0074] The specific embodiments of the present invention are described in detail below with reference to the accompanying drawings, but are not intended to limit the present invention.

[0075] It should be understood that various modifications may be made to the embodiments disclosed herein. Therefore, the following description should not be considered as limiting, but merely as an example of an embodiment. Other modifications within the scope of the present disclosure will occur to those skilled in the art.

[0076] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the general description of the present disclosure given above and the detailed description of the embodiments given below, serve to explain the principles of the present disclosure.

[0077] These and other characteristics of the invention will become apparent from the following description of a preferred form of embodiment given as a non-limiting example, with reference to the accompanying drawings.

[0078] It should also be understood that, although the invention has been described with reference to some specific examples, those skilled in the art will be able to realize many other equivalent forms of the invention that have the characteristics recited in the claims and are therefore within the scope of protection defined thereby.

[0079] The above and other aspects, features and advantages of the present disclosure will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.

[0080] Specific embodiments of the present disclosure are described hereinafter with reference to the accompanying drawings; however, it should be understood that the disclosed embodiments are merely examples of the present disclosure, which may be implemented in a variety of ways. Well-known and / or repeated functions and structures are not described in detail to avoid obscuring the present disclosure with unnecessary or redundant details. Therefore, the specific structural and functional details disclosed herein are not intended to be limiting, but merely serve as a basis and representative basis for the claims to teach those skilled in the art to use the present disclosure in a variety of ways with substantially any suitable detailed structure.

[0081] This specification may use the phrases "in one embodiment," "in another embodiment," "in a further embodiment," or "in other embodiments," all of which may refer to one or more of the same or different embodiments according to the present disclosure.

[0082] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0083] Existing technical solutions have outstanding performance in solving multi-connection and high-concurrency business scenarios, but in Figure 2 In the application scenario, there is currently no mature solution to further increase the transmission rate. Figure 2This is a data transmission and processing business scenario. Due to business needs and customer data processing requirements, two servers A and B are only allowed to establish one TCP or RDMA link to achieve high-speed data transmission from server A to server B. At the same time, the CPU model of server A is clear, the programming language is also clear as C language, and the data transmission unit is small (16KB or less). Under this constraint, the traditional method of using multi-connection technology, concurrency and high traffic is obviously ineffective. In order to solve this technical problem, Figure 3 As shown, an embodiment of the present invention provides a data transmission method, which is applied to a first device including a first processor, and the method includes:

[0084] S1: in the case of single-link transmission with the second device, in response to a first instruction, controlling a first core in the first processor and a first core of a second processor in the second device to perform data transmission using a transmission link between the first device and the second device, wherein both the first processor and the second processor are multi-core processors;

[0085] S2: Determine a data transmission and reception rate between the first core in the first processor and the first core in the second processor;

[0086] S3: Control switching of the cores used for data transmission in the first processor and / or the second processor, and repeat the above steps until each core in the first processor cooperates with each core in the second processor to perform the data transmission task and determines the corresponding data transmission and reception rate;

[0087] S4: determining a target core combination based on data transmission and reception rates between different cores in the first processor and the second processor, the target core combination comprising a target core in the first processor and a target core in the second processor;

[0088] S5: In response to the second instruction, controlling the target core combination to execute a task of transmitting target data, wherein the target data is determined based on the second instruction.

[0089] The transmission link in this embodiment can be a TCP-TCP transmission type or an RDMA-RDMA transmission type. Figure 2 In the scenario shown, since the physical parameters of the device are fixed, the transmission speed is determined by the server randomly selecting a processor core (referred to as core) for processing the data transmission task. In order to enable the data transmission speed to be changed, the transmission speed is changed by selecting the core for processing the data transmission task in this embodiment.

[0090] For example, the core of computer A is defined as A{Ac0, Ac1, Ac2…Aci}, and the core of computer B is defined as B{Bc0, Bc1, Bc2…Bci}, and data is sent from A to computer B via a TCP or RDMA type transmission link. Different CPU cores of the same server or computer have different core rates, and the phenomenon of inconsistent CPU core rates is mainly due to the different clock speeds of each core, which leads to differences in core performance. The clock speed of each core may be different for a variety of reasons, including but not limited to heat dissipation problems, unstable voltage supply, and slight differences in the manufacturing process. This inconsistent rate may cause some cores to be faster or slower than other cores when processing tasks, thereby affecting the overall performance, including differences in transmission speed. Therefore, in order to adjust the transmission speed, this embodiment provides a method, specifically by selecting different cores to perform the current data transmission task, thereby changing the transmission speed.

[0091] When selecting a core, the method used in this embodiment includes responding to the first instruction that triggers the core selection process, controlling the first cores of the processors of the two devices to cooperate in executing the transmission of test data, determining their data transceiver rates, and then switching the cores of the processors, and continuing the test until each core in the two processors is combined and tested, that is, each core in the first processor of the first device is combined with each core in the second processor of the second device, and tested in cooperation, and the corresponding data transceiver speed is obtained. At this time, the system will determine the data transceiver speed that meets the requirements based on multiple data transceiver speeds, and then determine the corresponding two target cores based on the selected data transceiver speeds. Thereafter, in response to the second instruction, the system will select the two target cores to cooperate in executing the data transmission task.

[0092] The selected data receiving and sending speed may be the fastest speed or the second fastest speed, which is not fixed and can be freely selected according to the actual transmission requirements. It can be seen from the above content that this embodiment achieves adjustable transmission efficiency of a device or computer system and even achieves the optimal transmission rate by optimally integrating computer software technology and computer hardware resources. The solution of this embodiment mainly solves the problem of single-link transmission business scenario, by polling and measuring the data receiving and sending rates between different cores of two devices, and automatically allowing the system to select the core, so that the communication rate is adjustable and the transmission performance can be achieved. The technical approach not only maximizes the use of computer hardware resources, but also provides more flexible options for different forms of data transmission.

[0093] In one embodiment, controlling the first core in the first processor and the first core of the second processor in the second device to perform data transmission using a transmission link between the first device and the second device includes:

[0094] S6: creating a first thread for executing the data transmission task on the first core of the first processor;

[0095] S7: Sending an instruction to the second device to instruct the second device to create a second thread for executing the data transmission task for the first core of the second processor;

[0096] S8: Transmit test data based on the first thread, the transmission link, and the second thread.

[0097] That is, the first device creates a first thread of the data transmission task locally, and then synchronously sends instructions to the second device to instruct the first core of the second processor to also create a related thread, namely, the second thread. After that, the processors of the two devices can use the transmission link to achieve the transmission of test data based on their respective threads. The first thread and the second thread may include, but are not limited to, link initialization, data transmission or reception, and data volume statistics.

[0098] Further, determining a data transmission and reception rate between the first core in the first processor and the first core in the second processor includes:

[0099] S9: Determine the test period;

[0100] S10: starting timing when the first core executes the data transmission task, and stopping timing when the test duration is reached;

[0101] S11: Counting the amount of test data sent by the first core in the test period, and the amount of test data received by the second core in the test period;

[0102] S12: Calculate and determine the data transmission and reception rate based on the test data transmission amount, the test data reception amount, and the test period.

[0103] In this embodiment, when the first core executes the first thread, it records the test data sending amount, and when the second core executes the second thread, it records the test data receiving amount. That is, when the cores of different devices are tested, they each record the data sending amount and data receiving amount during the test period, and then send them to the first device, which performs unified calculations.

[0104] The method further comprises:

[0105] S13: sending a start timing signal and an end timing signal to the first core of the second processor to control the second processor to start and stop receiving test data;

[0106] S14: Obtain the test data reception amount fed back by the first core of the second processor.

[0107] That is, the start test and end test of the core in the second device are both controlled by the first device, and the second device specifically implements the execution and end of the test by responding to the instruction or notification sent by the first device.

[0108] For example, the first processor of the first device first determines a test period, such as 1s, 2s, etc., which is not unique. After determining the test period, the first processor of the first device starts the timer when controlling the first core to execute the first thread, and notifies the second processor of the second device to execute the second thread, such as sending a timestamp to implement the notification. When the timing ends and reaches the corresponding duration of the test period, the first processor of the first device controls the first core to end the execution of the first thread, and notifies the second processor of the second device to stop executing the second thread, such as still notifying through a timestamp. At this time, the first processor and the second processor will respectively obtain their respective data transmission and data reception volumes. The second device can send the statistical data reception volume to the first device, and the first device will calculate the data transmission and data reception volumes between the corresponding cores in combination with the test period to obtain the data transmission and reception rate between the corresponding cores.

[0109] In another embodiment, the test period is the duration of a test, and the method further includes:

[0110] S15: in response to the end of the current test, instructing the first core of the first processor and the first core of the second processor to clear the recorded test data sending amount and test data receiving amount;

[0111] S16: Record the number of tests and data receiving and sending rates corresponding to the current test of the first core of the first processor and the first core of the second processor, where the number of tests is the cumulative number of tests;

[0112] S17: Start the next test on the first core of the first processor and the first core of the second processor.

[0113] In this embodiment, Figure 4As shown, any two cores in the first device and the second device are tested multiple times, such as 50 times, 100 times, etc., with no specific limit. The duration of each test is a test period. When the current test ends, if it is necessary to continue testing the two cores currently under test, the first processor of the first device responds to the end of the current test by instructing the first core of the first processor and the first core of the second processor to clear the recorded test data sending volume and test data receiving volume, and at the same time records the number of tests and data transmission and reception rates corresponding to the current test of the first core of the first processor and the first core of the second processor, that is, matching and recording core information, corresponding data transmission and reception rates and the number of tests completed by the core, and the number of tests is the cumulative number of tests. Afterwards, the next test is started for the first core of the first processor and the first core of the second processor, and the specific process is the same as the previous test.

[0114] Further, combined with Figure 5 As shown, the method also includes:

[0115] S18: Determine whether the current cumulative number of tests on the first core of the first processor and the first core of the second processor has reached a threshold; if not, continue to start the next test; if so, perform average processing on all data receiving and sending rates corresponding to the cumulative number of tests to obtain the average of the data receiving and sending rates corresponding to the first core of the first processor and the first core of the second processor.

[0116] Assume that the threshold of the number of tests between every two cores is 100, or it can be other values, which are not determined in detail. In response to the end of the current test, before starting the next test, the first processor of the first device will determine whether the cumulative number of tests of the two cores currently under test has reached the threshold. If not, the next test will be started, that is, the current two cores will continue to be tested. If the test threshold is reached, the average calculation is performed based on the test results of all completed tests, that is, the average calculation is performed based on the data transmission and reception speeds of all tests, and the average data transmission and reception rate that can characterize the actual data transmission and reception speed level of the two cores is determined. When the speed comparison between different cores is performed subsequently, the comparison is performed through the data speed transmission and reception average, and then the target core is determined.

[0117] Continue to combine Figure 5 As shown, the method also includes:

[0118] S19: Determine whether the current cumulative number of tests of the first core of the first processor and the first core of the second processor reaches a threshold; if not, continue to start the next test; if so, clear the cumulative number of tests and notify the second processor of the second device to switch the first core to the second core, so as to test the first core of the first processor and the second core of the second processor;

[0119] S20: When the first core of the first processor and each core of the second processor have completed testing, control the first processor to switch the first core to the second core, and simultaneously notify the second processor of the second device to switch the core currently corresponding to the test to the first core, so as to test the second core of the first processor and the first core of the second processor.

[0120] For example, each core is tested for a certain time, where Count represents the number of seconds in which the CPU core is tested, for example, 100 seconds. The average rate of the core is obtained through 100 seconds. After testing Count times, set the thread to move to the new CPU core and continue testing. After completing the core tests of all the computers, notify the peer computer to switch to the new CPU core through a command and repeat the test. Finally, by comparing the maximum rate V, the core number of the corresponding A / B computer is obtained.

[0121] The determining the target core combination based on the data transmission and reception rates between different cores in the first processor and the second processor includes:

[0122] S21: Determine an average value of data transmission and reception rates between different cores in the first processor and the second processor;

[0123] S22: determining two target cores corresponding to the maximum values ​​of the mean data receiving and sending rates based on the mean data receiving and sending rates between different cores in the first processor and the second processor, wherein the two target cores include the target core in the first processor and the target core in the second processor;

[0124] S23: Determine the target core combination based on the target core in the first processor and the target core in the second processor.

[0125] For example, when the sending thread (first thread) of the i core of the first device and the receiving thread (second thread) of the j core of the second device are executing the transmission of test data, the data transmission and reception rate is recorded as Vij{Vc0c0, Vc0c1, Vc0c2…Vcicj}, i∈{Ac0, Ac1, Ac2…Aci}, j∈{Bc0, Bc1, Bc2…Bci}. The scheme of this embodiment is used to find Vmax, that is, to find the maximum data transmission and reception speed. Among them, Vmax∈{Vc0c0, Vc0c1, Vc0c2…Vcicj}, that is, the core subscripts i, j of the computer kernel. That is, this embodiment compares the mean values ​​of the data transmission and reception speeds obtained after testing different core combinations, selects and determines the maximum value of the data transmission and reception speed, and then determines the core combination with the best performance, that is, the target core combination. Of course, cores with other speed mean values ​​can also be selected as the target core combination. The specific selection needs to be made according to actual needs, and it is flexible to use.

[0126] In this embodiment, the generation of the first instruction for triggering the first device to execute the test process may be, but is not limited to, the following scenarios, for example including:

[0127] S24: responding to a test start instruction input by a user; or

[0128] In response to obtaining a transmission task for data of a specified type; or

[0129] in response to the initiation of a specified program; or

[0130] When the execution result of the data transmission task performed by the first processor and the second processor in cooperation with two randomly selected cores is judged to not meet the preset transmission requirement, responding to an instruction generated by the judgment result;

[0131] The responding to the second instruction comprises:

[0132] S25: Responding to the transmission request of the target data, the target data is data of a specified type, or is data of any type.

[0133] For example, the first instruction is an instruction input by the user, which is used to instruct the first device to perform a transmission speed test. Alternatively, in response to the start of a specified program, the program may be a sharing program, a conference program, etc., which requires two devices to display data synchronously, etc. In this case, the first instruction may be an instruction generated based on the start of the program. Alternatively, when the first device performs a data transmission task with a speed transmission requirement, if the core is first determined based on a random core selection method, if the predicted speed cannot meet the requirement when data is transmitted based on the randomly selected core, a first instruction is generated to start the test program to select and determine the core that can perform the data transmission task.

[0134] The second instruction is an instruction to transmit new data, which is the target data. The type of the data can be data of a specified type, that is, when transmitting data of the instruction type, the target core is selected to cooperate in executing the data transmission task, or it can be any type of data, that is, when transmitting any data, the target core is used to execute the data transmission task. In addition, corresponding to different types of data, it can be determined that target cores with different transmission speeds are used to cooperate in executing the corresponding transmission task. Specifically, a relationship table can be pre-configured. When applied, the target core selected for different types of data is determined directly based on the relationship table.

[0135] like Figure 6 As shown, another embodiment of the present invention also provides a data transmission device, which is applied to a first device including a first processor, and the device includes:

[0136] A first response module, configured to, in response to a first instruction, control a first core in the first processor and a first core in a second processor in the second device to perform data transmission using a transmission link between the first device and the second device, in the case of single-link transmission with the second device, wherein both the first processor and the second processor are multi-core processors;

[0137] A first determining module, configured to determine a data transmission and reception rate between a first core in the first processor and a first core in a second processor;

[0138] A first control module, used for controlling the switching of cores used for data transmission in the first processor and / or the second processor, and repeatedly performing the above steps until each core in the first processor cooperates with each core in the second processor to perform the data transmission task and determines the corresponding data transmission and reception rate;

[0139] A second determining module, configured to determine a target core combination according to a data transmission and reception rate between different cores in the first processor and the second processor, wherein the target core combination includes a target core in the first processor and a target core in the second processor;

[0140] The second response module is used to control the target core combination to perform a target data transmission task in response to a second instruction, where the target data is determined based on the second instruction.

[0141] In some embodiments, controlling the first core in the first processor and the first core of the second processor in the second device to perform data transmission using a transmission link between the first device and the second device includes:

[0142] Creating a first thread for executing the data transmission task on a first core of the first processor;

[0143] Sending an instruction to the second device to instruct the second device to create a second thread for executing the data transmission task for the first core of the second processor;

[0144] The test data is transmitted based on the first thread, the transmission link, and the second thread.

[0145] In some embodiments, determining the data transmission and reception rate between the first core in the first processor and the first core in the second processor includes:

[0146] Determine the testing period;

[0147] The timing starts when the first core executes the data transmission task, and stops when the test duration is reached;

[0148] Counting the amount of test data sent by the first core during the test period and the amount of test data received by the second core during the test period;

[0149] The data transmission and reception rate is determined based on the test data transmission amount, the test data reception amount, and the test period.

[0150] In some embodiments, when the first core executes the first thread, the test data sending amount is recorded, and when the second core executes the second thread, the test data receiving amount is recorded;

[0151] The device also includes:

[0152] A second control module, used for sending a start timing signal and an end timing signal to the second core of the second processor to control the second processor to start and stop receiving test data;

[0153] An obtaining module is used to obtain the test data reception amount fed back by the second core of the second processor.

[0154] In some embodiments, the test period is the duration of a test, and the method further includes:

[0155] In response to the end of the current test, instructing the first core of the first processor and the first core of the second processor to clear the recorded test data sending amount and test data receiving amount;

[0156] Recording the number of tests and data receiving and sending rates corresponding to the current test of the first core of the first processor and the first core of the second processor, where the number of tests is the cumulative number of tests;

[0157] The next test is initiated on the first core of the first processor and the first core of the second processor.

[0158] In some embodiments, the apparatus further comprises:

[0159] Determine whether the current cumulative number of tests of the first core of the first processor and the first core of the second processor has reached a threshold; if not, continue to start the next test; if so, perform average processing on all data receiving and sending rates corresponding to the cumulative number of tests to obtain the average of the data receiving and sending rates corresponding to the first core of the first processor and the first core of the second processor.

[0160] In some embodiments, the apparatus further comprises:

[0161] a judgment module, used to judge whether the current cumulative number of tests of the first core of the first processor and the first core of the second processor reaches a threshold, if not, continue to start the next test, if so, clear the cumulative number of tests, and notify the second processor of the second device to switch the first core to the second core, so as to test the first core of the first processor and the second core of the second processor;

[0162] The third control module is used to control the first processor to switch the first core to the second core after the first core of the first processor and each core of the second processor have completed testing, and simultaneously notify the second processor of the second device to switch the core currently corresponding to the test to the first core, so as to test the second core of the first processor and the first core of the second processor.

[0163] In some embodiments, determining the target core combination based on data transmission and reception rates between different cores in the first processor and the second processor includes:

[0164] Determine an average value of data transmission and reception rates between different cores in the first processor and the second processor;

[0165] Determine two target cores corresponding to the maximum value of the mean data receiving and sending rate based on the mean data receiving and sending rate between different cores in the first processor and the second processor, wherein the two target cores include the target core in the first processor and the target core in the second processor;

[0166] The target core combination is determined based on a target core in the first processor and a target core in the second processor.

[0167] In some embodiments, the responding to the first instruction includes:

[0168] In response to a user input to initiate a test; or

[0169] In response to obtaining a transmission task for data of a specified type; or

[0170] in response to the initiation of a specified program; or

[0171] When the execution result of the data transmission task performed by the first processor and the second processor in cooperation with two randomly selected cores is judged to not meet the preset transmission requirement, responding to an instruction generated by the judgment result;

[0172] The responding to the second instruction comprises:

[0173] In response to the transmission request of the target data, the target data is instruction type data, or is any type of data.

[0174] Another embodiment of the present invention further provides an electronic device, comprising:

[0175] one or more processors;

[0176] a memory configured to store one or more programs;

[0177] When the one or more programs are executed by the one or more processors, the one or more processors implement the data transmission method as described in any one of the embodiments above.

[0178] Furthermore, an embodiment of the present invention also provides a storage medium on which a computer program is stored, and when the program is executed by a processor, the data transmission method described above is implemented. It should be understood that each solution in this embodiment has the corresponding technical effect in the above method embodiment, which will not be repeated here.

[0179] Furthermore, an embodiment of the present invention also provides a computer program product, which is tangibly stored on a computer-readable medium and includes computer-readable instructions, which, when executed, enable at least one processor to perform a data transmission method such as that in the embodiments described above.

[0180] It should be noted that the computer storage medium of the present invention may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, system or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access storage medium (RAM), a read-only storage medium (ROM), an erasable programmable read-only storage medium (EPROM or flash memory), an optical fiber, a portable compact disk read-only storage medium (CD-ROM), an optical storage medium, a magnetic storage medium, or any suitable combination of the above. In the present invention, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, system or device. In the present invention, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, wherein a computer-readable program code is carried. This propagated data signal may take a variety of forms, including but not limited to an electromagnetic signal, an optical signal, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can send, propagate or transmit a program configured to be used by or in conjunction with an instruction execution system, system or device. The program code contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, antenna, optical cable, RF, etc., or any suitable combination of the above.

[0181] In addition, it will be appreciated by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) containing computer-usable program code.

[0182] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1A process or multiple processes and / or boxes Figure 1 A system that specifies the functions of a box or multiple boxes.

[0183] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction system, which is implemented in the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0184] A person skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of protection of the present application is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of different aspects of one or more embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

Claims

1. A data transmission method, applied to a first device including a first processor, characterized in that: The method comprises: In the case of single-link transmission with the second device, in response to the first instruction, controlling the first core in the first processor and the first core of the second processor in the second device to perform data transmission using the transmission link between the first device and the second device, wherein both the first processor and the second processor are multi-core processors; Determining a data transmission and reception rate between a first core in the first processor and a first core in a second processor; Control switching of the cores used for data transmission in the first processor and / or the second processor, and repeat the above steps until each core in the first processor cooperates with each core in the second processor to perform the data transmission task and determines the corresponding data transmission and reception rate; Determine a target core combination based on data transmission and reception rates between different cores in the first processor and the second processor, the target core combination comprising a target core in the first processor and a target core in the second processor; In response to the second instruction, the target core combination is controlled to perform a transmission task of target data, where the target data is determined based on the second instruction.

2. The data transmission method according to claim 1, characterized in that: The controlling the first core in the first processor and the first core of the second processor in the second device to perform data transmission using a transmission link between the first device and the second device includes: Creating a first thread for executing the data transmission task on a first core of the first processor; Sending an instruction to the second device to instruct the second device to create a second thread for executing the data transmission task for the first core of the second processor; The test data is transmitted based on the first thread, the transmission link, and the second thread.

3. The data transmission method according to claim 2, characterized in that: The determining of a data transmission and reception rate between the first core in the first processor and the first core in the second processor includes: Determine the testing period; The timing starts when the first core executes the data transmission task, and stops when the test duration is reached; Counting the amount of test data sent by the first core during the test period and the amount of test data received by the second core during the test period; The data transmission and reception rate is determined based on the test data transmission amount, the test data reception amount, and the test period.

4. The data transmission method according to claim 3, characterized in that: When the first core executes the first thread, the test data sending amount is recorded, and when the second core executes the second thread, the test data receiving amount is recorded; The method further comprises: Sending a start timing signal and an end timing signal to the first core of the second processor to control the second processor to start and stop receiving test data; The test data reception amount fed back by the first core of the second processor is obtained.

5. The data transmission method according to claim 3, characterized in that: The test period is the duration of a test, and the method further includes: In response to the end of the current test, instructing the first core of the first processor and the first core of the second processor to clear the recorded test data sending amount and test data receiving amount; Recording the number of tests and data receiving and sending rates corresponding to the current test of the first core of the first processor and the first core of the second processor, where the number of tests is the cumulative number of tests; The next test is initiated on the first core of the first processor and the first core of the second processor.

6. The data transmission method according to claim 5, characterized in that: The method further comprises: Determine whether the current cumulative number of tests of the first core of the first processor and the first core of the second processor has reached a threshold; if not, continue to start the next test; if so, perform average processing on all data receiving and sending rates corresponding to the cumulative number of tests to obtain the average of the data receiving and sending rates corresponding to the first core of the first processor and the first core of the second processor.

7. The data transmission method according to claim 5, characterized in that: The method further comprises: Determine whether the current cumulative number of tests of the first core of the first processor and the first core of the second processor reaches a threshold, if not, continue to start the next test, if so, clear the cumulative number of tests to zero, and notify the second processor of the second device to switch the first core to the second core, so as to test the first core of the first processor and the second core of the second processor; When the first core of the first processor and each core of the second processor have completed testing, the first processor is controlled to switch the first core to the second core, and at the same time, the second processor of the second device is notified to switch the core currently corresponding to the test to the first core, so as to test the second core of the first processor and the first core of the second processor.

8. The data transmission method according to claim 6, characterized in that: The determining the target core combination based on the data transmission and reception rates between different cores in the first processor and the second processor includes: Determine an average value of data transmission and reception rates between different cores in the first processor and the second processor; Determine two target cores corresponding to the maximum value of the mean data receiving and sending rate based on the mean data receiving and sending rate between different cores in the first processor and the second processor, wherein the two target cores include the target core in the first processor and the target core in the second processor; The target core combination is determined based on a target core in the first processor and a target core in the second processor.

9. The data transmission method according to claim 1, characterized in that: The responding to the first instruction comprises: In response to a user input to initiate a test; or In response to obtaining a transmission task for data of a specified type; or in response to the initiation of a specified program; or When the execution result of the data transmission task performed by the first processor and the second processor in cooperation with two randomly selected cores is judged to not meet the preset transmission requirement, responding to an instruction generated by the judgment result; The responding to the second instruction comprises: In response to the transmission request of the target data, the target data is data of a specified type, or data of any type.

10. A data transmission device, applied to a first device including a first processor, characterized in that: The device comprises: A first response module, configured to, in response to a first instruction, control a first core in the first processor and a first core in a second processor in the second device to perform data transmission using a transmission link between the first device and the second device, in the case of single-link transmission with the second device, wherein both the first processor and the second processor are multi-core processors; A first determining module, configured to determine a data transmission and reception rate between a first core in the first processor and a first core in a second processor; a control module, used for controlling the switching of the cores used for data transmission in the first processor and / or the second processor, and repeatedly performing the above steps until each core in the first processor cooperates with each core in the second processor to perform the data transmission task and determines the corresponding data transmission and reception rate; A second determining module, configured to determine a target core combination according to a data transmission and reception rate between different cores in the first processor and the second processor, wherein the target core combination includes a target core in the first processor and a target core in the second processor; The second response module is used to control the target core combination to perform a target data transmission task in response to a second instruction, where the target data is determined based on the second instruction.

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