Time synchronization method and device, electronic equipment and medium

Abstract

The invention provides a time synchronization method, which comprises the following steps: in response to a first edge of a received time reference signal, acquiring a first system time value and first duration information sent by a master device; determining a second system time value according to the first duration information, wherein the precision of the second system time value is higher than that of the first system time value; and according to the first system time value, the second system time value and the local time of the to-be-synchronized device, determining a time deviation between the to-be-synchronized device and the master device so as to synchronize the local time of the to-be-synchronized device with the master device based on the time deviation. The invention further provides a time synchronization device.

Description

Technical Field

[0001] The present disclosure relates to the field of communication technology, and in particular to a time synchronization method, device, electronic device and medium. Background Art

[0002] When the reference time set for devices within the base station is different, time synchronization of the devices is prone to a series of problems such as switching failure, transmission data corruption, reduced throughput and reduced voice quality, which ultimately affect the performance of the 5G network. Summary of the invention

[0003] In view of this, the present disclosure provides a time synchronization method, device, electronic device and medium.

[0004] One aspect of the present disclosure provides a time synchronization method, including: in response to receiving a first edge of a time reference signal, obtaining a first system time value and first duration information sent by a master device; determining a second system time value according to the first duration information, wherein the second system time value has a higher precision than the first system time value; determining a time deviation between a device to be synchronized and the master device according to the first system time value, the second system time value and the local time of the device to be synchronized, so as to synchronize the local time of the device to be synchronized with the master device based on the time deviation.

[0005] According to an embodiment of the present disclosure, the first duration information is determined according to a duration signal, and the duration signal is generated by the following method: generating a starting signal value of the duration signal according to a step pulse signal and a first system time value; increasing the duration signal value in response to triggering a first edge of a time reference signal, wherein the duration signal value represents the number of unit durations elapsed from the generation of the start signal value, and the unit duration is determined according to the time difference between two adjacent first edges of the time reference signal.

[0006] According to an embodiment of the present disclosure, determining the second system time value according to the first duration information includes: determining the second duration information according to the first system time value; determining the second system time value according to the difference between the first duration information and the second duration information, and the unit duration.

[0007] According to an embodiment of the present disclosure, the local time includes a first local time value and a second local time value, the accuracy of the first local time value is lower than that of the second local time value, and determining the time deviation between the device to be synchronized and the master device based on the first system time value, the second system time value and the local time of the device to be synchronized includes: determining a first difference based on the first local time value and the first system time value; determining a second difference based on the second local time value and the second system time value; and determining the time deviation between the device to be synchronized and the master device based on the first difference and the second difference.

[0008] According to an embodiment of the present disclosure, it also includes: obtaining a time delay between the master device and the device to be synchronized; determining a time deviation between the device to be synchronized and the master device according to the time delay, the first system time value, the second system time value and the local time of the device to be synchronized.

[0009] According to an embodiment of the present disclosure, obtaining the time delay between the master device and the device to be synchronized includes: establishing a connection link between the master device and the device to be synchronized; and determining the time delay according to the bandwidth of the connection link.

[0010] Another aspect of the present disclosure also provides a time synchronization device, including: a receiving module, used to obtain a first system time value and a first duration information sent by a master device in response to receiving a first edge of a time reference signal; a system time determination module, used to determine a second system time value according to the first duration information, the second system time value having a higher accuracy than the first system time value; a time deviation determination module, used to determine the time deviation between a device to be synchronized and the master device according to the first system time value, the second system time value and the local time of the device to be synchronized, so as to synchronize the local time of the device to be synchronized with the master device based on the time deviation.

[0011] Another aspect of the present disclosure provides an electronic device, comprising: one or more processors; and a storage device for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors execute the above method.

[0012] Another aspect of the present disclosure further provides a computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, causes the processor to perform the above method.

[0013] Another aspect of the present disclosure further provides a computer program product, including a computer program, which implements the above method when executed by a processor.

[0014] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0016] Figure 1 A schematic diagram schematically shows an example time synchronization method;

[0017] Figure 2 A flowchart of a time synchronization method according to an embodiment of the present disclosure is schematically shown;

[0018] Figure 3 A schematic diagram schematically shows a time synchronization method according to an embodiment of the present disclosure;

[0019] Figure 4 A schematic diagram of a time synchronization device according to an embodiment of the present disclosure is shown; and

[0020] Figure 5 A schematic block diagram of an electronic device that can be used to implement the time synchronization method according to an embodiment of the present disclosure is schematically shown. DETAILED DESCRIPTION

[0021] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. Various details of the embodiments of the present disclosure are included to facilitate understanding, and they should be considered as merely exemplary. Therefore, it should be appreciated by those of ordinary skill in the art that various changes and modifications may be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Likewise, for the sake of clarity and conciseness, descriptions of well-known functions and structures are omitted in the following description.

[0022] In the technical solution of the present disclosure, the collection, storage, use, processing, transmission, provision, disclosure and application of the data involved (including but not limited to user personal information) comply with the provisions of relevant laws and regulations, take necessary confidentiality measures, and do not violate public order and good morals.

[0023] Figure 1 A schematic diagram schematically shows an exemplary time synchronization method.

[0024] The 1588 clock synchronization technology configures the 1588 clock function for all network devices (including time servers, intermediate time link transmission bearer devices, and 5G base stations), and uses one port of the boundary clock node in the network as a slave clock to keep synchronization with the upper-level clock, and other ports as the master clock of the next-level network element. After receiving the 1588 clock message, the device synchronizes with the upper-level clock, and then continues to generate new clock messages to pass to the lower-level devices. In this way, the time reference signal of the time server is transmitted point by point to the 5G base station equipment.

[0025] like Figure 1 As shown, the time synchronization of the device to be synchronized 120 can be performed based on the master device 110 .

[0026] In one example, the master device 110 sends a Sync clock message to the device to be synchronized 120. After receiving the Sync clock message, the device to be synchronized 120 returns a delay reply message Delay_req to the master device. The timestamps of sending and receiving the two messages can be calculated, and the time deviation between the devices can be determined based on the timestamps, and the time synchronization of the device to be synchronized 120 is performed according to the time deviation.

[0027] For example, the timestamp of the master device 110 sending the Sync clock message is T1, and the timestamp of the to-be-synchronized device 120 receiving the Sync clock message is T2. The timestamp of the to-be-synchronized device 120 sending the delay reply message Delay_req is T3, and the timestamp of the master device 110 receiving the delay reply message Delay_req is T4. The time delay Delay can be obtained by the following formula:

[0028]

[0029] The time offset Offset can be obtained by the following formula:

[0030]

[0031] The time deviation is calculated by the above method, and the time of the equipment is synchronized. Although it can meet the needs of high-precision time synchronization, if the reference time set between different devices is different, it is easy to interfere with each other and affect the RF performance, resulting in a series of problems such as switching failure, transmission data corruption, reduced throughput and reduced voice quality, which ultimately affects the performance of the 5G network.

[0032] Based on this, the present disclosure provides a time synchronization method, which reduces the difficulty of implementing the solution while maintaining high accuracy, and meets the time synchronization requirements of base station equipment.

[0033] Next, combine Figure 2-Figure 3 The time synchronization method disclosed in the present invention is further described.

[0034] Figure 2 The flowchart of the time synchronization method according to the embodiment of the present disclosure is schematically shown.

[0035] like Figure 2 As shown, the time synchronization method of this embodiment includes operations S210 to S230.

[0036] In operation S210 , in response to receiving a first edge of a time reference signal, a first system time value and first duration information sent by a master device are acquired.

[0037] In an embodiment of the present disclosure, the time reference signal may be a periodic square wave clock signal that generates a high level and a low level based on a fixed frequency. The first edge may refer to a rising edge that changes from a low level to a high level, or may refer to a falling edge that changes from a high level to a low level. The first system time value refers to the system second value of the master device at the first edge moment. Since the accuracy of the system second value is not high, there is a certain difference between the actual first edge moment and the system second value. The first duration information is used to characterize the time difference between the first edge moment and the system second value. The first duration information may be in the form of a signal, a numerical value, or a code.

[0038] For example, when the time reference signal triggers a rising edge, the system second value at the current moment is 10, and the first duration information is 5, which can be represented as 5 rising edges of the time reference signal after 10 seconds from a certain hour and minute.

[0039] In operation S220, a second system time value is determined according to the first duration information, and the second system time value has a higher precision than the first system time value.

[0040] In the embodiment of the present disclosure, the second system time value refers to the difference between the first edge time and the first system time value. The unit of the first system time value may be seconds, and the unit of the second system time value may be milliseconds.

[0041] For example, when the time reference signal triggers a rising edge, the system second value at the current moment is obtained to be 10, and the first duration information is represented as 5. The second system time value is determined to be 50 milliseconds according to the first duration information.

[0042] In operation S230, a time deviation between the device to be synchronized and the master device is determined according to the first system time value, the second system time value and the local time of the device to be synchronized, so as to synchronize the local time of the device to be synchronized with the master device based on the time deviation.

[0043] In the embodiment of the present disclosure, the local time is the time when the time reference signal triggers the rising edge and the device to be synchronized obtains the first system time value. The precise time of the master device is determined by the first system time value and the second system time value, and the time deviation between the devices is determined according to the precise time of the master device and the local time of the device to be synchronized.

[0044] For example, when the time reference signal triggers a rising edge, the system second value at the current moment is 10, the first duration information is 5, and the local time is 10.21. The second system time value is determined to be 50 milliseconds based on the first duration information. The precise time of the master device can be determined to be 10.05. Based on the precise time of the master device and the synchronization time of the device to be synchronized, the time deviation can be determined to be 0.16 seconds.

[0045] According to the embodiments of the present disclosure, time synchronization between a master device and a device to be synchronized is achieved by transmitting signals through an interface between devices, which can reduce the cost of time synchronization and ensure high time accuracy.

[0046] Figure 3 A schematic diagram of a time synchronization method according to an embodiment of the present disclosure is schematically shown.

[0047] like Figure 3 As shown, the master device 310 and the device to be synchronized 320 can transmit the time reference signal, the duration signal, and the system second value through the Common Public Radio Interface (CPRI) interface.

[0048] According to an embodiment of the present disclosure, the first duration information is determined according to a duration signal, and the duration signal is generated by the following method: generating a starting signal value of the duration signal according to a step pulse signal and a first system time value; increasing the duration signal value in response to triggering a first edge of a time reference signal, wherein the duration signal value represents the number of unit durations elapsed from the generation of the start signal value, and the unit duration is determined according to the time difference between two adjacent first edges of the time reference signal.

[0049] In the disclosed embodiment, the step pulse signal refers to a signal that generates a pulse at a fixed time interval. The step pulse signal may be a pulse per second signal (1 pulse per second, 1pps). A pulse is generated every second. The duration signal is a square wave signal of a fixed frequency, and the signal value of the duration signal increases whenever the duration signal rises (or falls). The duration signal may be determined to increase the signal value from a certain moment based on the step pulse signal and the first system time value. The frequency of the duration signal may be consistent with the time reference signal. The unit duration may refer to the time difference between the two first edges of the time reference signal or the duration signal, or may be determined based on the frequency of the time reference signal or the duration signal.

[0050] For example, according to the step pulse signal and the first system time value, it can be determined that the starting signal value of the duration signal at 0 seconds is 0, and then as the time reference signal continuously triggers the first edge, the signal value of the duration signal increases accordingly.

[0051] like Figure 3 As shown, for example, the unit duration is 10 milliseconds. When the first system time value is t, the signal value of the duration signal may be N. After the unit duration, the time reference signal triggers the next rising edge. Since the unit value of the first system time value is seconds, there is no change after 10 milliseconds, and the duration signal increases to N+1, indicating that the number of unit durations that have passed has increased by one.

[0052] According to an embodiment of the present disclosure, determining the second system time value according to the first duration information includes: determining the second duration information according to the first system time value; determining the second system time value according to the difference between the first duration information and the second duration information, and the unit duration.

[0053] In the embodiment of the present disclosure, the second duration information refers to a signal value corresponding to the duration signal when the first system time value changes.

[0054] For example, according to the first system time value 0 and the time reference signal, the starting signal value of the duration signal is determined to be 0, and the unit duration is 10ms. When the first system time value changes from 0 to 1, the signal value corresponding to the duration signal is 100, and the second duration information corresponding to the first system time value can be determined to be 100.

[0055] For example, when the time reference signal triggers a rising edge, the first duration information is obtained as 125, and the first system time value is 1. According to the second duration information 100 corresponding to the first system time value and the first duration information 125, it can be determined that the difference is 25. According to the difference and the unit duration, it can be determined that the second system time value is 250 milliseconds.

[0056] According to an embodiment of the present disclosure, the local time includes a first local time value and a second local time value, the accuracy of the first local time value is lower than that of the second local time value, and determining the time deviation between the device to be synchronized and the master device based on the first system time value, the second system time value and the local time of the device to be synchronized includes: determining a first difference based on the first local time value and the first system time value; determining a second difference based on the second local time value and the second system time value; and determining the time deviation between the device to be synchronized and the master device based on the first difference and the second difference.

[0057] In an embodiment of the present disclosure, the local time may be composed of a 48-bit second value and a 32-bit nanosecond value, wherein the first local time value may be a 48-bit second value, and the second local time value may be a 32-bit nanosecond value.

[0058] The first local time value in seconds can be calculated with the first system time value to obtain a first difference in seconds. The second local time value in nanoseconds can be calculated with the second system time value to obtain a second difference in nanoseconds. The time deviation between the master device and the device to be synchronized can be determined based on the first difference and the second difference.

[0059] In an embodiment of the present disclosure, the time offset offset can be determined by the following formula:

[0060]

[0061] Wherein, local_t1 is the first local time value, master_t1 is the first system time value, local_t2 is the second local time value, and master_t2 is the second system time value.

[0062] According to an embodiment of the present disclosure, it also includes: obtaining a time delay between the master device and the device to be synchronized; determining a time deviation between the device to be synchronized and the master device according to the time delay, the first system time value, the second system time value and the local time of the device to be synchronized.

[0063] In the embodiments of the present disclosure, the time deviation is not only caused by the time difference between the master device and the device to be synchronized, but is often also affected by the channel delay factor between the master device and the device to be synchronized. Therefore, when actually calculating the time deviation, the time delay T between the devices also needs to be considered. delay .

[0064] The actual time deviation offset_re can be determined by the following formula:

[0065]

[0066] According to an embodiment of the present disclosure, obtaining the time delay between the master device and the device to be synchronized includes: establishing a connection link between the master device and the device to be synchronized; and determining the time delay according to the bandwidth of the connection link.

[0067] In the embodiment of the present disclosure, before the time synchronization of the device to be synchronized is performed based on the master device, a connection link between the master device and the device to be synchronized needs to be established, and the time delay between the devices can be determined based on the bandwidth of the connection link, the amount of data transmitted, etc. After obtaining the time deviation calculated based on the time delay, the local time of the device to be synchronized is adjusted according to the time deviation to achieve time synchronization with the master device.

[0068] According to the embodiments of the present disclosure, time synchronization is achieved by transmitting signals through a common interface between devices, without the need to calculate time deviations based on other clock protocols and recording timestamps, thereby reducing the difficulty of implementing time synchronization and retaining the high accuracy of time synchronization, thereby meeting the time synchronization requirements of devices in different scenarios.

[0069] Figure 4 The structure block diagram of the time synchronization device according to the embodiment of the present disclosure is schematically shown.

[0070] like Figure 4 As shown, the time synchronization device 400 of this embodiment includes a receiving module 410 , a system time determination module 420 and a time deviation determination module 430 .

[0071] The receiving module 410 is used to obtain the first system time value and the first duration information sent by the master device in response to receiving the first edge of the time reference signal. In one embodiment, the receiving module 410 can be used to perform the operation S210 described above, which will not be described in detail here.

[0072] The system time determination module 420 is used to determine a second system time value according to the first duration information, and the second system time value has a higher precision than the first system time value. In one embodiment, the system time determination module 420 can be used to perform the operation S220 described above, which will not be described in detail here.

[0073] The time deviation determination module 430 is used to determine the time deviation between the device to be synchronized and the master device according to the first system time value, the second system time value and the local time of the device to be synchronized, so as to synchronize the local time of the device to be synchronized with the master device based on the time deviation. In one embodiment, the time deviation determination module 430 can be used to perform the operation S230 described above, which will not be repeated here.

[0074] In an embodiment of the present disclosure, the first duration information is determined according to a duration signal, and the duration signal is generated by the following submodules.

[0075] The generation submodule is used to generate a starting signal value of the duration signal according to the step pulse signal and the first system time value. The signal value increase submodule is used to increase the duration signal value in response to the time reference signal triggering the first edge, the duration signal value represents the number of unit durations passed since the generation of the starting signal value, and the unit duration is determined according to the time difference between two adjacent first edges of the time reference signal.

[0076] According to an embodiment of the present disclosure, the first duration information is determined according to a duration signal, and the duration signal is generated by the following method: generating a starting signal value of the duration signal according to a step pulse signal and a first system time value; increasing the duration signal value in response to triggering a first edge of a time reference signal, wherein the duration signal value represents the number of unit durations elapsed from the generation of the start signal value, and the unit duration is determined according to the time difference between two adjacent first edges of the time reference signal.

[0077] According to an embodiment of the present disclosure, the system time determination module 420 includes a first determination submodule and a second determination submodule. The first determination submodule is used to determine the second duration information according to the first system time value. The second determination submodule is used to determine the second system time value according to the difference between the first duration information and the second duration information, and the unit duration.

[0078] According to an embodiment of the present disclosure, the local time includes a first local time value and a second local time value, the accuracy of the first local time value is lower than the accuracy of the second local time value, and the time deviation determination module 430 includes a third determination submodule, a fourth determination submodule and a fifth determination submodule. The third determination submodule is used to determine a first difference value according to the first local time value and the first system time value. The fourth determination submodule is used to determine a second difference value according to the second local time value and the second system time value. The fifth determination submodule is used to determine the time deviation between the device to be synchronized and the master device according to the first difference value and the second difference value.

[0079] According to an embodiment of the present disclosure, the time synchronization device 400 further includes an acquisition module and a determination module. The acquisition module is used to acquire the time delay between the master device and the device to be synchronized. The determination module is used to determine the time deviation between the device to be synchronized and the master device according to the time delay, the first system time value, the second system time value and the local time of the device to be synchronized.

[0080] According to an embodiment of the present disclosure, the acquisition module includes an establishment submodule and a delay determination submodule. The establishment submodule is used to establish a connection link between the master device and the device to be synchronized. The delay determination submodule is used to determine the time delay according to the bandwidth of the connection link.

[0081] Figure 5 A schematic block diagram of an electronic device that can be used to implement the method of the embodiment of the present disclosure is schematically shown.

[0082] like Figure 5 As shown, the electronic device 500 according to an embodiment of the present disclosure includes a processor 501, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 502 or a program loaded from a storage part 508 to a random access memory (RAM) 503. The processor 501 may include, for example, a general-purpose microprocessor (such as a CPU), an instruction set processor and / or a related chipset and / or a special-purpose microprocessor (for example, an application-specific integrated circuit (ASIC)), etc. The processor 501 may also include an onboard memory for caching purposes. The processor 501 may include a single processing unit or multiple processing units for performing different actions of the method flow according to an embodiment of the present disclosure.

[0083] In RAM 503, various programs and data required for the operation of electronic device 500 are stored. Processor 501, ROM 502 and RAM 503 are connected to each other via bus 504. Processor 501 performs various operations of the method flow according to the embodiment of the present disclosure by executing the program in ROM 502 and / or RAM 503. It should be noted that the program can also be stored in one or more memories other than ROM 502 and RAM 503. Processor 501 can also implement the method provided by the embodiment of the present disclosure by executing the program stored in the one or more memories.

[0084] According to an embodiment of the present disclosure, the electronic device 500 may further include an input / output (I / O) interface 505, which is also connected to the bus 504. The electronic device 500 may further include one or more of the following components connected to the I / O interface 505: an input portion 506 including a keyboard, a mouse, etc.; an output portion 507 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage portion 508 including a hard disk, etc.; and a communication portion 509 including a network interface card such as a LAN card, a modem, etc. The communication portion 509 performs communication processing via a network such as the Internet. A drive 510 is also connected to the I / O interface 505 as needed. A removable medium 511, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 510 as needed, so that a computer program read therefrom is installed into the storage portion 508 as needed.

[0085] The present disclosure also provides a computer-readable storage medium, which may be included in the device / apparatus / system described in the above embodiments; or may exist independently without being assembled into the device / apparatus / system. The above computer-readable storage medium carries one or more programs, and when the above one or more programs are executed, the method according to the embodiment of the present disclosure is implemented.

[0086] According to an embodiment of the present disclosure, the computer-readable storage medium may be a non-volatile computer-readable storage medium, for example, it may include but is not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In the present disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program, which may be used by or in combination with an instruction execution system, an apparatus or a device. For example, according to an embodiment of the present disclosure, the computer-readable storage medium may include the ROM 502 and / or RAM 503 described above and / or one or more memories other than ROM 502 and RAM 503.

[0087] The embodiment of the present disclosure also includes a computer program product, which includes a computer program, and the computer program contains program code for executing the method shown in the flowchart. When the computer program product is run in a computer system, the program code is used to enable the computer system to implement the method provided by the embodiment of the present disclosure.

[0088] The above functions defined in the system / device of the embodiment of the present disclosure are performed when the computer program is executed by the processor 501. According to the embodiment of the present disclosure, the system, device, module, unit, etc. described above can be implemented by a computer program module.

[0089] In one embodiment, the computer program may rely on tangible storage media such as optical storage devices, magnetic storage devices, etc. In another embodiment, the computer program may also be transmitted and distributed in the form of signals on a network medium, and downloaded and installed through the communication part 509, and / or installed from the removable medium 511. The program code contained in the computer program may be transmitted using any appropriate network medium, including but not limited to: wireless, wired, etc., or any suitable combination of the above.

[0090] In such an embodiment, the computer program can be downloaded and installed from the network through the communication part 509, and / or installed from the removable medium 511. When the computer program is executed by the processor 501, the above functions defined in the system of the embodiment of the present disclosure are performed. According to the embodiment of the present disclosure, the system, device, means, module, unit, etc. described above can be implemented by a computer program module.

[0091] It should be noted that the collection, storage, use, processing, transmission, provision, disclosure and application of user personal information involved in the technical solution of this disclosure are in compliance with the provisions of relevant laws and regulations, necessary confidentiality measures have been taken, and they do not violate public order and good morals. In the technical solution of this disclosure, the user's authorization or consent is obtained before obtaining or collecting user personal information.

[0092] According to an embodiment of the present disclosure, the program code for executing the computer program provided by the embodiment of the present disclosure can be written in any combination of one or more programming languages. Specifically, these computing programs can be implemented using high-level process and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, Java, C++, python, "C" language or similar programming languages. The program code can be executed entirely on the user computing device, partially on the user device, partially on the remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device can be connected to the user computing device through any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computing device (for example, using an Internet service provider to connect through the Internet).

[0093] The flow charts and block diagrams in the accompanying drawings illustrate the possible architecture, functions and operations of the systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a module, a program segment, or a part of a code, and the above-mentioned module, program segment, or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram or flow chart, and the combination of the boxes in the block diagram or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.

[0094] It will be appreciated by those skilled in the art that the features described in the various embodiments and / or claims of the present disclosure may be combined and / or coupled in a variety of ways, even if such combinations and / or couplings are not explicitly described in the present disclosure. In particular, the features described in the various embodiments and / or claims of the present disclosure may be combined and / or coupled in a variety of ways without departing from the spirit and teachings of the present disclosure. All of these combinations and / or couplings fall within the scope of the present disclosure.

[0095] The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes and are not intended to limit the scope of the present disclosure. Although the embodiments are described above, this does not mean that the measures in the various embodiments cannot be used in combination. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A time synchronization method, comprising: In response to receiving a first edge of the time reference signal, acquiring a first system time value and first duration information sent by the master device; Determine a second system time value according to the first duration information, wherein the second system time value has a higher precision than the first system time value; The time deviation between the device to be synchronized and the master device is determined according to the first system time value, the second system time value and the local time of the device to be synchronized, so as to synchronize the local time of the device to be synchronized with the master device based on the time deviation.

2. The method according to claim 1, wherein the first duration information is determined according to a duration signal, and the duration signal is generated by the following method: Generate a starting signal value of the duration signal according to the step pulse signal and the first system time value; In response to the time reference signal triggering a first edge, the duration signal value is increased, wherein the duration signal value represents the number of unit durations elapsed since the start signal value was generated, and the unit duration is determined based on the time difference between two adjacent first edges of the time reference signal.

3. The method according to claim 2, wherein determining the second system time value according to the first duration information comprises: Determine second duration information according to the first system time value; A second system time value is determined according to a difference between the first duration information and the second duration information, and the unit duration.

4. The method according to claim 1, wherein the local time comprises a first local time value and a second local time value, the accuracy of the first local time value is lower than the accuracy of the second local time value, and the determining the time deviation between the device to be synchronized and the master device according to the first system time value, the second system time value and the local time of the device to be synchronized comprises: determining a first difference value based on the first local time value and the first system time value; determining a second difference value based on the second local time value and the second system time value; The time deviation between the device to be synchronized and the master device is determined according to the first difference and the second difference.

5. The method according to claim 1, further comprising: Acquire the time delay between the master device and the device to be synchronized; The time deviation between the device to be synchronized and the master device is determined according to the time delay, the first system time value, the second system time value and the local time of the device to be synchronized.

6. The method according to claim 5, wherein obtaining the time delay between the master device and the device to be synchronized comprises: Establishing a connection link between the master device and the device to be synchronized; The time delay is determined according to the bandwidth of the connection link.

7. A time synchronization device, comprising: A receiving module, configured to obtain a first system time value and first duration information sent by a master device in response to receiving a first edge of a time reference signal; a system time determination module, configured to determine a second system time value according to the first duration information, wherein the second system time value has a higher precision than the first system time value; A time deviation determination module is used to determine the time deviation between the device to be synchronized and the master device according to the first system time value, the second system time value and the local time of the device to be synchronized, so as to synchronize the local time of the device to be synchronized with the master device based on the time deviation.

8. The device according to claim 7, wherein the first duration information is determined according to a duration signal, and the duration signal is generated by the following submodules: A generating submodule, used for generating a starting signal value of the duration signal according to a step pulse signal and the first system time value; A signal value increasing submodule is used to increase the duration signal value in response to the first edge triggered by the time reference signal, wherein the duration signal value represents the number of unit durations that have passed since the start signal value was generated, and the unit duration is determined based on the time difference between two adjacent first edges of the time reference signal.

9. An electronic device, comprising: one or more processors; a storage device for storing one or more programs, When the one or more programs are executed by the one or more processors, the one or more processors are caused to execute the method according to any one of claims 1 to 6.

10. A computer-readable storage medium having executable instructions stored thereon, which, when executed by a processor, causes the processor to perform the method according to any one of claims 1 to 6.

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