Light emitting diode packaging structure and manufacturing method thereof

Abstract

The invention discloses a light emitting diode packaging structure and a manufacturing method thereof. The light emitting diode packaging structure comprises a substrate, a conductive structure, a first gold layer, a second gold layer, a light emitting diode chip and a packaging layer. The substrate has a first surface and a second surface opposite to each other. The conductive structure comprises a first conductive structure and a second conductive structure which are electrically connected. The first conductive structure is arranged on the first surface, and the second conductive structure is arranged on the second surface. The first gold layer is disposed on the first conductive structure, and the thickness of the first gold layer is greater than 1 micron. The second gold layer is arranged on the second conductive structure, and the second gold layer completely covers the second conductive structure. The light emitting diode chip is arranged on the first gold layer. The packaging layer is arranged on the first surface and wraps the first conductive structure, the first gold layer and the light emitting diode chip. The light emitting diode packaging structure provided by the invention has good reliability.

Description

Technical Field

[0001] The present application relates to a light emitting diode packaging structure and a manufacturing method thereof, and in particular to a light emitting diode packaging structure for high-power vehicle lighting and a manufacturing method thereof. Background Art

[0002] In the prior art, a direct plated copper (DPC) ceramic substrate is a widely used substrate. The DPC ceramic substrate has both the heat dissipation characteristics of ceramics and the conductor characteristics of metals, and is particularly suitable for semiconductor packaging structures.

[0003] In the manufacturing process of DPC ceramic substrate, through the steps of electroplating, sputtering, exposure and development, a patterned circuit with a small line width and spacing can be formed on the ceramic substrate. In addition, the bonding force between the patterned circuit and the ceramic substrate is good, making the packaging structure have a higher reliability.

[0004] However, the existing packaging structure still has some shortcomings in design. For example, part of the conductive circuit is exposed to the outside air, and the exposed conductive circuit is easily oxidized and corroded by the external moisture or oxygen, which negatively affects the reliability of the packaging structure.

[0005] In addition, during the gold-gold interconnection (GGI) process, if the thickness of the gold layer on the conductive circuit is too thin, the bonding force between the LED chip and the gold layer is insufficient, which will reduce the reliability of the packaging structure.

[0006] Therefore, how to improve the reliability of the packaging structure and overcome the above-mentioned defects through the improvement of the structural design has become one of the important issues that this business wants to solve. Summary of the invention

[0007] The technical problem to be solved by the present application is to provide a light emitting diode packaging structure and a manufacturing method thereof in view of the deficiencies in the prior art.

[0008] In order to solve the above-mentioned technical problems, one of the technical solutions adopted in the present application is to provide a light-emitting diode packaging structure. The light-emitting diode packaging structure includes a substrate, a conductive structure, a first gold layer, a second gold layer, a light-emitting diode chip and a packaging layer. The substrate has a first surface and a second surface relative to each other. The conductive structure includes a first conductive structure and a second conductive structure that are electrically connected. The first conductive structure is arranged on the first surface, and the second conductive structure is arranged on the second surface. The first gold layer is arranged on the first conductive structure, and the thickness of the first gold layer is greater than 1 micron. The second gold layer is arranged on the second conductive structure, and the second gold layer completely covers the second conductive structure. The light-emitting diode chip is arranged on the first gold layer. The packaging layer is arranged on the first surface and covers the first conductive structure, the first gold layer and the light-emitting diode chip.

[0009] Furthermore, the thickness of the second gold layer is less than 1 micron.

[0010] Furthermore, a nickel layer is disposed between the first gold layer and the first conductive structure.

[0011] Furthermore, a nickel layer is disposed between the second gold layer and the second conductive structure.

[0012] Furthermore, a palladium layer is further disposed between the second gold layer and the nickel layer.

[0013] Furthermore, a conductive layer is disposed between the substrate and the conductive structure.

[0014] Furthermore, the light emitting diode chip is connected to the first gold layer through a gold connecting piece.

[0015] In order to solve the above-mentioned technical problems, another technical solution adopted by the present application is to provide a method for manufacturing a light-emitting diode packaging structure. The method for manufacturing a light-emitting diode packaging structure includes the following steps: forming at least one through hole on a substrate, the through hole connecting a first surface and a second surface opposite to the substrate. Arranging a conductive structure on the substrate, the conductive structure including a first conductive structure arranged on the first surface and a second conductive structure arranged on the second surface. Performing an electroplating process to form a first gold layer on the first conductive structure, the thickness of the first gold layer being greater than 1 micron. Performing a chemical plating process to form a second gold layer on the second conductive structure, the second gold layer completely covering the second conductive structure. Arranging a light-emitting diode chip on the first gold layer. Arranging a packaging layer on the first surface.

[0016] Furthermore, a sputtering process is performed before the conductive structure is provided to provide a conductive layer on the first surface, the second surface and the hole wall of the through hole.

[0017] Furthermore, after forming the second gold layer, a gold-gold connection process is performed to place the light emitting diode chip on the first gold layer through a gold connection member.

[0018] One of the beneficial effects of the present application is that the light-emitting diode packaging structure and the manufacturing method thereof provided in the present application can improve the reliability of the light-emitting diode packaging structure through the technical solutions of "the thickness of the first gold layer is greater than 1 micron" and "the second gold layer completely covers the second conductive structure".

[0019] To further understand the features and technical contents of the present application, please refer to the following detailed description and drawings of the present application. However, the drawings provided are only for reference and illustration and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a side view schematic diagram of the light emitting diode packaging structure of the present application.

[0021] Figures 2 to 11 Schematic diagram of the steps of the manufacturing method of the light emitting diode package structure of the present application. DETAILED DESCRIPTION

[0022] The following is an explanation of the implementation methods of the "light-emitting diode packaging structure and its manufacturing method" disclosed in the present application through specific examples. Those skilled in the art can understand the advantages and effects of the present application from the contents disclosed in this specification. The present application can be implemented or applied through other different specific embodiments, and the details in this specification can also be modified and changed in various ways based on different viewpoints and applications without departing from the concept of the present application. In addition, the drawings of the present application are only simple schematic illustrations and are not depicted according to actual dimensions. It is stated in advance. The following implementation methods will further explain the relevant technical content of the present application in detail, but the disclosed content is not intended to limit the scope of protection of the present application. In addition, the term "or" used in this article may include any one or more combinations of the associated listed items depending on the actual situation.

[0023] In order to overcome the defects of the existing packaging structure, the present application provides a light emitting diode packaging structure. In the light emitting diode packaging structure of the present application, the conductive structure will not be in contact with the outside world, so the conductive structure will not be oxidized by external oxygen or water vapor. In the subsequent manufacturing process, the conductive structure will not be corroded.

[0024] Furthermore, in the LED packaging structure of the present application, the LED chip can be disposed on the conductive structure through a gold-gold interconnection (GGI) process. Since pure gold itself has good electrical and thermal conductivity, it can be applied to LED chips for high-power vehicle lights.

[0025] See also Figure 1As shown, the light emitting diode packaging structure of the present application includes: a substrate 1 , a conductive structure 2 , a first gold layer 3 , a second gold layer 4 , a light emitting diode chip 5 and a packaging layer 6 .

[0026] The substrate 1 has a first surface 11 and a second surface 12 opposite to each other. The first surface 11 can be used to carry electronic components (such as light emitting diode chips 5), and the second surface 12 can be used for soldering to connect with an external circuit.

[0027] The material of the substrate 1 is a ceramic material. For example, the material of the substrate 1 can be aluminum nitride, beryllium oxide, aluminum oxide, silicon carbide or silicon nitride, but the present application is not limited thereto.

[0028] According to the configuration design of the conductive structure 2, at least one through hole 10 (such as Figure 2 As shown in FIG. 1 , the through hole 10 can connect the first surface 11 and the second surface 12 .

[0029] See also Figure 1 As shown, the conductive structure 2 is disposed on the substrate 1. In an exemplary embodiment, the conductive structure 2 is extended from the through hole 10 to the first surface 11 and the second surface 12. In other words, the conductive structure 2 can be embedded on the substrate 1. Therefore, the conductive structure 2 can electrically connect the electronic components on the first surface 11 and the second surface 12.

[0030] For the convenience of description, the conductive structure 2 is divided into a first conductive structure 21 , a second conductive structure 22 and a third conductive structure 23 . However, in fact, the first conductive structure 21 , the second conductive structure 22 and the third conductive structure 23 are integrally formed.

[0031] The portion of the conductive structure 2 extending to the first surface 11 is called the first conductive structure 21, and the first conductive structure 21 forms a patterned structure on the first surface 11. The portion of the conductive structure 2 extending to the second surface 12 is called the second conductive structure 22, and the second conductive structure 22 forms another patterned structure on the second surface 12. The portion of the conductive structure 2 disposed in the through hole 10 is called the third conductive structure 23. That is, the two ends of the third conductive structure 23 are respectively connected to the first conductive structure 21 and the second conductive structure 22.

[0032] The conductive structure 2 can be disposed on the substrate 1 by a direct plated copper (DPC) process or by filling a conductive paste, but the present application is not limited thereto.

[0033] In order to increase the bonding force between the conductive structure 2 and the substrate 1, a conductive layer 2A may be disposed between the conductive structure 2 and the substrate 1. For example, the conductive layer 2A may be a titanium-copper alloy.

[0034] See also Figure 3 As shown, the conductive layer 2A can be formed on the hole wall of the through hole 10, the first surface 11, the second surface 12 and the side wall of the substrate 1. It is worth noting that, because the exposure and development steps will be performed in the process, only part of the conductive layer 2A will remain in the finished product. Figure 1 In the light emitting diode package structure shown, only the conductive layer 2A between the conductive structure 2 and the substrate 1 is retained.

[0035] See also Figure 1 As shown, the first gold layer 3 is disposed on the first conductive structure 21. In the present application, the thickness of the first gold layer 3 is greater than 1 micron. Accordingly, the first gold layer 3 is conducive to the subsequent arrangement of the light-emitting diode chip 5. In an exemplary embodiment, the first gold layer 3 covers the upper surface of the first conductive structure 21, but does not cover the side surface of the first conductive structure 21. However, the present application is not limited thereto.

[0036] Since the thickness of the first gold layer 3 is greater than 1 micron, the first gold layer 3 can have good bonding strength with the gold connector 5A. In this way, the light-emitting diode chip 5 can be disposed on the first conductive structure 21 through a gold-gold connection process, and can also be applied to light-emitting diode chips for high-power vehicle lights. The gold connector 5A here can be a gold ball, but the present application is not limited thereto.

[0037] In the gold-gold connection process, if the thickness of the first gold layer 3 is less than 1 micrometer, the bonding force between the first gold layer 3 and the gold connection member 5A is insufficient, and the reliability of the light emitting diode package structure will be reduced.

[0038] In order to prevent the copper atoms in the first conductive structure 21 from migrating or diffusing into the first gold layer 3, a nickel layer 3A may be provided between the first gold layer 3 and the first conductive structure 21 as a barrier layer. The thickness of the nickel layer 3A may be 2.5 microns to 7.5 microns, and the thickness of the first gold layer 3 may be 1 micron to 2 microns, and greater than 1 micron. However, the present application is not limited thereto.

[0039] See also Figure 1 As shown, the second gold layer 4 is disposed on the second conductive structure 22. In the present application, the second gold layer 4 completely covers the second conductive structure 22, that is, the second gold layer 4 is disposed on the upper surface and the side surface of the second conductive structure 22 to prevent the second conductive structure 22 from being exposed to the external environment or corroded during the manufacturing process. Therefore, the second gold layer 4 can not only facilitate connection with the external circuit, but also protect the second conductive structure 22.

[0040] In an exemplary embodiment, the thickness of the second gold layer 4 may be less than 1 micron. If the thickness of the second gold layer 4 is greater than 1 micron, in addition to the cost increase, the melting point of the surface mount technology (SMT) will also increase, thereby causing incomplete melting of the solder and increasing the risk of welding defects.

[0041] In order to prevent the copper atoms of the second conductive structure 22 from migrating or diffusing to the second gold layer 4, a nickel layer 4A may be provided between the second gold layer 4 and the second conductive structure 22 as a barrier layer. Similarly, in order to prevent the nickel atoms in the nickel layer 4A from migrating or diffusing to the second gold layer 4, a palladium layer 4B may be further provided between the second gold layer 4 and the nickel layer 4A as a barrier layer.

[0042] In one exemplary embodiment, when the nickel layer 4A and the second gold layer 4 are disposed on the second conductive structure 22, the thickness of the nickel layer 4A may be 2.5 micrometers to 7.5 micrometers, and the thickness of the second gold layer 4 may be 0.025 micrometers to 0.0625 micrometers. In another exemplary embodiment, when the nickel layer 4A, the palladium layer 4B and the second gold layer 4 are disposed on the second conductive structure 22, the thickness of the nickel layer 4A may be 2.5 micrometers to 7.5 micrometers, the thickness of the palladium layer 4B may be 0.05 micrometers to 0.15 micrometers, and the thickness of the second gold layer 4 may be 0.05 micrometers to 0.15 micrometers.

[0043] See also Figure 1 As shown, the packaging layer 6 is disposed on the first surface 11 and covers the first conductive structure 21 , the first gold layer 3 and the LED chip 5 to prevent the first conductive structure 21 , the first gold layer 3 and the LED chip 5 from contacting the outside.

[0044] The packaging layer 6 can be formed by a molding process, but the present application is not limited thereto. The material of the packaging layer 6 can be silicone.

[0045] Please refer to the combined Figures 2 to 11 The manufacturing method of the light emitting diode package structure of the present application may include the following steps S1 to S6, but they are only used to assist in explaining one embodiment of the present application and are not used to limit the present application.

[0046] In step S1, at least one through hole 10 is formed on the substrate 1, and the through hole 10 connects the first surface 11 and the second surface 12 (such as Figure 2 In an exemplary embodiment, the substrate 1 is an aluminum nitride substrate, and the through hole 10 is formed by a laser drilling process.

[0047] As mentioned above, in order to enhance the bonding strength between the conductive structure 2 and the substrate 1, a sputtering process can be performed to form a conductive layer 2A (such as a conductive layer 2A) on the first surface 11, the second surface 12, the side surface of the substrate 1 and the hole wall of the through hole 10. Figure 3 In one exemplary embodiment, the conductive layer 2A is a titanium-copper alloy.

[0048] Next, a dry film photoresist F1 (such as Figure 4 As shown in FIG. 1 , an exposure and development process is performed. Through the pattern design on the mask, part of the dry film photoresist F1 will be etched. A stepped structure (as shown in FIG. 1 ) is formed between the remaining dry film photoresist F1 and the substrate 1. Figure 5 shown).

[0049] In step S2, a conductive structure 2 is disposed on the substrate 1. Specifically, the conductive structure 2 fills the through hole 10 and is disposed on the stepped structure. The conductive structure 2 forms a first conductive structure 21 on the first surface 11 and a second conductive structure 22 on the second surface 12. In an exemplary embodiment, the upper surface of the conductive structure 2 (the first conductive structure 21 and the second conductive structure 22) is flush with the upper surface of the dry film photoresist F1 (e.g., Figure 6 shown).

[0050] In step S3, an electroplating process is performed to form a first gold layer 3 on the first conductive structure 21. In order to prevent the second conductive structure 22 from being affected by the electroplating process, before the electroplating process, another dry film photoresist F2 is covered on the second conductive structure 22 (eg, Figure 7 shown).

[0051] In the electroplating process, a degreasing step is first performed to use an acid solution to wash away some oxides and contaminants on the first conductive structure 21 to reduce the surface tension of the first conductive structure 21. After the degreasing step, the first conductive structure 21 is cleaned with hot water and deionized water in sequence.

[0052] Next, a micro etching step is performed using sodium persulfate (Na 2 S 2 O 8 ) and sulfuric acid to remove the oxide on the first conductive structure 21 and roughen the surface of the first conductive structure 21. The first conductive structure 21 with a roughened surface can have better adhesion with the nickel layer 3A. After the micro-etching step, the first conductive structure 21 is cleaned with deionized water.

[0053] Next, an acid dipping step is performed to remove oxides on the first conductive structure 21 with sulfuric acid. After the acid dipping step, the first conductive structure 21 is cleaned with deionized water.

[0054] Next, a nickel pre-plating step is performed to form a dense and thin nickel layer on the surface of the first conductive structure 21 to facilitate subsequent steps.

[0055] Next, a nickel electroplating step is performed. In the nickel electroplating step, the first conductive structure 21 and a nickel metal block are immersed in an electrolyte, the first conductive structure 21 serves as a cathode, and the nickel metal block serves as an anode.

[0056] Accordingly, a nickel layer 3A is formed on the first conductive structure 21. The thickness of the nickel layer 3A can be determined by the current density and time during electroplating. In an exemplary embodiment, the thickness of the nickel layer 3A is 5 microns. After the nickel electroplating step, the nickel layer 3A is cleaned with deionized water.

[0057] Next, a gold pre-plating step is performed to form a dense thin gold layer on the surface of the nickel layer 3A to facilitate subsequent steps.

[0058] Next, a gold electroplating step is performed. In the gold electroplating step, the first conductive structure 21 (cathode) and the platinum titanium steel (anode) are immersed in an electrolyte containing potassium cyanide gold (K[Au(CN) 2 ]).

[0059] Accordingly, the first gold layer 3 is formed on the nickel layer 3A. The thickness of the first gold layer 3 can be determined by the current density and time during electroplating. In an exemplary embodiment, the thickness of the first gold layer 3 is greater than 1 micron (e.g., 1.1 microns). After the gold electroplating step, the first gold layer 3 is cleaned with deionized water.

[0060] Next, an etching step is performed to remove the dry film photoresists F1, F2 and a portion of the conductive layer 2A, leaving only the conductive layer 2A between the substrate 1 and the conductive structure 2 (eg Figure 8 shown).

[0061] In step S4, a chemical plating process is performed to form a second gold layer 4 on the second conductive structure 22. In order to prevent the first conductive structure 21 from being affected by the chemical plating process, a plating resist tape F3 is covered on the first conductive structure 21 before the chemical plating process (eg, Fig. 9 shown).

[0062] It is worth noting that chemical plating uses a strong reducing agent in the chemical plating solution to achieve the effect of electron transfer (redox). Through the transfer of electrons, a deposited metal layer is obtained. When the surface of the plated substrate is covered with metal, the plated substrate can no longer be oxidized, so the thickness of the chemical plating has certain limitations. Since the effect of chemical plating has no regional limitations, the metal coating can completely cover the plated substrate, that is, the metal coating can completely cover the second conductive structure 22.

[0063] During the chemical plating process, the degreasing step as described above is performed to remove part of the oxide and contamination on the second conductive structure 22. After the degreasing step, the second conductive structure 22 is cleaned with hot water and deionized water in sequence.

[0064] Next, the aforementioned micro-etching step and acid-washing step are performed in sequence, and after the micro-etching step and the acid-washing step, the second conductive structure 22 is cleaned with deionized water.

[0065] Next, a pre-dipping step is performed to immerse the second conductive structure 22 in sulfuric acid so that the surface of the second conductive structure 22 is maintained in an oxygen-free state.

[0066] Next, an activation step is performed. The second conductive structure 22 in an oxygen-free state is immersed in a mixed solution of palladium sulfate and sulfuric acid. Through a chemical exchange reaction, palladium ions in the mixed solution can adhere to the surface of the second conductive structure 22 to form palladium metal. The palladium metal can be used as a catalyst in subsequent steps to promote the deposition of nickel metal. After the activation step, the second conductive structure 22 is washed with deionized water.

[0067] Next, a post-dipping step is performed to immerse the second conductive structure 22 in a surface treatment solution to passivate the palladium metal attached to the second conductive structure 22. In an exemplary embodiment, the surface treatment solution is WHE-5. After the post-immersion step, the second conductive structure 22 is cleaned with deionized water.

[0068] Next, a nickel chemical plating step is performed. The second conductive structure 22 is immersed in a first chemical plating solution to form a nickel layer 4A (eg, Fig.10 The first chemical plating solution includes nickel sulfate, sodium dihydrogen hypophosphite, a complexing agent, and sodium hydroxide. Among them, nickel sulfate is used to provide nickel ions, sodium dihydrogen hypophosphite is used as a reducing agent to reduce nickel ions, the complexing agent can avoid the formation of nickel hydroxide, and sodium hydroxide is used to maintain the pH value of the first chemical plating solution.

[0069] In an exemplary embodiment, the thickness of the nickel layer 4A is 5 micrometers. After the chemical nickel plating step, the nickel layer 4A is cleaned with deionized water.

[0070] Next, a palladium chemical plating step is performed. The nickel layer 4A is immersed in a second chemical plating solution to form a palladium layer 4B (eg Fig.10 The second chemical plating solution includes dichlorotetraamminepalladium (Pd(NH 3 ) 4 Cl 2 ) and sodium hypophosphite (NaH 2 PO 2 ) (reducing agent). In an exemplary embodiment, the thickness of the palladium layer 4B is 0.1 micrometers. After the chemical palladium plating step, the palladium layer 4B is cleaned with deionized water.

[0071] Next, a gold chemical exchanging step is performed. The palladium layer 4B is immersed in a third chemical plating solution to form a second gold layer 4 (such as Fig.10 The third chemical plating solution includes potassium gold cyanide (K[Au(CN) 2 ]), organic acid and reducing agent. In an exemplary embodiment, the thickness of the second gold layer 4 is 0.1 micrometer. After the chemical replacement gold step, the gold ions are first recovered, and then the second gold layer 4 is cleaned with deionized water, and the anti-plating tape F3 covering the first surface 1 can be removed.

[0072] It is worth noting that the above-mentioned chemical palladium plating step can be performed selectively, that is, the chemical palladium plating step can be omitted, and the chemical gold replacement step can be performed directly after the chemical nickel plating step.

[0073] In step S5, the light emitting diode chip 5 is disposed on the first gold layer 3 (eg Fig.11 In an exemplary embodiment, a gold-gold connection process is performed, and the light-emitting diode chip 5 is disposed on the first gold layer 3 through the gold connection member 5A, and can be electrically connected to the first conductive structure 21.

[0074] In step S6, a molding step is performed to form a packaging layer 6 (such as Figure 1 The packaging layer 6 covers the first conductive structure 21, the first gold layer 3 and the light-emitting diode chip 5 to block the outside world.

[0075] According to the above steps S1 to S6, the first gold layer 3 is formed by an electroplating process, and the thickness of the first gold layer 3 is greater than 1 micron, so it can have a good bonding force with the gold connector 5A. The second gold layer 4 is formed by a chemical plating process, and the second gold layer 4 completely covers the second conductive structure 22, so it can prevent the second conductive structure 22 from contacting with the outside and being oxidized or corroded. Therefore, the light-emitting diode packaging structure of the present application can have good reliability.

[0076] Beneficial Effects of Embodiments One of the beneficial effects of the present application is that the light-emitting diode packaging structure and the manufacturing method thereof provided in the present application can improve the reliability of the light-emitting diode packaging structure through the technical solutions of "the thickness of the first gold layer 3 is greater than 1 micron" and "the second gold layer 4 completely covers the second conductive structure 22".

[0077] Furthermore, the nickel layer 3A disposed between the first gold layer 3 and the first conductive structure 21 acts as a barrier layer to prevent the copper atoms in the first conductive structure 21 from diffusing into the first gold layer 3 and affecting the purity of the first gold layer 3. Similarly, the nickel layer 4A disposed between the second gold layer 4 and the second conductive structure 22 acts as a barrier layer to prevent the copper atoms in the second conductive structure 22 from diffusing into the second gold layer 4. In addition, the palladium layer 4B disposed between the nickel layer 4A and the second gold layer 4 can form an interface metal compound with the tin metal during soldering, thereby improving the bonding effect after soldering.

[0078] The contents disclosed above are only preferred feasible embodiments of the present application, and are not intended to limit the protection scope of the claims of the present application. Therefore, all equivalent technical changes made using the contents of the present application specification and drawings are included in the protection scope of the claims of the present application.

Claims

1. A light emitting diode packaging structure, characterized in that: The light emitting diode packaging structure comprises: A substrate having a first surface and a second surface opposite to each other; a conductive structure, comprising a first conductive structure and a second conductive structure electrically connected, wherein the first conductive structure is disposed on the first surface, and the second conductive structure is disposed on the second surface; a first gold layer disposed on the first conductive structure, wherein the thickness of the first gold layer is greater than 1 micron; a second gold layer, which is disposed on the second conductive structure, and the second gold layer completely covers the second conductive structure; a light emitting diode chip disposed on the first gold layer; and A packaging layer is disposed on the first surface and covers the first conductive structure, the first gold layer and the light emitting diode chip.

2. The light emitting diode packaging structure according to claim 1, characterized in that: The thickness of the second gold layer is less than 1 micron.

3. The light emitting diode packaging structure according to claim 1, characterized in that: A nickel layer is disposed between the first gold layer and the first conductive structure.

4. The light emitting diode packaging structure according to claim 1, characterized in that: A nickel layer is disposed between the second gold layer and the second conductive structure.

5. The light emitting diode packaging structure according to claim 4, characterized in that: A palladium layer is further disposed between the second gold layer and the nickel layer.

6. The light emitting diode packaging structure according to claim 1, characterized in that: A conductive layer is disposed between the substrate and the conductive structure.

7. The light emitting diode packaging structure according to claim 1, characterized in that: The light emitting diode chip is connected to the first gold layer via a gold connector.

8. A method for manufacturing a light emitting diode packaging structure, characterized in that: The manufacturing method of the light emitting diode packaging structure comprises: At least one through hole is formed on a substrate, wherein the through hole connects a first surface and a second surface of the substrate that are opposite to each other; Disposing a conductive structure on the substrate, the conductive structure comprising a first conductive structure disposed on the first surface and a second conductive structure disposed on the second surface; Performing an electroplating process to form a first gold layer on the first conductive structure, wherein the thickness of the first gold layer is greater than 1 micrometer; Performing a chemical plating process to form a second gold layer on the second conductive structure, wherein the second gold layer completely covers the second conductive structure; Disposing a light emitting diode chip on the first gold layer; and A packaging layer is disposed on the first surface to cover the first conductive structure, the first gold layer and the light emitting diode chip.

9. The method for manufacturing a light emitting diode package structure according to claim 8, characterized in that: The manufacturing method of the light emitting diode package structure further comprises: performing a sputtering process before arranging the conductive structure, and arranging a conductive layer on the first surface, the second surface and the hole wall of the through hole.

10. The method for manufacturing a light emitting diode package structure according to claim 8, characterized in that: After the second gold layer is formed, a gold-gold connection process is performed to place the light emitting diode chip on the first gold layer through a gold connection piece.

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