Printed wiring board and method for manufacturing same

Abstract

The present invention provides a printed wiring board having a via conductor that is difficult to separate from an insulating layer, and a method for manufacturing the same. A printed wiring board is provided with: a core substrate; and a stacked layer that is stacked on the core substrate. The stacked layer has: an insulating layer that is stacked on the core substrate; a hole penetrating the insulating layer in the thickness direction; and a via conductor filled in the hole. The via hole conductor is in a cylindrical shape.

Description

Technical Field

[0001] The present invention relates to a printed wiring board and a method for manufacturing the same. Background Art

[0002] In the past, a printed wiring board in which a build-up layer is stacked on at least one surface of a core substrate has been disclosed (for example, Patent Document 1). A via conductor is provided in the build-up layer. The via conductor is connected to the plated wiring on the surface of the core substrate and the plated wiring on the surface of the build-up layer. These plated wirings are electrically connected through the via conductor.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2017-084913 Summary of the invention

[0006] Problems to be solved by the invention

[0007] However, in recent years, along with the miniaturization of electronic devices, technical development for thinning printed wiring boards is underway. Technical development for thinning stacked layers is also being promoted, and technical development for making via conductors of small diameters is also being promoted. When the stacked layers are thin and the via conductors are of small diameters, the contact area between the via conductor and the surrounding insulating layer is small, and the contact area between the via conductor and the plated wiring is small. Therefore, there is a problem that the via conductor is easy to fall out of the insulating layer.

[0008] Solutions to Solve Problems

[0009] One embodiment of the present invention is a printed wiring board, wherein:

[0010] The printed wiring board comprises:

[0011] a core substrate; and

[0012] a stacking layer stacked on the core substrate,

[0013] The stacked layers have:

[0014] an insulating layer laminated on the core substrate;

[0015] A hole that penetrates the insulating layer in a thickness direction; and

[0016] A via conductor filled in the hole,

[0017] The via conductor is cylindrical in shape.

[0018] One embodiment of the present invention is a method for manufacturing a printed wiring board, wherein:

[0019] The method for manufacturing the printed wiring board comprises:

[0020] A step of preparing a laminate in which a stacked precursor layer including an insulating layer and a metallic base layer is stacked in sequence on a core substrate;

[0021] A step of disposing a first mask having a first through hole above the base layer side of the stacked body, and irradiating a first laser beam toward the base layer through the first through hole to form an opening in the base layer;

[0022] A step of disposing a second mask having a second through hole having a smaller diameter than the first through hole above the first through hole of the base layer, and irradiating a second laser beam toward the insulating layer through the opening to form a hole in the insulating layer; and

[0023] The step of plating the insulating layer having the hole formed therein and growing a plating film on the base layer and the hole to form a via-hole conductor and an upper layer.

[0024] Effects of the Invention

[0025] According to the present invention, it is difficult for the via conductor to come out of the insulating layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A cross section of a printed wiring board is shown.

[0027] Figure 2 Will Figure 1 Region II in FIG. 1 is shown enlarged.

[0028] Figure 3 The cross section of the boundary between the outer periphery of the via-hole conductor and the inner periphery of the hole is shown in an enlarged manner.

[0029] Figure 4 The cross section of the boundary between the outer periphery of the via-hole conductor and the inner periphery of the hole is shown in an enlarged manner.

[0030] Figure 5 The cross section of a via-hole conductor in a modified example is shown in an enlarged manner.

[0031] Figure 6 The cross section of the laminated body in one process of manufacturing the printed wiring board is shown.

[0032] Figure 7 Show Figure 6 A cross section of the laminate in a process after the process of.

[0033] Figure 8 Show Figure 7 A cross section of the laminate in a process after the process of.

[0034] Fig. 9 Show Figure 8 A cross section of the laminate in a process after the process of.

[0035] Fig.10 Show Fig. 9 A cross section of the laminate in a process after the process of.

[0036] Fig.11 Show Fig.10 A cross section of the laminate in a process after the process of.

[0037] Fig.12 Show Fig.11 A cross section of the laminate in a process after the process of.

[0038] Fig.13 Show Fig.12 A cross section of the laminate in a process after the process of. DETAILED DESCRIPTION

[0039] Hereinafter, the embodiments will be described with reference to the accompanying drawings. In the following, for the sake of convenience, the drawings referred to herein only simplify and show the main components necessary for describing the embodiments. Therefore, the printed wiring board 1 of the present invention can have any components not shown in the drawings. In addition, the dimensions of the components in the drawings do not faithfully represent the dimensions and dimensional ratios of the actual components.

[0040] [1. Printed wiring board]

[0041] Reference Figure 1 The printed wiring board 1 will be described.

[0042] The printed wiring board 1 is a multilayer substrate. The printed wiring board 1 has a core substrate 10 and a first build-up layer 20. It should be noted that the printed wiring board 1 can be formed as required. Figure 1 As shown, the first solder resist layer 40, the second buildup layer 50 and the second solder resist layer 70 are provided. Alternatively, the second solder resist layer 70, the second buildup layer 50, the core substrate 10, the first buildup layer 20 and the first solder resist layer 40 may be stacked in this order.

[0043] [1-1. Core substrate]

[0044] The core substrate 10 includes a base material 11 and conductor layers 12 and 13 .

[0045] The substrate 11 is in a flat plate shape. The substrate 11 has a first surface 11a and a second surface 11b on the opposite side of the first surface 11a. The first surface 11a and the second surface 11b face opposite to each other. The substrate 11 has a thickness from the first surface 11a to the second surface 11b. The direction from the first surface 11a to the second surface 11b and the opposite direction are the thickness direction.

[0046] The substrate 11 is formed of a raw material having insulating properties. Examples of such insulating raw materials include organic resins such as epoxy resins, bismaleimide-triazine resins, polyimide resins, polyphenylene ether (PPE) resins, polyphenylene oxide (PPO) resins, cyanate resins, and liquid crystal polymers. Two or more of these organic resins may also be mixed. Reinforcing materials may also be blended into one or more of these organic resins. Examples of reinforcing materials include cloth materials such as glass fiber, glass nonwoven fabrics, aramid fiber, aramid nonwoven fabrics, polyester fiber, and polyester nonwoven fabrics. Inorganic fillers such as barium sulfate, talc, clay, glass, calcium carbonate, and titanium may also be included in one or more of these organic resins.

[0047] The conductor layer 12 is laminated on the first surface 11a of the substrate 11. The conductor layer 13 is laminated on the second surface 11b of the substrate 11. The conductor layers 12 and 13 form a wiring pattern. The material of the conductor layers 12 and 13 is, for example, a conductive metal such as copper. The conductor layers 12 and 13 are composed of, for example, a metal plating layer such as copper plating. The thickness of the conductor layers 12 and 13 is preferably, for example, 18 μm or more and 100 μm or less.

[0048] It should be noted that the core substrate 10 may also be a multilayer structure. As an example of the multilayer structure, the following scheme can be cited. For example, the multilayer structure has a plurality of insulating layers, one or more internal conductor layers, and two surface conductor layers. The insulating layers are stacked in sequence. The internal conductor layer is sandwiched between these insulating layers. The two surface conductor layers are stacked on the surfaces 11a and 11b of the substrate 11, respectively, and are stacked on the two outermost surfaces of the stack composed of a plurality of insulating layers, respectively, like the conductor layers 12 and 13. The internal conductor layer and the surface conductor layer form a wiring pattern.

[0049] [1-2. Stacking layers]

[0050] The first stacked layer 20 has: an insulating layer 21 ; at least one via-hole conductor 22 ; and a surface conductor layer 23 .

[0051] The insulating layer 21 is stacked on the surface of the core substrate 10. That is, the insulating layer 21 covers the conductor layer 12 and also covers the first surface 11a of the substrate 11. In other words, the core substrate 10 has the conductor layer 12 on the surface in contact with the stacked layer 20. The thickness of the insulating layer 21, that is, the thickness from the surface 12d of the conductor layer 12 on the side opposite to the surface 12c in contact with the first surface 11a of the conductor layer 12 to the surface 21d of the insulating layer 21 on the side opposite to the core substrate 10, is, for example, 40 to 100 μm.

[0052] The insulating layer 21 is formed of a raw material having insulating properties. Examples of such insulating raw materials include organic resins such as epoxy resins, bismaleimide-triazine resins, polyimide resins, polyphenylene ether (PPE) resins, polyphenylene oxide (PPO) resins, cyanate resins, polytetrafluoroethylene (PTFE) resins, and liquid crystal polymers. Two or more of these organic resins may also be mixed. Reinforcing materials may also be blended into one or more of these organic resins. Examples of reinforcing materials include cloth materials such as glass fiber, glass nonwoven fabrics, aramid fibers, aramid nonwoven fabrics, polyester fibers, and polyester nonwoven fabrics. Inorganic fillers such as barium sulfate, talc, clay, glass, calcium carbonate, and titanium may also be included in one or more of these organic resins.

[0053] The via conductor 22 penetrates the insulating layer 21 in the thickness direction. Specifically, the insulating layer 21 has at least one hole 21a that penetrates the insulating layer 21 in the thickness direction, and the via conductor 22 is filled in each hole 21a. The material of the via conductor 22 is, for example, a conductive metal such as copper. The via conductor 22 is combined with the conductor layer 12 of the core substrate 10 and is electrically connected to the conductor layer 12.

[0054] In addition, when a plurality of via-hole conductors 22 are arranged, sufficient insulation can be ensured even when the pitch of these via-hole conductors 22 is 245 μm.

[0055] It should be noted that the stacked layer 20 may also include a base layer 24 between the insulating layer 21 and the upper layer 25. The base layer 24 preferably has electrical conductivity and is preferably a metal film.

[0056] Figure 2 yes Figure 1 A magnified view of region II in FIG. Figure 2 As shown in the figure, the surface 12a of the portion of the conductor layer 12 that the via-hole conductor 22 contacts becomes concave. That is, when the portion of the conductor layer 12 that the via-hole conductor 22 contacts becomes concave, the bottom 22a of the via-hole conductor 22 enters the concave state. The contact area between the conductor layer 12 and the via-hole conductor 22 becomes larger. As a result, the bonding force between the conductor layer 12 and the via-hole conductor 22 can be improved. In this case, it is preferable that the end surface of the via-hole conductor 22 on the conductor layer 12 side becomes convex. In this way, the bottom 22a of the via-hole conductor 22 is embedded in the concave surface 12a.

[0057] like Figure 1As shown in FIG. 1 , the via-hole conductor 22 is formed in a cylindrical shape around a central axis along the thickness direction of the insulating layer 21. Here, the cylindrical shape means that the diameter of the via-hole conductor 22 is uniform in the range of the thickness direction. The via-hole conductor 22 is in contact with the inner wall surface of the hole 21a in the entire range of the thickness direction. Figure 2 As shown, the inner wall surface of the hole 21a has a concavo-convex shape at a microscopic level, and the via-hole conductor 22 fills the concavo-convex shape of the inner wall surface of the hole 21a in the entire range of the thickness direction. That is, the concavo-convex shape is formed in the via-hole conductor 22, and the concavo-convex shape of the via-hole conductor 22 is meshed with the concavo-convex shape of the inner wall surface of the hole 21a without a gap.

[0058] Figure 3 as well as Figure 4 It is an enlarged view of a cross section of a boundary between the via-hole conductor 22 and the inner wall surface of the hole 21 a . Figure 4 The portion shown is Figure 3 The parts shown are in different locations. Figure 3 as well as Figure 4 As shown, the projections and recesses of the via-hole conductor 22 have at least one convex portion 22b and at least one convex portion 22c. The convex portions 22b and 22c protrude radially outward and penetrate the insulating layer 21. In other words, the convex portions 22b and 22c protrude radially outward. In addition, the convex portions 22b and 22c are configured to penetrate the insulating layer 21. In this case, the convex portion 22b is inclined toward the surface conductor layer 23. Alternatively, the convex portion 22b is inclined toward the upper layer 25. In further other words, the convex portion 22b is inclined relative to the side surface of the via-hole conductor 22, and its direction is toward the surface conductor layer 23 or the upper layer 25. The convex portion 22c is inclined toward the core substrate 10. In other words, the convex portion 22c is inclined relative to the side surface of the via-hole conductor 22, and its direction is toward the core substrate 10.

[0059] like Figure 1 As shown, the surface conductor layer 23 is stacked on the surface 21 d of the insulating layer 21 on the side opposite to the core substrate 10 in the insulating layer 21 . The surface conductor layer 23 forms a wiring pattern. The surface conductor layer 23 is electrically connected to the via conductor 22 .

[0060] The surface conductor layer 23 may also include a base layer 24 and an upper layer 25. Here, the upper layer 25 refers to a metal film located on the opposite side of the insulating layer 21 across the base layer 24 in the surface conductor layer 23. The upper layer 25 is a part of the metal film constituting the surface conductor layer 23. The base layer 24 and the upper layer 25 are sequentially stacked on the surface 21d of the insulating layer 21 on the side opposite to the core substrate 10 in the insulating layer 21. The thickness of the base layer 24 is, for example, greater than 2 μm and less than 17 μm. The base layer 24 and the upper layer 25 form a wiring pattern. The material of the base layer 24 and the upper layer 25 is, for example, a conductive metal such as copper.

[0061] The base layer 24 has an opening 24a at a position overlapping with the hole 21a. The inner edge of the opening 24a is located at a position overlapping with the opening edge of the hole 21a, or at a position closer to the outside than the opening edge of the hole 21a. The base layer 24 has a taper 24b around the opening 24a. Here, the area around the opening 24a refers to an area including the inner edge (or edge) of the opening 24a and extending from the inner edge to a predetermined width in the normal direction. The thickness of the taper 24b gradually decreases as it approaches the edge of the opening 24a. In other words, it is preferred that the base layer 24 becomes thicker as it approaches the direction of the normal to the outside from the edge of the opening 24a. When the base layer 24 is in a shape in which the thickness becomes thicker as it approaches the direction of the normal to the outside from the edge of the opening 24a, the probability that the taper 24b of the base layer 24 is difficult to peel off from the insulating layer 21 becomes higher. The vicinity of the tapered portion 24b of the base layer 24 is a location where multiple components such as the insulating layer 21, the via conductor 22, and the upper layer 25 contact each other. In the location where multiple components contact each other, stress is easily generated due to the difference in thermal expansion coefficient and Young's modulus of each component. In such a case, when the base layer 24 is a shape in which the thickness becomes thicker from the edge of the opening 24a toward the direction of the normal line to the outside, the stress that is easily generated near the edge of the opening 24a as the end of the tapered portion 24b can be reduced. In this case, it is particularly preferred that the thickness of the base layer 24 becomes thinner toward the edge of the opening 24a. In addition, it is preferred that the surface of the tapered portion 24b in contact with the upper layer 25 is convexly curved toward the upper layer 25 side. The upper layer 25 is connected to the via conductor 22 through the opening 24a, and the via conductor 22 and the upper layer 25 are integrated. The thickness of the portion overlapped by the tapered portion 24b in the upper layer 25 gradually decreases as it approaches the edge of the opening 24a. The angle θ of the tapered portion 24 b at the edge of the opening 24 a is, for example, greater than 45°, more specifically, preferably not less than 50° and not more than 80°.

[0062] The portion of the surface conductor layer 23 that overlaps with the via conductor 22 is a land having a diameter longer than the line width of the wiring pattern. The diameter of the land is preferably, for example, 200 μm or more and 250 μm or less.

[0063] As described above, the printed wiring board 1 may also have a second stacked layer 50. The second stacked layer 50 is located on the surface of the core substrate 10 on the opposite side to the surface where the first stacked layer 20 is located. The core substrate 10 may also have a conductor layer 13 on the surface in contact with the second stacked layer 50. The second stacked layer 50 has: an insulating layer 51; at least one via conductor 52; and a surface conductor layer 53. The second stacked layer 50 is arranged in the same manner as the first stacked layer 20. The insulating layer 51 of the second stacked layer 50 is equivalent to the insulating layer 21 of the first stacked layer 20, the via conductor 52 of the second stacked layer 50 is equivalent to the via conductor 22 of the first stacked layer 20, and the surface conductor layer 53 of the second stacked layer 50 is equivalent to the surface conductor layer 23 of the first stacked layer 20. In addition, the hole 51a of the insulating layer 51 is equivalent to the hole 21a of the insulating layer 21, the base layer 54 of the surface conductor layer 53 is equivalent to the base layer 24 of the surface conductor layer 23, the upper layer 55 of the surface conductor layer 53 is equivalent to the upper layer 25 of the surface conductor layer 23, and the opening 54a of the base layer 54 is equivalent to the opening 24a of the base layer 24. In addition, similarly to the base layer 24 having a tapered portion around the opening 24a, the base layer 54 has a tapered portion around the opening whose thickness gradually decreases toward the edge of the opening 54a.

[0064] [1-3. Solder resist layer]

[0065] The solder resist layers 40 and 70 are respectively stacked on both sides of the stacked body of the first stacked layer 20, the core substrate 10, and the second stacked layer 50. That is, the first solder resist layer 40 covers the surface conductor layer 23 and covers the surface 21d of the insulating layer 21 on the side of the insulating layer 21 opposite to the core substrate 10. The second solder resist layer 70 covers the surface conductor layer 53 and covers the surface 51d of the insulating layer 51 on the side of the insulating layer 51 opposite to the core substrate 10.

[0066] The first solder resist layer 40 has at least one opening 41. A portion of the surface conductor layer 23 overlaps with the opening 41, and the portion of the surface conductor layer 23 within the opening 41 is a terminal. The second solder resist layer 70 also has at least one opening 71, similarly to the first solder resist layer 40. A portion of the surface conductor layer 53 overlaps with the opening 71, and the portion of the surface conductor layer 53 within the opening 71 is a terminal.

[0067] [1-4. Modification example]

[0068] (1) Figure 1 In the example shown, the number of the first buildup layer 20 is 1. On the other hand, a plurality of first buildup layers 20 may be stacked between the core substrate 10 and the first solder resist layer 40 . Similarly, a plurality of second buildup layers 50 may be stacked between the core substrate 10 and the second solder resist layer 70 .

[0069] When there are n layers of the first stacked layer 20 counting from immediately above the core substrate 10, the via-hole conductors 22 of the second to n-th first stacked layers 20 are electrically connected to the surface conductor layer 23 of the immediately below first stacked layer 20. The same is true for the via-hole conductors 52 of the second stacked layer 50 which have n layers.

[0070] (2) Figure 2 In the example shown, the diameters of the via-hole conductor 22 and the hole 21a are uniform in the thickness direction. Figure 5 As shown in the figure, the diameter of the portion 21e of the hole 21a close to the conductor layer 12 gradually decreases as it approaches the conductor layer 12 from the opening 24a side, and the portion 21e is tapered. Correspondingly, the diameter of the portion of the via-hole conductor 22 close to the conductor layer 12 gradually decreases as it approaches the conductor layer 12 from the opening 24a side, and the portion 21e is tapered.

[0071] [1-5. Summary]

[0072] (1) If the diameter of the via conductor gradually decreases from the solder resist layer side toward the core substrate side as in the past, and the via conductor is truncated cone-shaped, the via conductor is easy to come out of the insulating layer. In contrast, the diameter of the via conductors 22 and 52 described above is the same in the thickness direction, and the via conductors 22 and 52 are cylindrical. Therefore, compared with the via conductors of the past, the via conductors 22 and 52 are difficult to come out of the insulating layers 21 and 51.

[0073] (2) The fact that the diameter of the via-hole conductor 22 is uniform in the thickness direction contributes to the improvement of the connection reliability between the via-hole conductor 22 and the conductor layer 12. The bonding area between the via-hole conductor 22 and the conductor layer 12 is larger than the bonding area between the via-hole conductor and the conductor layer in the past. Therefore, the via-hole conductor 22 is difficult to separate from the conductor layer 12, while the via-hole conductor in the past is easy to separate from the conductor layer. Similarly, the diameter of the via-hole conductor 52 is uniform in the thickness direction, so the via-hole conductor 52 is difficult to separate from the conductor layer 13.

[0074] (3) The difference in thermal expansion coefficient between the via-hole conductor 22 and the insulating layer 21 is a major factor in the separation of the via-hole conductor 22 from the conductive layer 12 . Even so, since the diameter of the via-hole conductor 52 is uniform in the thickness direction, the via-hole conductor 22 is unlikely to separate from the conductive layer 12 .

[0075] (4) The bottom 22a of the via-hole conductor 22 is convex, and the surface 12a of the conductor layer 12 is concave, and the bottom 22a of the via-hole conductor 22 is embedded in the concave surface 12a. This helps improve the electrical characteristics between the via-hole conductor 22 and the conductor layer 12. Specifically, the bonding area between the via-hole conductor 22 and the conductor layer 12 increases, so the resistance and conductivity near the boundary between the via-hole conductor 22 and the conductor layer 12 are stabilized. The same is true for the via-hole conductor 52 and the conductor layer 13.

[0076] (5) The boundary surface between the outer periphery of via-hole conductor 22 and the inner wall surface of hole 21a is formed in an uneven shape, so the via-hole conductor 22 and insulating layer 21 have high adhesion and adhesion, and via-hole conductor 22 is difficult to fall out of insulating layer 21. The same applies to via-hole conductor 52 and insulating layer 51.

[0077] (6) The convex-concave portion of the outer periphery of the via-hole conductor 22 has at least one convex portion 22b, which is inclined toward the upper layer 25, and the convex portion 22b penetrates the insulating layer 21 from the hole 21a. The convex portion 22b anchors the via-hole conductor 22 to the insulating layer 21. Therefore, the via-hole conductor 22 is difficult to escape from the hole 21a toward the upper layer 25, and on this basis, the via-hole conductor 22 is difficult to separate from the conductive layer 12. The same is true for the via-hole conductor 52.

[0078] (7) The convex-concave portion of the outer periphery of the via-hole conductor 22 has at least one convex portion 22c, which is inclined toward the core substrate 10 and penetrates the insulating layer 21 from the hole 21a. The convex portion 22c anchors the via-hole conductor 22 to the insulating layer 21. Therefore, the effect as an anchor is improved compared to the convex portion 22b that is inclined only toward the upper layer 25, and the via-hole conductor 22 is difficult to separate from the upper layer 25. The same is true for the via-hole conductor 52.

[0079] (8) The base layer 24 has the tapered portion 24b around the opening 24a, so the contact area between the base layer 24 and the upper layer 25 near the opening 24a is larger than that without the tapered portion 24b. It is possible to suppress the upper layer 25 from peeling off from the base layer 24 around the opening 24a, and the via-hole conductor 22 is less likely to come out of the insulating layer 21. The same is true for the via-hole conductor 52.

[0080] [2. Method for manufacturing printed wiring board]

[0081] Reference Figure 6~Figure 13 A method for manufacturing the printed wiring board 1 will be described.

[0082] [2-1. Preparation]

[0083] First, a laminate 10A is prepared. As the laminate 10A, a laminate in which a stacking precursor layer 20A is stacked on a core substrate 10 is used. If necessary, a stacking precursor layer 50A may be stacked on the core substrate 10 on the side opposite to the stacking precursor layer 20A in the core substrate 10. It should be noted that as the laminate 10A, Figure 6 The stacked precursor layer 20A has an insulating layer 21 and a base layer 24. The stacked precursor layer 50A has an insulating layer 51 and a base layer 54. The base layers 24 and 54 have not yet formed wiring patterns. No hole 21a is formed in the insulating layer 21, and no hole 51a is formed in the insulating layer 51. At this point in time, the thickness of the base layers 24 and 54 is, for example, greater than 3 μm and less than 18 μm. The thickness of the insulating layer 21 is, for example, 40 to 100 μm.

[0084] The preparation of the laminated body 10A is performed, for example, as in the following (1) or (2).

[0085] (1) Prepreg or resin film is laminated on both sides of the core substrate 10, and metal foil is laminated on the prepreg or resin film. Then, the metal foil, prepreg or resin film, and core substrate 10 are heated and pressurized to cure the prepreg or resin film and fix it to the core substrate 10 and the metal foil, thereby forming insulating layers 21, 51 and base layers 24, 54.

[0086] (2) A stacking sheet in which a metal foil is previously laminated on a resin film or the like is stacked on both surfaces of the core substrate 10 . The stacking sheet and the core substrate 10 are then heated and pressurized to cure the resin film or the like and fix it to the core substrate 10 , thereby forming the insulating layers 21 , 51 .

[0087] [2-2. Roughening]

[0088] Next, the surface of the base layer 24, 54 is roughened. Specifically, the surface of the base layer 24, 54 is etched. As a result, the surface of the base layer 24, 54 becomes rough and black, and the base layer 24, 54 becomes thinner. The thickness of the base layer 24, 54 after the surface treatment is, for example, 2 μm or more and 17 μm or less.

[0089] [2-3. First laser beam irradiation]

[0090] Next, if Figure 7 As shown, the laminate 10A is placed in a laser beam processing machine, and a mask 110 is placed between the laser oscillator of the laser beam processing machine and the base layer 24. The mask 110 has at least one circular through hole 111 that penetrates the mask 110. The diameter of the through hole 111 is, for example, 2 to 3 mm, more specifically, 2.4 mm.

[0091] Next, if Figure 8 As shown, a laser beam processing machine is used to irradiate the base layer 24 with a laser beam 150 through the through hole 111. An opening 24a is formed in the base layer 24 at the irradiation position of the laser beam 150. As described above, the base layer 24 has been roughened, so the laser beam 150 is not reflected by the base layer 24, but absorbed by the base layer 24.

[0092] The output of the laser beam 150 in the laser beam processing machine is, for example, 10 to 20 mJ / shot, more specifically, 16 mJ / shot. The diameter of the opening 24a is determined by the diameter of the through hole 111 and the output of the laser beam 150. The longer the diameter of the through hole 111, the longer the diameter of the opening 24a, and the higher the output of the laser beam 150, the longer the diameter of the opening 24a. For example, if the diameter of the through hole 111 is 2.4 mm and the output of the laser beam 150 is, for example, 16 mJ / shot, an opening 24a with a diameter of 100 μm is formed. It should be noted that the output of the laser beam 150 is also referred to as power.

[0093] After the laser beam 150 reaches the surface of the insulating layer 21 , the irradiation of the laser beam 150 is stopped.

[0094] In addition, when forming a plurality of via-hole conductors 22 , a plurality of openings 24 a are formed in the base layer 24 by changing the irradiation position of the laser beam 150 .

[0095] [2-4. Second laser beam irradiation]

[0096] Next, if Fig. 9 As shown in the figure, the mask 110 is replaced with the mask 120 and set. The mask 120 has at least one circular through hole 121 that penetrates the mask 120. The diameter of the through hole 121 is shorter than the diameter of the through hole 111 of the mask 110. The diameter of the through hole 121 is, for example, 1 / 3 or more and 1 / 2 or less of the diameter of the through hole 111, and more specifically, is 1.1 mm.

[0097] Next, if Fig.10As shown in the figure, the laser beam processing machine is used to irradiate the insulating layer 21 with a laser beam 160 through the through hole 121 and the opening 24a. As a result, a cylindrical hole 21a is formed in the insulating layer 21 at the irradiation position of the laser beam 160. The output of the laser beam 160 is, for example, 1 / 15 or more and 1 / 8 or less of the output of the laser beam 150 when the opening 24a is formed, and more specifically, 1.8 mJ / shot. The diameter of the formed hole 21a is shorter than the diameter of the opening 24a. The diameter of the hole 21a is determined by the diameter of the through hole 121 and the output of the laser beam 160. The longer the diameter of the through hole 121, the longer the diameter of the hole 21a, and the higher the output of the laser beam 160, the longer the diameter of the hole 21a. For example, if the opening 24a is formed under the above-mentioned appropriate conditions, the diameter of the through hole 121 is 1.1 mm, and the output of the laser beam 160 is, for example, 1.8 mJ / shot, then a hole 21a with a diameter of 80 μm is formed.

[0098] After the laser beam 160 reaches the surface of the conductor layer 12, the irradiation of the laser beam 160 is stopped. Immediately before the irradiation of the laser beam 160 is stopped, the laser beam 160 is incident on the surface of the conductor layer 12 for a short period of time, so that the surface of the conductor layer 12 is formed into a concave shape by the laser beam 160.

[0099] In the process of sequentially irradiating the base layer 24 and the insulating layer 21 with the laser beams 150 and 160 as described above, the laser beam 150 is incident on the periphery of the opening 24 a , so that the tapered portion 24 b is formed around the opening 24 a .

[0100] In addition, when forming a plurality of via-hole conductors 22 , a plurality of holes 21 a are formed in the insulating layer 21 by changing the irradiation position of the laser beam 160 .

[0101] [2-5. Processing of the base layer and insulating layer on the opposite side]

[0102] Next, the opening 54a is formed in the base layer 54 in the same manner as the opening 24a is formed in the base layer 24. Next, the hole 51a is formed in the insulating layer 51 in the same manner as the hole 21a is formed in the insulating layer 21.

[0103] [2-6. Removal of slag]

[0104] Next, the residues in the holes 21a and 51a are removed by, for example, plasma treatment or a permanganate aqueous solution. Fig.11 As shown, such a deslugging process expands hole 21a to a diameter equal to that of opening 24a, and expands hole 51a to a diameter equal to that of opening 54a.

[0105] [2-7. Plating]

[0106] Next, the laminate 10A having the openings 24a, 54a and the holes 21a, 51a formed therein is subjected to plating treatment. Fig.12 As shown, via-hole conductors 22 and 52 and metal plating layers 25A and 55A are formed entirely on both surfaces of the laminate 10A.

[0107] [2-8. Pattern]

[0108] Next, if Fig.13 As shown, wiring patterns are formed on the metal plating layers 25A and 55A and the base layers 24 and 54 .

[0109] Specifically, first, a solder resist is stacked on the metal plating layers 25A and 55A. After the solder resist is exposed, the solder resist is developed. When the metal plating layers 25A and 55A and the base layers 24 and 54 are etched using the solder resist as a mask, the metal plating layers 25A and 55A and the base layers 24 and 54 are formed into a wiring pattern. The remaining metal plating layer 25A is the upper layer 25 forming the wiring pattern, and the remaining metal plating layer 55A is the upper layer 55 forming the wiring pattern.

[0110] [2-9. Formation of solder resist layer]

[0111] Next, the first solder resist layer 40 is stacked on the insulating layer 21 and the upper layer 25 , and the second solder resist layer 70 is stacked on the insulating layer 51 and the upper layer 55 .

[0112] Through the above, the printed wiring board 1 is completed.

[0113] [2-10. Modification example]

[0114] (1) As described above, the wiring patterns of the base layers 24 and 54 and the upper layers 25 and 5 are formed by the subtractive method, but they may also be formed by MSAP (Modified Semi Additive Process).

[0115] (2) When there are multiple first stacked layers 20 and second stacked layers 50, after the process [2-8], a new insulating layer 21 and a base layer 24 are formed on the already provided first stacked layer 20, and a new insulating layer 51 and a base layer 54 are formed on the already provided second stacked layer 50. Then, the processes [2-4] to [2-8] are performed on the new insulating layers 21, 51 and the base layers 24, 54. After such a series of processes are performed once or multiple times, the process [2-9] is performed.

[0116] [2-11. Summary]

[0117] (1) The diameter of the through hole 121 through which the laser beam 160 passes is shorter than the diameter of the through hole 111. Therefore, the diameter of the hole 21a formed by the laser beam 160 is shorter than the diameter of the opening 24a formed by the laser beam 150. However, there is a case where the inner wall of the hole 21a is enlarged by the slag removal process after the hole 21a is formed, so it is highly likely that the diameters of the hole 21a and the opening 24a are close to or equal. At this time, it is better to set the output of the laser beam 160 to 1 / 5 to 1 / 100 of the output of the laser beam 150. In this way, the base layer 24 can be in a state where it does not extend inward from the edge of the hole 21a. As a result, the plating liquid in the hole 21a is easy to circulate. The metal plating grows well in the hole 21a, and the via conductor 22 is well formed. That is, it is difficult for voids, defects, etc. to be generated in the via conductor 22. The same is true for the via conductor 52. The via-hole conductors 22 and 52 easily form tiny metal crystals on the inner wall side of the hole 21a, and easily fill the unevenness formed on the inner wall of the hole 21a. In addition, the metal crystals have few defects from the vicinity of the inner wall of the hole 21a to the central axis of the via-hole conductors 22 and 52, and easily form a crystal structure with a neat kink structure.

[0118] (2) Under the output conditions of the laser beam 160 described above, when the hole 21a is advancing toward the conductor layer 12 during irradiation of the laser beam 160, the hole 21a is difficult to be enlarged by the laser beam 160. Therefore, the opening diameter of the hole 21a far from the base layer 24 is substantially equal to the opening diameter of the hole 21a close to the base layer 24, and the diameter of the hole 21a is formed uniformly in the thickness direction after the slag removal process, and the via-hole conductor 22 is formed uniformly in the thickness direction. Therefore, compared with the case where a conical hole is formed and filled with a conductor, the via-hole conductor 22 is difficult to come out of the insulating layer 21, and on this basis, the contact area between the via-hole conductor 22 and the conductor layer 12 can be increased. The same is true for the via-hole conductor 52.

[0119] (3) Generally, plating layers are difficult to adhere to liquid crystal polymers and polytetrafluoroethylene resins. Even when the insulating layer 21 is made of liquid crystal polymer or polytetrafluoroethylene resin, the via conductors 22 are difficult to come out of the insulating layer 21 if the above-described manufacturing method is used.

[0120] (4) The diameter of the through hole 121 through which the laser beam 160 passes is not less than 1 / 3 and not more than 1 / 2 of the diameter of the through hole 111 through which the laser beam 150 passes. The output of the laser beam 160 is not less than 1 / 15 and not more than 1 / 8 of the output of the laser beam 150 when forming the opening 24a. Therefore, even if the thickness of the insulating layer 21 is 40 to 100 μm, the difference between the opening diameter of the hole 21a close to the base layer 24 and the opening diameter of the hole 21a far from the base layer 24 can be made not more than 5 μm.

[0121] (5) The hole 21a and the via conductor 22 are formed so that their diameters are uniform within the range of the thickness direction. Therefore, if the opening diameter of the hole 21a away from the base layer 24 is equal to the opening diameter of the bottom of the hole in the case of a tapered shape, the diameter of the portion of the via conductor 22 close to the base layer 24 can be reduced. Along with this, the diameter of the land overlapping the via conductor 22 can also be reduced. In the case where there are multiple via conductors 22, the interval between the via conductors 22 can be shortened. Even if the diameter of the land is 225 μm or more and 250 μm or less, the pitch of the via conductors 22 is 245 μm, and the insulation between the lands and the insulation between the via conductors 22 are ensured.

[0122] (6) When the opening 24a is formed in the base layer 24, no complicated etching process is performed, so the process of forming the opening 24a in the base layer 24 can be simplified compared with the process using other methods such as the large window method and the conformal mask method. Here, the large window method refers to a method in which, after the opening is formed in the copper foil by etching, a hole with a diameter smaller than the opening is formed in the resin layer by laser beam processing. The copper window method refers to a method in which, after the opening is formed in the copper foil by etching, a hole with a diameter larger than the opening is formed in the resin layer by laser beam processing.

[0123] (7) Irradiation with the laser beams 150 and 160 is performed using the same laser beam processing machine. Therefore, the number of steps in the above-mentioned manufacturing method is small.

[0124] [3. Others]

[0125] The specific details such as the structure, construction, positional relationship and shape shown in the above-mentioned embodiment can be appropriately changed without departing from the scope of the gist of the present invention. In addition, the structure, construction, positional relationship and shape shown in the above-mentioned embodiment can be appropriately combined without departing from the scope of the gist of the present invention.

[0126] In one embodiment, (1) a printed wiring board comprises: a core substrate; and a stacked layer stacked on the core substrate, the stacked layer having: an insulating layer stacked on the core substrate; a hole penetrating the insulating layer in a thickness direction; and a via conductor filled in the hole, the via conductor being cylindrical in shape.

[0127] (2) In the printed wiring board according to (1) above, an inner wall surface of the hole has projections and depressions, and the via-hole conductor abuts against the inner wall surface.

[0128] (3) Based on the printed wiring board of (1) or (2) above, the stacked layer has a surface conductor layer on the insulating layer opposite to the core substrate, the via conductor has a side surface facing the inner wall surface of the hole, the side surface has at least one protrusion, and the protrusion is inclined in a manner toward the surface conductor layer.

[0129] (4) In the printed wiring board according to (3) above, the protrusion is inclined toward the core substrate.

[0130] (5) In the printed wiring board according to any one of (3) and (4), the surface conductor layer has a base layer and an upper layer, the base layer is located on the insulating layer side and has an opening at a position overlapping with the via conductor, and the inner edge of the opening is located at a position overlapping with the opening edge of the hole or at a position outside the opening edge of the hole.

[0131] (6) In the printed wiring board of (5) above, a region on the inner edge side of the opening has a tapered portion, and a thickness of the tapered portion gradually decreases toward the edge of the opening.

[0132] (7) In any one of the printed wiring boards described in (1) to (6), the core substrate includes a conductor layer on a surface in contact with the buildup layer, and a surface of a portion of the conductor layer in contact with the via conductor is concave.

[0133] In one embodiment, (8) a method for manufacturing a printed wiring board includes: preparing a laminate having stacked precursor layers sequentially including an insulating layer and a metal base layer overlapped on a core substrate; disposing a first mask having a first through hole above the base layer side of the laminate, and irradiating a first laser beam toward the base layer through the first through hole to form an opening in the base layer; disposing a second mask having a second through hole having a smaller diameter than the first through hole above the first through hole in the base layer, and irradiating a second laser beam toward the insulating layer through the opening to form a hole in the insulating layer; and plating the insulating layer having the hole formed therein, and growing a plating film on the base layer and the hole to form a via conductor and an upper layer.

[0134] (9) In the manufacturing method of (8) above, a diameter of the second through hole is not less than 1 / 3 and not more than 1 / 2 of a diameter of the first through hole.

[0135] (10) In the manufacturing method of (8) or (9) above, the output of the second laser beam is 1 / 15 or more and 1 / 8 or less of the output of the first laser beam.

[0136] (11) In any one of the manufacturing methods (8) to (10) above, the method for manufacturing a printed wiring board further includes a step of expanding the diameter of the hole so as not to exceed the inner edge of the opening of the base layer.

[0137] Description of Reference Numerals

[0138] 10-core substrate

[0139] 10A Laminated body

[0140] 20 First stacking layer

[0141] 20A Stacking Precursor Layer

[0142] 21 Insulation layer

[0143] 21a Hole

[0144] 22 Via conductor

[0145] 22b convex part

[0146] 22c convex part

[0147] 24 Basal layer

[0148] 24a Opening

[0149] 24b Cone

[0150] 25 Upper

[0151] 50 Second stacking layer

[0152] 50A stacked precursor layer

[0153] 51 Insulation layer

[0154] 51a hole

[0155] 52 Via conductor

[0156] 54 basal layer

[0157] 54a Opening

[0158] 55 Upper level.

Claims

1. A printed wiring board, wherein: The printed wiring board comprises: core substrate; as well as a stacking layer stacked on the core substrate, The stacked layers have: an insulating layer laminated on the core substrate; A hole that penetrates the insulating layer in a thickness direction; and A via conductor filled in the hole, The via conductor is cylindrical in shape.

2. The printed wiring board according to claim 1, wherein The inner wall surface of the hole has concavoconvexity, The via-hole conductor is in contact with the inner wall surface.

3. The printed wiring board according to claim 1 or 2, wherein: The stacked layer has a surface conductor layer on the insulating layer opposite to the core substrate, The via conductor has a side surface facing the inner wall surface of the hole, The side surface has at least one convex portion, The protrusion is inclined toward the surface conductor layer.

4. The printed wiring board according to claim 3, wherein The convex portion is inclined toward the core substrate.

5. The printed wiring board according to claim 3 or 4, wherein The surface conductor layer comprises a base layer and an upper layer. The base layer is located on the insulating layer side and has an opening at a position overlapping with the via conductor. The inner edge of the opening is located at a position overlapping with the opening edge of the hole or at a position outside the opening edge of the hole.

6. The printed wiring board according to claim 5, wherein The region on the inner edge side of the opening has a tapered portion, and the thickness of the tapered portion gradually decreases toward the opening edge.

7. The printed wiring board according to any one of claims 1 to 6, wherein The core substrate has a conductor layer on a surface in contact with the buildup layer, and a surface of a portion of the conductor layer in contact with the via conductor is concave.

8. A method for manufacturing a printed wiring board, wherein: The method for manufacturing the printed wiring board comprises: A step of preparing a laminate in which a stacked precursor layer including an insulating layer and a metallic base layer is stacked in sequence on a core substrate; A step of disposing a first mask having a first through hole above the base layer side of the stacked body, and irradiating a first laser beam toward the base layer through the first through hole to form an opening in the base layer; A step of disposing a second mask having a second through hole having a smaller diameter than the first through hole above the first through hole of the base layer, and irradiating a second laser beam toward the insulating layer through the opening to form a hole in the insulating layer; and The step of plating the insulating layer having the hole formed therein and growing a plating film on the base layer and the hole to form a via-hole conductor and an upper layer.

9. The method for manufacturing a printed wiring board according to claim 8, wherein: A diameter of the second through hole is not less than 1 / 3 and not more than 1 / 2 of a diameter of the first through hole.

10. The method for manufacturing a printed wiring board according to claim 8 or 9, wherein: The output of the second laser beam is 1 / 15 or more and 1 / 8 or less of the output of the first laser beam.

11. The method for manufacturing a printed wiring board according to any one of claims 8 to 10, wherein: The method for manufacturing a printed wiring board further includes the step of expanding the diameter of the hole so that the opening edge of the hole does not exceed the inner edge of the opening of the base layer.

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