Data prefetching control system and processor

Abstract

The invention discloses a data prefetching control system and a processor, and relates to the technical field of processors, the system comprises a fusion prefetcher module, a prefetching control module, a prefetching cache control module, a prefetching cache module and a multi-level cache module; wherein the fusion prefetcher module comprises prefetchers corresponding to all levels of caches in the multi-level cache module, and the prefetchers corresponding to at least two levels of caches in the multi-level cache module are different; according to the invention, by utilizing the arrangement of the fusion prefetcher module, prefetch algorithms of different cache levels are fused for use, so that the scheduling of complementary data among the algorithms is facilitated, a part of storage resources can be reused, data can be quickly interacted, the resource consumption is reduced, and the prefetch accuracy is improved; through the arrangement of the prefetching cache module and the multi-stage cache module, hierarchical storage of the prefetching data can be realized, and the prefetching cache module is utilized to store the prefetching data with relatively low prefetching priority, so that the data prefetching coverage rate can be improved, and a better data prefetching effect can be realized.

Description

Technical Field

[0001] The present invention relates to the technical field of processors, and in particular to a data pre-fetching control system and a processor. Background Art

[0002] Data prefetching refers to loading data that may be accessed in the future from the main memory (i.e., memory) into the cache or other fast storage area in advance during the operation of the processor (such as the central processing unit CPU), so as to reduce the latency time of the processor accessing the memory data and improve the efficiency of program execution. At present, the data prefetching function is widely used in various processors, and the effect of prefetching directly affects the performance of the processor. The prefetching algorithm is generally trained and decided based on the characteristics of data access, such as continuous access, interval access, and access with temporal and spatial association; at the same time, there are also requirements for the timing, frequency, and amount of data prefetching, otherwise it will cause problems such as waste of memory access bandwidth and cache (cache memory) pollution. In the multi-threaded data processing and superscalar out-of-order parallel execution architecture, data access and dependency are complex, and memory access modes are diverse, and the requirements for prefetching algorithms and prefetching control are also getting higher and higher.

[0003] At present, most processors use prefetching algorithms such as stream prefetching and offset prefetching with relatively clear characteristics. The prefetching in different levels of cache is relatively independent, and the prefetching decision is relatively conservative. Although a certain prefetching accuracy is guaranteed, the prefetching coverage is not very high, making it difficult to adapt to more complex application scenarios, and the improvement of system performance is limited. Therefore, how to improve the data prefetching coverage and achieve better data prefetching effect while ensuring accuracy is an urgent problem to be solved today. Summary of the invention

[0004] The purpose of the present invention is to provide a data pre-fetching control system and a processor, so as to improve the data pre-fetching coverage and achieve better data pre-fetching effect on the basis of ensuring the accuracy.

[0005] In order to solve the above technical problems, the present invention provides a data prefetch control system, comprising: a fusion prefetcher module, a prefetch control module, a prefetch cache control module, a prefetch cache module and a multi-level cache module; The fusion prefetcher module is used to receive a memory access request sent by a memory access execution unit; according to the memory access address in the memory access request, a prefetching decision is made using the prefetching algorithm of each prefetcher to obtain prefetching decision information; wherein the fusion prefetcher module includes prefetchers corresponding to each level of cache in the multi-level cache module, and the prefetchers corresponding to at least two levels of cache in the multi-level cache module are different; The prefetch control module is used to prioritize the prefetch decision information and store the prioritized prefetch decision information in a prefetch information queue; The prefetch cache control module is used to retrieve and determine the target decision information in the prefetch information queue; search and obtain the prefetch data corresponding to the target decision information from the memory; store each prefetch data in the corresponding multi-level cache module and prefetch cache module according to the prefetch priority of the target decision information; wherein the prefetch data corresponding to the target decision information is not stored in the multi-level cache module or the multi-level cache module and the prefetch cache module, and the prefetch priority corresponding to the prefetch data stored in the multi-level cache module is higher than the prefetch priority corresponding to the prefetch data stored in the prefetch cache module.

[0006] On the other hand, the prefetch control module is specifically used to prioritize the prefetch decision information according to the decision threshold and / or prefetcher mark corresponding to each prefetch decision information, and store the sorted prefetch decision information in the prefetch information queue.

[0007] In another aspect, the system further comprises:

[0008] The prefetch configuration module is used to store the prefetch parameters corresponding to each of the prefetch algorithms; wherein the prefetch parameters include at least one of a decision threshold, a prefetch priority, a prefetch degree and / or a prefetch data block.

[0009] On the other hand, the prioritizing the prefetch decision information according to the decision thresholds and / or prefetcher marks corresponding to the prefetch decision information, and storing the sorted prefetch decision information in the prefetch information queue, comprises: According to the prefetcher mark in each of the prefetch decision information, searching and determining the prefetch priority and decision threshold of each of the prefetch decision information from the prefetch configuration module; The prefetch decision information is sorted according to the prefetch priority and decision threshold of each of the prefetch decision information to obtain a decision information queue; wherein the prefetch priority of the first prefetch decision information of two adjacent prefetch decision information in the decision information queue is higher than the prefetch priority of the second prefetch decision information, or the decision threshold of the first prefetch decision information is higher than the decision threshold of the second prefetch decision information; The pre-fetch decision information in the decision information queue is stored in the pre-fetch information queue in a front-to-back order.

[0010] On the other hand, the prefetch control module is specifically used to receive each prefetch decision information group sent by the fusion prefetcher module; prioritize the prefetch decision information groups according to the decision threshold and / or prefetcher mark corresponding to each prefetch decision information group, and store the sorted prefetch decision information groups into the prefetch information queue; wherein, the prefetch decision information groups include prefetch decision information within the same prefetch area range.

[0011] On the other hand, the prefetch information queue includes a retrieval counter, a prefetch counter, a retrieval address pointer, a prefetch address pointer and a retrieval flag, a prefetch flag and a decision group flag corresponding to each of the prefetch decision information; wherein the decision group flag includes at least one of a group flag counter, a decision number and a valid flag; the retrieval counter is used to count the number of times to be retrieved, the prefetch counter is used to count the number of times to be prefetched, the retrieval address pointer is used to indicate the prefetch decision information currently retrieved in the prefetch information queue, the prefetch address pointer is used to indicate the prefetch decision information currently prefetched in the prefetch information queue, and the retrieval flag is used to indicate the prefetch decision information currently prefetched in the prefetch information queue. The prefetch information queue is used to indicate whether each prefetch decision information in the prefetch information queue has been retrieved, the prefetch flag is used to indicate whether each prefetch decision information in the prefetch information queue needs to be prefetched, the group tag counter is used to indicate the prefetch decision information group to which each prefetch decision information in the prefetch information queue belongs, the number of decisions is used to indicate the number of prefetch decision information in the prefetch decision information group to which each prefetch decision information in the prefetch information queue belongs, and the valid flag is used to indicate whether each prefetch decision information in the prefetch information queue is valid; the prefetch decision information group includes prefetch decision information in the same prefetch area range.

[0012] On the other hand, the retrieving and determining the target decision information in the pre-fetch information queue includes: If the retrieval counter is greater than 0, the current prefetch decision information in the prefetch information queue is read according to the retrieval address pointer; Detecting whether prefetch data corresponding to current prefetch decision information is stored in the multi-level cache module; If the pre-fetch data corresponding to the current pre-fetch decision information is stored, the search flag corresponding to the current pre-fetch decision information is set to the searched flag, and the pre-fetch flag corresponding to the current pre-fetch decision information is kept as the default no-pre-fetch flag; If the prefetch data corresponding to the current prefetch decision information is not stored, the current prefetch decision is used as the target decision information, the search flag corresponding to the current prefetch decision information is set to the searched flag, and the prefetch flag corresponding to the current prefetch decision information is set to the required prefetch flag.

[0013] On the other hand, searching for and obtaining pre-fetched data corresponding to the target decision information from the memory includes: If the prefetch counter is greater than 0, then reading the search flag and prefetch flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer; When the search flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is the searched flag and the prefetch flag is the prefetch-required flag, searching and acquiring the prefetch data corresponding to the current prefetch decision information from the memory; When the search flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is the searched flag and the prefetch flag is the no-prefetch flag, the value of the prefetch counter is reduced by 1, and the pointing position of the prefetch address pointer is updated; When the search flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is a default unsearched flag, the step of reading the search flag and prefetch flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is performed.

[0014] On the other hand, searching for and obtaining pre-fetched data corresponding to the target decision information from the memory includes: Determine the bus read data priority of each target decision information according to the priority information corresponding to each target decision information; wherein the priority information includes at least one of the prefetch priority, the decision threshold and the prefetch degree execution status; According to the order of the bus read data priorities from high to low, the pre-fetched data corresponding to each of the target decision information is searched and acquired from the memory using the target data reading method corresponding to each of the bus read data priorities.

[0015] On the other hand, storing each of the pre-fetched data into the corresponding multi-level cache module and pre-fetch cache module according to the pre-fetch priority of the target decision information includes: Determine target prefetch data from the prefetch data; wherein the target prefetch data includes prefetch data corresponding to prefetch decision information with the highest prefetch priority and a decision threshold greater than a multi-level cache threshold in each target prefetch decision information group, the target prefetch decision information group is a prefetch decision information group where the prefetch decision information corresponding to each of the prefetch data is located, and the prefetch decision information group includes prefetch decision information within the same prefetch area range; The target pre-fetch data is stored in the multi-level cache module, and non-target pre-fetch data in the pre-fetch data is stored in the pre-fetch cache module.

[0016] On the other hand, the pre-fetch cache control module is further used to configure the initial life cycle of each pre-fetched data according to the pre-fetch priority corresponding to each pre-fetched data in the pre-fetch cache module.

[0017] On the other hand, the prefetch cache control module is also used to receive the memory access request sent by the memory access execution unit; to retrieve whether the prefetch cache module stores access data corresponding to the memory access address in the memory access request; if the access data is stored in the prefetch cache module, the access data is obtained from the prefetch cache module and returned to the memory access execution unit; if the access data is not stored in the prefetch cache module and the multi-level cache module, the access data corresponding to the memory access address is obtained from the memory according to the memory access address in the memory access request and returned to the memory access execution unit.

[0018] On the other hand, the prefetch cache control module is further used to set the valid flag corresponding to the same group decision information in the prefetch decision information group corresponding to the access data in the prefetch information queue to an invalid flag if the access data is not stored in the prefetch cache module and the access data is stored in the multi-level cache module; wherein the same group decision information is prefetch decision information other than the prefetch decision information corresponding to the access data in the prefetch decision information group corresponding to the access data;

[0019] After obtaining the access data from the pre-fetch cache module and returning it to the memory access execution unit, it includes: storing the access data in the multi-level cache module, and setting the valid flag corresponding to the same group of decision information in the pre-fetch decision information group corresponding to the access data in the pre-fetch information queue to the invalid flag.

[0020] In another aspect, the system further comprises: The memory access execution unit is used to generate the memory access request according to the memory access instruction information received from the processor; and send the memory access request to the fusion prefetcher module, the prefetch cache control module and the multi-level cache module; The multi-level cache module is also used to detect whether access data corresponding to the memory access address in the memory access request is stored in each level of cache based on the received memory access request; if so, the stored access data is returned to the memory access execution unit, and the corresponding cache hit information is sent to the pre-fetch cache control module; if not, the corresponding cache miss information is sent to the pre-fetch cache control module.

[0021] In addition, the present invention also provides a processor, including the data pre-fetch control system as described above.

[0022] A data prefetch control system provided by the present invention comprises: a fusion prefetcher module, a prefetch control module, a prefetch cache control module, a prefetch cache module and a multi-level cache module; the fusion prefetcher module is used to receive a memory access request sent by a memory access execution unit; according to the memory access address in the memory access request, a prefetching algorithm of each prefetcher is used to make a prefetching decision to obtain prefetching decision information; wherein the fusion prefetcher module comprises prefetchers corresponding to each level of cache in the multi-level cache module, and the prefetchers corresponding to at least two levels of cache in the multi-level cache module are different; the prefetch control module is used to prioritize the prefetching decision information and The sorted prefetch decision information is stored in a prefetch information queue; a prefetch cache control module is used to retrieve and determine the target decision information in the prefetch information queue; the prefetch data corresponding to the target decision information is searched and obtained from the memory; according to the prefetch priority of the target decision information, each prefetch data is stored in the corresponding multi-level cache module and prefetch cache module; wherein the prefetch data corresponding to the target decision information is not stored in the multi-level cache module or the multi-level cache module and the prefetch cache module, and the prefetch priority corresponding to the prefetch data stored in the multi-level cache module is higher than the prefetch priority corresponding to the prefetch data stored in the prefetch cache module.

[0023] It can be seen that the present invention utilizes the setting of the fusion prefetcher module to integrate the prefetching algorithms of different cache levels, which facilitates the scheduling of complementary data between algorithms and can reuse a part of the storage resources, which can quickly exchange data, reduce resource consumption, and improve prefetching accuracy; and through the setting of the prefetch cache module and the multi-level cache module, it can realize the hierarchical storage of prefetched data, and utilize the prefetch cache module to store prefetched data with relatively low prefetching priority, which can improve the data prefetching coverage and achieve better data prefetching effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0025] Figure 1 A structural block diagram of a data pre-fetching control system provided by an embodiment of the present invention; Figure 2 A schematic diagram of the structure of another data pre-fetching control system provided by an embodiment of the present invention; Figure 3 A flow chart of data prefetch control of another data prefetch control system provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0027] Please refer to Figure 1 , Figure 1 A structural block diagram of a data pre-fetch control system provided by an embodiment of the present invention. The system may include: a fusion pre-fetcher module 10, a pre-fetch control module 20, a pre-fetch cache control module 30, a pre-fetch cache module 40 and a multi-level cache module 50; The fusion prefetcher module 10 is used to receive a memory access request sent by the memory access execution unit; according to the memory access address in the memory access request, the prefetching algorithm of each prefetcher is used to make a prefetching decision to obtain prefetching decision information; wherein the fusion prefetcher module 10 includes prefetchers corresponding to each level of cache in the multi-level cache module 50, and the prefetchers corresponding to at least two levels of cache in the multi-level cache module 50 are different; The prefetch control module 20 is used to prioritize the prefetch decision information and store the prioritized prefetch decision information into the prefetch information queue; The prefetch cache control module 30 is used to retrieve and determine the target decision information in the prefetch information queue; to search and obtain the prefetch data corresponding to the target decision information from the memory; and to store each prefetch data in the corresponding multi-level cache module 50 and prefetch cache module 40 according to the prefetch priority of the target decision information; wherein the prefetch data corresponding to the target decision information is not stored in the multi-level cache module 50 or the multi-level cache module 50 and the prefetch cache module 40, and the prefetch priority corresponding to the prefetch data stored in the multi-level cache module 50 is higher than the prefetch priority corresponding to the prefetch data stored in the prefetch cache module 40.

[0028] It can be understood that the memory access execution unit (Load–Store Unit, LSU) in this embodiment can be a unit set in the processor for receiving memory access instruction information issued by the processor instruction pipeline and performing memory access operations, that is, the memory access execution unit can generate corresponding memory access requests based on the memory access instruction information received from the processor to obtain corresponding memory data. For example, the memory access execution unit can use its internal memory management unit (Memory Management Unit, MMU) to convert the virtual address into a physical address (that is, the memory access address in the memory access request) to access data in the memory.

[0029] The multi-level cache module 50 in this embodiment may be a cache (such as a cache) of different levels conventionally set in a processor (such as a central processing unit CPU). For example, the multi-level cache module 50 may include two levels of cache, such as Figure 2 The first level cache (L1Cache) and the second level cache (L2Cache) are shown; the multi-level cache module 50 can also have three or more levels of cache, and this embodiment does not impose any limitation on this.

[0030] Accordingly, the fused prefetcher module 10 in this embodiment can be a module fused from two or more prefetchers (Prefetcher) provided with corresponding prefetching algorithms, and each prefetcher in the fused prefetcher module 10 shares a memory access address interface and part of the historical data storage (such as the data in the prefetch cache module 40). The specific number of prefetchers in the fused prefetcher module 10 in this embodiment can be set by the designer according to practical scenarios and user needs. For example, in this embodiment, each prefetcher can be provided with a prefetching algorithm, and the fused prefetcher module 10 includes prefetchers corresponding to each level of cache in the multi-level cache module 50, and the prefetchers corresponding to at least two levels of cache in the multi-level cache module 50 are different; Figure 2 As shown, when the multi-level cache module 50 includes two levels of cache, the fusion prefetcher module 10 may include four prefetchers (prefetchers 1-4), namely, two prefetchers corresponding to the first level cache and two prefetchers corresponding to the second cache.

[0031] Similarly, the prefetching algorithm and fusion architecture of each prefetcher in the fusion prefetcher module 10 can be set by the designer. As long as the fusion prefetcher module 10 can use the prefetching algorithm of each prefetcher to make prefetching decisions, so that the prefetchers in the fusion prefetcher module 10 can be relatively independent and complement each other, this embodiment does not impose any restrictions on this.

[0032] It should be noted that the prefetch control module 20 (Pref_Ctrl) in this embodiment can prioritize the prefetch decision information output by the fusion prefetcher module 10 according to the configuration of each prefetch algorithm (such as prefetch parameters), and store the sorted prefetch decision information in the prefetch information queue, so that the prefetch decision information with a high prefetch priority can be processed first. For example, the prefetch control module 20 is specifically used to prioritize the prefetch decision information according to the decision threshold and / or prefetcher mark corresponding to each prefetch decision information, and store the sorted prefetch decision information in the prefetch information queue; for example, when the prefetch priority of a prefetch algorithm set in each prefetcher is different, the prefetch control module 20 can determine the prefetch priority corresponding to each prefetch decision information according to the prefetcher mark in each prefetch decision information and sort it; or, when the decision thresholds of all or part of the different prefetch algorithms are different, the prefetch control module 20 can determine the prefetch priority corresponding to each prefetch decision information according to the decision threshold corresponding to each prefetch decision information and sort it.

[0033] In other embodiments, the prefetch control module 20 may also determine the prefetch priority and decision threshold of each prefetch decision information according to the prefetcher mark in each prefetch decision information; sort the prefetch decision information according to the prefetch priority and decision threshold of each prefetch decision information to obtain a decision information queue; store the prefetch decision information in the decision information queue in a front-to-back order into the prefetch decision queue; wherein, of two adjacent prefetch decision information in the decision information queue, the prefetch priority of the previous prefetch decision information is higher than the prefetch priority of the next prefetch decision information, or the decision threshold of the previous prefetch decision information is greater than the decision threshold of the next prefetch decision information, such as two prefetch decision information with the same prefetch priority are sorted according to the decision threshold, and two prefetch decision information with the same prefetch priority and prefetch decision information are sorted according to the order of receipt.

[0034] For example, if Figure 2As shown, in order to facilitate the priority sorting of the prefetch control module 20, the data prefetch control system provided in this embodiment may also include a prefetch configuration module for storing the prefetch parameters corresponding to each prefetch algorithm, so that the prefetch control module 20 can search and determine the prefetch parameters of the corresponding prefetch algorithm from the prefetch configuration module according to the prefetcher flag in the prefetch decision information; wherein the prefetch parameters include at least one of the decision threshold, prefetch priority, prefetch degree and / or prefetch data block. For example, the prefetch control module 20 can search and determine the prefetch priority and decision threshold of each prefetch decision information from the prefetch configuration module according to the prefetcher flag in each prefetch decision information; sort the prefetch decision information according to the prefetch priority and decision threshold of each prefetch decision information to obtain a decision information queue; store the prefetch decision information in the decision information queue in the prefetch information queue in a front-to-back order.

[0035] Accordingly, the specific values ​​of the prefetch parameters corresponding to each prefetch algorithm in the prefetch control module 20 can be set by the designer or user according to the needs, so that the prefetch algorithm in each prefetcher in the fusion prefetcher module 10 can make prefetch decisions according to the corresponding prefetch parameters (such as decision threshold, prefetch degree and prefetch data block). The prefetch control module 20 can also coordinate the prefetch configuration module to complete the reading and writing process of the prefetch parameters; for example, the fusion prefetcher module 10 can train and optimize the prefetch algorithms in each prefetcher according to the hit feedback information of the prefetch data (such as the feedback information of the processor access hit and miss), and obtain the updated prefetch parameters; the prefetch control module 20 can use the updated prefetch parameters to store and update the prefetch parameters of the corresponding prefetch algorithm stored in the prefetch configuration module.

[0036] In other embodiments, the prefetch control module 20 can be specifically used to receive each prefetch decision information group sent by the fusion prefetcher module 10; prioritize the prefetch decision information groups according to the decision threshold and / or prefetcher mark corresponding to each prefetch decision information group, and store the prioritized prefetch decision information groups in the prefetch information queue; wherein the prefetch decision information group includes the prefetch decision information of the same prefetch area range (such as the same cache line); that is, in order to facilitate reading of associated prefetch data from the memory, the prefetch control module 20 can also prioritize each prefetch decision information group according to the decision threshold and / or prefetcher mark of each prefetch decision information in each prefetch decision information group, such as prioritizing each prefetch decision information group according to the maximum prefetch priority within the group corresponding to each prefetch decision information group, and prioritizing each prefetch decision information group within the group according to the prefetch priority and decision threshold of each prefetch decision information in the prefetch decision information group.

[0037] Among them, the prefetch information queue in this embodiment can use a cyclic read and write memory (such as a random access memory RAM). The prefetch information queue is not only used to store prefetch decision information, but also can maintain a retrieval counter (ck_cnt), a prefetch counter (prf_cnt) and corresponding read-write address pointers, namely, a retrieval address pointer (ck_addr_wr / rd) and a prefetch address pointer (prf_addr_wr / rd); the retrieval counter and the prefetch counter can count the number of decisions to be retrieved and to be prefetched, and the corresponding values ​​are updated as the prefetch decision information is written, retrieved and read, and prefetched; when new prefetch decision information is written to the prefetch information queue, the corresponding retrieval flag (ck_flag) and prefetch flag (pre_flag) are also stored at the same time, such as the default values ​​of 0; and the corresponding decision group tags, such as a group tag counter (grp_cnt), a decision number (grp_num) and a valid tag (grp_valid), etc. The prefetch decision information in the same prefetch area range can be classified into the same group (such as the above-mentioned prefetch decision information group).

[0038] That is to say, the prefetch information queue may include a retrieval counter, a prefetch counter, a retrieval address pointer, a prefetch address pointer, and a retrieval flag, a prefetch flag, and a decision group flag corresponding to each prefetch decision information; wherein the decision group flag includes at least one of a group flag counter, a decision number, and a valid flag; the retrieval counter is used to count the number of times to be retrieved, the prefetch counter is used to count the number of times to be prefetched, the retrieval address pointer is used to indicate the prefetch decision information currently retrieved in the prefetch information queue, the prefetch address pointer is used to indicate the prefetch decision information currently prefetched in the prefetch information queue, the retrieval flag is used to indicate whether each prefetch decision information in the prefetch information queue has been retrieved, the prefetch flag is used to indicate whether each prefetch decision information in the prefetch information queue needs to be prefetched, the group flag counter is used to indicate the prefetch decision information group to which each prefetch decision information in the prefetch information queue belongs, the decision number is used to indicate the number of prefetch decision information in the prefetch decision information group to which each prefetch decision information in the prefetch information queue belongs, and the valid flag is used to indicate whether each prefetch decision information in the prefetch information queue is valid; the prefetch decision information group includes prefetch decision information in the same prefetch area range.

[0039] Correspondingly, the prefetch cache control module 30 (PCache_Ctrl) in this embodiment can use the prefetch decision information in the prefetch information queue to retrieve and determine the target decision information in the prefetch information queue and obtain the prefetch data corresponding to the target decision information from the memory, so as to store each prefetch data in the corresponding multi-level cache module 50 and prefetch cache module 40 (PCache) according to the prefetch priority of the target decision information, thereby realizing hierarchical storage of prefetch data.

[0040] For example, in the above-mentioned process of retrieving and determining the target decision information in the prefetch information queue, the prefetch cache control module 30 can read the current prefetch decision information in the prefetch information queue according to the retrieval address pointer if the retrieval counter is greater than 0; detect whether the multi-level cache module 50 (or the multi-level cache module 50 and the prefetch cache module 40) stores the prefetch data corresponding to the current prefetch decision information; if the prefetch data corresponding to the current prefetch decision information is stored, set the retrieval flag corresponding to the current prefetch decision information to the retrieved flag (such as 1), and keep the prefetch flag corresponding to the current prefetch decision information as the default no-prefetch flag (such as 0); if the prefetch data corresponding to the current prefetch decision information is not stored, use the current prefetch decision as the target decision information, set the retrieval flag corresponding to the current prefetch decision information to the retrieved flag, and set the prefetch flag corresponding to the current prefetch decision information to the required-prefetch flag (such as 1).

[0041] Correspondingly, in the above-mentioned process of searching for the prefetch data corresponding to the target decision information from the memory, the prefetch cache control module 30 can read the retrieval flag and the prefetch flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer when the prefetch counter is greater than 0; when the retrieval flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is a retrieved flag and the prefetch flag is a prefetch-required flag, search and obtain the prefetch data corresponding to the current prefetch decision information from the memory; when the retrieval flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is a retrieved flag and the prefetch flag is a prefetch-required flag, reduce the value of the prefetch counter by 1 and update the pointing position of the prefetch address pointer; when the retrieval flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is a default unretrieved flag, directly or after waiting for a certain period of time, execute the step of reading the retrieval flag and the prefetch flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer.

[0042] Furthermore, since one of the prefetched data corresponding to multiple prefetch decision information (i.e., prefetch decision information group) within the same prefetch area is hit, the probability of hitting other data is low; when the multi-level cache module 50 stores the prefetched data corresponding to the current prefetch decision information, the prefetch cache control module 30 can not only set the retrieval flag corresponding to the current prefetch decision information to the retrieved flag, but also set the valid flag corresponding to other prefetch decision information (i.e., the same group decision information) in the prefetch decision information group where the current prefetch decision information is located to an invalid flag (such as 0) to avoid prefetching invalid prefetch decision information or causing the corresponding prefetch data to be replaced in time during subsequent cache updates.

[0043] That is, when ck_cnt (retrieval counter) is greater than 0, it indicates that there is prefetch decision information to be retrieved, and the prefetch cache control module 30 can read the pointed prefetch decision information (i.e., the current prefetch decision information) according to the retrieval address pointer (ck_addr_wr / rd), and in the multi-level cache module 50 (such as Figure 2 The first-level cache and the second-level cache in the prefetch information queue are searched (for example, different caches are selected for search according to whether the cache is inclusive or exclusive in the actual application). If there is no hit, the pre_flag (prefetch flag) at the corresponding position in the prefetch information queue is updated to 1, indicating that the current decision needs to perform prefetch; otherwise, no operation is required, and the pre_flag is kept unchanged at the default value of 0. Regardless of whether there is a hit or not, the ck_flag (search flag) is set to 1. Continue searching until ck_cnt is 0.

[0044] At the same time, when pre_cnt (prefetch counter) is greater than 0, the prefetch cache control module 30 reads the pointed prefetch decision information according to the prefetch address pointer (pre_addr_wr / rd). If its ck_flag value is 0, it indicates that the current decision has not yet completed the retrieval verification, and the reading will continue when the current retrieval verification is completed; if its ck_flag value is 1 and its pre_flag is also 1, the prefetch cache control module 30 parses the prefetch decision information and searches for the corresponding prefetch data from the memory; if its ck_flag value is 1, but its pre_flag is 0, it indicates a redundant prefetch decision, no prefetch is required, and the next prefetch queue information can be read until pre_cnt is 0.

[0045] Further, in the above process of searching for the prefetch data corresponding to the target decision information from the memory, the prefetch cache control module 30 can determine the bus read data priority of each target decision information according to the priority information corresponding to each target decision information; wherein the priority information includes at least one of the prefetch priority, the decision threshold and the prefetch degree execution status; according to the order of the bus read data priority from high to low, the target data reading method corresponding to each bus read data priority is adopted to search for the prefetch data corresponding to each target decision information from the memory. For example, in the above process of searching for the prefetch data corresponding to the current prefetch decision information from the memory, the prefetch cache control module 30 can obtain its prefetch priority and decision threshold from the prefetch configuration module according to the prefetcher tag of the current prefetch decision information, and adjust the data reading configuration such as the bus read data priority and the burst length according to the prefetch priority, the decision threshold and the prefetch degree execution status, so as to ensure that the prefetch data with high bus read data priority can be returned quickly, and the prefetch data with low bus read data priority can coordinate the bus bandwidth and be returned in segments step by step.

[0046] Correspondingly, the specific manner in which each prefetch data is stored in the corresponding multi-level cache module 50 and prefetch cache module 40 according to the prefetch priority of the target decision information can be set by the designer according to the usage scenario and user needs. For example, the prefetch control module 20 can directly store each prefetch data in the corresponding multi-level cache module 50 and prefetch cache module 40 according to the prefetch priority or the prefetch priority and decision threshold corresponding to each prefetch data. For example, prefetch data with a prefetch priority greater than the set priority is directly stored in the corresponding first-level cache in the multi-level cache module 50; and prefetch data with a prefetch priority not greater than the priority is stored in the prefetch cache module 40.

[0047] In other embodiments, since one of the prefetched data corresponding to multiple prefetch decision information (i.e., prefetch decision information groups) within the same prefetch area has a hit, the hit probability of other data is low; therefore, the prefetch control module 20 can determine the target prefetch data from the prefetch data; store the target prefetch data in the multi-level cache module 50, and store the non-target prefetch data in the prefetch data in the prefetch cache module 40; wherein the target prefetch data can be the prefetch data with the highest prefetch accuracy within each prefetch area, such as the target prefetch data can include the prefetch data corresponding to the prefetch decision information with the highest prefetch priority in each target prefetch decision information group, or the prefetch data corresponding to the prefetch decision information with the highest prefetch priority and a decision threshold greater than the multi-level cache threshold in each target prefetch decision information group; the target prefetch decision information group is the prefetch decision information group where the prefetch decision information corresponding to each prefetch data is located, and the prefetch decision information group includes the prefetch decision information within the same prefetch area.

[0048] Furthermore, the prefetch cache control module 30 can also be used to configure the initial life cycle of each prefetch data according to the prefetch priority corresponding to each prefetch data in the prefetch cache module 40, so as to facilitate the update and replacement of data in the prefetch cache module 40, such as the initial life cycle corresponding to the prefetch data with a high prefetch priority can be greater than or equal to the prefetch data with a low prefetch priority; for example, when the prefetch cache control module 30 stores prefetch data in the prefetch cache module 40, different life cycle length counts (such as clock counts and memory access counts, etc.) can be set according to the prefetch priority; when the count value is cleared to zero, it indicates that the hit probability is low and the data can be replaced in subsequent cache updates.

[0049] It should be noted that in this embodiment, a pre-fetch cache module 40 is set up independently of the multi-level cache module 50, which is used to store pre-fetched data with relatively low pre-fetch priority. The caches at all levels of the multi-level cache module 50 can be shared, and the cache size can be configured according to demand, which reduces resource and control overhead and shares the impact of pre-fetched data on the multi-level cache module 50. The system provided by this embodiment can not only realize the data pre-fetch process corresponding to the above-mentioned memory access request, such as Figure 3 The pre-fetch process on the left side of the middle diagram can also implement the memory access process of the additionally set pre-fetch cache module 40 corresponding to the memory access request.

[0050] For example, the pre-fetch cache control module 30 can also be used to receive a memory access request sent by the memory access execution unit; retrieve whether the pre-fetch cache module 40 stores access data corresponding to the memory access address in the memory access request; if the pre-fetch cache module 40 stores access data, the access data is obtained from the pre-fetch cache module 40 and returned to the memory access execution unit; if the pre-fetch cache module 40 and the multi-level cache module 50 do not store access data, then according to the memory access address in the memory access request, the access data corresponding to the memory access address is obtained from the memory and returned to the memory access execution unit, and the memory access address can also be stored in the multi-level cache module 50. Correspondingly, if the pre-fetch cache module 40 does not store access data, but the multi-level cache module 50 stores access data, the multi-level cache module 50 can return the access data.

[0051] Accordingly, the system provided in this embodiment may further include a memory access execution unit; the memory access execution unit may be used to generate a memory access request according to the memory access instruction information received from the processor; and send the memory access request to the fusion prefetcher module 10, the prefetch cache control module 30, and the multi-level cache module 50. The multi-level cache module 50 in this embodiment may also be used to detect whether the access data corresponding to the memory access address in the memory access request is stored in the cache at each level according to the received memory access request; if so, the stored access data is returned to the memory access execution unit, and the corresponding cache hit information is sent to the prefetch cache control module 30; if not, the corresponding cache miss information is sent to the prefetch cache control module 30; thereby realizing the normal memory access process of the multi-level cache module 50 corresponding to the memory access request.

[0052] For example, if Figure 3 As shown, the memory access execution unit can generate a memory access request including a memory access address according to the information of the memory access instruction of the processor, and send it to the three paths of the fusion prefetcher module 10, the prefetch cache control module 30 and the multi-level cache module 50 for processing, so as to realize the data prefetch process and the memory access process of the multi-level cache module 50 and the prefetch cache module 40. Figure 2As shown, the memory access request is sent to the first-level cache of the multi-level cache module 50 for normal data memory access operations. When the memory access hits, the corresponding data (i.e., the access data) is directly returned, and when it misses, the memory access continues to the second-level cache of the next level; when the second-level cache hits, the data is directly returned, and when it misses, the memory access processing can be uniformly performed through the pre-fetch cache control module 30, which is convenient for unified priority control and is faster. The hit and miss indication information of the multi-level cache module 50 will be transmitted to the pre-fetch cache control module 30 to facilitate its cache data management of the pre-fetch cache module 40, and fed back to the fusion pre-fetcher module 10 for training and optimization of the pre-fetch algorithm.

[0053] Correspondingly, the memory access request is sent to the pre-fetch cache control module 30 to retrieve the pre-fetch cache module 40, and the retrieval process can be executed synchronously and in parallel with the memory access process of the multi-level cache module 50. When the pre-fetch cache module 40 hits, the corresponding data can be directly and quickly returned, and the hit data is backfilled and updated to the cache of the multi-level cache module 50 (such as different according to the inclusive or exclusive mode), and the data corresponding to the same group of decision information in the pre-fetch cache module 40 and the multi-level cache module 50 are retrieved according to the group tag counter (grp_cnt) and the number of decisions (grp_num), and the valid tag (grp_valid) is set to 0 (i.e., invalid mark). If the pre-fetch cache module 40 does not hit, the memory access information is generated according to the memory access address, the bus read data priority is set to the highest, and the hit or miss indication information of the multi-level cache module 50 is waited for; if the multi-level cache module 50 hits, the memory access information is cancelled, and the data corresponding to the same group decision information in the pre-fetch cache module 40 is retrieved according to the group tag counter and the number of decisions, and the valid tag (grp_valid) is set to 0. If the multi-level cache module 50 does not hit, the memory access information is used to quickly open the memory access request; the access data found in the memory is directly returned to the application, and the multi-level cache module 50 is backfilled.

[0054] That is to say, if no access data is stored in the prefetch cache module 40 and access data is stored in the multi-level cache module 50, the prefetch cache control module 30 can also be used to set the valid flag corresponding to the same group decision information in the prefetch decision information group corresponding to the access data in the prefetch information queue to an invalid flag; wherein the same group decision information is prefetch decision information other than the prefetch decision information corresponding to the access data in the prefetch decision information group corresponding to the access data; if access data is stored in the prefetch cache module 40, the access data is obtained from the prefetch cache module 40 and returned to the memory access execution unit, and the access data is stored in the multi-level cache module 50, and the valid flag corresponding to the same group decision information in the prefetch decision information group corresponding to the access data in the prefetch information queue is set to an invalid flag, so as to facilitate the replacement of the data during subsequent cache updates.

[0055] Among them, the system provided in this embodiment can be a system based on the RISC-V architecture or other instruction set architecture settings, wherein RISC-V is a new open source instruction set architecture (ISA) based on the reduced instruction set (RISC) principle, and is the fifth generation instruction set architecture designed from RISC-I.

[0056] In this embodiment, the embodiment of the present invention utilizes the setting of the fusion prefetcher module 10 to fuse the prefetch algorithms of different cache levels, facilitate the scheduling of complementary data between algorithms, and reuse a portion of the storage resources, which can quickly interact with data, reduce resource consumption, and improve prefetching accuracy; and through the setting of the prefetch cache module 40 and the multi-level cache module 50, hierarchical storage of prefetched data can be achieved, and the prefetch cache module 40 is used to store prefetched data with relatively low prefetching priority, which can improve data prefetching coverage and achieve better data prefetching effect.

[0057] Corresponding to the above system embodiment, the embodiment of the present invention further provides a processor, and the processor described below and the data prefetch control system described above can refer to each other.

[0058] An embodiment of the present invention provides a processor, including the data prefetch control system provided by the above embodiment.

[0059] The processor provided in this embodiment may be specifically a central processing unit (CPU), or may be specifically other types of processors, such as a graphics processing unit (GPU).

[0060] The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other. For the processor disclosed in the embodiment, since it corresponds to the system disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the system part description.

[0061] The above is a detailed introduction to a data pre-fetch control system and processor provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the system of the present invention and its core ideas. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the present invention.

Claims

1. A data pre-fetching control system, characterized in that: include: Fusion prefetcher module, prefetch control module, prefetch cache control module, prefetch cache module and multi-level cache module; The fusion prefetcher module is used to receive a memory access request sent by a memory access execution unit; according to the memory access address in the memory access request, a prefetch decision is made using the prefetch algorithm of each prefetcher to obtain prefetch decision information; wherein the fusion prefetcher module includes prefetchers corresponding to each level of cache in the multi-level cache module, and the prefetchers corresponding to at least two levels of cache in the multi-level cache module are different; The prefetch control module is used to prioritize the prefetch decision information and store the prioritized prefetch decision information in a prefetch information queue; The prefetch cache control module is used to retrieve and determine the target decision information in the prefetch information queue; search and obtain the prefetch data corresponding to the target decision information from the memory; store each prefetch data in the corresponding multi-level cache module and prefetch cache module according to the prefetch priority of the target decision information; wherein the prefetch data corresponding to the target decision information is not stored in the multi-level cache module or the multi-level cache module and the prefetch cache module, and the prefetch priority corresponding to the prefetch data stored in the multi-level cache module is higher than the prefetch priority corresponding to the prefetch data stored in the prefetch cache module.

2. The data pre-fetching control system according to claim 1, characterized in that: The prefetch control module is specifically used to prioritize the prefetch decision information according to the decision threshold and / or prefetcher mark corresponding to each of the prefetch decision information, and store the prioritized prefetch decision information in the prefetch information queue.

3. The data pre-fetching control system according to claim 2, characterized in that: Also includes: The prefetch configuration module is used to store the prefetch parameters corresponding to each of the prefetch algorithms; wherein the prefetch parameters include at least one of a decision threshold, a prefetch priority, a prefetch degree and / or a prefetch data block.

4. The data pre-fetching control system according to claim 3, characterized in that: The method of prioritizing the prefetch decision information according to the decision thresholds and / or prefetcher marks corresponding to the prefetch decision information, and storing the sorted prefetch decision information in the prefetch information queue, comprises: According to the prefetcher mark in each of the prefetch decision information, searching and determining the prefetch priority and decision threshold of each of the prefetch decision information from the prefetch configuration module; The prefetch decision information is sorted according to the prefetch priority and decision threshold of each of the prefetch decision information to obtain a decision information queue; wherein the prefetch priority of the first prefetch decision information of two adjacent prefetch decision information in the decision information queue is higher than the prefetch priority of the second prefetch decision information, or the decision threshold of the first prefetch decision information is higher than the decision threshold of the second prefetch decision information; The pre-fetch decision information in the decision information queue is stored in the pre-fetch information queue in a front-to-back order.

5. The data pre-fetching control system according to claim 1, characterized in that: The prefetch control module is specifically used to receive each prefetch decision information group sent by the fusion prefetcher module; prioritize the prefetch decision information groups according to the decision threshold and / or prefetcher mark corresponding to each prefetch decision information group, and store the sorted prefetch decision information groups into the prefetch information queue; wherein the prefetch decision information groups include prefetch decision information within the same prefetch area range.

6. The data pre-fetching control system according to claim 1, characterized in that: The prefetch information queue includes a retrieval counter, a prefetch counter, a retrieval address pointer, a prefetch address pointer, and a retrieval flag, a prefetch flag, and a decision group flag corresponding to each of the prefetch decision information; wherein the decision group flag includes at least one of a group flag counter, a decision number, and a valid flag; the retrieval counter is used to count the number of times to be retrieved, the prefetch counter is used to count the number of times to be prefetched, the retrieval address pointer is used to indicate the prefetch decision information currently retrieved in the prefetch information queue, the prefetch address pointer is used to indicate the prefetch decision information currently prefetched in the prefetch information queue, and the retrieval flag is used to indicate Whether each prefetch decision information in the prefetch information queue has been retrieved, the prefetch flag is used to indicate whether each prefetch decision information in the prefetch information queue needs to be prefetched, the group tag counter is used to indicate the prefetch decision information group to which each prefetch decision information in the prefetch information queue belongs, the number of decisions is used to indicate the number of prefetch decision information in the prefetch decision information group to which each prefetch decision information in the prefetch information queue belongs, and the valid flag is used to indicate whether each prefetch decision information in the prefetch information queue is valid; the prefetch decision information group includes prefetch decision information in the same prefetch area range.

7. The data pre-fetching control system according to claim 6, characterized in that: The retrieving and determining the target decision information in the pre-fetch information queue includes: If the retrieval counter is greater than 0, the current prefetch decision information in the prefetch information queue is read according to the retrieval address pointer; Detecting whether prefetch data corresponding to current prefetch decision information is stored in the multi-level cache module; If the pre-fetch data corresponding to the current pre-fetch decision information is stored, the search flag corresponding to the current pre-fetch decision information is set to the searched flag, and the pre-fetch flag corresponding to the current pre-fetch decision information is kept as the default no-pre-fetch flag; If the prefetch data corresponding to the current prefetch decision information is not stored, the current prefetch decision is used as the target decision information, the search flag corresponding to the current prefetch decision information is set to the searched flag, and the prefetch flag corresponding to the current prefetch decision information is set to the required prefetch flag.

8. The data pre-fetching control system according to claim 7, characterized in that: The step of searching for pre-fetched data corresponding to the target decision information from the memory includes: If the prefetch counter is greater than 0, then reading the search flag and prefetch flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer; When the search flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is the searched flag and the prefetch flag is the prefetch-required flag, searching and acquiring the prefetch data corresponding to the current prefetch decision information from the memory; When the search flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is the searched flag and the prefetch flag is the no-prefetch flag, the value of the prefetch counter is reduced by 1, and the pointing position of the prefetch address pointer is updated; When the search flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is a default unsearched flag, the step of reading the search flag and prefetch flag corresponding to the current prefetch decision information pointed to by the prefetch address pointer is performed.

9. The data pre-fetching control system according to claim 1, characterized in that: The step of searching for pre-fetched data corresponding to the target decision information from the memory includes: Determine the bus read data priority of each target decision information according to the priority information corresponding to each target decision information; wherein the priority information includes at least one of the prefetch priority, the decision threshold and the prefetch degree execution status; According to the order of the bus read data priorities from high to low, the pre-fetched data corresponding to each of the target decision information is searched and acquired from the memory using the target data reading method corresponding to each of the bus read data priorities.

10. The data pre-fetching control system according to claim 1, characterized in that: According to the prefetching priority of the target decision information, storing each of the prefetched data into the corresponding multi-level cache module and prefetch cache module includes: Determine target prefetch data from the prefetch data; wherein the target prefetch data includes prefetch data corresponding to prefetch decision information with the highest prefetch priority and a decision threshold greater than a multi-level cache threshold in each target prefetch decision information group, the target prefetch decision information group is a prefetch decision information group where the prefetch decision information corresponding to each of the prefetch data is located, and the prefetch decision information group includes prefetch decision information within the same prefetch area range; The target pre-fetch data is stored in the multi-level cache module, and non-target pre-fetch data in the pre-fetch data is stored in the pre-fetch cache module.

11. The data pre-fetching control system according to claim 1, characterized in that: The pre-fetch cache control module is further used to configure the initial life cycle of each pre-fetched data according to the pre-fetch priority corresponding to each pre-fetched data in the pre-fetch cache module.

12. The data pre-fetching control system according to any one of claims 1 to 11, characterized in that: The pre-fetch cache control module is also used to receive the memory access request sent by the memory access execution unit; to retrieve whether the pre-fetch cache module stores access data corresponding to the memory access address in the memory access request; if the pre-fetch cache module stores the access data, the access data is obtained from the pre-fetch cache module and returned to the memory access execution unit; if the access data is not stored in the pre-fetch cache module and the multi-level cache module, the access data corresponding to the memory access address is obtained from the memory according to the memory access address in the memory access request and returned to the memory access execution unit.

13. The data pre-fetching control system according to claim 12, characterized in that: The pre-fetch cache control module is also used to set the valid flag corresponding to the same group decision information in the pre-fetch decision information group corresponding to the access data in the pre-fetch information queue to an invalid flag if the access data is not stored in the pre-fetch cache module and the access data is stored in the multi-level cache module; wherein the same group decision information is pre-fetch decision information other than the pre-fetch decision information corresponding to the access data in the pre-fetch decision information group corresponding to the access data; After obtaining the access data from the pre-fetch cache module and returning it to the memory access execution unit, it includes: storing the access data in the multi-level cache module, and setting the valid flag corresponding to the same group of decision information in the pre-fetch decision information group corresponding to the access data in the pre-fetch information queue to the invalid flag.

14. The data pre-fetching control system according to claim 12, characterized in that: Also includes: The memory access execution unit is used to generate the memory access request according to the memory access instruction information received from the processor; Sending the memory access request to the fusion prefetcher module, the prefetch cache control module and the multi-level cache module; The multi-level cache module is also used to detect whether access data corresponding to the memory access address in the memory access request is stored in each level of cache based on the received memory access request; if so, the stored access data is returned to the memory access execution unit, and the corresponding cache hit information is sent to the pre-fetch cache control module; if not, the corresponding cache miss information is sent to the pre-fetch cache control module.

15. A processor, characterized in that: It comprises the data pre-fetch control system as claimed in any one of claims 1 to 14.

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