Display panel

Abstract

The invention discloses a display panel which comprises a display area and a peripheral area arranged around the display area and further comprises a gate drive circuit, a first drive signal line, a second drive signal line and an electrostatic discharge unit. The gate drive circuit is arranged in the peripheral area, the gate drive circuit comprises multiple stages of effective shift registers and redundant shift registers which are arranged in sequence, and the redundant shift registers and the effective shift registers are arranged at intervals; the first driving signal line is electrically connected with the effective shift register; the second driving signal line is electrically connected with the redundant shift register; the electrostatic discharge unit is electrically connected with the first driving signal line and the second driving signal line and used for discharging static electricity of the first driving signal line and the second driving signal line, and at least one part of the electrostatic discharge unit is located between the effective shift register and the redundant shift register.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel. Background Art

[0002] GOA (Gate-driver On Array) technology is a technology that directly manufactures the gate drive circuit on the display panel to replace the external drive circuit. The area where the gate drive circuit of the display panel is located is prone to static electricity accumulation, resulting in reduced stability of the display panel. Summary of the invention

[0003] Embodiments of the present application provide a display panel to improve the problem of reduced stability of the display panel due to static electricity accumulation.

[0004] In a first aspect, an embodiment of the present application provides a display panel, comprising a display area and a peripheral area arranged around the display area, the display panel further comprising:

[0005] A gate driving circuit, the gate driving circuit is arranged in the peripheral area, the gate driving circuit includes a plurality of stages of effective shift registers and a redundant shift register arranged in sequence, and the redundant shift register is arranged at intervals from the effective shift register;

[0006] A first driving signal line, wherein the first driving signal line is disposed in the peripheral area and is electrically connected to the effective shift register;

[0007] a second driving signal line, the second driving signal line being arranged in the peripheral area, and the second driving signal line being electrically connected to the redundant shift register;

[0008] An electrostatic release unit, wherein the electrostatic release unit is disposed in the peripheral area, the electrostatic release unit is electrically connected to the first drive signal line and the second drive signal line, and is used to release static electricity on the first drive signal line and the second drive signal line, and at least a portion of the electrostatic release unit is located between the effective shift register and the redundant shift register.

[0009] Furthermore, the electrostatic release unit includes a first electrostatic release subunit, which is disposed in the peripheral area, located between the effective shift register and the redundant shift register, and is electrically connected to the first drive signal line.

[0010] Furthermore, the electrostatic release unit also includes a second electrostatic release sub-unit, which is arranged in the peripheral area, and the second electrostatic release sub-unit is located on the side of the redundant shift register away from the second electrostatic release sub-unit, and the second electrostatic release sub-unit is electrically connected to the second drive signal line.

[0011] Furthermore, the electrostatic release unit further includes a second electrostatic release sub-unit, the second electrostatic release sub-unit is arranged in the peripheral area, and the second electrostatic release sub-unit is located between the effective shift register and the redundant shift register.

[0012] Furthermore, the second electrostatic release subunit and the first electrostatic release subunit are arranged in the length direction of the peripheral area.

[0013] Furthermore, the display panel also includes a plurality of clock signal lines and signal connection lines, the plurality of clock signal lines are arranged at intervals, and the plurality of clock signal lines are located between the first electrostatic release subunit and the first drive signal line, one end of the signal connection line is electrically connected to the first electrostatic release subunit, and the other end of the signal connection line is electrically connected to the first drive signal line, and the film layer where the signal connection line is located is different from the film layer where the clock signal line is located.

[0014] Furthermore, the display panel further includes:

[0015] substrate;

[0016] a first metal layer, the first metal layer being disposed on the substrate;

[0017] a second metal layer, the second metal layer being disposed on a side of the first metal layer away from the substrate;

[0018] a third metal layer, the third metal layer being disposed on a side of the second metal layer away from the substrate;

[0019] Wherein, the signal connection line is located in the first metal layer, and the clock signal line is located in the third metal layer.

[0020] Furthermore, the signal connection line crosses over the second drive signal line, and the film layer where the second drive signal line is located is different from the film layer where the signal connection line is located.

[0021] Furthermore, the peripheral area includes a first sub-peripheral area, a corner area and a second sub-peripheral area, and the corner area is located between the first sub-peripheral area and the second sub-peripheral area, wherein the multi-level effective shift register is located in the first sub-peripheral area, the redundant shift register is located in the second sub-peripheral area, and the first electrostatic release sub-unit is located in the corner area.

[0022] Furthermore, the length direction of the first electrostatic release subunit is the same as the length direction of the peripheral area, and the length direction of the second electrostatic release subunit is the same as the length direction of the peripheral area.

[0023] Beneficial effects of this application:

[0024] The present application provides a display panel, which includes a gate driving circuit and an electrostatic release unit. The gate driving circuit includes a plurality of effective shift registers and a redundant shift register arranged in sequence. The redundant shift register is arranged at an interval from the effective shift register, and at least a portion of the electrostatic release unit is arranged between the effective shift register and the redundant shift register. On the one hand, the length of the first drive signal line connected to the electrostatic release unit can be reduced, and the risk of damage by the long metal signal line is reduced, thereby improving the problem of reduced stability of the display panel due to static electricity accumulation. On the other hand, since at least a portion of the electrostatic release unit is located between the effective shift register and the redundant shift register, the interval between the redundant shift register and the effective shift register can be increased, and the length of the stage transmission signal line between the redundant shift register and the effective shift register is increased, thereby increasing the RC load of the redundant shift register and reducing the risk of the signal of the stage transmission signal line between the redundant shift register and the effective shift register being coupled by other signal lines. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 is a schematic diagram of the structure of the first display panel of the present application;

[0026] Figure 2 Figure 1 An enlarged view of position A of the first display panel shown;

[0027] Figure 3 is a schematic diagram of the structure of a second display panel of the present application;

[0028] Figure 4 Figure 3 An enlarged view of position B of the second display panel shown;

[0029] Figure 5 Figure 4 An enlarged view of position C of the second display panel shown;

[0030] Figure 6 Figure 4 An enlarged view of position D of the second display panel shown;

[0031] Figure 7 yes Figure 6A cross-sectional view of the second display panel at position E shown;

[0032] Figure 8 is a schematic diagram of the structure of a third display panel of the present application;

[0033] Fig. 9 is a schematic diagram of the structure of a fourth display panel of the present application;

[0034] Fig.10 is a schematic diagram of a conventional display panel of the present application.

[0035] 100-gate drive circuit, 110-valid shift register, 120-redundant shift register; 200-first drive signal line; 300-second drive signal line; 400-electrostatic release unit, 410-first electrostatic release sub-unit, 420-second electrostatic release sub-unit; 500-clock signal line; 600-signal connection line; 700-third drive signal line; 800-first power supply voltage signal line; 900-second power supply voltage signal line.

[0036] 10 - substrate; 20 - buffer layer; 30 - first metal layer; 40 - first insulating layer; 50 - second metal layer; 60 - second insulating layer; 70 - third metal layer.

[0037] AA-display area, AA1-first side, AA2-R corner, AA3-second side; BB-peripheral area, BB1-first sub-peripheral area, BB2-corner area, BB3-second sub-peripheral area.

[0038] 01-effective shift register; 02-redundant shift register; 03-electrostatic release unit. DETAILED DESCRIPTION

[0039] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. The technical solutions described below are only used to explain and illustrate the ideas of the present application and should not be regarded as limiting the scope of protection of the present application.

[0040] In addition, the terms "first", "second" and similar words do not indicate any order, quantity or importance, but are only used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise clearly defined.

[0041] The first embodiment of the present application provides a first display panel, referring to Figure 1 and Figure 2The display panel includes a display area AA and a peripheral area BB arranged around the display area AA, the display panel also includes a gate driving circuit 100, a first driving signal line 200, a second driving signal line 300 and an electrostatic release unit 400, the gate driving circuit is arranged in the peripheral area, the gate driving circuit 100 includes a multi-stage effective shift register 110 and a redundant shift register 120 arranged in sequence, the redundant shift register 120 is arranged at intervals with the effective shift register 110; the first driving signal line 200 is arranged in the peripheral area BB, and the first driving signal line 200 is electrically connected to the effective shift register 110; the second driving signal line 300 is arranged in the peripheral area BB, and the second driving signal line 300 is electrically connected to the redundant shift register 120 The electrostatic release unit 400 is provided in the peripheral area BB, and is electrically connected to the first drive signal line 200 and the second drive signal line 300, and is used to release the static electricity of the first drive signal line 200 and the second drive signal line 300, and at least a portion of the electrostatic release unit 400 is located between the effective shift register 110 and the redundant shift register 120; wherein, the electrostatic release unit 400 includes a first electrostatic release sub-unit 410, and the first electrostatic release sub-unit 410 is provided in the peripheral area BB, and the first electrostatic release sub-unit 410 is located between the effective shift register 110 and the redundant shift register 120, and the first electrostatic release sub-unit 410 is electrically connected to the first drive signal line 200.

[0042] GOA (Gate Driver on Array, gate driver of display panel) technology is a technology that directly manufactures the gate driver circuit on the array substrate to replace the external driver circuit. The gate driver circuit of the display panel includes an effective shift register 01 and a redundant shift register 02, which are arranged adjacent to each other. In order to improve the problem of abnormal operation of the display panel caused by static electricity accumulation in the GOA area of ​​the display panel corresponding to the gate driver circuit, refer to Fig.10 In the conventional solution, an electrostatic release unit 03 is arranged on the side of the redundant shift register 02 away from the effective shift register 01. However, since the display panel of this solution still has high electrostatic accumulation, the stability of the display panel is reduced.

[0043] Therefore, by setting the display panel to include a gate driving circuit 100 and an electrostatic release unit 400, the gate driving circuit 100 includes a plurality of stages of effective shift registers 110 arranged in sequence and a redundant shift register 120 located after the effective shift register 110 of the last stage in the plurality of stages of the effective shift registers 110, and the redundant shift register 120 is arranged at intervals from the effective shift register 110, and the electrostatic release unit 400 is arranged to include a first electrostatic release subunit 410, the first electrostatic release subunit 410 is arranged in the peripheral area BB, the first electrostatic release subunit 410 is located between the effective shift register 110 and the redundant shift register 120, and the first electrostatic release subunit 410 is electrically connected to the first drive signal line 200; one side On the one hand, the length of the first driving signal line 200 connected to the electrostatic discharge unit 400 can be reduced, and the risk of long metal signal lines being damaged can be reduced, thereby improving the problem of reduced stability of the display panel due to static electricity accumulation. On the other hand, since at least a portion of the electrostatic discharge unit 400 is located between the effective shift register 110 and the redundant shift register 120, the interval between the redundant shift register 120 and the effective shift register 110 can be increased, and the length of the stage transfer signal line between the redundant shift register 120 and the effective shift register 110 is increased, thereby increasing the RC load of the redundant shift register 120 and reducing the risk of the signal of the stage transfer signal line between the redundant shift register 120 and the effective shift register 110 being coupled by other signal lines.

[0044] In this embodiment, the redundant shift register is located after the effective shift register 110 of the last stage among the multiple stages of the effective shift register 110 .

[0045] In this embodiment, the display panel further includes scan signal lines, the effective shift register 110 is electrically connected to the scan lines, and the redundant shift register 120 is not electrically connected to the scan lines.

[0046] In this embodiment, the display panel further includes a third driving signal line 700 , wherein the effective shift register 110 is electrically connected to the redundant shift register 120 via the third driving signal line 700 .

[0047] In this embodiment, the signal of the first driving signal line 200 includes an EM_STV signal, wherein the EM_STV signal is an initial start signal.

[0048] In this embodiment, the signal of the second driving signal line 300 includes an EM_STV signal, wherein the EM_STV signal is an initial start signal.

[0049] In this embodiment, the signal of the third driving signal line 700 includes a P[n] signal, wherein the P[n] signal is a level transfer signal.

[0050] In this embodiment, the display panel further includes a first power supply voltage signal line 800 and a second power supply voltage signal line 900 , and the first power supply voltage signal line 800 and the second power supply voltage signal line 900 are electrically connected to the electrostatic release unit.

[0051] In this embodiment, the first power supply voltage signal line is a VGH (High Voltage Gate Drive) signal, and the second power supply voltage signal line is a VGL (Low Voltage Gate Drive) signal, wherein the VGH signal is a high voltage signal, and the VGL signal is a low voltage signal.

[0052] In this embodiment, the peripheral area BB includes a first sub-peripheral area BB1 of the peripheral area BB, a corner area BB2 and a second sub-peripheral area BB3 of the peripheral area BB, and the corner area BB2 is located between the first sub-peripheral area BB1 of the peripheral area BB and the second sub-peripheral area BB3 of the peripheral area BB, wherein the multi-level valid shift register 110 is located in the first sub-peripheral area BB1 of the peripheral area BB, the redundant shift register 120 is located in the second sub-peripheral area BB3 of the peripheral area BB, and the first electrostatic release sub-unit 410 is located in the corner area BB2. Since the redundant shift register 120 of the gate driving circuit 100 of the conventional scheme is set in the corner area BB2, and the volume of the effective shift register 110 and the redundant shift register 120 is larger than the volume of the electrostatic release unit 400, the redundant shift register 120 will occupy a larger width of the corner area BB2, which will result in a larger space occupied by the corner area BB2 of the peripheral area BB of the conventional scheme. Therefore, by setting multiple levels of the effective shift register 110 to be located in the first sub-peripheral area BB1 of the peripheral area BB, the redundant shift register 120 to be located in the second sub-peripheral area BB3 of the peripheral area BB, and the first electrostatic release sub-unit 410 to be located in the corner area BB2, the space occupied by the corner area BB2 of the peripheral area BB can be saved.

[0053] It should be noted that, since the second sub-peripheral area BB3 of the peripheral area BB has fewer wirings, even if the redundant shift register 120 is placed at the second sub-peripheral area BB3 of the peripheral area BB, it will not affect the wiring of the second sub-peripheral area BB3.

[0054] In this embodiment, the display area AA includes a first side edge AA1, a second side edge AA3 and an R angle AA2, and the first side edge AA1 is connected to the second side edge AA3 through the R angle AA2; wherein the first side edge AA1 corresponds to the first sub-peripheral area BB1 of the peripheral area BB, the second side edge AA3 corresponds to the second sub-peripheral area BB3 of the peripheral area BB, and the R angle AA2 corresponds to the corner area BB2.

[0055] In this embodiment, the display panel also includes a plurality of clock signal lines 500 and a signal connection line 600, wherein the plurality of clock signal lines 500 are arranged at intervals, and the plurality of clock signal lines 500 are located between the first electrostatic release subunit 410 and the first drive signal line 200, one end of the signal connection line 600 is electrically connected to the first electrostatic release subunit 410, and the other end of the signal connection line 600 is electrically connected to the first drive signal line 200, wherein the signal connection line 600 spans the plurality of clock signal lines 500, and the film layer where the signal connection line 600 is located is different from the film layer where the clock signal line 500 is located. By setting one end of the signal connection line 600 to be electrically connected to the first electrostatic release subunit 410, and the other end of the signal connection line 600 to be electrically connected to the first drive signal line 200, wherein the signal connection line 600 spans across the multiple clock signal lines 500, and the film layer where the signal connection line 600 is located is different from the film layer where the clock signal line 500 is located, the first electrostatic release subunit 410 can be electrically connected to the first drive signal line 200, ensuring that the static electricity of the first drive signal line 200 can be released through the first electrostatic release subunit 410.

[0056] In this embodiment, the signal connection line 600 and the first driving signal line 200 are in the same layer.

[0057] It should be noted that the signal connection line 600 is a part of the first driving signal line 200 .

[0058] In this embodiment, reference Fig. 9, the display panel further comprises a substrate 10, a first metal layer 30, a second metal layer 50, and a third metal layer 70; the first metal layer 30 is arranged on the substrate 10; the second metal layer 50 is arranged on the side of the first metal layer 30 away from the substrate 10; the third metal layer 70 is arranged on the side of the second metal layer 50 away from the substrate 10; wherein the signal connection line 600 is located in the first metal layer 30, and the clock signal line is located in the third metal layer 70. Since the third metal layer 70 is far away from the first metal layer 30, by arranging the signal connection line 600 in the first metal layer 30 and the clock signal line in the third metal layer 70, a larger spacing is provided between the signal connection line 600 and the clock signal line, which can reduce the parasitic capacitance generated by the signal connection line 600 and the clock signal line 500, thereby reducing the interference of the signal connection line 600 on the signal of the clock signal line 500, and improving the stability of the timing signal of the display panel.

[0059] In this embodiment, the display panel further includes a thin film transistor, and the thin film transistor includes a gate, a source, and a drain; the gate is located in the first metal layer 30 , and the source and the drain are located in the second metal layer 50 .

[0060] In this embodiment, the display panel further includes a first insulating layer 40 and a second insulating layer 60 . The first insulating layer 40 is located between the first metal layer 30 and the second metal layer 50 . The second insulating layer 60 is located between the third metal layer 70 and the second metal layer 50 .

[0061] In this embodiment, the display panel further includes a buffer layer 20 , and the buffer layer 20 is located between the first metal layer 30 and the substrate 10 .

[0062] In this embodiment, the width of the signal connection line 600 is smaller than the width of the clock signal line 500. By setting the width of the signal connection line 600 smaller than the width of the clock signal line 500, the parasitic capacitance generated by the signal connection line 600 and the clock signal line 500 can be reduced, thereby reducing the interference of the signal connection line 600 on the signal of the clock signal line 500, and improving the stability of the timing signal of the display panel.

[0063] In this embodiment, the signal connection line 600 crosses the second driving signal line 300 , and the film layer where the second driving signal line 300 is located is different from the film layer where the signal connection line 600 is located.

[0064] In this embodiment, the length direction of the first electrostatic release subunit 400 is the same as the length direction of the peripheral area BB. By setting the length direction of the first electrostatic release subunit 400 to be the same as the length direction of the peripheral area BB, the length direction of the first electrostatic release subunit 400 can be consistent with the length direction of the corner area BB2, thereby avoiding the increase in the width of the corner area of ​​the peripheral area occupied by the first electrostatic release subunit 400.

[0065] The second embodiment of the present application provides a second display panel, referring to Figure 3-Figure 6 The second embodiment is similar to the first embodiment, and the difference between the second embodiment and the first embodiment is that the electrostatic release unit 400 also includes a second electrostatic release sub-unit 420, and the second electrostatic release sub-unit 420 is arranged in the peripheral area BB, and the second electrostatic release sub-unit 420 is located on the side of the redundant shift register 120 away from the second electrostatic release sub-unit 400, and the second electrostatic release sub-unit 420 is electrically connected to the second drive signal line 300.

[0066] The display panel includes a gate driving circuit and an electrostatic release unit 400, wherein the gate driving circuit 100 includes a plurality of effective shift registers 110 arranged in sequence and a redundant shift register 120 located after the effective shift register 110 of the last stage in the plurality of effective shift registers 110, and the redundant shift register 120 is arranged at intervals with the effective shift register 110, and the electrostatic release unit 400 further includes a second electrostatic release subunit 420, and the second electrostatic release subunit 420 is arranged in the peripheral area BB, and the second The electrostatic release subunit 420 is located on a side of the redundant shift register 120 away from the second electrostatic release subunit 400, and the second electrostatic release subunit 420 is electrically connected to the second drive signal line 300, so that the first electrostatic release subunit 410 and the second electrostatic release subunit 420 of the electrostatic release unit 400 can be dispersedly arranged. Compared with the solution of only setting the electrostatic release unit 400 on the redundant shift register 120 away from the effective shift register 110, the static electricity in the GOA area of ​​the display panel can be better released, thereby improving the stability of the display panel.

[0067] In this embodiment, the peripheral area BB includes a first sub-peripheral area BB1 of the peripheral area BB, a corner area BB2 and a second sub-peripheral area BB3 of the peripheral area BB, and the corner area BB2 is located between the first sub-peripheral area BB1 of the peripheral area BB and the second sub-peripheral area BB3 of the peripheral area BB, wherein the multi-level valid shift register 110 is located in the first sub-peripheral area BB1 of the peripheral area BB, the redundant shift register 120 is located in the second sub-peripheral area BB3 of the peripheral area BB, the first electrostatic release sub-unit 410 is located in the corner area BB2, and the second electrostatic release sub-unit 400 is located in the second sub-peripheral area BB3 of the peripheral area BB. Since the redundant shift register 120 of the gate driving circuit 100 of the conventional scheme is arranged in the corner area BB2, and the volume of the effective shift register 110 and the redundant shift register 120 is larger than the volume of the electrostatic release unit 400, this results in a larger space occupied by the corner area BB2 of the peripheral area BB of the conventional scheme. Therefore, by setting multiple levels of the effective shift register 110 to be located in the first sub-peripheral area BB1 of the peripheral area BB, the redundant shift register 120 to be located in the second sub-peripheral area BB3 of the peripheral area BB, and the first electrostatic release sub-unit 410 to be located in the corner area BB2, the space occupied by the corner area BB2 of the peripheral area BB can be saved. On the other hand, compared with the scheme in which the first electrostatic release sub-unit 410 and the second electrostatic release sub-unit 420 are both located in the corner area BB2, it can ensure that the first electrostatic release sub-unit 410 and the second electrostatic release sub-unit 420 of the electrostatic release unit can be dispersedly arranged, thereby further reducing and saving the space occupied by the corner area BB2 of the peripheral area BB while improving the electrostatic release capability of the GOA area.

[0068] In this embodiment, the length direction of the first electrostatic release subunit 400 is the same as the length direction of the peripheral area. By setting the length direction of the first electrostatic release subunit 400 to be the same as the length direction of the peripheral area, the length direction of the first electrostatic release subunit 400 can be consistent with the length direction of the corner area BB2, avoiding the increase in the width of the corner area of ​​the peripheral area occupied by the first electrostatic release subunit 400.

[0069] In this embodiment, the length direction of the second electrostatic release subunit 400 is the same as the length direction of the peripheral area. By setting the length direction of the second electrostatic release subunit 400 to be the same as the length direction of the peripheral area, the length direction of the second electrostatic release subunit 400 can be the same as the length direction of the first sub-peripheral area BB1 of the peripheral area BB, thereby avoiding the problem of an increase in the width of the corner area BB2 caused by the length direction of the first electrostatic release subunit 400 being perpendicular to the length of the first sub-peripheral area BB1 of the peripheral area BB.

[0070] The third embodiment of the present application provides a third display panel, referring to Figure 8 and Fig. 9 The third embodiment is similar to the first embodiment. The difference between the third embodiment and the first embodiment is that the electrostatic release unit 400 also includes a second electrostatic release sub-unit 420, and the second electrostatic release sub-unit 420 is arranged in the peripheral area BB, and the second electrostatic release sub-unit 400 is located between the effective shift register 110 and the redundant shift register 120.

[0071] In this embodiment, the peripheral area BB includes a first sub-peripheral area BB1 of the peripheral area BB, a corner area BB2, and a second sub-peripheral area BB3 of the peripheral area BB, wherein the corner area BB2 is located between the first sub-peripheral area BB1 of the peripheral area BB and the second sub-peripheral area BB3 of the peripheral area BB, wherein the multi-stage effective shift register 110 is located in the first sub-peripheral area BB1 of the peripheral area BB, the redundant shift register 120 is located in the second sub-peripheral area BB3 of the peripheral area BB, and the first electrostatic release subunit 410 and the second electrostatic release subunit 420 are located in the corner area BB2. By setting the multi-stage effective shift register 110 in the first sub-peripheral area BB1 of the peripheral area BB, the redundant shift register 120 in the second sub-peripheral area BB3 of the peripheral area BB, and the first electrostatic release subunit 410 in the corner area BB2, compared with the solution of setting the redundant shift register 120 in the corner area BB2, the space occupied by the corner area BB2 of the peripheral area BB is saved.

[0072] In this embodiment, the length direction of the first electrostatic release subunit 400 is the same as the length direction of the peripheral area. By setting the length direction of the first electrostatic release subunit 400 to be the same as the length direction of the peripheral area, the length direction of the first electrostatic release subunit 400 can be consistent with the length direction of the corner area BB2, thereby avoiding the increase in the difficulty of wiring in the peripheral area of ​​the display panel due to the increase in the width of the corner area of ​​the peripheral area occupied by the first electrostatic release subunit 400.

[0073] In this embodiment, reference Figure 7 The second electrostatic release sub-unit 420 is spaced apart from the first electrostatic release sub-unit in the length direction of the peripheral area.

[0074] In this embodiment, the second electrostatic releasing subunit 420 is disposed opposite to the first electrostatic releasing subunit 410 .

[0075] In this embodiment, reference Fig. 9 The second electrostatic release subunit 420 and the first electrostatic release subunit 410 are staggered.

[0076] The above is a detailed description of the specific implementation of the present application. The above implementation disclosed in the present application is only the preferred implementation of the present application. For ordinary technicians in this field, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the scope of protection defined by the claims of the present application.

Claims

1. A display panel, characterized in that: The display panel includes a display area and a peripheral area arranged around the display area, and the display panel further includes: A gate driving circuit, the gate driving circuit is arranged in the peripheral area, the gate driving circuit includes a plurality of stages of effective shift registers and a redundant shift register arranged in sequence, and the redundant shift register is arranged at intervals from the effective shift register; A first driving signal line, wherein the first driving signal line is disposed in the peripheral area and is electrically connected to the effective shift register; a second driving signal line, the second driving signal line being arranged in the peripheral area, and the second driving signal line being electrically connected to the redundant shift register; An electrostatic release unit, wherein the electrostatic release unit is disposed in the peripheral area, the electrostatic release unit is electrically connected to the first drive signal line and the second drive signal line, and is used to release static electricity on the first drive signal line and the second drive signal line, and at least a portion of the electrostatic release unit is located between the effective shift register and the redundant shift register.

2. The display panel according to claim 1, characterized in that: The electrostatic release unit includes a first electrostatic release subunit, which is disposed in the peripheral area, located between the effective shift register and the redundant shift register, and is electrically connected to the first driving signal line.

3. The display panel according to claim 2, characterized in that: The electrostatic release unit also includes a second electrostatic release subunit, which is arranged in the peripheral area and located on a side of the redundant shift register away from the second electrostatic release subunit, and is electrically connected to the second drive signal line.

4. The display panel according to claim 2, characterized in that: The electrostatic release unit further includes a second electrostatic release sub-unit, which is disposed in the peripheral area and located between the effective shift register and the redundant shift register.

5. The display panel according to claim 4, characterized in that: The second electrostatic release subunit is spaced apart from the first electrostatic release subunit in the length direction of the peripheral area.

6. The display panel according to claim 2, characterized in that: The display panel also includes a plurality of clock signal lines and signal connection lines, wherein the plurality of clock signal lines are arranged at intervals, and the plurality of clock signal lines are located between the first electrostatic release subunit and the first drive signal line, one end of the signal connection line is electrically connected to the first electrostatic release subunit, and the other end of the signal connection line is electrically connected to the first drive signal line, wherein the signal connection line spans the plurality of clock signal lines, and a film layer where the signal connection line is located is different from a film layer where the clock signal line is located.

7. The display panel according to claim 6, characterized in that: The display panel further includes: substrate; a first metal layer, the first metal layer being disposed on the substrate; a second metal layer, the second metal layer being disposed on a side of the first metal layer away from the substrate; a third metal layer, the third metal layer being disposed on a side of the second metal layer away from the substrate; Wherein, the signal connection line is located in the first metal layer, and the clock signal line is located in the third metal layer.

8. The display panel according to claim 6, characterized in that: The signal connection line crosses over the second drive signal line, and the film layer where the second drive signal line is located is different from the film layer where the signal connection line is located.

9. The display panel according to any one of claims 2 to 8, characterized in that: The peripheral area includes a first sub-peripheral area, a corner area and a second sub-peripheral area, and the corner area is located between the first sub-peripheral area and the second sub-peripheral area, wherein the multi-level effective shift register is located in the first sub-peripheral area, the redundant shift register is located in the second sub-peripheral area, and the first electrostatic release sub-unit is located in the corner area.

10. The display panel according to any one of claims 3 to 5, characterized in that: The length direction of the first electrostatic release subunit is the same as the length direction of the peripheral area, and the length direction of the second electrostatic release subunit is the same as the length direction of the peripheral area.

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