Light-emitting diode epitaxial wafer and preparation method thereof, and light-emitting diode

Abstract

The present invention discloses a light-emitting diode epitaxial wafer and a preparation method thereof, and a light-emitting diode, and relates to the field of semiconductor optoelectronic devices. The light-emitting diode epitaxial wafer comprises a substrate, a buffer layer, an intrinsic GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer in sequence; the multi-quantum well layer is a periodic structure, and each period comprises a pre-well protection layer, a quantum well layer, a post-well protection layer, and a quantum barrier layer stacked in sequence; the pre-well protection layer comprises In x Ga 1‑x N layer, Al y Ga 1‑y N layer and In z Ga 1‑z N layer, quantum well layer is In w Ga 1‑w N layer, the back-well protection layer includes In α Ga 1‑α N layer, Al β Ga 1‑β N layer and non-doped GaN layer, quantum barrier layer is GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction, z gradually increases and α gradually decreases. Implementation of the present invention can improve the luminous efficiency of light-emitting diodes.

Description

Technical Field

[0001] The invention relates to the field of semiconductor optoelectronic devices, and in particular to a light emitting diode epitaxial wafer and a preparation method thereof, and a light emitting diode. Background Art

[0002] GaN-based light-emitting diodes are currently the most widely used light-emitting diodes. For the GaN material system, electrons have higher mobility and smaller effective mass than holes. At the same time, electrons are easier to activate and have higher concentrations, which leads to an extremely mismatched concentration of electrons and holes injected into the active region. The quantum wells close to the N-type semiconductor layer hardly emit light, while electrons can be easily injected into the active region or even into the P-type semiconductor layer, causing electron leakage and reducing luminous efficiency. In addition, most of the current GaN-based light-emitting diode epitaxial wafers use InGaN-GaN multi-quantum well layers as active regions. Due to the compressive strain between InGaN and GaN, the overlap between the electron wave function and the hole wave function is reduced, reducing the luminous efficiency. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a light emitting diode epitaxial wafer and a preparation method thereof, which can improve the light emitting efficiency of the light emitting diode.

[0004] Another technical problem to be solved by the present invention is to provide a light emitting diode.

[0005] In order to solve the above problems, the present invention discloses a light-emitting diode epitaxial wafer, which comprises a substrate, a buffer layer, an intrinsic GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer stacked in sequence on the substrate; the multi-quantum well layer is a periodic structure, and each period comprises a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer stacked in sequence; The pre-well protection layer includes In x Ga 1-x N layer, Al y Ga 1-y N layer and In z Ga 1-z N layer, the quantum well layer is In w Ga 1-w N layer, the well back protection layer includes In α Ga 1-α N layer, Al β Ga 1-β N layer and non-doped GaN layer, the quantum barrier layer is a GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light emitting diode epitaxial wafer, z gradually increases and α gradually decreases.

[0006] As an improvement of the above technical solution, along the growth direction of the light-emitting diode epitaxial wafer, y gradually increases and β gradually decreases; The maximum value of y is 0.15, and the maximum value of β is 0.12.

[0007] As an improvement of the above technical solution, along the growth direction of the light emitting diode epitaxial wafer, the Al y Ga 1-y The Al component in the N layer gradually increases from y1 to y2. β Ga 1-β The Al component in the N layer gradually decreases from β1 to β2; y2>β1,y1>β2; The value range of y1 is 0.02~0.06, the value range of y2 is 0.06~0.15, the value range of β1 is 0.05~0.12, and the value range of β2 is 0.01~0.06.

[0008] As an improvement of the above technical solution, the In x Ga 1-x The N layer is doped with Si, and the doping concentration is ≤1×10 18 cm -3 .

[0009] As an improvement of the above technical solution, the number of periods of the multi-quantum well layer is 5 to 16; In x Ga 1-x The thickness of the N layer is 0.1nm~0.5nm, and the value of x ranges from 0.01~0.05; The Al y Ga 1-y The thickness of the N layer is 0.1nm~0.8nm, and the value of y ranges from 0.02~0.15; In z Ga 1-z The thickness of the N layer is 0.2nm~1nm, and the value of z ranges from 0.02~0.4; In w Ga 1-w The thickness of the N layer is 1.8nm~3.9nm, and the value of w ranges from 0.1 to 0.4; In α Ga 1-α The thickness of the N layer is 0.2nm~1nm, and the value range of α is 0.08~0.4; The Al β Ga 1-β The thickness of the N layer is 0.1nm~0.8nm, and the value range of β is 0.01~0.1; The thickness of the non-doped GaN layer is 0.1 nm to 0.5 nm; The quantum barrier layer is doped with Si, and its doping concentration is 2.5×10 17 cm -3 ~8.7×10 17 cm -3 , the thickness of the quantum barrier layer is 6nm~15nm.

[0010] Correspondingly, the present invention also discloses a method for preparing a light emitting diode epitaxial wafer, which is used to prepare the above-mentioned light emitting diode epitaxial wafer, and comprises: providing a substrate; A buffer layer, an intrinsic GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially grown on the substrate; the multi-quantum well layer is a periodic structure, and each period includes a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer stacked in sequence; The pre-well protection layer includes In x Ga 1-x N layer, Al y Ga 1-y N layer and In z Ga 1-z N layer, the quantum well layer is In w Ga 1-w N layer, the well back protection layer includes In α Ga 1-α N layer, Al β Ga 1-β N layer and non-doped GaN layer, the quantum barrier layer is a GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light emitting diode epitaxial wafer, z gradually increases and α gradually decreases.

[0011] As an improvement of the above technical solution, the In x Ga 1-x After the N layer is grown, annealing is performed in the first mixed gas to roughen its surface; The annealing temperature is 800℃~1050℃, the annealing pressure is 30torr~360torr; the first mixed gas is N 2 and H 2 Mixed gas, N 2 and H 2 The volume ratio is 1:0.13~1:8.2.

[0012] As an improvement of the above technical solution, the In α Ga 1-αAfter the N layer is grown, it is annealed in the second mixed gas to improve its crystallization degree; The annealing temperature is 800℃~1050℃, the annealing pressure is 30torr~360torr; the second mixed gas is N 2 and NH 3 Mixed gas, N 2 and NH 3 The volume ratio is 1:0.2~1:5.6.

[0013] As an improvement of the above technical solution, the In x Ga 1-x The growth temperature of the N layer is 750℃~920℃, and the growth pressure is 30torr~360torr; The Al y Ga 1-y The growth temperature of the N layer is 780℃~920℃, and the growth pressure is 30torr~360torr; In z Ga 1-z The growth temperature of the N layer is 680℃~890℃, and the growth pressure is 30torr~360torr; In w Ga 1-w The growth temperature of the N layer is 665℃~820℃, and the growth pressure is 30torr~360torr; In α Ga 1-α The growth temperature of the N layer is 680℃~890℃, and the growth pressure is 30torr~360torr; The Al β Ga 1-β The growth temperature of the N layer is 780℃~920℃, and the growth pressure is 30torr~360torr; The growth temperature of the non-doped GaN layer is 800° C. to 920° C., and the growth pressure is 30 torr to 360 torr; The growth temperature of the quantum barrier layer is 816° C. to 935° C., and the growth pressure is 30 torr to 360 torr.

[0014] Correspondingly, the present invention also discloses a light emitting diode, which comprises the light emitting diode epitaxial wafer mentioned above.

[0015] The implementation of the present invention has the following beneficial effects: In the light-emitting diode epitaxial wafer of one embodiment of the present invention, the multi-quantum well layer is a periodic structure, and each period includes a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer stacked in sequence; wherein the pre-well protection layer includes Inx Ga 1-x N layer, Al y Ga 1-y N layer and In z Ga 1-z N layer, quantum well layer is In w Ga 1-w N layer, the back-well protection layer includes In α Ga 1-α N layer, Al β Ga 1-β N layer and undoped GaN layer, the quantum barrier layer is GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light-emitting diode epitaxial wafer, z gradually increases and α gradually decreases. Based on the above light-emitting diode epitaxial wafer, one is to set In layers with gradually increasing In content on both sides of the quantum well layer. z Ga 1-z N layer and In with gradually decreasing In content α Ga 1-α N layer, which can effectively reduce the quantum well layer (In w Ga 1-w N layer) and the quantum barrier layer (GaN layer), weakening the compressive strain, improving the radiation recombination efficiency, and improving the luminescence efficiency. y Ga 1-y N layer and Al β Ga 1-β The N layer can enhance the carrier confinement effect, significantly reduce the electron overflow phenomenon, and improve the luminous efficiency. Moreover, controlling y≥β can weaken the Al β Ga 1-β The N layer blocks holes, increases the hole concentration in the quantum well layer, and improves the radiation recombination efficiency. x Ga 1-x The proportion of In components in the N layer is relatively small (x<z≤w), which further optimizes the transition from the quantum barrier layer to the quantum well layer and weakens the compressive strain. In summary, the multi-quantum well layer in this embodiment can significantly reduce electron overflow, increase the effective hole concentration, weaken the compressive strain, and thus effectively improve the radiation recombination efficiency and the luminescence efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a schematic structural diagram of a light emitting diode epitaxial wafer in one embodiment of the present invention; Figure 2 It is a flow chart of a method for preparing a light emitting diode epitaxial wafer in one embodiment of the present invention.

[0017] 100 is a substrate, 200 is a buffer layer, 300 is an intrinsic GaN layer, 400 is an N-type GaN layer, 500 is a multi-quantum well layer, 510 is a pre-well protection layer, 511 is an In x Ga 1-x N layer, 512 is Al y Ga 1-y N layer, 513 is In z Ga 1-z N layer, 520 is a quantum well layer, 530 is a back-well protection layer, 531 is an In α Ga 1-α N layer, 532 is Al β Ga 1-β N layer, 533 is a non-doped GaN layer, 540 is a quantum barrier layer, 600 is an electron blocking layer, and 700 is a P-type GaN layer. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention is described in further detail below.

[0019] See also Figure 1 The present invention discloses a light-emitting diode epitaxial wafer, which includes a substrate 100, a buffer layer 200, an intrinsic GaN layer 300, an N-type GaN layer 400, a multi-quantum well layer 500, an electron blocking layer 600 and a P-type GaN layer 700 stacked on the substrate 100 in sequence. The multi-quantum well layer 500 is a periodic structure, and each period includes a pre-well protection layer 510, a quantum well layer 520, a post-well protection layer 530 and a quantum barrier layer 540 stacked in sequence; the pre-well protection layer 510 includes In x Ga 1-x N layer 511, Al y Ga 1-y N layer 512 and In z Ga 1-z N layer 513, quantum well layer 520 are In w Ga 1-w N layer, the well back protection layer 530 includes In α Ga 1-α N layer 531, Al β Ga 1-β N layer 532 and undoped GaN layer 533, quantum barrier layer 540 is GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light emitting diode epitaxial wafer, z gradually increases and α gradually decreases. Based on the above light emitting diode epitaxial wafer, on one hand, In layers with gradually increasing In content are respectively arranged on both sides of the quantum well layer 520. z Ga 1-z N layer 513 and In layer with gradually decreasing In contentα Ga 1-α N layer 531, which can effectively reduce the quantum well layer 520 (In w Ga 1-w The lattice mismatch between the GaN layer and the quantum barrier layer 540 (GaN layer) weakens the compressive strain, which is beneficial to improving the radiation recombination efficiency and the luminescence efficiency. y Ga 1-y N layer 512 and Al β Ga 1-β The N layer 532 can enhance the carrier confinement effect, significantly reduce the electron overflow phenomenon, and improve the luminous efficiency. Moreover, controlling y ≥ β can weaken the Al β Ga 1-β The N layer 532 blocks holes, increases the hole concentration in the quantum well layer 520, and improves the radiation recombination efficiency. x Ga 1-x The proportion of In component in the N layer 511 is relatively small (x<z≤w), which further optimizes the transition from the quantum barrier layer 540 to the quantum well layer 520 and weakens the compressive strain. In summary, the multi-quantum well layer 500 in this embodiment can significantly reduce electron overflow, increase the effective hole concentration, weaken the compressive strain, and thus effectively improve the radiation recombination efficiency and the luminescence efficiency.

[0020] Specifically, in some embodiments, the number of periods of the multi-quantum well layer 500 is 5-20, exemplarily 7, 9, 11, 13, 15 or 17, but not limited thereto, preferably 5-16.

[0021] Specifically, in some embodiments, In x Ga 1-x The thickness of the N layer 511 is 0.1 nm to 0.8 nm, and is exemplarily 0.2 nm, 0.3 nm, 0.4 nm, 0.5 nm, 0.6 nm or 0.7 nm, but is not limited thereto; preferably, it is 0.1 nm to 0.5 nm. x Ga 1-x The ratio of the In component in the N layer 511 (ie, x) is 0.01 to 0.08, exemplarily 0.02, 0.03, 0.04, 0.05, 0.06 or 0.07, but not limited thereto, preferably 0.01 to 0.05.

[0022] Specifically, in some embodiments, Al y Ga 1-y The thickness of the N layer 512 is 0.1 nm to 1 nm, and is exemplarily 0.2 nm, 0.4 nm, 0.6 nm, 0.8 nm or 0.9 nm, but is not limited thereto. Preferably, it is 0.1 nm to 0.8 nm.y Ga 1-y The proportion of Al component in N layer 512 (i.e., y) is 0.02-0.2, exemplarily 0.04, 0.06, 0.08, 0.1, 0.12, 0.14 or 0.16, but not limited thereto. Preferably, it is 0.02-0.15. It should be noted that Al y Ga 1-y The proportion of Al components in the N layer 512 is the average proportion of Al components in the entire layer.

[0023] Specifically, in some embodiments, In z Ga 1-z The thickness of the N layer 513 is 0.2 nm to 1.5 nm, and is exemplarily 0.4 nm, 0.6 nm, 0.8 nm, 1 nm, 1.2 nm or 1.4 nm, but is not limited thereto. Preferably, it is 0.2 nm to 1 nm. z Ga 1-z The ratio of In component in N layer 513 (i.e., z) is 0.02-0.4, exemplarily 0.04, 0.08, 0.12, 0.25, 0.34 or 0.45, but not limited thereto. z Ga 1-z The proportion of the In component in the N layer 513 is the average proportion of the In component in the entire layer.

[0024] Specifically, in some embodiments, In w Ga 1-w The thickness of the N layer is 1.8 nm to 5 nm, exemplarily 2 nm, 2.4 nm, 3 nm, 3.5 nm, 4 nm or 4.8 nm, but not limited thereto; preferably 1.8 nm to 3.9 nm. w Ga 1-w The ratio of the In component in the N layer (ie, w) is 0.1-0.45, exemplarily 0.15, 0.2, 0.25, 0.3 or 0.35, but not limited thereto, preferably 0.1-0.4.

[0025] Specifically, in some embodiments, In α Ga 1-α The thickness of the N layer 531 is 0.2 nm to 1.5 nm, exemplarily 0.4 nm, 0.6 nm, 0.8 nm, 1.2 nm or 1.4 nm, but not limited thereto. Preferably, it is 0.2 nm to 1 nm. α Ga 1-α The ratio of In component in N layer 531 (i.e., α) is 0.05-0.4, exemplarily 0.08, 0.14, 0.22, 0.31 or 0.38, but not limited thereto. Preferably, it is 0.08-0.4. It should be noted that Inα Ga 1-α The proportion of the In component in the N layer 531 is the average proportion of the In component in the entire layer.

[0026] Specifically, in some embodiments, Al β Ga 1-β The thickness of the N layer 532 is 0.1 nm to 1 nm, and is exemplarily 0.2 nm, 0.4 nm, 0.6 nm, 0.8 nm or 0.9 nm, but is not limited thereto. Preferably, it is 0.1 nm to 0.8 nm. β Ga 1-β The proportion of Al component (i.e., β) in the N layer 532 is 0.01-0.15, and is exemplarily 0.02, 0.04, 0.06, 0.08, 0.1, 0.12, or 0.14, but is not limited thereto. Preferably, it is 0.01-0.1. It should be noted that Al β Ga 1-β The proportion of the Al component in the N layer 532 is the average proportion of the Al component in the entire layer.

[0027] Specifically, in some embodiments, the thickness of the non-doped GaN layer 533 is 0.1 nm to 0.8 nm, exemplarily 0.2 nm, 0.4 nm, 0.6 nm or 0.7 nm, preferably 0.1 nm to 0.5 nm.

[0028] Specifically, in some embodiments, the thickness of the quantum barrier layer 540 is 5 nm to 15 nm, exemplarily 6 nm, 7.5 nm, 9 nm, 10.5 nm, 12 nm or 13.5 nm, but not limited thereto, preferably 6 nm to 15 nm.

[0029] Preferably, in some embodiments, the quantum barrier layer 540 is doped with Si at a doping concentration of 2.5×10 17 cm -3 ~8.7×10 17 cm -3 .

[0030] Preferably, in some embodiments, along the growth direction of the light emitting diode epitaxial wafer, In z Ga 1-z The In component (i.e., z) in the N layer 513 increases from 0.02-0.06 to 0.08-0.4. α Ga 1-α The In component (ie, α) in the N layer 531 is gradually reduced from 0.08 to 0.4 to 0.01 to 0.05. Based on the above component control, the compressive strain can be further weakened and the luminous efficiency can be improved.

[0031] Preferably, in some embodiments, Inx Ga 1-x The N layer 511 is doped with Si, and its doping concentration is ≤1×10 18 cm -3 Based on this implementation, the drift velocity of electrons can be further reduced and the luminous efficiency can be improved. More specifically, In x Ga 1-x The doping concentration of Si in the N layer 511 is 1.2×10 17 cm -3 ~6.5×10 17 cm -3 .

[0032] Preferably, in some embodiments, along the growth direction of the light emitting diode epitaxial wafer, Al y Ga 1-y The Al component (i.e., y) in the N layer 512 gradually increases. β Ga 1-β The Al component (ie, β) in the N layer 532 gradually decreases, and the maximum value of y is 0.15, and the maximum value of β is 0.12. Based on the above implementation, the piezoelectric polarization can be further weakened, the polarization electric field intensity can be reduced, the overlap rate of the electron and hole wave functions can be increased, and the luminous efficiency can be improved.

[0033] More preferably, in some embodiments, along the growth direction of the light emitting diode epitaxial wafer, Al y Ga 1-y The Al component in the N layer 512 gradually increases from y1 to y2. β Ga 1-β The Al component in the N layer 532 gradually decreases from β1 to β2; y2>β1, y1>β2; the value range of y1 is 0.02~0.06, the value range of y2 is 0.06~0.15, the value range of β1 is 0.05~0.12, and the value range of β2 is 0.01~0.06.

[0034] Specifically, in some embodiments, the substrate 100 is a sapphire substrate, a silicon substrate or a carbonized substrate, but is not limited thereto.

[0035] Specifically, in some embodiments, the buffer layer 200 is an AlN layer or an AlGaN layer, but is not limited thereto. The buffer layer 200 has a thickness of 20 nm to 80 nm.

[0036] Specifically, in some embodiments, the thickness of the intrinsic GaN layer 300 is 1 μm-3 μm.

[0037] Specifically, in some embodiments, the N-type doping (Si) concentration in the N-type GaN layer 400 is 5×10 18 cm -3~5×10 19 cm -3 , thickness is 1μm~5μm.

[0038] Specifically, in some embodiments, the electron blocking layer 600 is an AlInGaN layer or an AlGaN layer, but is not limited thereto. Preferably, it is an AlInGaN layer, wherein the Al component accounts for 0.01-0.1, the In component accounts for 0.01-0.2, and the thickness is 10nm-50nm.

[0039] Specifically, in some embodiments, the thickness of the P-type GaN layer 700 is 50 nm to 200 nm, and the Mg doping concentration is 1×10 19 cm -3 ~5×10 20 cm -3 .

[0040] Accordingly, see Figure 2 The present invention also provides a method for preparing a light emitting diode epitaxial wafer, which is used to prepare the light emitting diode epitaxial wafer, and specifically comprises the following steps: S1: providing a substrate; S2: sequentially growing a buffer layer, an intrinsic GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer on the substrate; The multi-quantum well layer 500 is a periodic structure, and each period includes a pre-well protection layer 510, a quantum well layer 520, a post-well protection layer 530 and a quantum barrier layer 540 stacked in sequence; the pre-well protection layer 510 includes In x Ga 1-x N layer 511, Al y Ga 1-y N layer 512 and In z Ga 1-z N layer 513, quantum well layer 520 are In w Ga 1-w N layer, the well back protection layer 530 includes In α Ga 1-α N layer 531, Al β Ga 1-β N layer 532 and undoped GaN layer 533, quantum barrier layer 540 is GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light emitting diode epitaxial wafer, z gradually increases and α gradually decreases. Based on the above light emitting diode epitaxial wafer, on one hand, In layers with gradually increasing In content are respectively arranged on both sides of the quantum well layer 520. z Ga 1-z N layer 513 and In layer with gradually decreasing In content αGa 1-α N layer 531, which can effectively reduce the quantum well layer 520 (In w Ga 1-w The lattice mismatch between the GaN layer and the quantum barrier layer 540 (GaN layer) weakens the compressive strain, which is beneficial to improving the radiation recombination efficiency and the luminescence efficiency. y Ga 1-y N layer 512 and Al β Ga 1-β The N layer 532 can enhance the carrier confinement effect, significantly reduce the electron overflow phenomenon, and improve the luminous efficiency. Moreover, controlling y ≥ β can weaken the Al β Ga 1-β The N layer 532 blocks holes, increases the hole concentration in the quantum well layer 520, and improves the radiation recombination efficiency. x Ga 1-x The proportion of In component in the N layer 511 is relatively small (x<z≤w), which further optimizes the transition from the quantum barrier layer 540 to the quantum well layer 520 and weakens the compressive strain. In summary, the multi-quantum well layer 500 in this embodiment can significantly reduce electron overflow, increase the effective hole concentration, weaken the compressive strain, and thus effectively improve the radiation recombination efficiency and the luminescence efficiency.

[0041] Specifically, in some embodiments, step S2 includes: S21: growing a buffer layer on the substrate; Specifically, the buffer layer may be grown by PVD, MOCVD, MBE, or VPE, but is not limited thereto.

[0042] Preferably, in some embodiments, an AlN layer is grown by PVD to serve as a buffer layer.

[0043] S22: growing an intrinsic GaN layer on the buffer layer; Specifically, the intrinsic GaN layer may be grown by PVD, MOCVD, MBE, or VPE, but is not limited thereto.

[0044] Preferably, in some embodiments, the intrinsic GaN layer is grown by MOCVD at a growth temperature of 1100° C. to 1150° C. and a growth pressure of 100 torr to 500 torr.

[0045] S23: growing an N-type GaN layer on the intrinsic GaN layer; Specifically, the N-type GaN layer may be grown by MOCVD, MBE, or VPE, but is not limited thereto.

[0046] Preferably, in one embodiment of the present invention, the N-type GaN layer is grown by MOCVD; the growth temperature is 1100° C. to 1150° C., and the growth pressure is 100 torr to 500 torr.

[0047] S24: growing a multi-quantum well layer on the N-type GaN layer; Specifically, in some embodiments, a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer are periodically grown by MOCVD until a multi-quantum well layer is obtained.

[0048] Specifically, in x Ga 1-x The growth temperature of the N layer is 750℃~920℃, and the growth pressure is 30torr~360torr; the Al y Ga 1-y The growth temperature of the N layer is 780℃~920℃, and the growth pressure is 30torr~360torr; In z Ga 1-z The growth temperature of the N layer is 680℃~890℃, and the growth pressure is 30torr~360torr; w Ga 1-w The growth temperature of the N layer is 665℃~820℃, and the growth pressure is 30torr~360torr; In α Ga 1-α The growth temperature of the N layer is 680℃~890℃, and the growth pressure is 30torr~360torr; the Al β Ga 1-β The growth temperature of the N layer is 780℃~920℃, and the growth pressure is 30torr~360torr; the growth temperature of the undoped GaN layer is 800℃~920℃, and the growth pressure is 30torr~360torr; the growth temperature of the quantum barrier layer is 816℃~935℃, and the growth pressure is 30torr~360torr.

[0049] Preferably, in some embodiments, In x Ga 1-x After the N layer is grown, annealing is performed in the first mixed gas at a temperature of 800°C to 1050°C and a pressure of 30 torr to 360 torr. The first mixed gas is N 2 and H 2 Mixed gas, N 2 and H 2The volume ratio is 1:0.13~1:8.2. After the above annealing treatment, defects such as In clusters with high In components can be decomposed, which is beneficial to improving the crystal quality of each layer grown subsequently. At the same time, a rough material surface is formed, which can reduce the in-plane total reflection and light absorption loss of photons in semiconductor materials, improve light extraction efficiency, and further improve luminous efficiency.

[0050] Preferably, in some embodiments, In α Ga 1-α After the N layer is grown, annealing is performed in the second mixed gas. The annealing temperature is 800℃~1050℃ and the annealing pressure is 30torr~360torr. The second mixed gas is N 2 and NH 3 Mixed gas, N 2 and NH 3 The volume ratio is 1:0.2~1:5.6. Through the above annealing procedure, the material with poor surface crystallization quality can be decomposed, and the clusters with high In components can be redistributed and then recrystallized, thereby improving the crystal quality and further improving the luminous efficiency.

[0051] S25: growing an electron blocking layer on the multi-quantum well layer; Specifically, an AlInGaN layer or an AlGaN layer may be grown by MOCVD, MBE, or VPE as the electron blocking layer, but is not limited thereto.

[0052] Preferably, in some embodiments, an AlInGaN layer is grown by MOCVD as an electron blocking layer, and the growth temperature thereof is 900° C. to 1000° C. and the growth pressure is 100 torr to 300 torr.

[0053] S26: growing a P-type GaN layer on the electron blocking layer; Specifically, the P-type GaN layer may be grown by MOCVD, MBE, or VPE, but is not limited thereto.

[0054] Preferably, in some embodiments, the P-type GaN layer is grown by MOCVD, and the growth temperature is 900° C. to 1000° C. and the growth pressure is 100 torr to 500 torr.

[0055] Accordingly, the present invention also discloses a light-emitting diode, which includes the light-emitting diode epitaxial wafer described above, and the light-emitting diode epitaxial wafer includes a substrate 100, a buffer layer 200, an intrinsic GaN layer 300, an N-type GaN layer 400, a multi-quantum well layer 500, an electron blocking layer 600, and a P-type GaN layer 700 stacked in sequence on the substrate 100. The multi-quantum well layer 500 is a periodic structure, and each period includes a pre-well protection layer 510, a quantum well layer 520, a post-well protection layer 530, and a quantum barrier layer 540 stacked in sequence; the pre-well protection layer 510 includes In x Ga 1-x N layer 511, Al y Ga 1-y N layer 512 and In z Ga 1-z N layer 513, quantum well layer 520 are In w Ga 1-w N layer, the well back protection layer 530 includes In α Ga 1-α N layer 531, Al β Ga 1-β N layer 532 and undoped GaN layer 533, quantum barrier layer 540 is GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light emitting diode epitaxial wafer, z gradually increases and α gradually decreases. Based on the above light emitting diode epitaxial wafer, on one hand, In layers with gradually increasing In content are respectively arranged on both sides of the quantum well layer 520. z Ga 1-z N layer 513 and In layer with gradually decreasing In content α Ga 1-α The N layer 531 can effectively reduce the lattice mismatch between the quantum well layer 520 (InGaN layer) and the quantum barrier layer 540 (GaN layer), weaken the compressive strain, and help improve the radiation recombination efficiency and the luminescence efficiency. y Ga 1-y N layer 512 and Al β Ga 1-β The N layer 532 can enhance the carrier confinement effect, significantly reduce the electron overflow phenomenon, and improve the luminous efficiency. Moreover, controlling β < y can weaken the blocking effect on holes, increase the concentration of holes in the quantum well layer 520, and improve the radiation recombination efficiency. Thirdly, the In in the pre-well protection layer 510 x Ga 1-xThe proportion of In component in the N layer 511 is relatively small (x<z≤w), which further optimizes the transition from the quantum barrier layer 540 to the quantum well layer 520 and weakens the compressive strain. In summary, the multi-quantum well layer 500 in this embodiment can significantly reduce electron overflow, increase the effective hole concentration, weaken the compressive strain, and thus effectively improve the radiation recombination efficiency of the multi-quantum well layer 500 and improve the luminescence efficiency.

[0056] The present invention will be further described below with specific embodiments: Example 1 This embodiment provides a light emitting diode epitaxial wafer, which includes a substrate, a buffer layer, an intrinsic GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer stacked in sequence on the substrate.

[0057] The substrate is a sapphire substrate, the buffer layer is an AlN layer with a thickness of 50 nm, the thickness of the intrinsic GaN layer is 2.5 μm, and the doping element of the N-type GaN layer is Si with a doping concentration of 6×10 18 cm -3 , and its thickness is 3μm.

[0058] The multi-quantum well layer is a periodic structure with 10 periods. Each period includes a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer stacked in sequence. The pre-well protection layer includes In x Ga 1-x N layer (x=0.03), Al y Ga 1-y N layer and In z Ga 1-z N layers. x Ga 1-x The thickness of the N layer is 0.4nm. y Ga 1-y The thickness of the N layer is 0.5 nm, and the Al component ratio (y) is 0.1 and remains constant. z Ga 1-z The thickness of the N layer is 0.8nm. Along the growth direction of the LED epitaxial wafer, In z Ga 1-z The proportion of In in the N layer increases from 0.04 to 0.18. w Ga 1-w N layer (w=0.2), with a thickness of 3nm. The back-well protection layer includes In α Ga 1-α N layer, Al β Ga 1-β N layer and undoped GaN layer, In α Ga 1-αThe thickness of the N layer is 0.8nm. Along the growth direction of the LED epitaxial wafer, In α Ga 1-α The proportion of In in the N layer decreases from 0.15 to 0.03. β Ga 1-β The thickness of the N layer is 0.5nm, and the proportion of its Al component (β) is 0.08, which remains constant. The thickness of the undoped GaN layer is 0.4nm. The quantum barrier layer is a GaN layer with a thickness of 10nm and a Si doping concentration of 3.8×10 17 cm -3 .

[0059] The electron blocking layer is an AlInGaN layer, in which the Al component accounts for 0.03, the In component accounts for 0.08, and the thickness is 30nm. The thickness of the P-type GaN layer 700 is 180nm, and the Mg doping concentration is 3×10 20 cm -3 .

[0060] The method for preparing the light emitting diode epitaxial wafer in this embodiment comprises the following steps: (1) Providing a substrate; (2) growing a buffer layer on the substrate; Among them, an AlN layer is grown by PVD as a buffer layer; (3) growing an intrinsic GaN layer on the buffer layer; The intrinsic GaN layer is grown by MOCVD at a growth temperature of 1120° C. and a growth pressure of 200 torr.

[0061] (4) Growing an N-type GaN layer on the intrinsic GaN layer; The N-type GaN layer is grown by MOCVD at a growth temperature of 1140° C. and a growth pressure of 300 torr.

[0062] (5) Growing a multi-quantum well layer on the N-type GaN layer; Specifically, a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer are periodically grown by MOCVD until a multi-quantum well layer is obtained.

[0063] In x Ga 1-x The growth temperature of the N layer is 820°C and the growth pressure is 200 torr; the Al y Ga 1-y The growth temperature of the N layer is 910°C and the growth pressure is 200 torr; z Ga 1-z The growth temperature of the N layer is 790°C and the growth pressure is 200 torr; wGa 1-w The growth temperature of the N layer is 770°C and the growth pressure is 200 torr; α Ga 1-α The growth temperature of the N layer is 800°C and the growth pressure is 200 torr; the Al β Ga 1-β The growth temperature of the N layer is 900°C and the growth pressure is 200torr; the growth temperature of the non-doped GaN layer is 880°C and the growth pressure is 200torr; the growth temperature of the quantum barrier layer is 890°C and the growth pressure is 30torr~360torr.

[0064] (6) growing an electron blocking layer on the multi-quantum well layer; Specifically, an AlInGaN layer is grown by MOCVD as an electron blocking layer, and the growth temperature is 930° C. and the growth pressure is 150 torr.

[0065] (7) Growing a P-type GaN layer on the electron blocking layer; Specifically, the P-type GaN layer is grown by MOCVD at a growth temperature of 940° C. and a growth pressure of 400 torr.

[0066] Example 2 This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 1 in that: Along the growth direction of the LED epitaxial wafer, Al y Ga 1-y The Al content in the N layer gradually increases from 0.03 to 0.11. β Ga 1-β The Al component in the N layer gradually decreases from 0.1 to 0.02.

[0067] The rest are the same as in Example 1.

[0068] Example 3 This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 2 in that: In x Ga 1-x The N layer is doped with Si, with a doping concentration of 5.5×10 17 cm -3 .

[0069] The rest are the same as in Example 2.

[0070] Example 4 This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 3 in that: In x Ga 1-xAfter the N layer growth is completed, annealing is performed in the first mixed gas at a temperature of 950°C and a pressure of 200 torr. The first mixed gas is N 2 and H 2 Mixed gas, N 2 and H 2 The volume ratio is 1:5.

[0071] The rest is the same as Example 3.

[0072] Example 5 This embodiment provides a light emitting diode epitaxial wafer, which is different from the embodiment 4 in that: In α Ga 1-α After the N layer growth is completed, annealing is performed in the second mixed gas at a temperature of 840°C and a pressure of 200 torr. The second mixed gas is N 2 and NH 3 Mixed gas, N 2 and NH 3 The volume ratio is 1:1.5.

[0073] The rest is the same as Example 4.

[0074] Comparative Example 1 This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that: The multi-quantum well layer does not include a pre-well protection layer and a post-well protection layer.

[0075] The rest are the same as in Example 1.

[0076] Comparative Example 2 This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that: The multi-quantum well layer does not include a pre-well protection layer.

[0077] The rest are the same as in Example 1.

[0078] Comparative Example 3 This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that: The multi-quantum well layer does not include a post-well protection layer.

[0079] The rest are the same as in Example 1.

[0080] Comparative Example 4 This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that: The pre-well protection layer does not include In z Ga 1-z N layer, In is not included in the post-well protection layerα Ga 1-α N layers.

[0081] The rest are the same as in Example 1.

[0082] Comparative Example 5 This comparative example provides a light emitting diode epitaxial wafer, which differs from Example 1 in that: In z Ga 1-z The proportion of In component in the N layer is 0.14 and remains constant; In α Ga 1-α The proportion of In component in the N layer is 0.12 and remains constant.

[0083] The rest are the same as in Example 1.

[0084] The light emitting diode epitaxial wafers obtained in Examples 1 to 5 and Comparative Examples 1 to 5 were made into 10 mil×24 mil chips, and their brightness at 200 mA was tested. The brightness improvement rate was calculated based on the data of Comparative Example 1.

[0085] Specifically, the brightness improvement rate = (brightness of each embodiment / comparative example - brightness of comparative example 1) / brightness of comparative example 1. The specific results are shown in the following table:

[0086] The above is a preferred embodiment of the invention. It should be pointed out that a person skilled in the art can make several improvements and modifications without departing from the principle of the invention. These improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A light emitting diode epitaxial wafer, characterized in that: It comprises a substrate, a buffer layer, an intrinsic GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer stacked in sequence on the substrate; the multi-quantum well layer is a periodic structure, and each period comprises a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer stacked in sequence; Wherein, the pre-well protection layer comprises In x Ga 1-x N layer, Al y Ga 1-y N layer and In z Ga 1-z N layer, the quantum well layer is In w Ga 1-w N layer, the well back protection layer includes In α Ga 1-α N layer, Al β Ga 1-β N layer and non-doped GaN layer, the quantum barrier layer is a GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light emitting diode epitaxial wafer, z gradually increases and α gradually decreases.

2. The light emitting diode epitaxial wafer according to claim 1, characterized in that: Along the growth direction of the LED epitaxial wafer, y gradually increases and β gradually decreases; The maximum value of y is 0.15, and the maximum value of β is 0.

12.

3. The light emitting diode epitaxial wafer according to claim 1 or 2, characterized in that: Along the growth direction of the LED epitaxial wafer, the Al y Ga 1-y The Al component in the N layer gradually increases from y1 to y2. β Ga 1-β The Al component in the N layer gradually decreases from β1 to β2; y2>β1,y1>β2; The value range of y1 is 0.02~0.06, the value range of y2 is 0.06~0.15, the value range of β1 is 0.05~0.12, and the value range of β2 is 0.01~0.

06.

4. The light emitting diode epitaxial wafer according to claim 1, characterized in that: In x Ga 1-x The N layer is doped with Si, and the doping concentration is ≤1×10 18 cm -3 .

5. The light emitting diode epitaxial wafer according to claim 1, characterized in that: The period number of the multi-quantum well layer is 5 to 16; In x Ga 1-x The thickness of the N layer is 0.1nm~0.5nm, and the value of x ranges from 0.01~0.05; The Al y Ga 1-y The thickness of the N layer is 0.1nm~0.8nm, and the value of y ranges from 0.02~0.15; In z Ga 1-z The thickness of the N layer is 0.2nm~1nm, and the value of z ranges from 0.02~0.4; In w Ga 1-w The thickness of the N layer is 1.8nm~3.9nm, and the value of w ranges from 0.1 to 0.4; In α Ga 1-α The thickness of the N layer is 0.2nm~1nm, and the value range of α is 0.08~0.4; The Al β Ga 1-β The thickness of the N layer is 0.1nm~0.8nm, and the value range of β is 0.01~0.1; The thickness of the non-doped GaN layer is 0.1 nm to 0.5 nm; The quantum barrier layer is doped with Si, and its doping concentration is 2.5×10 17 cm -3 ~8.7×10 17 cm -3 , the thickness of the quantum barrier layer is 6nm~15nm.

6. A method for preparing a light emitting diode epitaxial wafer, for preparing the light emitting diode epitaxial wafer according to any one of claims 1 to 5, characterized in that: include: providing a substrate; A buffer layer, an intrinsic GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer are sequentially grown on the substrate; the multi-quantum well layer is a periodic structure, and each period includes a pre-well protection layer, a quantum well layer, a post-well protection layer and a quantum barrier layer stacked in sequence; Wherein, the pre-well protection layer comprises In x Ga 1-x N layer, Al y Ga 1-y N layer and In z Ga 1-z N layer, the quantum well layer is In w Ga 1-w N layer, the well back protection layer includes In α Ga 1-α N layer, Al β Ga 1-β N layer and non-doped GaN layer, the quantum barrier layer is a GaN layer; x<z≤w, α≤w, y≥β; and along the growth direction of the light emitting diode epitaxial wafer, z gradually increases and α gradually decreases.

7. The method for preparing a light emitting diode epitaxial wafer according to claim 6, characterized in that: In x Ga 1-x After the N layer is grown, annealing is performed in the first mixed gas to roughen its surface; The annealing temperature is 800° C. to 1050° C., and the annealing pressure is 30 torr to 360 torr; the first mixed gas is a mixed gas of N2 and H2, and the volume ratio of N2 to H2 is 1:0.13 to 1:8.

2.

8. The method for preparing a light emitting diode epitaxial wafer according to claim 6 or 7, characterized in that: In α Ga 1-α After the N layer is grown, it is annealed in the second mixed gas to improve its crystallization degree; The annealing temperature is 800° C. to 1050° C., and the annealing pressure is 30 torr to 360 torr; the second mixed gas is a mixed gas of N2 and NH3, and the volume ratio of N2 to NH3 is 1:0.2 to 1:5.

6.

9. The method for preparing a light emitting diode epitaxial wafer according to claim 6, characterized in that: In x Ga 1-x The growth temperature of the N layer is 750℃~920℃, and the growth pressure is 30torr~360torr; The Al y Ga 1-y The growth temperature of the N layer is 780℃~920℃, and the growth pressure is 30torr~360torr; In z Ga 1-z The growth temperature of the N layer is 680℃~890℃, and the growth pressure is 30torr~360torr; In w Ga 1-w The growth temperature of the N layer is 665℃~820℃, and the growth pressure is 30torr~360torr; In α Ga 1-α The growth temperature of the N layer is 680℃~890℃, and the growth pressure is 30torr~360torr; The Al β Ga 1-β The growth temperature of the N layer is 780℃~920℃, and the growth pressure is 30torr~360torr; The growth temperature of the non-doped GaN layer is 800° C. to 920° C., and the growth pressure is 30 torr to 360 torr; The growth temperature of the quantum barrier layer is 816° C. to 935° C., and the growth pressure is 30 torr to 360 torr.

10. A light emitting diode, characterized in that: It comprises the light emitting diode epitaxial wafer as described in any one of claims 1 to 5.

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