High-density and low-power-consumption phase change storage material and preparation method and application thereof

Abstract

The invention relates to a high-density and low-power-consumption phase change storage material and a preparation method and application thereof, the phase change storage material is formed by alternately overlapping thin film layers of two different materials, namely MTe and N, and a nano composite multilayer thin film with a superlattice structure is obtained; the chemical general formula of the phase change storage material is [MTe (x)-N (y)] n, wherein M is selected from one of Ti, Mn or Sm; n is a phase change storage layer, and is selected from one of Ge-Sb-Te, Sb2Te3, GeTe, Ge-Sb, Ga-Sb or Sb-Se; x and y respectively represent the thicknesses of the two thin film layers, and the unit is nm; n is the number of alternating cycles of the two thin film layers, and the total thickness of the phase change storage material is 40-100 nm. Compared with the prior art, the phase change storage material prepared by the invention has the advantages of higher storage density, lower device power consumption, better phase change memory fatigue characteristic and the like.

Description

Technical Field

[0001] The present invention belongs to the technical field of microelectronic materials, and in particular relates to a high-density, low-power consumption phase-change storage material and a preparation method and application thereof. Background Art

[0002] Recent advances in technologies such as artificial intelligence, cloud computing, and big data have intensified the demand for data storage solutions, exposing the limitations of traditional memory systems constrained by the von Neumann architecture. In response, the research community has shifted its focus to non-volatile memory technologies aimed at addressing these limitations and supporting neuromorphic computing. Phase change random access memory has become a leading candidate for the next generation of non-volatile memory due to its low power consumption, high data retention, storage density, and compatibility with complementary metal oxide semiconductor (CMOS) technology.

[0003] Phase change memory materials can represent data 0 and 1 based on the reversible high-resistance state-low-resistance state transition of the material, thereby realizing the storage method of data read and write operations. Phase change memory can not only realize two-level resistance transition, namely complete crystalline state and complete amorphous state, but also obtain continuous resistance state (partial amorphous state or intermediate resistance state) transition by applying electric pulses of varying intensity to the phase change memory unit between the crystalline state and the amorphous state. This allows phase change memory to accurately simulate synaptic plasticity behavior and has great potential to become a basic synaptic unit that can be used in neuromorphic computing systems that integrate storage and computing.

[0004] However, existing phase change memory materials only have two stable states, high resistance state and low resistance state. The intermediate resistance state between the crystalline state and the amorphous state of the phase change memory material has a resistance value that drifts significantly over time due to spontaneous structural relaxation characteristics or electric field effects (Chao Li et al. J. Mater. Chem. C. 10.1039 / C8TC00222C), thereby reducing the noise tolerance of the phase change memory, increasing the complexity of circuit design and error correction, and having poor reliability, which limits the application of phase change memory in more fields.

[0005] At present, Ge-Sb-Te, as the phase change memory material with the best comprehensive performance, is the main performance reference system in the field of phase change memory. However, the practicality of Ge-Sb-Te in PCRAM is restricted by many problems, including low storage density, high power consumption and large resistance drift coefficient, which limit its further application potential in this technology.

[0006] Therefore, seeking a phase change thin film material with high storage density is an urgent problem to be solved. Summary of the invention

[0007] The purpose of the present invention is to provide a method for overcoming the defects in the prior art.

[0008] The purpose of the present invention can be achieved by the following technical solutions:

[0009] The present invention first provides a high-density, low-power phase-change memory material, which is formed by alternately stacking thin film layers of two different materials, MTe and N, to obtain a nano-composite multilayer film with a superlattice structure;

[0010] The chemical formula of the phase change memory material is [MTe(x)-N(y)] n , wherein M is selected from one of Ti, Mn or Sm; N is a phase change memory layer, which is selected from one of Ge-Sb-Te, Sb2Te3, GeTe, Ge-Sb, Ga-Sb or Sb-Se; x and y respectively represent the thickness of the two thin film layers, in nm; n is the number of alternating cycles of the two thin film layers, and the total thickness of the phase change memory material is 40-100nm.

[0011] Furthermore, x is 3-40 nm, y is 3-40 nm, n is 1-16 periods, and the total thickness is ultimately maintained at 40-100 nm.

[0012] Furthermore, the phase change memory material has no less than three storage states.

[0013] The present invention also provides a method for preparing a high-density, low-power consumption phase-change memory material, specifically, by alternately depositing MTe film layers and N film layers on a substrate by magnetron sputtering.

[0014] Furthermore, the substrate used in the magnetron sputtering method is a SiO2 / Si(100) substrate.

[0015] Furthermore, the sputtering gas is argon.

[0016] Furthermore, the purity of the argon gas is above 99.999%.

[0017] Furthermore, the target materials used in the magnetron sputtering method are MTe and N respectively.

[0018] Furthermore, the target purity of MTe and N is above 99.999%.

[0019] Furthermore, the MTe and N are sputtered using DC and RF power respectively, and the sputtering power is 15-25W.

[0020] Furthermore, the gas flow rate of the magnetron sputtering method is 25-35 sccm, preferably 30 sccm.

[0021] Furthermore, the sputtering gas pressure of the magnetron sputtering method is 0.15-0.25Pa, preferably 0.2Pa.

[0022] The present invention also provides an application of a high-density, low-power consumption phase change storage material in the preparation of a polymorphic storage high-density phase change memory.

[0023] Compared with the prior art, the present invention has the following beneficial effects:

[0024] (1) The present invention can achieve multi-value storage effect and stable resistance drift characteristics by optimizing material structure and composition. The prepared phase change memory material has high storage density, low device power consumption and good phase change memory fatigue characteristics, and is expected to be applied in the fields of high-density storage and neuromorphic devices.

[0025] (2) Compared with conventional phase-change thin film materials, the phase-change memory material of the present invention can realize reversible conversion of high and low resistance values ​​in multiple resistance states under the operation of electric pulse signals, and there are at least three stable resistance states under the action of electric pulses, which can realize multi-level storage and greatly improve the storage density of the memory device.

[0026] (3) Compared with conventional phase-change thin film materials, the phase-change memory material of the present invention has higher crystalline and amorphous resistances, and can greatly reduce the power consumption of PCRAM devices.

[0027] (4) The phase change memory material of the present invention can be repeatedly erased and written without fatigue for more than 2×10 5 Secondly, both the high and low resistance states have relatively stable resistance values, ensuring the reliability required for device application. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is a resistance-temperature relationship diagram of the phase change memory material of Example 1 of the present invention.

[0029] Figure 2 This is a resistance-temperature relationship diagram of the phase change memory material of Example 2 of the present invention.

[0030] Figure 3 Graph showing the relationship between resistance and temperature of the phase change memory materials of Examples 3-6 of the present invention.

[0031] Figure 4 This is a resistance-temperature relationship diagram of the phase change memory material of comparative example 1.

[0032] Figure 5 The resistance-temperature relationship diagram of the phase change memory materials of Example 1 and Comparative Examples 2-3.

[0033] Figure 6 4 is a resistance-voltage relationship diagram of the phase change memory device according to embodiment 1 of the present invention.

[0034] Figure 7 This is a fatigue performance diagram of the phase change memory device according to Example 1 of the present invention.

[0035] Figure 8 This is a resistance drift curve diagram of the phase change memory device according to Example 1 of the present invention. DETAILED DESCRIPTION

[0036] The present invention is described in detail below in conjunction with the accompanying drawings and specific embodiments. This embodiment is implemented based on the technical solution of the present invention, and provides a detailed implementation method and specific operation process, but the protection scope of the present invention is not limited to the following embodiments.

[0037] Unless otherwise specified, the reagents, methods, instruments and equipment used in the present invention are conventional reagents, methods, instruments and equipment in the art. Unless otherwise specified, the reagents and materials used in the following examples are commercially available.

[0038] Embodiment 1:

[0039] The present invention provides a high-density, low-power phase-change memory material, whose specific chemical structure is [MnTe(6)-Sb2Te3(6)]4. The preparation method is as follows:

[0040] S1: Clean the surface and back of the SiO2 / Si(100) substrate to remove dust particles, organic and inorganic impurities:

[0041] (a) placing the substrate in an ethanol solution and performing ultrasonic cleaning for 15 minutes to remove dust particles and inorganic impurities on the surface of the substrate;

[0042] (b) placing the substrate in an acetone solution and performing ultrasonic cleaning for 15 minutes to remove organic impurities on the substrate surface;

[0043] (c) placing the substrate in deionized water, cleaning it with ultrasound for 15 minutes, and then cleaning the surface again;

[0044] (d) Take out the substrate, blow dry it with pure Ar gas and set aside.

[0045] S2: prepared by magnetron sputtering [MnTe(a)-Sb2Te3(b)] x Preparation:

[0046] (a) Place MnTe and Sb2Te3 alloy targets, install the substrate, and then seal the vacuum chamber;

[0047] (b) Turn on the gas flow meter for 5 minutes, then put it in valve control mode, turn on the mechanical pump to evacuate, and when the vacuum reaches 5 Pa or below, start the molecular pump to evacuate to 2×10 -4 Below Pa;

[0048] (c) Set the RF power and DC power to 20W;

[0049] (d) High-purity Ar gas was used as the sputtering gas with a gas flow rate of 30 sccm and a sputtering pressure of 0.2 Pa.

[0050] S3: Use the coating monitoring program to coat the film. The required sputtering thickness can be changed by the sputtering time. The sputtering speed of the MnTe target is 0.45nm / s and the sputtering speed of the Sb2Te3 target is 0.2nm / s.

[0051] (a) The substrate is rotated to the MnTe target position, the DC power supply of MnTe is turned on, and the MnTe film is sputtered. After the sputtering of the MnTe film is completed, the DC power supply of MnTe is turned off;

[0052] (b) rotating the substrate to the Sb2Te3 target position, turning on the radio frequency power supply of Sb2Te3, and starting to sputter the Sb2Te3 film. After the sputtering of the Sb2Te3 film is completed, turning off the radio frequency power supply of Sb2Te3;

[0053] (c) Repeat steps (a) and (b) until the thickness of the multilayer film reaches the desired thickness.

[0054] In this embodiment, the thickness a of the single-layer MnTe is 6 nm, the thickness b of the Sb2Te3 layer is 6 nm, the alternating period n is 4, and the total thickness is 48 nm.

[0055] The phase change memory device is prepared using the phase change memory material prepared in this embodiment, and the specific preparation method is as follows:

[0056] (a) preparing the lower electrode layer TiN;

[0057] (b) preparing a phase change material layer on the lower electrode layer, wherein the phase change material layer includes the phase change material described in Example 1, and the chemical formula of the phase change material is [MnTe(6nm)-Sb2Te3(6nm)]4;

[0058] (c) Preparing an upper electrode layer Al on the phase change material layer.

[0059] In the process of preparing the phase change material by magnetron sputtering of MnTe and Sb2Te3 alloy targets, the background vacuum degree is less than 2.0×10 -4 Pa, the sputtering gas includes argon, and the sputtering temperature includes room temperature.

[0060] Embodiment 2:

[0061] The present invention provides a high-density, low-power phase-change memory material, whose specific chemical structure is [MnTe(25nm)-Ge2Sb2Te5(25nm)]1. Figure 2 As shown, the difference from Example 1 is that the present application is formed by alternating thin film layers of two different materials, MnTe and Ge2Sb2Te5, and the thickness of the two thin film layers is 25nm; the number of periods is 1.

[0062] Embodiment 3:

[0063] The present invention provides a high-density, low-power phase-change memory material, whose specific chemical structure is [MnTe (10nm) - Sb2Te3 (40nm)] 1. The difference from Example 1 is that the thickness of the MnTe thin film layer of the present application is 10nm, the thickness of the Sb2Te3 thin film layer is 40nm, and the number of periods is 1.

[0064] Embodiment 4:

[0065] The present invention provides a high-density, low-power phase-change memory material, whose specific chemical structure is [MnTe (20nm) - Sb2Te3 (30nm)] 1. The difference from Example 1 is that the thickness of the MnTe thin film layer of the present application is 20nm, the thickness of the Sb2Te3 thin film layer is 30nm, and the number of periods is 1.

[0066] Embodiment 5:

[0067] The present invention provides a high-density, low-power phase-change memory material, whose specific chemical structure is [MnTe (30nm) - Sb2Te3 (20nm)] 1. The difference from Example 1 is that the thickness of the MnTe thin film layer of the present application is 30nm, the thickness of the Sb2Te3 thin film layer is 20nm, and the number of periods is 1.

[0068] Embodiment 6:

[0069] The present invention provides a high-density, low-power phase-change memory material, whose specific chemical structure is [MnTe (40nm) - Sb2Te3 (10nm)] 1. The difference from Example 1 is that the thickness of the MnTe thin film layer of the present application is 40nm, the thickness of the Sb2Te3 thin film layer is 10nm, and the number of periods is 1.

[0070] Comparative Example 1:

[0071] This comparative example is selected from traditional GST materials, which were purchased from Zhongnuo New Materials Co., Ltd.

[0072] Comparative Example 2:

[0073] This comparative example provides a phase change memory material, and its specific chemical structure is [MnTe(50)]1. The difference from Example 1 is that the thickness of the MnTe thin film layer of this application is 50nm, there is no Sb2Te3 thin film layer, and the number of periods is 1.

[0074] Comparative Example 3:

[0075] This comparative example provides a phase change memory material, whose specific chemical structure is [Sb2Te3(50)]1. The difference from Example 1 is that this application does not have a MnTe thin film layer, the thickness of the Sb2Te3 thin film layer is 50 mm, and the number of cycles is 1.

[0076] The present invention carries out the following tests on the above-mentioned embodiments and comparative examples:

[0077] (1) The temperature of this test system is adjusted by a TP94 temperature control system. The heating rate can be adjusted between 10-100°C / min. The resistance of the film is measured by two metal probes in the test system in contact with the surface of the film sample. According to the change law of resistance with increasing temperature, the T of the corresponding PCM can be obtained. c , the resistance change when the temperature rises at a rate of 30℃ / min during the test.

[0078] (2) RV characteristic curve test:

[0079] The device test system is mainly composed of Cascade probe station, Tektronix AWG 5002B arbitrary waveform generator, Keithley2600 parameter analyzer, GPIB card and control computer. The high resistance state is regarded as the reset state of the device, and the low resistance state is regarded as the set state. Under the action of the voltage pulse, the device can quickly complete the set process, and the device resistance decreases by an order of magnitude. The reset process is a process in which the resistance state gradually increases, and there are multiple intermediate resistance states. As the applied pulse width decreases, the reset voltage required by the device becomes higher. The device power consumption is calculated according to the following formula:

[0080]

[0081] (3) Fatigue performance test of phase change memory:

[0082] The RV window is completed by applying electric pulses to the device storage unit, and the fatigue characteristics of the device are obtained by setting appropriate erase pulse and write pulse widths.

[0083] (4) Resistance drift curve test of phase change memory:

[0084] During the RV test, the pulse application is suspended when the device is in the reset state, and the resistance change characteristics over time are measured at room temperature.

[0085] The resistance-temperature relationship of the phase change memory material prepared in Example 1 of the present invention is as follows: Figure 1 The curve shows that the [MnTe(6nm)-Sb2Te3(6nm)]4 phase change material undergoes four phase changes and stabilizes into five different resistance states, indicating the ability to store five independent states. The resistance-temperature relationship of the conventional phase change material GST of Comparative Example 1 is shown in Figure 4 As shown, the phase change material GST of comparative example 1 has only three resistance states. The above results show that the number of stable states of the phase change memory material prepared by the present invention has increased from three in the traditional phase change material to five, indicating that the phase change memory material of the present invention has the potential to significantly increase the storage density. The resistance-temperature relationship of the phase change memory material prepared in Example 2 of the present invention is shown in FIG. Figure 2 As shown in the figure, the obtained curve shows that the phase change material also undergoes four phase changes and stabilizes into five different resistance states, indicating that its thermal stability and storage density are also greatly improved compared with the comparative phase change material GST. The resistance-temperature relationship of the phase change storage material prepared in Example 3-6 is shown in Figure 3 As shown, the above phase change memory materials all have more than 3 storage states and all have good phase change storage capabilities.

[0086] The resistance-temperature relationship of the phase change memory materials of Example 1 of the present invention and Comparative Examples 2-3 is as follows: Figure 5 Compared with the single-layer MnTe and Sb2Te3 phase change materials, the [MnTe(6nm)-Sb2Te3(6nm)]4 phase change material after the composite of MnTe and Sb2Te3 has a more obvious and stable resistance state during the phase change process, and has more stable states compared with Examples 3-6, and has better performance effects.

[0087] Further, the phase change temperatures of the four phase change processes of the [MnTe(6nm)-Sb2Te3(6nm)]4 phase change material of Example 1 are 145.3°C ("1 state" to "2 state"), 182.1°C ("2 state" to "3 state"), 335.4°C ("3 state" to "4 state") and 424.7°C ("4 state" to "5 state"), respectively. Specifically, under low temperature conditions, the [MnTe(6nm)-Sb2Te3(6nm)]4 phase change film exhibits high resistance, referred to as "1 state". As the temperature increases, the resistance gradually decreases. Further increase in temperature results in two sharp drops in resistance, with a resistance contrast greater than 10, meeting the switching ratio requirements of the corresponding phase change memory. When the temperature exceeds 250°C, the resistance of the film increases significantly in two cases, thereby identifying additional high resistance states, namely "4 state" and "5 state", thereby further expanding the data storage capacity and greatly improving the storage density of the phase change memory. Compared with traditional GST phase change materials (160°C), it has ultra-high thermal stability.

[0088] Figure 6 The resistance-voltage relationship diagram of the phase change memory obtained in Example 1 of the present invention. When the pulse voltage increases in increments of 0.1V, the resistance-voltage curve shows a clear resistance window with multi-level storage characteristics, and the resistance change can meet the switching ratio requirements of the phase change memory. For the reset process, the main goal is to transform the phase change material from a crystalline state to an amorphous state. We Figure 5 It is observed that the reset curve shows a crystalline platform between the fully crystalline "3" state and the amorphous "1" state, marked as the "2" state. The reset power consumption reaches 0.43PJ (4.3×10 -13 J). With GST (9.7×10 -10 J), the power consumption is three orders of magnitude lower than that of phase change memory, which greatly reduces the power consumption of phase change memory.

[0089] Figure 7 This is a fatigue performance diagram of the phase change memory obtained in Example 1 of the present invention. The device can be repeatedly erased and written for more than 2×10 5 Secondly, both the high and low resistance states have relatively stable resistance values, ensuring the reliability required for the application of phase change memory devices.

[0090] Figure 8 The resistance drift curve of the phase change memory device obtained in Example 1 of the present invention is shown in FIG. The phase change memory device obtains resistance drift curves of four states. According to the formula R(t)=R0(t / t0) v The resistance drift coefficients from high resistance to low resistance are 0.005, 0.031, 0.055, and 0.016, respectively. Compared with GST (0.11), it shows more stable structural characteristics and data reliability.

[0091] In summary, the phase change memory material prepared by the present invention has the advantages of high storage density, low power consumption, good thermal stability, stable structure, etc. It can realize multi-value storage effect and stable resistance drift characteristics, improve the storage density of phase change memory, lower device power consumption and better phase change memory fatigue characteristics, and therefore has broad application value in the fields of high-density storage and neuromorphic devices.

[0092] The above description of the embodiments is to facilitate the understanding and use of the invention by those skilled in the art. It is obvious that those skilled in the art can easily make various modifications to these embodiments and apply the general principles described herein to other embodiments without creative work. Therefore, the present invention is not limited to the above embodiments, and improvements and modifications made by those skilled in the art based on the disclosure of the present invention without departing from the scope of the present invention should be within the scope of protection of the present invention.

Claims

1. A high-density, low-power phase-change memory material, characterized in that: The nanocomposite multilayer film with a superlattice structure is obtained by alternately stacking thin film layers of two different materials, MTe and N; The chemical formula of the phase change memory material is [MTe(x)-N(y)] n , wherein M is selected from one of Ti, Mn or Sm; N is a phase change memory layer, which is selected from one of Ge-Sb-Te, Sb2Te3, GeTe, Ge-Sb, Ga-Sb or Sb-Se; x and y respectively represent the thickness of the two thin film layers, in nm; n is the number of alternating cycles of the two thin film layers, and the total thickness of the phase change memory material is 40-100nm.

2. A high-density, low-power phase-change memory material according to claim 1, characterized in that: The x is 3-40 nm, the y is 3-40 nm, and the n is 1-16.

3. The high-density, low-power phase-change memory material according to claim 1, characterized in that: The phase-change memory material has no less than three memory states.

4. A method for preparing a high-density, low-power phase-change memory material according to any one of claims 1 to 3, characterized in that: MTe thin film layers and N thin film layers are alternately deposited on the substrate by magnetron sputtering.

5. The method for preparing a high-density, low-power consumption phase change memory material according to claim 4, characterized in that: The substrate used in the magnetron sputtering method is a SiO2 / Si(100) substrate.

6. The method for preparing a high-density, low-power consumption phase change memory material according to claim 4, characterized in that: The sputtering gas is argon gas, and the purity of the argon gas is above 99.999%.

7. The method for preparing a high-density, low-power consumption phase change memory material according to claim 4, characterized in that: The target materials used in the magnetron sputtering method are MTe and N respectively, and the purity of the target materials of MTe and N is above 99.999%.

8. The method for preparing a high-density, low-power consumption phase change memory material according to claim 7, characterized in that: The MTe and N are sputtered using a DC or RF power source, and the sputtering power is 15-25W.

9. The method for preparing a high-density, low-power consumption phase change memory material according to claim 4, characterized in that: The gas flow rate of the magnetron sputtering method is 25-35 sccm, and the sputtering gas pressure is 0.15-0.25 Pa.

10. Use of the high-density, low-power phase-change memory material according to any one of claims 1 to 3 in preparing a polymorphic storage high-density phase-change memory.

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