Failure diagnosis method for semiconductor devices

Abstract

The present application discloses a failure diagnosis method for a semiconductor device, including obtaining initial drain-source current parameters of the semiconductor device to be diagnosed, and determining the abnormal conditions of the oxide layer of the semiconductor device according to the initial drain-source current parameters; after leaving the semiconductor device with abnormal conditions standing for a preset time duration, obtaining the current drain-source current parameters of the semiconductor device, and determining the mobile charge parameters of the oxide layer of the semiconductor device according to the initial drain-source current parameters and the current drain-source current parameters; obtaining the drain-source current of the semiconductor device, and determining the trap charge parameters of the gate oxide structure of the semiconductor device according to the drain-source current; diagnosing the failure cause of the semiconductor device according to the mobile charge parameters and the trap charge parameters. The embodiments of the present application can observe the change trend of the drain-source current of the device under different conditions by means of ordinary static test equipment, and check and determine the failure cause of the device.

Description

Technical Field

[0001] This application belongs to the technical field of semiconductor device detection, and particularly relates to a method for diagnosing the failure of semiconductor devices. Background Art

[0002] With the continuous expansion of the application fields of semiconductor devices, their reliability in use has received increasing attention. Among them, leakage current, as one of the important indicators for reliability assessment, it is necessary to further analyze it and conduct fault analysis to improve subsequent products.

[0003] Related technologies use equipment such as thermal imaging devices or low-light microscopes to achieve defect localization, and rely on focused ion beams to obtain the structural defects of the device to assist in fault analysis work. However, when the leakage current level is less than the application range of the above equipment, the failure causes of semiconductor devices cannot be accurately diagnosed. Summary of the Invention

[0004] The embodiments of this application provide a method for diagnosing the failure of semiconductor devices, which can observe the drain-source current of semiconductor devices under different conditions by means of ordinary static test equipment, and thus determine the failure cause according to the change trend of the drain-source current of semiconductor devices.

[0005] The embodiments of this application provide a method for diagnosing the failure of semiconductor devices, including:

[0006] Obtain the initial drain-source current parameters of the semiconductor device to be diagnosed, and determine the abnormal situation of the oxide layer of the semiconductor device according to the initial drain-source current parameters;

[0007] After leaving the semiconductor device with abnormal situation standing for a preset duration, obtain the current drain-source current parameters of the semiconductor device, and determine the mobile charge parameters of the oxide layer of the semiconductor device according to the initial drain-source current parameters and the current drain-source current parameters;

[0008] Obtain the drain-source current of the semiconductor device, and determine the trap charge parameters of the gate oxide structure of the semiconductor device according to the drain-source current;

[0009] Diagnose the failure cause of the semiconductor device according to the mobile charge parameters and the trap charge parameters.

[0010] In some optional embodiments, obtaining the drain-source current of the semiconductor device and determining the trap charge parameters of the gate oxide structure of the semiconductor device according to the drain-source current includes:

[0011] Apply a first voltage to the drain of the semiconductor device, apply a second voltage to the gate of the semiconductor device, and obtain the first test current of the semiconductor device;

[0012] A first voltage is provided to the drain of the semiconductor device, and a third voltage is provided to the gate of the semiconductor device to obtain a second test current of the semiconductor device. Herein, both the second voltage and the third voltage are negative voltages, and the third voltage is greater than the second voltage.

[0013] Compare the first test current with the second test current to determine whether there are trapped charges in the gate oxide structure of the semiconductor device.

[0014] In some alternative embodiments, comparing the first test current with the second test current to determine whether there are trapped charges in the gate oxide structure of the semiconductor device includes:

[0015] When the first test current is greater than the second test current, it is determined that there are trapped charges in the gate oxide structure of the semiconductor device.

[0016] When the first test current is equal to the second test current, it is determined that there are no trapped charges in the gate oxide structure of the semiconductor device.

[0017] In some alternative embodiments, the first voltage is obtained by multiplying the rated drain-source voltage by a first preset value, and the third voltage is not higher than the rated gate-source voltage multiplied by a second preset value.

[0018] In some alternative embodiments, the failure diagnosis method further includes:

[0019] Before obtaining the first test current, a first voltage is provided to the drain of the semiconductor device, and a zero voltage is provided to the gate of the semiconductor device to obtain a third test current of the semiconductor device.

[0020] In some alternative embodiments, the failure diagnosis method further includes:

[0021] After obtaining the second test current, a first voltage is provided to the drain of the semiconductor device, and a zero voltage is provided to the gate of the semiconductor device to obtain a fourth test current of the semiconductor device. According to the third test current and the fourth test current, it is determined whether there are interface state trapped charges in the semiconductor device.

[0022] In some alternative embodiments, after the semiconductor device with abnormal conditions is left standing for a preset duration, the current drain-source current parameter of the semiconductor device is obtained. Determining the mobile charge parameter of the oxide layer of the semiconductor device according to the initial drain-source current parameter and the current drain-source current parameter includes:

[0023] Leave the semiconductor device with abnormal conditions standing for a preset duration to wait for the semiconductor device to return to the original temperature condition.

[0024] Measure the current drain-source current parameter of the semiconductor device. When the current drain-source current parameter is equal to the initial drain-source current parameter, it is determined that there are no mobile charges in the oxide layer of the semiconductor device.

[0025] In some alternative embodiments, leaving the semiconductor device with abnormal conditions for a preset duration to wait for the semiconductor device to return to its original temperature condition includes:

[0026] Leaving the semiconductor device at a first temperature condition for a first preset duration, where the first temperature condition is at least 150 °C and the first preset duration is at least 1 hour; and / or,

[0027] Leaving the semiconductor device at room temperature for a second preset duration, where the second preset duration is at least 72 hours.

[0028] In some alternative embodiments, obtaining the initial drain-source current parameter of the semiconductor device to be diagnosed and determining the abnormal condition of the oxide layer of the semiconductor device based on the initial drain-source current parameter includes:

[0029] Obtaining the initial drain-source current parameter of the semiconductor device to be diagnosed and a preset verification value;

[0030] Comparing the initial drain-source current parameter with the preset verification value, and when the initial drain-source current parameter is less than the preset verification value, determining that the failure of the semiconductor device occurs in the oxide layer.

[0031] In some alternative embodiments, the preset verification value is in the order of hundreds of microamperes.

[0032] The failure diagnosis method of the embodiments of the present application is easy to implement and only needs to measure the drain-source current of the semiconductor device through ordinary static test equipment. This method first determines whether the leakage location is in the oxide layer by the magnitude of the drain-source current. After determining that the leakage location is in the oxide layer, qualitative analysis is performed on the mobile charges and trap charges in the oxide layer, and finally the failure cause of the semiconductor device is determined, which helps to carry out subsequent fault analysis and process improvement work. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] By reading the following detailed description of the preferred embodiments, various other advantages and benefits will become clear to those of ordinary skill in the art. The drawings are only for the purpose of showing the preferred embodiments and are not considered to be a limitation of the present application. Moreover, in all the drawings, the same reference numerals are used to represent the same components. In the drawings:

[0034] Figure 1 is a flowchart of the failure diagnosis method of the semiconductor device according to some embodiments of the present application;

[0035] Figure 2 is one of the sub-flowcharts of the failure diagnosis method of the semiconductor device according to some embodiments of the present application;

[0036] Figure 3Schematic diagram II of the sub - process of the failure diagnosis method for semiconductor devices according to some embodiments of the present application;

[0037] Figure 4 Schematic diagram III of the sub - process of the failure diagnosis method for semiconductor devices according to some embodiments of the present application;

[0038] Figure 5 Schematic diagram IV of the sub - process of the failure diagnosis method for semiconductor devices according to some embodiments of the present application. Detailed implementation manners

[0039] Hereinafter, embodiments of the technical solutions of the present application will be described in detail with reference to the accompanying drawings. The following embodiments are only used to illustrate the technical solutions of the present application more clearly, so they are only examples and cannot be used to limit the protection scope of the present application.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" and any variations thereof in the specification and claims of this application and the above - mentioned drawings are intended to cover non - exclusive inclusion.

[0041] In the description of the embodiments of this application, technical terms such as "first" and "second" are only used to distinguish different objects and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity, specific order or primary - secondary relationship of the indicated technical features. In the description of the embodiments of this application, "a plurality of" means more than two unless otherwise specifically defined.

[0042] Referring to "embodiments" herein means that the specific features, structures or characteristics described in connection with the embodiments can be included in at least one embodiment of this application. The phrase appears in various places in the specification and does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0043] In the description of the embodiments of this application, the term "and / or" is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after.

[0044] Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is a power device commonly used to achieve circuit switching or amplification. It is used in various electronic systems, including medical equipment, avionics and other fields, and its reliability has received widespread attention.

[0045] Drain-source current is one of the important indicators in reliability testing. Generally, it refers to the drain-source current under zero gate voltage, which refers to the tiny current that still exists when the MOSFET is turned off. Excessive drain-source current will reduce the reliability of the device, shorten its life, and even cause abnormality in the circuit. Therefore, it is necessary to conduct fault analysis based on the leakage cause in order to improve the process and increase the product yield.

[0046] In the related art, leakage diagnosis of the device is performed by measuring the IV curve between the drain-source electrodes of the device and using a leakage locating device. However, this diagnostic method is only applicable to the case where the leakage level is large. When the leakage level is small, the leakage locating device cannot observe obvious hot spots, making it difficult to determine the failure location and cause of the device. Alternatively, after observing the hot spots with the leakage locating device, the focused ion beam device cannot dissect and observe hard damage, making it difficult to know the failure location and determine the failure cause.

[0047] In order to solve the problems of the prior art, an embodiment of the present application provides a failure diagnosis method for a semiconductor device. The failure diagnosis method only uses ordinary static testing equipment to measure the drain-source current of the device under different conditions, thereby gradually locking the leakage position of the device according to the changing trend of the drain-source current to achieve failure diagnosis.

[0048] See also Figure 1 , the embodiment of the present application provides a failure diagnosis method for a semiconductor device, comprising:

[0049] S100, obtaining initial drain-source current parameters of the semiconductor device to be diagnosed, and determining the abnormality of the oxide layer of the semiconductor device according to the initial drain-source current parameters;

[0050] S200, after the semiconductor device with abnormal condition is left to stand for a preset period of time, a current drain-source current parameter of the semiconductor device is obtained, and a movable charge parameter of an oxide layer of the semiconductor device is determined according to the initial drain-source current parameter and the current drain-source current parameter;

[0051] S300, obtaining a drain-source current of the semiconductor device, and determining a trap charge parameter of a gate oxide structure of the semiconductor device according to the drain-source current;

[0052] S400 , diagnose failure causes of the semiconductor device according to movable charge parameters and trapped charge parameters.

[0053] For ease of understanding, hereinafter, a vertical N-channel MOSFET (Vertical Double-Diffused MOSFET, VDMOS) will be taken as an example for illustration.

[0054] The initial drain-source current parameter generally refers to the current value obtained by statically testing the device when the gate voltage of the device is zero; the current drain-source current parameter refers to the current value obtained by statically testing the device again in the state of zero gate voltage after the device has been left standing for a preset duration.

[0055] In step S300, the drain-source current refers to the current flowing from the drain to the source of the semiconductor device under different gate voltages, where the gate voltage is negative, so the N-MOS will not turn on.

[0056] It can be understood that in a finished semiconductor device, a chip generally includes an active region and a non-active region. In steps S100 and S200, the oxide layer includes both the gate oxide structure in the active region of the chip and the thick oxide structure in the non-active region. It should be noted that the thickness of the thick oxide structure in the non-active region is greater than the thickness of the gate oxide structure in the active region, or the thickness of the thick oxide structure in the non-active region is the same as the thickness of the gate oxide structure in the active region. Other special cases are not discussed in this application for the time being.

[0057] Thus, the diagnostic method provided by the embodiments of this application can be implemented by existing ordinary static test equipment. Only the drain-source current parameters of the device under specific conditions need to be obtained and compared, and then the leakage location of the semiconductor device can be locked through the change trend of the drain-source current, and finally failure diagnosis can be achieved and the failure cause can be determined, which is helpful for the subsequent fault analysis and process improvement, etc., and helps to improve the yield and electrical performance of the product.

[0058] It should be noted that although there are inevitably fixed oxide charges between the gate oxide structure in the active region and the thick oxide structure in the non-active region, the causes and control means of such charges are currently relatively clear, so this application does not discuss them for the time being.

[0059] According to some embodiments of the present application, please refer to Figure 2 , step S100, obtaining the initial drain-source current parameter of the semiconductor device to be diagnosed, and determining the abnormal situation of the oxide layer of the semiconductor device according to the initial drain-source current parameter includes:

[0060] S110, obtaining the initial drain-source current parameter of the semiconductor device to be diagnosed and a preset verification value;

[0061] S120, comparing the initial drain-source current parameter with the preset verification value, and when the initial drain-source current parameter is less than the preset verification value, determining that the failure of the semiconductor device occurs in the oxide layer.

[0062] Optionally, in step S120, the preset verification value is greater than or equal to 25 μA.

[0063] Further optionally, in step S120, the preset verification value is in the order of hundreds of microamperes. Exemplarily, the preset verification value is one of 180 μA, 160 μA, 150 μA, 140 μA, 120 μA, and 100 μA.

[0064] Optionally, in step S100, the voltage provided to the semiconductor device is not higher than the rated drain-source voltage to reduce introducing new damage to the semiconductor device during the test.

[0065] Thus, the failure diagnosis method first obtains the drain-source current value of the semiconductor device to be diagnosed, and differentiates whether the defect of the semiconductor device is caused by significant leakage due to macroscopic structural defects or by minute leakage due to microscopic charges based on the order of magnitude or the size of the drain-source current value. When the initial drain-source current parameter is small enough and lower than the preset verification value, it is considered that the failure of the semiconductor device is caused by charges in the oxide layer.

[0066] Specifically, the charges that may exist in the oxide layer include oxide layer trap charges, mobile charges, and interface state trap charges. Among them, the oxide layer trap charges and mobile charges are both distributed in the gate oxide structure in the active region and the thick oxide structure in the non-active region, and the interface state trap charges are mainly distributed in the gate oxide structure in the active region.

[0067] According to some embodiments of the present application, please refer to Figure 3 , step S200, after leaving the semiconductor device with abnormal conditions static for a preset duration, obtaining the current drain-source current parameter of the semiconductor device, and determining the mobile charge parameter of the oxide layer of the semiconductor device based on the initial drain-source current parameter and the current drain-source current parameter includes:

[0068] S210. Leave the semiconductor device with abnormal conditions static for a preset duration and wait for the semiconductor device to return to the original temperature condition;

[0069] S220. Measure the current drain-source current parameter of the semiconductor device. When the current drain-source current parameter is equal to the initial drain-source current parameter, it is determined that there are no mobile charges in the oxide layer of the semiconductor device.

[0070] It can be understood that in step S220, "equal to" includes exactly equal to and substantially equal to. Exemplarily, in one embodiment, when the deviation range of the current drain-source current parameter relative to the initial drain-source current parameter is less than or equal to 5%, it is considered that the current drain-source current parameter is equal to the initial drain-source current parameter.

[0071] Optionally, step S210 includes: S211, leaving the semiconductor device static for a first preset duration under a first temperature condition, where the first temperature condition is at least 150 °C and the first preset duration is at least 1 hour.

[0072] It can be understood that the device for providing the first temperature condition to the semiconductor device can directly select an existing heating device on the market, or a heating chamber can be added on the basis of the static test device. The present application does not limit this.

[0073] Thus, high temperature causes the mobile charges and oxide trap charges in the semiconductor device to redistribute, so that these charges are away from the Si / SiO2 interface. If the current drain-source current parameter after performing step S211 is equal to the initial drain-source current parameter, it is determined that there are no mobile charges and oxide trap charges in the semiconductor device.

[0074] Optionally, step S210 includes: S212, leaving the semiconductor device static for a second preset duration at room temperature, where the second preset duration is at least 72 hours and room temperature is taken as 25 °C.

[0075] It can be understood that in step S210, the time for the semiconductor device to return to the original temperature condition is 0. In other words, the semiconductor device after leaving static for the second preset duration can be directly tested to obtain the current drain-source current parameter.

[0076] Thus, waiting for the mobile charges in the semiconductor device to redistribute. If the current drain-source current parameter after performing step S212 is equal to the initial drain-source current parameter, it is determined that there are no mobile charges in the semiconductor device.

[0077] It can be understood that the mobile charges inside the oxide layer are free charges, and such charges are prone to displacement, thereby reducing the accumulation at the Si / SiO2 interface and achieving the improvement of the drain-source current. Among them, high temperature will accelerate the redistribution of free mobile charges and oxide trap charges, and can achieve the improvement of the drain-source current relatively quickly.

[0078] According to some embodiments of the present application, step S211 and step S212 can be executed together, or only one of them can be executed.

[0079] Thus, after determining that the failure of the semiconductor device is caused by the charges in the oxide layer, the present application checks one by one the possible charge types in the oxide layer, provides good conditions for the redistribution of mobile charges and oxide trap charges, and determines whether the leakage of the device is improved by comparing the initial drain-source current parameter with the current drain-source current parameter, so as to determine whether there are mobile charges and oxide trap charges in the oxide layer, providing a good basis for the subsequent fault analysis work.

[0080] According to some embodiments of the present application, please refer toFigure 4 , Step S300: Obtain the drain-source current of the semiconductor device, and determine the trap charge parameters of the gate oxide structure of the semiconductor device according to the drain-source current, including:

[0081] S320: Apply a first voltage to the drain of the semiconductor device, apply a second voltage to the gate of the semiconductor device, and obtain the first test current of the semiconductor device;

[0082] S340: Apply a first voltage to the drain of the semiconductor device, apply a third voltage to the gate of the semiconductor device, and obtain the second test current of the semiconductor device, where both the second voltage and the third voltage are negative voltages, and the third voltage is greater than the second voltage;

[0083] S360: Compare the first test current with the second test current to determine whether there are trap charges in the gate oxide structure of the semiconductor device.

[0084] Specifically, step S300 can be used to determine whether there are oxide layer trap charges and interface state trap charges in the gate oxide structure. When step S200 is executed prior to step S300, step S300 is only used to determine whether there are interface state trap charges in the gate oxide structure, so as to more accurately determine the failure reason of the semiconductor device.

[0085] It can be understood that the third voltage being greater than the second voltage means that when both the second voltage and the third voltage are negative voltages, the absolute value of the third voltage is greater than the absolute value of the second voltage.

[0086] Optionally, the first voltage is obtained by multiplying the rated drain-source voltage by a first preset value, and the first preset value is less than 1 to reduce the defect introduction that may be caused by too large a drain-source voltage during the test. Exemplarily, the first preset value is one of 0.9, 0.85, 0.8, 0.75, 0.7, 0.6.

[0087] Optionally, the absolute value of the third voltage is not higher than the rated gate-source voltage multiplied by a second preset value, and the second preset value is less than or equal to 1. Exemplarily, the second preset value is one of 1, 0.95, 0.9, 0.85, 0.8, 0.75, 0.7, 0.65, 0.6.

[0088] Taking the N-channel VDMOS as an example, if there are abnormally many trap charges in the oxide layer, since most of these trap charges are positively charged, the negative voltage provided by the gate can shield these positive charges, thereby alleviating the phenomenon of abnormal channel opening and depletion layer shrinkage of the semiconductor, and reducing the drain-source current.

[0089] Specifically, step S360 includes:

[0090] S361. When the first test current is greater than the second test current, it is determined that there are trap charges in the gate oxide structure of the semiconductor device;

[0091] S362. When the first test current is equal to the second test current, it is determined that there are no trap charges in the gate oxide structure of the semiconductor device.

[0092] Thus, by providing at least two different negative voltages to the gate of the semiconductor device and measuring whether the drain-source current will relieve as the negative voltage increases, it is verified whether there are trap charges in the oxide layer, so as to facilitate subsequent trace analysis of trap charges and process improvement.

[0093] It can be understood that in step S362, "equal to" includes exactly equal to and substantially equal to. Exemplarily, in one embodiment, when the deviation range of the second test current relative to the first test current is less than or equal to 5%, the second test current is regarded as equal to the first test current.

[0094] It should be noted that this application does not limit the execution order between step S200 and step S300. That is, in this test, it can first determine whether there are mobile charges in the oxide layer, or it can first determine whether there are trap charges in the oxide layer. In fact, the drain-source current caused by mobile charges will also show a decreasing trend in response to the increase of the negative gate voltage. Therefore, this application combines steps S200 and S300 to determine the defect cause of the oxide layer of the semiconductor device.

[0095] Optionally, please refer to Figure 5 , step S300 further includes: S330. Provide a first voltage to the drain of the semiconductor device, provide a fourth voltage to the gate of the semiconductor device, and obtain a fifth test current of the semiconductor device. The fourth voltage is a negative voltage between the second voltage and the third voltage.

[0096] It can be understood that to further improve the test accuracy and obtain the relative change relationship between the gate negative voltage and the drain-source current, step S330 can further include two or more sub-steps to achieve the adjustment of the stepping amplitude.

[0097] Thus, the fifth test current can be used as a supplement and compared with the first test current and the second test current to more clearly observe whether the drain-source current of the semiconductor device changes as the gate negative voltage changes.

[0098] According to some embodiments of the present application, please refer to Figure 5 , step S300 further includes:

[0099] S310. Provide a first voltage to the drain of the semiconductor device, provide a zero voltage to the gate of the semiconductor device, and obtain a third test current of the semiconductor device.

[0100] Optionally, in some embodiments, step S300 is performed prior to step S200, and the third test current may be the initial drain-source current parameter.

[0101] Optionally, in some embodiments, step S300 is performed after step S200, and the third test current may be the current drain-source current parameter.

[0102] Optionally, step S300 further includes:

[0103] S350: Apply a first voltage to the drain of the semiconductor device, apply a zero voltage to the gate of the semiconductor device, and obtain a fourth test current of the semiconductor device.

[0104] Thus, the third test current can be used as a supplement to compare with at least one of the first test current and the second test current to determine whether the drain-source current of the device will decrease as the negative gate voltage increases, and further determine whether there are trap charges in the oxide layer.

[0105] According to some embodiments of the present application, please refer to Figure 5 , step S300 further includes:

[0106] S370: Determine whether there are interface state trap charges in the semiconductor device according to the third test current and the fourth test current.

[0107] Specifically, when the third test current is equal to the fourth test current and the second test current is less than the first test current, it is determined that there are interface state trap charges in the semiconductor device. It can be understood that the equality here includes complete equality and substantial equality. Exemplarily, in one embodiment, the deviation range of the fourth test current relative to the third test current is less than or equal to 5%, that is, the third test current is regarded as equal to the fourth test current.

[0108] Thus, by comparing whether the drain-source saturation current of the device changes before and after the negative gate voltage test, combined with the relative change trend of the drain-source current following the negative gate voltage, the failure location of the semiconductor device is further clarified as the gate oxide structure in the active region or the thick oxide structure in the non-active region, and a more accurate failure reason is obtained.

[0109] To further illustrate the present application, the following specific tests are listed for description. Tests are carried out with a rated drain-source voltage of 100V and a rated gate-source voltage of 20V. The test results are shown in Table 1.

[0110]

[0111] Table 1

[0112] It is easy to draw a conclusion by observing Table 1 that the drain-source current gradually decreases as the negative gate voltage increases, and the drain-source current measured for the first time is basically the same as that after removing the negative gate voltage. Therefore, it can be determined that the failure cause of the semiconductor device at least includes interface state trap charges existing in the gate oxide structure of the active region.

[0113] According to some embodiments of the present application, in step S400, the mobile charge parameter includes 0 and 1 to respectively indicate whether there are mobile charges in the oxide layer of the device, or the mobile charge parameter includes a value calculated from the change in the drain-source current and other parameters.

[0114] According to some embodiments of the present application, in step S400, the trap charge parameter includes 0 and 1 to respectively indicate whether there are trap charges in the oxide layer of the device, or the trap charge parameter includes a value calculated from the change in the drain-source current and other parameters.

[0115] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the various embodiments of the present application, and they should all be covered within the scope of the claims and the specification of the present application. In particular, as long as there is no structural conflict, the various technical features mentioned in each embodiment can be combined in any way. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A method for diagnosing the failure of a semiconductor device, characterized in that, Including: Obtain the initial drain-source current parameter of the semiconductor device to be diagnosed, and determine the abnormal situation of the oxide layer of the semiconductor device according to the initial drain-source current parameter; After the semiconductor device with abnormal conditions is left standing for a preset time, obtain the current drain-source current parameter of the semiconductor device, and determine the mobile charge parameter of the oxide layer of the semiconductor device according to the initial drain-source current parameter and the current drain-source current parameter; Obtain the drain-source current of the semiconductor device, and determine the trap charge parameter of the gate oxide structure of the semiconductor device according to the drain-source current; Diagnose the failure cause of the semiconductor device according to the mobile charge parameter and the trap charge parameter; Among them, after the semiconductor device with abnormal conditions is left standing for a preset time, obtaining the current drain-source current parameter of the semiconductor device, and determining the mobile charge parameter of the oxide layer of the semiconductor device according to the initial drain-source current parameter and the current drain-source current parameter includes: leaving the semiconductor device with abnormal conditions standing for a preset time, and waiting for the semiconductor device to return to the original temperature condition; measuring the current drain-source current parameter of the semiconductor device, and when the current drain-source current parameter is equal to the initial drain-source current parameter, determining that there is no mobile charge in the oxide layer of the semiconductor device; The obtaining the drain-source current of the semiconductor device and determining the trap charge parameter of the gate oxide structure of the semiconductor device according to the drain-source current includes: providing a first voltage to the drain of the semiconductor device, providing a second voltage to the gate of the semiconductor device, and obtaining the first test current of the semiconductor device; providing a first voltage to the drain of the semiconductor device, providing a third voltage to the gate of the semiconductor device to obtain the second test current of the semiconductor device, where both the second voltage and the third voltage are negative voltages, and the third voltage is greater than the second voltage; comparing the first test current and the second test current to determine whether there is trap charge in the gate oxide structure of the semiconductor device.

2. The failure diagnosis method of the semiconductor device according to claim 1, characterized in that The comparing the first test current and the second test current to determine whether there is trap charge in the gate oxide structure of the semiconductor device includes: When the first test current is greater than the second test current, it is determined that there is trap charge in the gate oxide structure of the semiconductor device; When the first test current is equal to the second test current, it is determined that there is no trap charge in the gate oxide structure of the semiconductor device.

3. The failure diagnosis method of the semiconductor device according to claim 1, characterized in that The first voltage is obtained by multiplying the rated drain-source voltage by a first preset value, and the third voltage is not higher than the rated gate-source voltage multiplied by a second preset value.

4. The method for diagnosing the failure of a semiconductor device according to claim 1, wherein It also includes: Before obtaining the first test current, provide a first voltage to the drain of the semiconductor device, provide a zero voltage to the gate of the semiconductor device, and obtain the third test current of the semiconductor device.

5. The method for diagnosing the failure of a semiconductor device according to claim 4, characterized in that, It also includes: After obtaining the second test current, provide a first voltage to the drain of the semiconductor device, provide a zero voltage to the gate of the semiconductor device, obtain the fourth test current of the semiconductor device, and determine whether there is interface state trap charge in the semiconductor device according to the third test current and the fourth test current.

6. The failure diagnosis method of the semiconductor device according to claim 1, characterized in that The leaving the semiconductor device with abnormal conditions standing for a preset time and waiting for the semiconductor device to return to the original temperature condition includes: Let the semiconductor device stand still for a first preset duration under a first temperature condition, where the first temperature condition is at least 150 °C and the first preset duration is at least 1 hour; and / or, Let the semiconductor device stand still for a second preset duration at room temperature, where the second preset duration is at least 72 hours.

7. The failure diagnosis method of the semiconductor device according to claim 1, characterized in that, The obtaining of the initial drain-source current parameter of the semiconductor device to be diagnosed and the determination of the abnormality of the oxide layer of the semiconductor device according to the initial drain-source current parameter include: Obtain the initial drain-source current parameter and the preset verification value of the semiconductor device to be diagnosed; Compare the initial drain-source current parameter with the preset verification value. When the initial drain-source current parameter is less than the preset verification value, it is determined that the failure of the semiconductor device occurs in the oxide layer.

8. The failure diagnosis method of the semiconductor device according to claim 7, characterized in that, The preset verification value is in the order of hundreds of microamperes.

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