Power consumption control system and method, GPU cluster, electronic equipment and storage medium

By dividing functional domains and managing power in the GPU system on chip, the power waste problem when the GPU card is idle is solved, and the effect of reducing power consumption and extending service life is achieved.

CN119759197APending Publication Date: 2025-04-04MOORE THREADS TECH CO LTD
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Patent Information

Application Number
CN202411823538.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-11
Publication Date
2025-04-04

AI Technical Summary

Technical Problem

In servers with artificial intelligence training or high-performance computing, multiple GPU cards are wasted when they are idle and lead to a shorter life of the GPU card.

Method used

By dividing the first functional domain and the second functional domain in the GPU system on chip, a CPU and a power management module that cannot be powered off is set in the first functional domain, and a hardware module that can be powered off is set in the second functional domain. When the GPU system on chip is not loaded, the server sends a low-power request to the CPU, and the CPU sends a power-off command to the power management module to turn off the power supply of the hardware module in the second functional domain.

Benefits of technology

It effectively reduces the power consumption of the GPU system on chip without distributing the GPU load and extends the service life of the GPU system on chip.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a power consumption control system and method, a GPU cluster, electronic equipment and a storage medium. The system comprises a server and a GPU system-on-chip, and the GPU system-on-chip is divided into a first functional domain and a second functional domain; the server side is used for sending a low-power-consumption request to a first CPU in the GPU system-on-chip under the condition of determining that the GPU load is not distributed to the GPU system-on-chip; a first CPU in the GPU system-on-chip is used for responding to the low-power-consumption request and sending a power-off instruction to a power management module in the GPU system-on-chip; and a power management module in the GPU system-on-chip is used for responding to the power-off instruction and controlling to close a power supply of a hardware module in a second functional domain in the GPU system-on-chip. According to the embodiment of the invention, through a mode of combining software and hardware, the power consumption of the GPU system-on-chip without GPU load distribution is effectively reduced.
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Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a power consumption control system and method, a GPU cluster, an electronic device, and a storage medium. Background Art

[0002] In artificial intelligence (AI) training or high performance computing (HPC) servers, multiple graphics processing units (GPU) cards are usually used for computing. However, in some scenarios, due to insufficient load, some GPU cards are idle, which wastes electricity, and because the GPU cards are always in working state, the service life of the GPU cards is shortened. Summary of the invention

[0003] The present disclosure proposes a power consumption control system and method, a GPU cluster, an electronic device, and a technical solution for a storage medium.

[0004] According to one aspect of the present disclosure, a power consumption control system is provided, comprising: a server, a GPU system-on-chip, wherein the GPU system-on-chip is divided into a first functional domain and a second functional domain, the first functional domain comprising a first CPU and a power management module, and the second functional domain comprising hardware modules required for running GPU loads; the server is used to send a low power consumption request to the first CPU in the GPU system-on-chip when it is determined that the GPU system-on-chip has no GPU load allocated; the first CPU in the GPU system-on-chip is used to respond to the low power consumption request and send a power-off instruction to the power management module in the GPU system-on-chip; the power management module in the GPU system-on-chip is used to respond to the power-off instruction and control power off of the hardware modules in the second functional domain of the GPU system-on-chip.

[0005] In a possible implementation, the first functional area includes modules in the GPU system-on-chip that need to remain powered on continuously; the second functional area includes modules in the GPU system-on-chip that can be powered off when the GPU load is not running.

[0006] In a possible implementation, the first CPU in the GPU system-on-chip is configured to enter a low power consumption mode after determining to turn off the power of a hardware module in a second functional domain of the GPU system-on-chip.

[0007] In a possible implementation, the server includes a GPU driver and a first PCIE device, and the first functional domain in the GPU system-on-chip includes a second PCIE device; the GPU driver is used to send the low power consumption request to the first PCIE device, wherein the low power consumption request includes a GPU system-on-chip identifier for indicating the GPU system-on-chip; the first PCIE device is used to send the low power consumption request to the second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier.

[0008] In one possible implementation, the second PCIE device in the GPU system-on-chip is used to respond to the low power consumption request and send a first interrupt request to the first CPU in the GPU system-on-chip, wherein the first interrupt request is used to request to turn off the power of the hardware module in the second functional domain of the GPU system-on-chip.

[0009] In one possible implementation, the server is used to send a wake-up request to the first CPU in the GPU system-on-chip; the first CPU in the GPU system-on-chip is used to respond to the wake-up request and send a power-on instruction to the power management module in the GPU system-on-chip; the power management module in the GPU system-on-chip is used to respond to the power-on instruction and control the power supply of the hardware modules in the second functional domain of the GPU system-on-chip.

[0010] In one possible implementation, the GPU driver is used to send the wake-up request to the first PCIE device, wherein the wake-up request includes the GPU system-on-chip identifier for indicating the GPU system-on-chip; the first PCIE device is used to send the wake-up request to the second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier; the second PCIE device in the GPU system-on-chip is used to respond to the wake-up request and send a second interrupt request to the first CPU in the GPU system-on-chip, wherein the second interrupt request is used to request to start the power supply of the hardware module in the second functional domain of the GPU system-on-chip.

[0011] In one possible implementation, the GPU driver is used to send an initialization request to the first PCIE device, wherein the initialization request includes the GPU system-on-chip identifier for indicating the GPU system-on-chip, and the initialization request is used to initialize the hardware modules in the second functional domain in the GPU system-on-chip; the first PCIE device is used to send the initialization request to the second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier.

[0012] In one possible implementation, the second PCIE device in the GPU system-on-chip is used to respond to the initialization request and send a third interrupt request to the first CPU in the GPU system-on-chip; the first CPU in the GPU system-on-chip is used to respond to the third interrupt and initialize the hardware module in the second functional domain of the GPU system-on-chip.

[0013] In a possible implementation, the server is used to distribute GPU load to the GPU system-on-chip.

[0014] According to one aspect of the present disclosure, a power consumption control method is provided, and the method is applied to the above-mentioned power consumption control system, wherein the system comprises: a server and a GPU system-on-chip, wherein the GPU system-on-chip is divided into a first functional domain and a second functional domain, wherein the first functional domain comprises a first CPU and a power management module, and the second functional domain comprises hardware modules required for running GPU loads; the method comprises: in the case of determining that the GPU system-on-chip has not allocated a GPU load, using the server to send a low power consumption request to the first CPU in the GPU system-on-chip; using the first CPU in the GPU system-on-chip to respond to the low power consumption request and send a power-off instruction to the power management module in the GPU system-on-chip; and using the power management module in the GPU system-on-chip to respond to the power-off instruction and control power off of the hardware modules in the second functional domain of the GPU system-on-chip.

[0015] According to one aspect of the present disclosure, a GPU cluster is provided, comprising: a server in the above-mentioned power consumption control system and at least one GPU system-on-chip; for any GPU system-on-chip, the GPU system-on-chip is divided into a first functional domain and a second functional domain, the first functional domain includes a first CPU and a power management module, and the second functional domain includes a hardware module required to run the GPU load.

[0016] According to one aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to call the instructions stored in the memory to execute the above method.

[0017] According to one aspect of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored, and the computer program instructions implement the above method when executed by a processor.

[0018] In the disclosed embodiment, the power consumption control system includes: a server, a GPU system-on-chip, wherein the GPU system-on-chip is divided into a first functional domain and a second functional domain, and only a first CPU and a power management module that cannot be powered off are set in the first functional domain, and the hardware modules required for running the GPU load, that is, all hardware modules that can be powered off when there is no GPU load, are set in the second functional domain. Then, when the server determines that the GPU system-on-chip has not allocated a GPU load, it can send a low power consumption request to the first CPU in the GPU system-on-chip, and the first CPU in the GPU system-on-chip responds to the low power consumption request and sends a power-off instruction to the power management module in the GPU system-on-chip, so that the power management module in the GPU system-on-chip responds to the power-off instruction and controls the power off of the hardware modules in the second functional domain of the GPU system-on-chip, thereby effectively reducing the power consumption of the GPU system-on-chip to which the GPU load is not allocated through a combination of software and hardware, and can extend the service life of the GPU system-on-chip.

[0019] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and do not limit the present disclosure. Other features and aspects of the present disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used to illustrate the technical solutions of the present disclosure together with the specification.

[0021] Figure 1 A block diagram of a power consumption control system according to an embodiment of the present disclosure is shown.

[0022] Figure 2 The embodiment according to the present disclosure is shown Figure 1 Schematic diagram of the interaction between the server and the GPU on-chip system in the power consumption control system shown.

[0023] Figure 3 A schematic diagram of a GPU cluster according to an embodiment of the present disclosure is shown.

[0024] Figure 4 A flow chart of a power consumption control method according to an embodiment of the present disclosure is shown.

[0025] Figure 5 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0026] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0027] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0028] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.

[0029] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0030] Figure 1 FIG. 1 is a block diagram of a power consumption control system according to an embodiment of the present disclosure. Figure 1 As shown, the system includes: a server, a GPU system-on-chip, wherein the GPU system-on-chip is divided into a first functional domain and a second functional domain, the first functional domain includes a first CPU and a power management module, and the second functional domain includes hardware modules required for running GPU loads; the server is used to send a low power consumption request to the first CPU in the GPU system-on-chip when it is determined that the GPU system-on-chip has not allocated a GPU load; the first CPU in the GPU system-on-chip is used to respond to the low power consumption request and send a power-off instruction to the power management module in the GPU system-on-chip; the power management module in the GPU system-on-chip is used to respond to the power-off instruction and control the power off of the hardware modules in the second functional domain of the GPU system-on-chip.

[0031] In the disclosed embodiment, the power consumption control system includes: a server, a GPU system-on-chip, wherein the GPU system-on-chip is divided into a first functional domain and a second functional domain, and only a first CPU and a power management module that cannot be powered off are set in the first functional domain, and the hardware modules required for running the GPU load, that is, all hardware modules that can be powered off when there is no GPU load, are set in the second functional domain. Then, when the server determines that the GPU system-on-chip has not allocated a GPU load, it can send a low power consumption request to the first CPU in the GPU system-on-chip, and the first CPU in the GPU system-on-chip responds to the low power consumption request and sends a power-off instruction to the power management module in the GPU system-on-chip, so that the power management module in the GPU system-on-chip responds to the power-off instruction and controls the power off of the hardware modules in the second functional domain of the GPU system-on-chip, thereby effectively reducing the power consumption of the GPU system-on-chip to which the GPU load is not allocated through a combination of software and hardware, and can extend the service life of the GPU system-on-chip.

[0032] A GPU system-on-chip is a system that integrates a GPU with other hardware modules (e.g., CPU, memory, interface, etc.) on a single chip. This integrated design enables the GPU to work more closely with other hardware modules, thereby improving overall performance and efficiency.

[0033] In one example, the server and the GPU system-on-chip communicate based on the high-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, PCIE).

[0034] In a possible implementation, the server includes a GPU driver and a first PCIE device, and the first functional domain in the GPU system-on-chip includes a second PCIE device.

[0035] Based on the first PCIE device on the server side and the second PCIE device in the first functional domain of the GPU system on chip, communication between the server side and the GPU system on chip is achieved.

[0036] In one example, the first PCIE device at the server end may be a root complex (RC).

[0037] RC is a key component in the PCIE architecture. It is the connection point between the PCIE device and the CPU and is the starting point device of the PCIE communication link.

[0038] In one example, the RC may be integrated into the CPU of the server.

[0039] Figure 2 The embodiment according to the present disclosure is shown Figure 1The schematic diagram of the interaction between the server and the GPU chip system in the power consumption control system is shown in FIG. Figure 2 As shown, the server is provided with a first PCIE device: RC, and RC is integrated in the CPU of the server.

[0040] In one example, the second PCIE device in the first functional domain of the GPU system-on-chip may be a PCIE terminal device (Endpoint). PCIE EP is the end point device of a PCIE communication link.

[0041] like Figure 2 As shown, a PCIE EP is set in the first functional domain of the GPU system on chip. Based on the RC of the server and the PCIE EP in the first functional domain of the GPU system on chip, communication between the server and the GPU system on chip is realized.

[0042] Among them, the RC of the server side and the PCIE EP in the first functional domain of the GPU on-chip system can be directly connected or connected through a switch, and the present disclosure does not make specific limitations on this.

[0043] In a possible implementation, the first functional area includes modules in the GPU system-on-chip that need to remain powered on continuously; the second functional area includes modules in the GPU system-on-chip that can be powered off when the GPU load is not running.

[0044] For any GPU system-on-chip, the modules that need to keep the power on all the time can be set in the first functional domain, and all other modules that can be powered off can be set in the second functional domain.

[0045] like Figure 2 As shown, the first functional domain includes: a first CPU, a PCIE EP, a slave network-on-Chip (SUB Network-on-Chip, SUB NOC), and a static random access memory (Static Random-Access Memory, SRAM) and a power management module required to run the first CPU. The second functional domain includes: a GPU, a video processing unit (VPU), a display unit (Display), a second CPU, an image signal processor (Image Signal Processor, ISP), and a main network-on-Chip (Main NOC). Among them, the first CPU is used to perform power management on the hardware modules in the second functional domain, and the second CPU is used to control the hardware model in the second functional domain to perform corresponding data processing. In addition to the above-mentioned hardware modules, the second functional domain can also set other hardware modules according to actual business needs, and the present disclosure does not make specific limitations on this.

[0046] Compared with setting the Main NOC with higher power consumption in the first functional domain, the disclosed embodiment sets the Main NOC in the second functional domain, which can effectively reduce the power consumption of the GPU system-on-chip after the GPU system-on-chip cuts off the power to the hardware modules in the second functional domain.

[0047] Compared with using a double data rate synchronous dynamic random access memory (DDR) that is set outside the GPU chip system and consumes more power to support the operation of the first CPU, the embodiment of the present disclosure uses SRAM with lower power consumption to support the operation of the first CPU, which can effectively reduce the power consumption of the GPU chip system.

[0048] After the GPU system-on-chip is divided into the first functional domain and the second functional domain at the hardware level, corresponding instructions can be issued to the first functional domain of the GPU system-on-chip based on the software program on the server, so that the first functional domain of the GPU system-on-chip responds to the corresponding instructions to control the second functional domain of the GPU system-on-chip to power off or power on as needed, thereby effectively reducing the power consumption of the GPU system-on-chip to which the GPU load is not allocated through a combination of software and hardware.

[0049] In one example, the server includes: management software, the management software is used to receive GPU tasks issued by users, and distribute GPU load to the GPU on-chip system based on the GPU tasks.

[0050] In one example, when the GPU load corresponding to the GPU task is small, some GPU systems-on-chip may not be allocated GPU load. The management software can determine the GPU systems-on-chip to which the GPU load is not allocated as GPU systems-on-chip that need to enter a low power consumption state to reduce the power consumption of the GPU systems-on-chip to which the GPU load is not allocated.

[0051] In one possible implementation, the server includes a GPU driver and a first PCIE device, and the first functional domain in the GPU system-on-chip includes a second PCIE device; the GPU driver is used to send a low power consumption request to the first PCIE device, wherein the low power consumption request includes a GPU system-on-chip identifier for indicating the GPU system-on-chip; the first PCIE device is used to send the low power consumption request to the second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier.

[0052] The server includes a GPU driver, which is a software program for controlling and managing a GPU system-on-chip. After the server determines the GPU system-on-chip that needs to enter a low-power state based on the management software, the GPU driver sends a low-power request including a GPU system-on-chip identifier of the GPU system-on-chip that needs to enter a low-power state to a first PCIE device, so that the low-power request is effectively sent to a second PCIE device in the GPU system-on-chip that needs to enter a low-power state using the first PCIE device.

[0053] like Figure 2 As shown, the RC (first PCIE device) of the server sends a low power consumption request to the PCIE EP (second PCIE device) in the GPU system-on-chip that needs to enter a low power consumption state.

[0054] In one possible implementation, a second PCIE device in a GPU system-on-chip is used to respond to a low power consumption request and send a first interrupt request to a first CPU in the GPU system-on-chip, wherein the first interrupt request is used to request to shut down the power of a hardware module in a second functional domain of the GPU system-on-chip.

[0055] After receiving the low power request sent by the server, the second PCIE device in the GPU system-on-chip that needs to enter the low power state responds to the low power request and, based on the first interrupt request (irq), notifies the first CPU to power off the hardware modules in the second functional domain of the GPU system-on-chip. In response to the first irq, the first CPU sends a power-off instruction to the power management module in the GPU system-on-chip based on the SUB NOC. In response to the power-off instruction, the power management module controls to turn off the power of the hardware modules in the second functional domain of the GPU system-on-chip.

[0056] like Figure 2 As shown, the PCIE EP (second PCIE device) in the GPU system-on-chip sends the first irq to the first CPU. In response to the first irq, the first CPU turns off the power of the hardware modules (GPU, VPU, Display, second CPU, ISP, Main NOC, and other hardware modules) in the second functional domain of the GPU system-on-chip through the power management module.

[0057] In a possible implementation, the first CPU in the GPU system-on-chip is configured to enter a low power consumption mode after determining to turn off the power of the hardware modules in the second functional domain of the GPU system-on-chip.

[0058] After determining to turn off the power of the hardware modules in the second functional domain in the GPU system-on-chip, the first CPU in the GPU system-on-chip enters a low power consumption mode. At this time, the entire GPU system-on-chip enters a low power consumption state, effectively reducing power consumption.

[0059] In one example, when the GPU load corresponding to the GPU task received by the management software is large and the GPU on-chip system in a low-power state needs to be started to execute the GPU task, the server needs to execute the processing of exiting the low-power state for the GPU on-chip system in a low-power state to effectively execute the GPU task.

[0060] In one possible implementation, the server is used to send a wake-up request to the first CPU in the GPU system-on-chip; the first CPU in the GPU system-on-chip is used to respond to the wake-up request and send a power-on instruction to the power management module in the GPU system-on-chip; the power management module in the GPU system-on-chip is used to respond to the power-on instruction and control the power supply of the hardware modules in the second functional domain of the GPU system-on-chip.

[0061] The server sends a wake-up request to the first CPU in the GPU system-on-chip that is in a low-power state. The first CPU responds to the wake-up request and sends a power-on instruction to the power management module, so that the power management module responds to the power-on instruction and can control the power supply of the hardware modules in the second functional domain of the GPU system-on-chip, thereby causing the GPU system-on-chip to exit the low-power state.

[0062] In one possible implementation, a GPU driver is used to send a wake-up request to a first PCIE device, wherein the wake-up request includes a GPU system-on-chip identifier for indicating the GPU system-on-chip; the first PCIE device is used to send the wake-up request to a second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier; the second PCIE device in the GPU system-on-chip is used to respond to the wake-up request and send a second interrupt request to the first CPU in the GPU system-on-chip, wherein the second interrupt request is used to request to start the power supply of a hardware module in a second functional domain in the GPU system-on-chip.

[0063] After the server determines based on the management software that the GPU system-on-chip in a low power consumption state needs to exit the low power consumption state, the GPU driver of the server sends a wake-up request including a GPU system-on-chip identifier for indicating the GPU system-on-chip to the first PCIE device, so that the wake-up request is effectively sent to the second PCIE device in the GPU system-on-chip by using the first PCIE device.

[0064] like Figure 2As shown, the RC (first PCIE device) of the server sends a wake-up request to the PCIE EP (second PCIE device) in the GPU system on chip.

[0065] After receiving the wake-up request sent by the server, the second PCIE device in the GPU system-on-chip responds to the wake-up request and notifies the first CPU based on the second irq to power on the hardware modules in the second functional domain of the GPU system-on-chip. The first CPU responds to the second irq and sends a power-on instruction to the power management module in the GPU system-on-chip based on the SUB NOC. In response to the power-on instruction, the power management module controls the power supply of the hardware modules in the second functional domain of the GPU system-on-chip.

[0066] like Figure 2 As shown, the PCIE EP (second PCIE device) in the GPU system-on-chip sends the second irq to the first CPU. In response to the second irq, the first CPU starts the power supply of the hardware modules (GPU, VPU, Display, second CPU, ISP, Main NOC, and other hardware modules) in the second functional domain of the GPU system-on-chip through the power management module.

[0067] In one possible implementation, a GPU driver is used to send an initialization request to a first PCIE device, wherein the initialization request includes a GPU system-on-chip identifier for indicating the GPU system-on-chip, and the initialization request is used to initialize a hardware module within a second functional domain in the GPU system-on-chip; and the first PCIE device is used to send the initialization request to a second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier.

[0068] After determining that the GPU system-on-chip exits the low power consumption mode, the GPU driver of the server sends an initialization request including the GPU system-on-chip identifier to the first PCIE device, so that the initialization request is effectively sent to the second PCIE device in the GPU system-on-chip by using the first PCIE device.

[0069] In one possible implementation, the second PCIE device in the GPU system-on-chip is used to respond to the initialization request and send a third interrupt request to the first CPU in the GPU system-on-chip; the first CPU in the GPU system-on-chip is used to respond to the third interrupt and initialize the hardware module in the second functional domain of the GPU system-on-chip.

[0070] The second PCIE device in the GPU system-on-chip responds to the initialization request, and based on the third irq, notifies the first CPU to initialize the hardware modules in the second functional domain of the GPU system-on-chip, so as to prepare for the subsequent operation of the GPU load.

[0071] In a possible implementation, the server is used to distribute GPU load to the GPU system on chip.

[0072] After determining that the hardware modules in the second functional domain in the GPU system-on-chip have completed initialization, the server may allocate GPU load to the GPU system-on-chip, so that the GPU system-on-chip effectively executes GPU tasks.

[0073] In the disclosed embodiment, the power consumption control system includes: a server, a GPU system-on-chip, wherein the GPU system-on-chip is divided into a first functional domain and a second functional domain, and only a first CPU and a power management module that cannot be powered off are set in the first functional domain, and the hardware modules required for running the GPU load, that is, all hardware modules that can be powered off when there is no GPU load, are set in the second functional domain. Furthermore, when the server determines that the GPU system-on-chip has not allocated a GPU load, it can send a low power consumption request to the first CPU in the GPU system-on-chip, and the first CPU in the GPU system-on-chip responds to the low power consumption request and sends a power-off instruction to the power management module in the GPU system-on-chip, so that the power management module in the GPU system-on-chip responds to the power-off instruction and controls the power off of the hardware modules in the second functional domain of the GPU system-on-chip, thereby effectively reducing the power consumption of the GPU system-on-chip to which the GPU load is not allocated through a combination of software and hardware, and can extend the service life of the GPU system-on-chip.

[0074] Figure 3 A schematic diagram of a GPU cluster according to an embodiment of the present disclosure is shown. Figure 3 As shown, the GPU cluster includes the above Figure 1 and / or Figure 2 The server and at least one GPU system-on-chip shown in the figure; for any GPU system-on-chip, the GPU system-on-chip is divided into a first functional domain and a second functional domain, the first functional domain includes a first CPU and a power management module, and the second functional domain includes a hardware module required to run the GPU load.

[0075] Above Figure 1 and / or Figure 2 The server and at least one GPU chip system shown in the figure can form a GPU cluster, and the server is used to determine the GPU chip system in the GPU cluster that has no GPU load assigned, and then the server and the GPU chip system that has no GPU load assigned can form the above Figure 1 and / or Figure 2 The power consumption control system shown in the related embodiment can effectively realize the power-off / power-on processing of the GPU chip system without GPU load allocation. The specific process can be referred to Figure 1 and / or Figure 2 The detailed description of the relevant embodiments will not be repeated here.

[0076] Figure 4 A flowchart of a power consumption control method according to an embodiment of the present disclosure is shown. The method is applied to Figure 1 and / or Figure 2 The power consumption control system shown in the figure includes: a server and a GPU chip system, the GPU chip system is divided into a first functional domain and a second functional domain, the first functional domain includes a first CPU and a power management module, and the second functional domain includes hardware modules required to run GPU loads. Figure 4 As shown, the method includes:

[0077] In step S41, when it is determined that the GPU system-on-chip has not allocated GPU load, a low power consumption request is sent to the first CPU in the GPU system-on-chip by using the server.

[0078] In step S42, the first CPU in the GPU system-on-chip responds to the low power consumption request and sends a power-off instruction to the power management module in the GPU system-on-chip.

[0079] In step S43, the power management module in the GPU system-on-chip responds to the power-off instruction and controls the power off of the hardware modules in the second functional domain in the GPU system-on-chip.

[0080] Based on the above power consumption control method, the specific control process of the GPU chip system without load allocation can be referred to the above Figure 1 and / or Figure 2 The detailed description of the relevant embodiments will not be repeated here.

[0081] It can be understood that the above-mentioned various method embodiments mentioned in the present disclosure can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present disclosure will not repeat them. It can be understood by those skilled in the art that in the above-mentioned method of the specific implementation method, the specific execution order of each step should be determined according to its function and possible internal logic.

[0082] In addition, the present disclosure also provides electronic devices, computer-readable storage media, and programs, all of which can be used to implement methods for executing relevant software programs in the power consumption control system provided by the present disclosure. The corresponding technical solutions and descriptions are referred to in the corresponding records of the method part and will not be repeated here.

[0083] This method has a specific technical connection with the internal structure of the computer system, and can solve the technical problem of how to improve the hardware computing efficiency or execution effect (including reducing the amount of data storage, reducing the amount of data transmission, increasing the hardware processing speed, etc.), thereby obtaining the technical effect of improving the internal performance of the computer system in accordance with the laws of nature.

[0084] In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to execute the method described in the above method embodiments. The specific implementation can refer to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0085] The embodiment of the present disclosure also provides a computer-readable storage medium on which computer program instructions are stored, and the computer program instructions implement the above method when executed by a processor. The computer-readable storage medium can be a volatile or non-volatile computer-readable storage medium.

[0086] An embodiment of the present disclosure further proposes an electronic device, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to call the instructions stored in the memory to execute the above method.

[0087] The embodiments of the present disclosure also provide a computer program product, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processor of an electronic device, the processor in the electronic device executes the above method.

[0088] The service end of the embodiment of the present disclosure may be an electronic device such as a server.

[0089] Figure 5 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. Figure 5 , the electronic device 1900 can be provided as a server or a terminal device. Figure 5 , the electronic device 1900 includes a processing component 1922, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions executable by the processing component 1922, such as an application. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above method.

[0090] The electronic device 1900 may also include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output interface 1958. The electronic device 1900 may operate based on an operating system stored in the memory 1932, such as a Microsoft Server operating system (Windows Server 2003). TM ), a graphical user interface operating system launched by Apple (Mac OS X TM ), a multi-user, multi-process computer operating system (Unix TM), a free and open source Unix-like operating system (Linux TM ), an open source Unix-like operating system (FreeBSD TM ) or similar.

[0091] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions, which can be executed by the processing component 1922 of the electronic device 1900 to perform the above method.

[0092] The present disclosure may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0093] Computer readable storage medium can be a tangible device that can hold and store instructions used by an instruction execution device. Computer readable storage medium can be, for example, (but not limited to) an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (non-exhaustive list) of computer readable storage medium include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, for example, a punch card or a convex structure in a groove on which instructions are stored, and any suitable combination thereof. The computer readable storage medium used here is not interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated by a waveguide or other transmission medium (for example, a light pulse by an optical fiber cable), or an electrical signal transmitted by a wire.

[0094] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0095] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0096] Various aspects of the present disclosure are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0097] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0098] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0099] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0100] The computer program product may be implemented in hardware, software or a combination thereof. In one optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK) and the like.

[0101] The above description of various embodiments tends to emphasize the differences between the various embodiments. The same or similar aspects can be referenced to each other, and for the sake of brevity, they will not be repeated herein.

[0102] Those skilled in the art will appreciate that, in the above method of specific implementation, the order in which the steps are written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of the steps should be determined by their functions and possible internal logic.

[0103] If the technical solution of this application involves personal information, the product using the technical solution of this application has clearly informed the personal information processing rules and obtained the individual's voluntary consent before processing the personal information. If the technical solution of this application involves sensitive personal information, the product using the technical solution of this application has obtained the individual's separate consent before processing the sensitive personal information, and at the same time meets the "explicit consent" requirement. For example, on personal information collection devices such as cameras, clear and prominent signs are set to inform that the personal information collection scope has been entered and personal information will be collected. If the individual voluntarily enters the collection scope, it is deemed that he or she agrees to the collection of his or her personal information; or on the device that processes personal information, the personal information processing rules are notified by obvious signs / information, and the individual's authorization is obtained through pop-up information or by asking the individual to upload his or her personal information; among them, the personal information processing rules may include information such as the personal information processor, the purpose of personal information processing, the processing method, and the type of personal information processed.

[0104] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A power consumption control system, characterized in that: include: A server, a GPU system on chip, wherein the GPU system on chip is divided into a first functional domain and a second functional domain, the first functional domain includes a first CPU and a power management module, and the second functional domain includes a hardware module required to run the GPU load; The server is configured to send a low power consumption request to the first CPU in the GPU system-on-chip when it is determined that the GPU system-on-chip has not allocated a GPU load; The first CPU in the GPU system-on-chip is configured to respond to the low power consumption request and send a power-off instruction to a power management module in the GPU system-on-chip; The power management module in the GPU system-on-chip is used to respond to the power-off instruction and control the power off of the hardware modules in the second functional domain of the GPU system-on-chip.

2. The system according to claim 1, characterized in that The first functional area includes modules in the GPU system-on-chip that need to be continuously powered on; The second functional area includes modules in the GPU system-on-chip that can be powered off when the GPU load is not running.

3. The system according to claim 1 or 2, characterized in that: The first CPU in the GPU system-on-chip is used to enter a low power consumption mode after determining to turn off the power of the hardware modules in the second functional domain of the GPU system-on-chip.

4. The system according to claim 1 or 2, characterized in that: The server includes a GPU driver and a first PCIE device, and the first functional domain of the GPU system-on-chip includes a second PCIE device; The GPU driver is used to send the low power consumption request to the first PCIE device, wherein the low power consumption request includes a GPU system-on-chip identifier for indicating the GPU system-on-chip; The first PCIE device is used to send the low power consumption request to a second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier.

5. The system according to claim 4, characterized in that The second PCIE device in the GPU system-on-chip is used to respond to the low power consumption request and send a first interrupt request to the first CPU in the GPU system-on-chip, wherein the first interrupt request is used to request to turn off the power of the hardware module in the second functional domain of the GPU system-on-chip.

6. The system according to claim 4, characterized in that The server is used to send a wake-up request to the first CPU in the GPU system-on-chip; The first CPU in the GPU system-on-chip is configured to respond to the wake-up request and send a power-on instruction to a power management module in the GPU system-on-chip; The power management module in the GPU system-on-chip is used to respond to the power-on instruction and control the power supply of the hardware modules in the second functional domain of the GPU system-on-chip.

7. The system according to claim 6, characterized in that The GPU driver is used to send the wake-up request to the first PCIE device, wherein the wake-up request includes the GPU system-on-chip identifier for indicating the GPU system-on-chip; The first PCIE device is used to send the wake-up request to the second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier; The second PCIE device in the GPU system-on-chip is used to respond to the wake-up request and send a second interrupt request to the first CPU in the GPU system-on-chip, wherein the second interrupt request is used to request to start the power supply of the hardware module in the second functional domain of the GPU system-on-chip.

8. The system according to claim 6, characterized in that The GPU driver is used to send an initialization request to the first PCIE device, wherein the initialization request includes the GPU system-on-chip identifier for indicating the GPU system-on-chip, and the initialization request is used to initialize the hardware module in the second functional domain of the GPU system-on-chip; The first PCIE device is used to send the initialization request to the second PCIE device in the GPU system-on-chip according to the GPU system-on-chip identifier.

9. The system according to claim 8, characterized in that The second PCIE device in the GPU system-on-chip is used to respond to the initialization request and send a third interrupt request to the first CPU in the GPU system-on-chip; The first CPU in the GPU system-on-chip is used to respond to the third interrupt and initialize the hardware modules in the second functional domain of the GPU system-on-chip.

10. The system according to claim 9, characterized in that The server is used to distribute GPU load to the GPU system on chip.

11. A power consumption control method, characterized in that: The method is applied to a power consumption control system, the system comprising: a server and a GPU system-on-chip, the GPU system-on-chip being divided into a first functional domain and a second functional domain, the first functional domain comprising a first CPU and a power management module, the second functional domain comprising a hardware module required for running a GPU load; the method comprising: When it is determined that the GPU system-on-chip has not allocated a GPU load, using the server to send a low power consumption request to a first CPU in the GPU system-on-chip; Using the first CPU in the GPU system-on-chip, in response to the low power consumption request, a power-off instruction is sent to a power management module in the GPU system-on-chip; The power management module in the GPU system-on-chip is utilized to respond to the power-off instruction and control the power off of the hardware modules in the second functional domain in the GPU system-on-chip.

12. A GPU cluster, characterized in that: include: The server as claimed in any one of claims 1 to 10 and at least one GPU system on chip; For any GPU system-on-chip, the GPU system-on-chip is divided into a first functional domain and a second functional domain. The first functional domain includes a first CPU and a power management module, and the second functional domain includes hardware modules required to run GPU loads.

13. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; Wherein, the processor is configured to call the instructions stored in the memory to execute the method of claim 11.

14. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method of claim 11 is implemented.

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