Non-volatile memory erasing method and device, electronic equipment and storage medium

Abstract

This invention provides a method, apparatus, electronic device, and storage medium for erasing non-volatile memory, relating to the field of non-volatile memory technology. The non-volatile memory's storage array includes multiple blocks, each block comprising multiple data blocks. An over-erasing operation is performed on the data blocks to be erased in a selected target block of the non-volatile memory, and the total number of erasing operations is recorded. Based on the total number of erasing operations, a repair interval value is determined for the target block. The total number of erasing operations characterizes the degree of interference to the block; the higher the total number of erasing operations, the greater the degree of interference to the block, and the larger the repair interval value. Based on the repair interval value, a target repair area is selected from the target block, and a repair operation is performed on the target repair area. This allows for repair of the block based on the degree of interference, thereby improving erasing efficiency.

Description

Technical Field

[0001] This invention relates to the field of non-volatile memory technology, and more specifically, to a method, apparatus, electronic device, and storage medium for erasing non-volatile memory. Background Technology

[0002] The operation of memory cells within the same block of non-volatile memory is based on the behavior of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). When a memory cell is selected, its gate is connected to a negative high voltage (commonly referred to as "on"), creating a conduction path (rDS or Ron) that allows current to flow from the source to the drain, representing a logic 1. For unselected cells, since their gates are connected to a positive low voltage or 0V (i.e., "off"), the MOSFET is cut off, and almost no current flows, thus not affecting other selected cells. However, if the gate of an unselected memory cell comes into contact with a positive high voltage, even a weak contact (such as a weak erase effect), it may still partially conduct, leading to charge exchange with the P-WELL. In this case, although not a normal read / write operation, it may cause a slight change in the stored information, especially under static conditions; this is known as a weak interference or weak erase effect.

[0003] In related technologies, the way to solve the weak erase effect is to repair all the storage cells of the same block after the data block has been erased. However, this method requires repairing all the storage cells of the same block, which leads to low erase efficiency of non-volatile memory. Summary of the Invention

[0004] In view of this, the object of the present invention is to provide a method, apparatus, electronic device and storage medium for erasing non-volatile memory to at least partially improve the above-mentioned problems.

[0005] To achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows:

[0006] In a first aspect, embodiments of the present invention provide a method for erasing non-volatile memory, wherein the storage array of the non-volatile memory includes multiple blocks, each block including multiple data blocks, and the method includes:

[0007] Perform an over-erasure operation on the selected target block of the non-volatile memory and record the total number of erasures required to complete the over-erasure operation.

[0008] Based on the total number of erases, a repair interval value is determined for the target block to be repaired; the total number of erases represents the degree of interference to the block, the larger the total number of erases, the greater the degree of interference to the block, and the larger the repair interval value.

[0009] Based on the repair interval value, a target repair area that needs to be repaired is selected from the target block, and a repair operation is performed on the target repair area; the size of the target repair area is the repair interval value.

[0010] Optionally, the step of performing an over-erasure operation on the selected target block of the non-volatile memory and recording the total number of erasures required to complete the over-erasure operation includes:

[0011] The data block to be erased is erased, the current number of erasures is recorded, and the success of erasure is verified.

[0012] If so, the current number of erases shall be taken as the total number of erases;

[0013] If not, determine whether the current number of erases is greater than or equal to the preset maximum number of erases;

[0014] If the current number of erases is greater than or equal to the preset maximum number of erases, the preset maximum number of erases shall be used as the total number of erases;

[0015] If the current number of erases is less than the preset maximum number of erases, the steps of erasing the data block to be erased, recording the current number of erases, and verifying whether the data block to be erased has been successfully erased are repeated until the data block to be erased has been successfully erased or the current number of erases is greater than or equal to the preset maximum number of erases.

[0016] Optionally, determining the repair interval value for the target block that needs to be repaired based on the total number of erasures includes:

[0017] Based on the repair interval calculation formula, and according to the total number of erases, the repair interval value that the target block needs to be repaired is calculated and determined; the repair interval calculation formula is:

[0018]

[0019] Where x is the total number of erasures, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

[0020] Optionally, the data block includes multiple storage units, and the step of selecting a target repair area from the target block according to the repair interval value and performing a repair operation on the target repair area includes:

[0021] In the data blocks of the target block that are not the data blocks to be erased, select the storage address of a storage unit;

[0022] Starting from the storage address, multiple storage units of the repair interval value are selected consecutively;

[0023] Repair operations are performed on each of the aforementioned storage units.

[0024] Optionally, before the step of performing an over-erasure operation on the selected target block of the non-volatile memory and recording the total number of erasures required to complete the over-erasure operation, the method further includes:

[0025] The data block to be erased is pre-programmed, and the total pre-programming time is recorded;

[0026] The step of determining the repair interval value that the target block needs to be repaired based on the total number of erasures includes:

[0027] Based on the total number of erasures and the total time, the repair interval value for the target block that needs to be repaired is determined.

[0028] Optionally, determining the repair interval value for the target block that needs to be repaired based on the total number of erasures and the total time includes:

[0029] Based on the total number of erasures and the total time, the repair interval value that the target block needs to be repaired is determined according to a preset strategy; the preset strategy is that the larger the total number of erasures, the larger the repair interval value, the smaller the total number of erasures, the smaller the repair interval value, the larger the total time, the larger the repair interval value, and the smaller the total time, the smaller the repair interval value.

[0030] Optionally, determining the repair interval value that the target block needs to be repaired according to a preset strategy based on the total number of erasures and the total time includes:

[0031] The repair coefficient is calculated based on the first preset weight of the total number of erasures and the second preset weight of the total time.

[0032] Based on the repair coefficient, the repair interval value that the target block needs to be repaired is determined.

[0033] Secondly, embodiments of the present invention provide a non-volatile memory erasure apparatus. The storage array of the non-volatile memory includes multiple blocks, each block including multiple data blocks. The apparatus includes:

[0034] An over-erasure unit is used to perform an over-erasure operation on the data block to be erased in a selected target block in a non-volatile memory, and to record the total number of erasures required to complete the over-erasure operation.

[0035] The repair interval value determination unit is used to determine the repair interval value that the target block needs to be repaired based on the total number of erasures; the total number of erasures represents the degree of interference to the block, and the larger the total number of erasures, the greater the degree of interference to the block, and the larger the repair interval value.

[0036] The repair unit is used to select a target repair area that needs to be repaired from the target block according to the repair interval value, and to perform a repair operation on the target repair area; the size of the target repair area is the repair interval value.

[0037] Thirdly, embodiments of the present invention provide an electronic device, including a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor executes the program to implement the method described in any of the above-mentioned embodiments.

[0038] Fourthly, embodiments of the present invention provide a storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method described in any of the preceding claims.

[0039] This invention provides a method, apparatus, electronic device, and storage medium for erasing non-volatile memory. By recording the total number of erasures during the erasure process and determining the size of the area to be repaired based on the total number of erasures, the erasure efficiency of the non-volatile memory is improved. Furthermore, by recording the pre-programming time of the erased data blocks and combining the pre-programming time with the total number of erasures to determine the size of the area to be repaired, the non-volatile memory can maintain high-performance erasure while reducing the error rate and protecting the overall reliability of the non-volatile memory.

[0040] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0041] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 A schematic structural block diagram of an electronic device provided in an embodiment of the present invention;

[0043] Figure 2 A schematic block diagram of a non-volatile memory provided in an embodiment of the present invention;

[0044] Figure 3 This is a flowchart illustrating a non-volatile memory erasure method provided in an embodiment of the present invention.

[0045] Figure 4 A flowchart illustrating step S210 provided in an embodiment of the present invention;

[0046] Figure 5 This is another schematic flowchart of a non-volatile memory erasure method provided in an embodiment of the present invention;

[0047] Figure 6 This is a schematic structural block diagram of a non-volatile memory erasure device provided in an embodiment of the present invention.

[0048] Icons: 100 - Electronic device; 101 - Memory; 102 - Communication interface; 103 - Processor; 104 - Bus; 300 - Non-volatile memory; 310 - Block; 311 - Data block; 400 - Non-volatile memory erasure device; 410 - Over-erasure unit; 420 - Repair interval value determination unit; 430 - Repair unit. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0050] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0051] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0052] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0053] As described in the background section, see Figure 2 , Figure 2 This is a schematic structural block diagram of a non-volatile memory provided in an embodiment of the present invention. The storage array of the non-volatile memory 300 includes multiple blocks 310, and each block includes multiple data blocks 311. When erasing a data block 311, it may cause interference to other data blocks in the same block, affecting data reliability. Therefore, it is necessary to repair the interference area. In related technologies, the way to solve the weak erasure effect is to perform a repair operation on all storage cells in the same block after erasing the data block. However, this method requires repairing all storage cells in the same block, which leads to low erasure efficiency of the non-volatile memory.

[0054] Based on the above, embodiments of the present invention provide a method, apparatus, electronic device, and storage medium for erasing non-volatile memory. By recording the total number of erasures during the erasure of data blocks in the non-volatile memory and determining the size of the interval that needs to be repaired, the erasure efficiency of the non-volatile memory is improved.

[0055] To implement the process steps and functions of the various examples of this invention, please refer to [link / reference]. Figure 1 , Figure 1 This is a schematic structural block diagram of an electronic device provided in an embodiment of the present invention. The electronic device 100 includes a memory 101 and a processor 103, which are electrically connected directly or indirectly to each other to achieve data transmission or interaction. For example, these components can be electrically connected to each other through one or more communication buses 104 or signal lines. The memory 101 can be used to store software programs and modules, and the processor 103 executes the software programs and modules stored in the memory 101 to perform various functional applications and data processing.

[0056] Electronic device 100 can be, but is not limited to, a personal computer (PC), a server, a distributed computer, etc. It is understood that electronic device 100 is not limited to a physical server, but can also be a virtual machine on a physical server, a virtual machine built on a cloud platform, or any other computer that can provide the same functionality as the server or virtual machine. The operating system of electronic device 100 can be, but is not limited to, Windows, Linux, etc.

[0057] The memory 101 may be, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0058] The communication connection between the electronic device 100 and external devices is achieved through at least one communication interface 102 (which can be wired or wireless).

[0059] Processor 103 may be an integrated circuit chip with signal processing capabilities. In implementation, the steps of this embodiment can be completed by integrated logic circuits in the hardware of processor 103 or by instructions in software form. Processor 103 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0060] Understandable. Figure 1 The structure shown is for illustrative purposes only; the electronic device 100 may also include components that are more advanced than those shown. Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown. Figure 1 The components shown can be implemented using hardware, software, or a combination thereof.

[0061] The following is an exemplary description of the non-volatile memory erasure method provided by the present invention. See also... Figure 2 , Figure 2 This is a schematic block diagram of a non-volatile memory provided in an embodiment of the present invention. The storage array of the non-volatile memory 300 includes multiple blocks 310, and each block includes multiple data blocks 311. See also Figure 3 , Figure 3 This is a flowchart illustrating a non-volatile memory erasure method provided in an embodiment of the present invention. The execution entity of this method can be the aforementioned... Figure 1 The electronic device 100 shown, the method includes as follows Figure 3 The following steps are described:

[0062] S210: Perform an over-erasure operation on the selected target block of the non-volatile memory and record the total number of over-erasure operations.

[0063] The erase operation is performed on a data block to be erased in a target block. However, a single erase operation is often not enough to completely erase the data block. Therefore, it is necessary to perform multiple erase operations on the data block to be erased. After the entire erase operation is completed, the total number of erase operations is recorded.

[0064] S220: Based on the total number of erases, determine the repair interval value that the target block needs to be repaired. The total number of erases represents the degree of interference the block has suffered; the higher the total number of erases, the greater the degree of interference, and the larger the repair interval value.

[0065] Based on the number of erases during this erasure process, a section within the target block that needs repair is determined. The degree of interference to the target block is related to the total number of erases; the higher the total number of erases, the greater the degree of interference, and the larger the repair section value. For example, if the total number of erases is 1, the target block is less affected, and a smaller area of ​​the target block can be modified. The repair section value could be 1 / 8, indicating that 1 / 8 of the target block needs to be repaired. If the total number of erases is very large, such as 10, then the entire target block needs to be repaired, and the repair section value would be 1.

[0066] S230: Based on the repair interval value, select the target repair area from the target block and perform the repair operation on the target repair area. The size of the target repair area is the repair interval value.

[0067] After determining the repair interval value, a target repair area of ​​the repair interval value size is selected from the target block, and the target repair area is repaired.

[0068] This method records the total number of erases when erasing data blocks in non-volatile memory. Based on the total number of erases and writes, i.e. the degree of interference, it determines the repair interval and repairs the target block. In the early stages of non-volatile memory use, it can reduce the erasure time and thus improve the erasure efficiency of non-volatile memory. At the same time, it also ensures the reliability of storage in the later stages of non-volatile memory use.

[0069] There are several ways to record the total number of erases. One possible implementation is shown below. Figure 4 , Figure 4 This is a flowchart illustrating step S210 according to an embodiment of the present invention. Step S210 may include the following steps:

[0070] S211: Erase the data block to be erased, record the current erasure count, and verify whether the data block to be erased has been successfully erased. If yes, proceed to step S212; otherwise, proceed to step S213.

[0071] The method to verify whether the data block to be erased has been erased is to compare the high boundary point of the threshold voltage distribution of the data block to be erased with the erase verification boundary point (EV). If the high boundary point is greater than EV, the verification fails; if the high boundary point is less than or equal to EV, the verification passes.

[0072] S212: Use the current erase count as the total erase count.

[0073] If the erasure is successful, the erasure process ends and no further erasures are performed. The current number of erasures, i.e., the total number of erasures performed up to this point, is taken as the total number of erasures.

[0074] S213: Determine whether the current number of erases is greater than or equal to the preset maximum number of erases. If yes, proceed to step S214; otherwise, proceed to step S215.

[0075] The preset maximum number of erases is the maximum number of erases in a single erase cycle. Once the preset maximum number of erases is reached, erasing will stop. If the preset maximum number of erases is not reached, erasing will continue.

[0076] The preset maximum number of erases can be a globally set value, such as 10, in which case the preset maximum number of erases will be 10 in each subsequent erase process. Alternatively, it can be a value set separately at the beginning of each erase process, in which case the preset maximum number of erases may change in each erase process. This method can be dynamically set according to the usage time of the non-volatile memory.

[0077] S214: Use the preset maximum number of erases as the total number of erases.

[0078] If the number of erases reaches the preset maximum number of erases, no further erasures will be performed, and the preset maximum number of erases will be used as the total number of erases.

[0079] S215: Repeat the steps of erasing the data block to be erased, recording the current number of erasures, and verifying whether the data block to be erased has been successfully erased, until the data block to be erased has been successfully erased or the current number of erasures is greater than or equal to the preset maximum number of erasures.

[0080] If the erasure fails and the number of erasures does not reach the preset maximum number of erasures, step S211 will be repeated until the data block to be erased is erased successfully or the current number of erasures is greater than or equal to the preset maximum number of erasures.

[0081] There are several ways to determine the repair interval value that the target block needs to be repaired based on the total number of erases. For example, multiple mapping relationships between the number of erases and the repair interval value can be preset, or a function relationship can be set to determine the repair interval value. In one possible implementation, the above step S220 includes the following steps:

[0082] Based on the repair interval calculation formula, and according to the total number of erases, the repair interval value required to repair the target block is calculated. The repair interval calculation formula is as follows:

[0083]

[0084] Where x is the total number of erases, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

[0085] It can be calculated based on the formula for calculating the repair interval, for example, in this formula, n=8, a, b, and c are respectively That is, when the total number of erases is greater than or equal to 8, the repair interval value is 1. If the total number of erases is 1, the repair interval value can be calculated by substituting it into the formula. If the total number of erases is 2, the repair interval value can be calculated by substituting it into the formula.

[0086] Each data block includes multiple storage units. After determining the repair interval value, there are various ways to select the target repair area. For example, storage units that represent a proportion of the repair interval value in the target block can be randomly selected, or a continuous area can be selected. To facilitate the rapid selection of the target repair area, this embodiment of the invention adopts the method of selecting a continuous area. The above step S230 includes the following steps:

[0087] S231: Select the storage address of a storage unit in the data blocks of the non-erasable data blocks of the target block.

[0088] Among the other data blocks in the target block that are not the data blocks to be erased, select the storage address of a storage unit. This selection of the storage unit can be done randomly.

[0089] S232: Starting from the storage address, select multiple storage units consecutively for the repair interval value.

[0090] After selecting a storage unit, starting from the storage address of that unit, select multiple storage units consecutively with a percentage of the repair interval value. For example, if the repair interval value is... The target block For 1000 storage units, start from their actual address and select 1000 consecutive storage units.

[0091] S232: Perform repair operations on each storage unit.

[0092] The repair operation for the storage cells involves adjusting the threshold voltage (Vt) of the storage cells to ensure that they can correctly store and retain data.

[0093] In one possible implementation, to make the repair interval more accurate, pre-programming can be performed before erasing the data block to be erased. Before step S210, the method may also include:

[0094] S209: Preprogram the data blocks to be erased and record the total preprogramming time.

[0095] In non-volatile memory, the data in a storage cell includes "1" and "0". Erasing in non-volatile memory involves lowering the threshold voltage of the storage cell, which typically corresponds to logic "1". After the erase operation, the threshold voltage of the storage cell is set to this lower level, making it logic "1".

[0096] Pre-programming writes charge into the floating gate to ensure that the threshold voltage of the erase block memory cell is high before erasure, making it in logic "0". Therefore, the more data "0"s in the memory cell of the data block to be erased, the shorter the total pre-programming time, and vice versa.

[0097] S220`: Based on the total number of erases and the total time, determine the repair interval value that the target block needs to be repaired.

[0098] After pre-programming, the repair interval value can be determined based on the total number of erases and the total pre-programming time.

[0099] Optionally, based on the total number of erases and the total time, a repair interval value that the target block needs to be repaired is determined according to a preset strategy. The preset strategy is that the larger the total number of erases, the larger the repair interval value; the smaller the total number of erases, the smaller the repair interval value; the larger the total time, the larger the repair interval value; and the smaller the total time, the smaller the repair interval value.

[0100] For example, if the total number of erases is large and the total pre-programmed time is large, then full block repair is performed, and the repair interval value can be set to 1. If the total number of erases is small and the total pre-programmed time is small, then a smaller area can be repaired.

[0101] To specify the impact of the total number of erases and the total time, a repair coefficient can be calculated based on a first preset weight for the total number of erases and a second preset weight for the total time. The calculation formula can be:

[0102] x = α × number + β × time

[0103] Where x is the repair coefficient, α and β are the first preset weight and the second preset weight, respectively, and number and time are the total number of erasures and the total time, respectively.

[0104] For example, if the first preset weight is 0.8, the second preset weight is 0.2, the total number of erases is 5, and the total time is 8 microseconds, then the repair coefficient is calculated to be 5.6.

[0105] Based on the repair coefficient, the repair interval value that the target block needs to be repaired is determined.

[0106] After calculating the repair coefficient, the repair interval value can be calculated using the same formula as described above. The repair interval calculation formula is:

[0107]

[0108] Where x is the repair coefficient, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

[0109] Furthermore, referring to Figure 5 In one possible implementation, the process of erasing the data block to be erased is as follows: Figure 5 As shown, the system receives an erase command, which specifies which data block to erase. First, the data block to be erased is pre-programmed, and the pre-programming time is recorded. Then, the data block is erased. Each erase operation increments the erase count by 1, and the erase is verified. If it fails, the system checks if the erase count has reached the preset maximum. If not, the erase operation is repeated until the erase is verified or the maximum erase count is reached, completing the erase operation. Then, based on the erase count and pre-programming time, a repair coefficient is calculated. Based on the repair coefficient, a repair interval value is calculated. A storage address is quickly selected within the target block containing the data block to be erased. Using this storage address as the starting address, a target repair area proportional to the repair interval value is selected. Finally, the target repair area is repaired, completing the entire erase process.

[0110] Furthermore, embodiments of the present invention also provide a non-volatile memory erasure device. The storage array of the non-volatile memory includes multiple blocks, and each block includes multiple data blocks. See [link to previous document]. Figure 6 The non-volatile memory erasure device 400 includes:

[0111] The over-erasure unit 410 is used to perform over-erasure operations on the data blocks to be erased in the selected target block of the non-volatile memory, and to record the total number of erasures to complete the over-erasure operation.

[0112] The repair interval determination unit 420 is used to determine the repair interval value that the target block needs to be repaired based on the total number of erases. The total number of erases represents the degree of interference to the block. The larger the total number of erases, the greater the degree of interference to the block, and the larger the repair interval value.

[0113] Repair unit 430 is used to select the target repair area to be repaired from the target block according to the repair interval value, and perform repair operation on the target repair area; the size of the target repair area is the repair interval value.

[0114] In summary, the non-volatile memory erasure method, apparatus, electronic device, and storage medium provided by the embodiments of the present invention improve the erasure efficiency of the non-volatile memory by recording the total number of erasures completed during the erasure of data in the non-volatile memory and determining the size of the interval to be repaired based on the total number of erasures. Furthermore, by recording the pre-programming time of the erased data block and combining the pre-programming time with the total number of erasures to determine the size of the interval to be repaired, the non-volatile memory can reduce the error rate while maintaining high-performance erasure, thus protecting the overall reliability of the non-volatile memory.

[0115] In the embodiments provided by this invention, it should be understood that the disclosed apparatus and methods can also be implemented in other ways. The apparatus embodiments described above are merely illustrative; for example, the flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0116] In addition, the functional modules in the various embodiments of the present invention can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0117] If the functionality is implemented as a software module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a computer-readable storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0118] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0119] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A method for erasing non-volatile memory, characterized in that, The non-volatile memory array includes multiple blocks, each block including multiple data blocks, and the method includes: Perform an over-erasure operation on the selected target block of the non-volatile memory and record the total number of erasures required to complete the over-erasure operation. Based on the total number of erases, a repair interval value is determined for the target block to be repaired; the total number of erases represents the degree of interference to the block, the larger the total number of erases, the greater the degree of interference to the block, and the larger the repair interval value. Based on the repair interval value, a target repair area that needs to be repaired is selected from the target block, and a repair operation is performed on the target repair area; the size of the target repair area is the repair interval value.

2. The method according to claim 1, characterized in that, The process of performing an over-erasure operation on the selected target block of the non-volatile memory and recording the total number of erasures required to complete the over-erasure operation includes: The data block to be erased is erased, the current number of erasures is recorded, and the success of erasure is verified. If so, the current number of erases shall be taken as the total number of erases; If not, determine whether the current number of erases is greater than or equal to the preset maximum number of erases; If the current number of erases is greater than or equal to the preset maximum number of erases, the preset maximum number of erases shall be used as the total number of erases; If the current number of erases is less than the preset maximum number of erases, the steps of erasing the data block to be erased, recording the current number of erases, and verifying whether the data block to be erased has been successfully erased are repeated until the data block to be erased has been successfully erased or the current number of erases is greater than or equal to the preset maximum number of erases.

3. The method according to claim 1, characterized in that, The step of determining the repair interval value that the target block needs to be repaired based on the total number of erasures includes: Based on the repair interval calculation formula, and according to the total number of erases, the repair interval value that the target block needs to be repaired is calculated and determined; the repair interval calculation formula is: Where x is the total number of erasures, y is the repair interval value, n is a positive integer, and a, b, and c are coefficients.

4. The method according to claim 1, characterized in that, The data block includes multiple storage units. The step of selecting a target repair region from the target block based on the repair interval value and performing a repair operation on the target repair region includes: In the data blocks of the target block that are not the data blocks to be erased, select the storage address of a storage unit; Starting from the storage address, multiple storage units of the repair interval value are selected consecutively; Repair operations are performed on each of the aforementioned storage units.

5. The method according to claim 1, characterized in that, Before the step of performing an over-erasure operation on the selected target block of the non-volatile memory and recording the total number of erasures required to complete the over-erasure operation, the method further includes: The data block to be erased is pre-programmed, and the total pre-programming time is recorded; The step of determining the repair interval value that the target block needs to be repaired based on the total number of erasures includes: Based on the total number of erasures and the total time, the repair interval value for the target block that needs to be repaired is determined.

6. The method according to claim 5, characterized in that, The step of determining the repair interval value for the target block that needs to be repaired based on the total number of erasures and the total time includes: Based on the total number of erasures and the total time, the repair interval value that the target block needs to be repaired is determined according to a preset strategy; the preset strategy is that the larger the total number of erasures, the larger the repair interval value, the smaller the total number of erasures, the smaller the repair interval value, the larger the total time, the larger the repair interval value, and the smaller the total time, the smaller the repair interval value.

7. The method according to claim 6, characterized in that, The step of determining the repair interval value that the target block needs to be repaired according to the total number of erasures and the total time, based on a preset strategy, includes: The repair coefficient is calculated based on the first preset weight of the total number of erasures and the second preset weight of the total time. Based on the repair coefficient, the repair interval value that the target block needs to be repaired is determined.

8. A non-volatile memory erasure device, characterized in that, The storage array of the non-volatile memory includes multiple blocks, each block including multiple data blocks, and the device includes: An over-erasure unit is used to perform an over-erasure operation on the data block to be erased in a selected target block in a non-volatile memory, and to record the total number of erasures required to complete the over-erasure operation. The repair interval value determination unit is used to determine the repair interval value that the target block needs to be repaired based on the total number of erasures; the total number of erasures represents the degree of interference to the block, and the larger the total number of erasures, the greater the degree of interference to the block, and the larger the repair interval value. The repair unit is used to select a target repair area that needs to be repaired from the target block according to the repair interval value, and to perform a repair operation on the target repair area; the size of the target repair area is the repair interval value.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the program, it implements the method according to any one of claims 1 to 7.

10. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, it implements the method described in any one of claims 1 to 7.

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