Manufacturing method and structure of embedded packaging substrate

Abstract

The invention relates to the technical field of semiconductor packaging, and discloses a manufacturing method and structure of an embedded packaging substrate, and the method comprises the steps: S100, preparing a core plate, and forming at least one first opening frame and at least one second opening frame on the core plate; s200, a die bonding adhesive tape is attached to the bottom face of the core plate; s300, preparing an embedded body and a component which are matched with the first opening frame in shape, respectively embedding the embedded body and the component into the first opening frame and the second opening frame, and bonding the bottom surfaces of the embedded body and the component with the die bonding adhesive tape; s400, laminating a first dielectric layer on the top surface of the core plate; and S500, the die bonding adhesive tape is removed, a first circuit layer is manufactured on the bottom face of the core plate, the first circuit layer is electrically connected with the embedded body and the component, and the embedded body is in signal conduction with the component. The prefabricated embedded body conduction circuit is used for replacing a traditional electroplating hole and resin hole plugging technology, and excellent conduction performance can be kept in a large-thickness core plate.

Description

Technical Field

[0001] The present invention relates to the technical field of embedded component packaging, and in particular to a manufacturing method and structure of an embedded packaging substrate. Background Art

[0002] In recent years, as electronic products such as mobile phones, smart phones, and digital cameras have become smaller and more complex, the demand for smaller and thinner electronic components has also increased, which has put forward higher requirements for high density and miniaturization of integrated circuits. Embedded component packaging in advanced packaging greatly reduces the package volume and improves the packaging density by burying components in the substrate. Therefore, embedded component packaging is increasingly valued by the market as a new type of high-density 3D packaging.

[0003] In traditional embedded packaging, there are two electroplating methods for the core layer and frame layer according to the thickness of the board. For boards with low thickness (generally less than 0.15mm), laser drilling electroplating is used, and the electroplated conduction is a solid X-shaped conduction hole. If the board thickness is high, the laser drilling electroplating method can no longer fill and plate flat. In this case, mechanical drilling electroplating and then resin plugging are used for conduction. However, the conduction copper area of ​​these two electroplating methods is small, especially when the board is thick, only the hole wall of the mechanical drilling hole has electroplated copper, which not only has the disadvantages of too long processing flow, but also cannot meet the needs of high-throughput products.

[0004] Therefore, there is an urgent need to provide a packaging method and structure to solve the problems of small electroplating area of ​​internal signal conduction structure and long processing flow caused by excessive thickness of the board in embedded packaging. Summary of the invention

[0005] The main purpose of the present invention is to provide a method and structure for manufacturing an embedded packaging substrate, aiming to solve the technical problems of small electroplating area of ​​internal signal conduction structure and long processing flow caused by excessive thickness of the board.

[0006] To achieve the above-mentioned purpose, the present invention provides a method for manufacturing an embedded packaging substrate, comprising the following steps: S100: preparing a core board, forming at least one first mouth frame and at least one second mouth frame on the core board; S200: attaching a solid crystal tape to the bottom surface of the core board; S300: preparing an embedded body and components that are adapted to the shape of the first mouth frame, burying the embedded body and the components in the first mouth frame and the second mouth frame respectively, and bonding the bottom surfaces of the embedded body and the components to the solid crystal tape; S400: laminating and pressing a first dielectric layer on the top surface of the core board; S500: removing the solid crystal tape and manufacturing a first circuit layer on the bottom surface of the core board, the first circuit layer is electrically connected to the embedded body and the components respectively, and the embedded body and the components are signal-conductive.

[0007] Preferably, in step S100: marking the positions of the first mouth frame and the second mouth frame, and forming the first mouth frame and the second mouth frame at the marked positions by mechanical drilling; and / or forming the first mouth frame and the second mouth frame by laser drilling.

[0008] Preferably, in step S400: the preparation material of the first medium layer includes Ajinomoto resin and polypropylene resin.

[0009] Preferably, in step S300: the preparation material of the embedded body includes any one of copper, aluminum, iron, iron oxide, or a combination of at least two or more materials.

[0010] Preferably, the height of the embedded body is greater than the height of the component, the shapes of the embedded body include cylinder, cuboid, cube, wedge and sphere, and the three-dimensional size range of the embedded body is 0.1mm-50mm.

[0011] Preferably, step S500 also includes: removing the die-bonding tape after thinning the first dielectric layer to expose the surface of the embedded body, making the first circuit layer after forming a seed layer on the bottom surface of the core board, and making the second circuit layer after forming a seed layer on the first dielectric layer.

[0012] Preferably, step S500 also includes: after removing the die-bonding tape, laminating and pressing a second dielectric layer on the bottom end of the core board, drilling a first conductive hole connected to the first port frame and a second conductive hole connected to the second port frame in the second dielectric layer, and then forming a seed layer on the bottom surface of the second dielectric layer to produce the first circuit layer.

[0013] Preferably, the method further includes step S600: drilling a third via hole in the first dielectric layer connected to the first opening frame, opening a packaging window in the first dielectric layer to expose the component, and manufacturing a second circuit layer after forming a seed layer on the surface of the first dielectric layer.

[0014] Preferably, the seed layer is formed on the bottom surface of the core board, the first dielectric layer and the second dielectric layer by a copper sputtering process; and / or, the seed layer is formed on the bottom surface of the core board, the first dielectric layer and the second dielectric layer by a copper electroplating process.

[0015] The present invention also provides an embedded packaging substrate structure, comprising: a core board, the core board is provided with at least one first mouth frame penetrating the core board and at least one second mouth frame penetrating the core board; at least one dielectric layer is attached to one or both sides of the core board, the dielectric layer covers the first mouth frame and the second mouth frame to form a sealed space; an embedded body is arranged in the first mouth frame; components, the components are arranged in the second mouth frame; at least one circuit layer is formed on the dielectric layer or the surface of the core board, at least one circuit layer is formed on the dielectric layer or the surface of the core board, the embedded body and the components are electrically connected to the circuit layers respectively, and the embedded body and the components are connected through the circuit layer signal.

[0016] In the technical solution provided by the present invention, embedded gold nuggets are used to replace traditional conduction methods such as laser drilling and electroplating or mechanical drilling and then electroplating plugging holes, and the production process of the core board is relatively simple, avoiding the problems of bubbles in the holes and uneven plating in the electroplating plugging process, and improving the flow capacity and thermal conductivity. In addition, the patch embedding body is innovatively introduced, and the early processing of the embedding body can be separated from the core board. On this basis, the use of prefabricated embedding bodies to replace traditional conduction methods greatly reduces the process processing cost; and after the embedding body is buried, since the embedding body itself has conductive properties, the conductive properties inside the conduction hole can be maintained even in a thick core board, and there is no need for extra processing to make a thick core board, which is conducive to the miniaturization of chip packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] One or more embodiments are exemplarily described by corresponding drawings, which do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and the figures in the drawings do not constitute proportional limitations unless otherwise stated.

[0018] Figure 1 It is a schematic diagram of the overall process of the method for manufacturing the embedded packaging substrate of the present invention; Figure 2 It is a schematic diagram of the processing structure of step S100 in the method for manufacturing an embedded packaging substrate of the present invention; Figure 3 It is a schematic diagram of the processing structure of step S200 in the method for manufacturing an embedded packaging substrate of the present invention; Figure 4 It is a schematic diagram of the processing structure of step S300 in the method for manufacturing an embedded packaging substrate of the present invention; Figure 5 It is a schematic diagram of the processing structure of step S400 in the method for manufacturing an embedded packaging substrate of the present invention; Figure 6 It is a schematic diagram of the processing structure of step S500 in the method for manufacturing an embedded packaging substrate of the present invention; Figure 7 A schematic diagram of an embodiment of an embedded package substrate structure of the present invention; Figure 8 A schematic diagram of an embodiment of an embedded package substrate structure of the present invention; Fig. 9 The overall structural diagram of the existing traditional X-shaped hole electroplating embedded substrate packaging structure; Fig.10 The overall structural diagram of the existing traditional mechanical drilling and then electroplating embedded substrate packaging structure; Fig.11 It is a cross-sectional schematic diagram of an embodiment of the embedded packaging substrate structure of the present invention.

[0019] In the figure: 1, core board; 11, first mouth frame; 12, second mouth frame; 13, packaging window; 2, die-bonding tape; 3, embedded body; 4, mounted chip; 51, first circuit layer; 52, second circuit layer; 61, first dielectric layer; 62, second dielectric layer; 71, first via hole; 72, second via hole; 73, third via hole; 81, plugging resin; 82, X-shaped hole; 91, resistor element; 92, capacitor element. DETAILED DESCRIPTION

[0020] In order to facilitate the understanding of the present invention, the present invention is described in more detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that when an element is described as "fixed to" another element, it can be directly on another element, or there can be one or more centered elements therebetween. When an element is described as "connected" to another element, it can be directly connected to another element, or there can be one or more centered elements therebetween. The terms "vertical", "horizontal", "left", "right", "inside", "outside" and similar expressions used in this specification are only for illustrative purposes. In the description of the present invention, the terms "first" and "second" are used only for descriptive purposes and cannot be understood as indicating relative importance or implicitly indicating the number of technical features indicated. Therefore, unless otherwise specified, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features; the meaning of "multiple" is two or more. The term "include" and any variation thereof means non-exclusive inclusion, and one or more other features, integers, steps, operations, units, components and / or combinations thereof may be present or added.

[0021] In addition, unless otherwise expressly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, an indirect connection through an intermediate medium, or a connection between two components. All technical and scientific terms used in this specification have the same meaning as those generally understood by technicians in the technical field of the present invention. The terms used in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used in this specification includes any and all combinations of one or more related listed items.

[0022] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0023] Please refer to Figures 1 to 11 The present invention provides a method for manufacturing an embedded packaging substrate, comprising the following steps: S100: preparing a core board 1, wherein the core board 1 is made of an insulating substrate, and forming at least one first mouth frame 11 and at least one second mouth frame 12 on the core board 1; S200: attaching a die-bonding tape 2 to the bottom surface of the core board 1; S300: preparing an embedded body 3 and components that are adapted to the shape of the first mouth frame 11, and using a die-bonding machine in conjunction with a high-precision visual system to accurately bury the embedded body 3 and the components in the first mouth frame 11 and the second mouth frame 12, respectively, so that the bottom surface of the embedded body 3 and the components are firmly bonded to the die-bonding tape 2; S400: performing hot pressing after laminating on the top surface of the core board 1 The first dielectric layer 61 can be a traditional semi-cured sheet, which plays the role of sealing the first mouth frame 11 and the second mouth frame 12, and sealing the embedded body 3 and components inside; S500: remove the solid crystal tape 2, and make a seed layer on the bottom surface of the core board 1 by sputtering copper or electroplating, and then perform photoresist coating, photolithography exposure and development, electroplating to thicken the metal layer, removing the photoresist, etching to remove the excess seed layer and other steps to make the first circuit layer 51. The first circuit layer 51 can be electrically connected to the embedded body 3 and components respectively through metallized holes or direct bonding and welding. The embedded body 3 and the components achieve signal conduction through the first circuit layer 51. The components include active circuit components such as the mounted chip 4 and passive circuit components such as the resistor element 91 and the capacitor element 92. Fig.11 In the embodiment, a mounted chip 4 is embedded in at least one first opening frame, and passive components such as resistor element 91 and capacitor element 92 are arranged around the mounted chip 4. The resistor element 91 is used for stabilizing the voltage division of the mounted chip 4, and the capacitor element 92 is used for filtering and noise reduction of the circuit of the mounted chip 4. The resistor element 91 and the capacitor element 92 are embedded in the dielectric layer and connected to the circuit layer, which reduces the horizontal distance from the chip and saves wiring space.

[0024] In the technical solution provided by the present invention, embedded gold nuggets are used to replace traditional conduction methods such as laser drilling and electroplating or mechanical drilling and then electroplating and plugging holes, and the production process of the core board 1 is relatively simple, avoiding the problems of bubbles in the holes and uneven plating in the electroplating plugging process, and improving the flow capacity and thermal conductivity. The patch embedding body 3 is innovatively introduced, and the pre-processing of the embedding body 3 can be separated from the core board 1. On this basis, the use of prefabricated embedding body 3 instead of the traditional conduction method greatly reduces the process processing cost; and after the embedding body 3 is buried, since the embedding body 3 itself has conductive properties, it is not necessary to electroplating or resin plugging holes to thicken the entire core board 1, which is conducive to the miniaturization of chip packaging.

[0025] Please refer to Figure 2 In this embodiment, in step S100: mark the positions of the first mouth frame 11 and the second mouth frame 12, and form the first mouth frame 11 and the second mouth frame 12 at the marked positions by mechanical drilling; and / or, form the first mouth frame 11 and the second mouth frame 12 by laser drilling. Mechanical drilling and laser drilling each have their own advantages and disadvantages and application scenarios. Mechanical drilling is suitable for thicker materials and large-aperture mouth frames, while laser drilling is suitable for small-aperture, high-precision and complex-shaped mouth frames. The two methods can be used alone or in combination. For example, the main mouth frame contour is first processed by mechanical drilling, and then the shape of the mouth frame is more finely processed by laser drilling to use a shape that is more suitable for the embedded body 3 and the mounted chip 4.

[0026] Please refer to Figures 5 to 8 In this embodiment, in step S400: the preparation materials of the first dielectric layer 61 include Ajinomoto resin and polypropylene resin. Ajinomoto resin adopts ABF deposited film, and the thickness of its ABF deposited film can be as low as 20μm. Traditional Prepreg (i.e. semi-cured film) is usually >50μm, which supports finer redistribution layer (RDL) and micro-via (<20μm), and can reduce impedance fluctuation, which is suitable for occasions where multiple high-frequency mounting chips 4 need to be packaged. Polypropylene resin pp has low cost and good flexibility, and is suitable for the packaging of the core board in the flexible FPC circuit board.

[0027] In one embodiment, in step S300: the preparation material of the embedded body 3 includes any one of copper, aluminum, iron, and iron oxide compounds, or a combination of at least two or more materials. Copper has strong electrical conductivity and is a non-magnetic material, which is suitable for packaging of high-frequency signal and high-power transmission chip 4; aluminum is lightweight and corrosion-resistant, which is suitable for packaging lightweight consumer-grade electronic chip 4; iron has magnetic and high mechanical strength characteristics, which can provide electromagnetic shielding and structural support for the chip 4; iron oxide compounds have magnetic and high temperature resistance characteristics, which are suitable for packaging structure design that needs to absorb electromagnetic waves around the chip 4.

[0028] Please refer to Figure 7In this embodiment, the height of the embedded body 3 is greater than the height of the mounted chip 4, which can make the embedded body 3 play a certain supporting role in the process of laminating the first dielectric layer 61, reducing the probability of the mounted chip 4 being crushed; the shape of the embedded body 3 includes a cylinder, a cuboid, a cube, a wedge and a sphere, and the length, width and height of the embedded body 3 range from 0.1mm to 50mm, which is compatible with substrates of different thicknesses (the thickest can reach 50mm). The arc structure of the cylinder reduces the edge stress concentration and improves the ability to resist mechanical impact; the sphere has no sharp corners and the best fatigue resistance, which is suitable for flexible substrates that can be bent dynamically; the cross-section of the wedge is gradually changed (such as the shape gradually changes from a sharp corner to a wide base), which can achieve local enhanced conductivity / heat dissipation and prevent vibration from falling off; the right-angle edges of the cube and the cuboid make multiple first opening frames 11 closely arranged, which is suitable for packaging substrates that require multi-channel high-density interconnection.

[0029] Please refer to Figures 5 to 7 In this embodiment, step S500 also includes: accurately controlling the thickness of the dielectric layer by chemical mechanical polishing or plasma etching to ensure that the surface of the embedded body 3 is fully exposed, eliminate interface voids, and improve the reliability of electrical contact with the circuit layer; after thinning the first dielectric layer 61 to expose the surface of the embedded body 3, the solid crystal tape 2 is removed; after forming a seed layer on the bottom surface of the core board 1, the first circuit layer 51 is manufactured; after forming a seed layer on the first dielectric layer 61, the second circuit layer 52 is manufactured; the first circuit layer 51 (bottom surface) and the second circuit layer 52 (top surface) are directly connected through the embedded body 3, avoiding the winding delay of the traditional through hole, and are suitable for the mounted chip 4 that requires high-speed signal transmission.

[0030] Please refer to Figure 8 In this embodiment, step S500 also includes: after the die-bonding tape 2 is removed, the second dielectric layer 62 is laminated and pressed on the bottom of the core board 1, and the first via hole 71 connected to the first mouth frame 11 and the second via hole 72 connected to the second mouth frame 12 are drilled in the second dielectric layer 62, and then a seed layer is formed on the bottom surface of the second dielectric layer 62 to make the first circuit layer 51. The first dielectric layer 61 and the second dielectric layer 62 play the role of sealing the first mouth frame 11 and the second mouth frame 12, and the newly added second dielectric layer 62 increases the protection of the bottom surface of the core board 1. At the same time, in order to ensure the connection between the embedded body 3 and the mounted chip 4, the first via hole 71 and the second via hole 72 are set to be copper paste plug-hole electroplated in the hole after drilling the dielectric layer, so that it is electrically connected to the embedded body 3 or the mounted chip 4.

[0031] Please refer to Figure 8In this embodiment, step S600 is also included: a third via hole 73 connected to the first opening frame 11 is drilled in the first dielectric layer 61, a package window 13 for exposing the mounted chip is opened in the first dielectric layer 61, the bottom pad of the mounted chip 4 can be exposed through the package window 13, and the second circuit layer 52 is connected through the pad, and the second circuit layer 52 is manufactured after a seed layer is formed on the surface of the first dielectric layer 61. The manufacturing method of the third via hole 73 is the same as that of the first via hole 71 and the second via hole 72, and there is no need to perform a process of thinning the first dielectric layer 61. The embedded body 3 can be electrically connected to the second circuit layer 52 through the third via hole 73, which is suitable for occasions where the packaging thickness requirement is not so strict.

[0032] A seed layer is formed on the bottom surface of the core board 1, the first dielectric layer 61 and the second dielectric layer 62 through a sputtering copper process. The thickness of the sputtered copper layer can be precisely controlled to 10-50nm, and the processing temperature is low, which can avoid thermal damage to the first dielectric layer 61 and the second dielectric layer 62 by high temperature and maintain their dielectric properties; and / or, a seed layer is formed on the bottom surface of the core board 1, the first dielectric layer 61 and the second dielectric layer 62 through a copper electroplating process. The seed side cover formed by the copper electroplating process has high purity and low resistance, uniform thickness in the hole, low processing cost, high product qualification rate, and is suitable for large-scale production.

[0033] Please refer to Figure 7 and Figure 8 The present invention also provides an embedded packaging substrate structure, including: a core board 1, the core board 1 is provided with at least one first opening frame 11 penetrating the core board 1 and at least one second opening frame 12 penetrating the core board 1; at least one dielectric layer is attached to one or both sides of the core board 1, the dielectric layer covers the first opening frame 11 and the second opening frame 12 to form a sealed space; an embedded body 3 is arranged in the first opening frame 11; a mounted chip 4, the mounted chip 4 is arranged in the second opening frame 12; at least one circuit layer is formed on the dielectric layer or the surface of the core board 1, at least one circuit layer is formed on the dielectric layer or the surface of the core board 1, the embedded body 3 and the mounted chip 4 are electrically connected to the circuit layer respectively, and the embedded body 3 and the mounted chip are connected through the circuit layer signal.

[0034] Fig. 9 It is an existing traditional X-shaped hole 82 electroplating embedded substrate packaging structure. This embedded packaging structure includes several layers of core board 1 structure, and the core board 1 is provided with a mouth frame structure, which is generally a substrate with glass fiber. The core board 1 is provided with an X-shaped conductive hole formed by laser drilling (Laser Via) electroplating. A mounting chip 4 is provided in the core board 1, and the mounting chip 4 is filled with dielectric layers above and below. The mouth frame and the mounting chip 4 are connected to the outer circuit layer by laser drilling electroplating. After the X-shaped hole 82 is electroplated, the hole wall plating is prone to unevenness, which affects the circuit conduction performance, and because the structural strength of the X structure in the middle is insufficient, this structure is not as good as the solution in the present application in terms of conductivity and structural strength.

[0035] Fig.10 It is an existing traditional mechanical drilling and then electroplating embedded substrate packaging structure. This embedded packaging structure is basically the same as Fig. 9 The same, the difference is that the middle Core layer (core layer) mouth frame layer uses mechanical drill electroplating, and the method of making the hole structure drilled at the first mouth frame is to mechanically drill holes in the board and then electroplate, the hole wall is plated with copper conductive circuit, and the hole is filled with non-conductive plugging resin 81. The main function of the plugging resin 81 is to enhance the overall structure. Therefore, this structure is not as good as the technical solution in this application in terms of conductivity.

[0036] Please refer to Figures 7 to 10 Compared with these two embedded packaging structures, the overall material of the embedded body 3 of the present invention is more uniform than the plating inside the electroplated hole, so its conductive performance is stronger. The embedded body 3 directly connects the core board 1 with the circuit layer, eliminates the copper-resin interface defects in the traditional hole, and the integrated design reduces the contact resistance, supporting the synchronous transmission of large current and high-frequency signals of the mounted chip 4.

[0037] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them. Under the concept of the present invention, the technical features in the above embodiments or different embodiments may also be combined, the steps may be implemented in any order, and there are many other changes in different aspects of the present invention as described above, which are not provided in detail for the sake of simplicity. Although the present invention has been described in detail with reference to the above embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the above embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for manufacturing an embedded packaging substrate, characterized in that: Includes steps: S100: preparing a core plate (1), and forming at least one first opening frame (11) and at least one second opening frame (12) on the core plate (1); S200: attaching a die-bonding tape (2) to the bottom surface of the core board (1); S300: preparing an embedding body (3) and components that are adapted to the shape of the first mouth frame (11), embedding the embedding body (3) and components into the first mouth frame (11) and the second mouth frame (12) respectively, and bonding the bottom surfaces of the embedding body (3) and the components to the die-bonding tape (2); S400: Laminating and pressing a first dielectric layer (61) on the top surface of the core board (1); S500: removing the die-bonding tape (2) and manufacturing a first circuit layer (51) on the bottom surface of the core board (1); the first circuit layer (51) is electrically connected to the embedded body (3) and the components respectively; and the embedded body (3) is signal-conductive with the components.

2. The method for manufacturing an embedded packaging substrate according to claim 1, characterized in that: In step S100: marking the positions of the first mouth frame (11) and the second mouth frame (12), and forming the first mouth frame (11) and the second mouth frame (12) at the marked positions by mechanical drilling; And / or, the first mouth frame (11) and the second mouth frame (12) are formed by laser punching.

3. The method for manufacturing an embedded packaging substrate according to claim 2, characterized in that: In step S400: the preparation material of the first medium layer (61) includes Ajinomoto resin and polypropylene resin.

4. The method for manufacturing an embedded package substrate according to claim 3, characterized in that: In step S300: the preparation material of the embedding body (3) includes any one of copper, aluminum, iron, and iron oxide, or a combination of at least two or more materials.

5. The method for manufacturing an embedded package substrate according to claim 4, characterized in that: The height of the embedded body (3) is greater than the height of the component, the shape of the embedded body (3) includes a cylinder, a cuboid, a cube, a wedge and a sphere, and the three-dimensional size range of the embedded body (3) is 0.1 mm-50 mm.

6. The method for manufacturing an embedded package substrate according to claim 5, characterized in that: Step S500 also includes: thinning the first dielectric layer (61) to expose the surface of the embedded body (3) and then removing the die-bonding tape (2); forming a seed layer on the bottom surface of the core board (1) and then producing a first circuit layer (51); and forming a seed layer on the first dielectric layer (61) and then producing a second circuit layer (52).

7. The method for manufacturing an embedded package substrate according to claim 5, characterized in that: Step S500 also includes: after the die-bonding tape (2) is removed, a second dielectric layer (62) is laminated and pressed on the bottom end of the core board (1), a first conductive hole (71) connected to the first opening frame (11) and a second conductive hole (72) connected to the second opening frame (12) are drilled in the second dielectric layer (62), and then a seed layer is formed on the bottom surface of the second dielectric layer (62) to produce the first circuit layer (51).

8. The method for manufacturing an embedded package substrate according to claim 7, characterized in that: The method further comprises step S600: drilling a third conductive hole (73) in the first dielectric layer (61) and communicating with the first opening frame (11), opening a packaging window (13) in the first dielectric layer (61) to expose the component, and forming a seed layer on the surface of the first dielectric layer (61) before manufacturing a second circuit layer (52).

9. The method for manufacturing an embedded package substrate according to claim 8, characterized in that: Forming the seed layer on the bottom surface of the core board (1), the first dielectric layer (61) and the second dielectric layer (62) by a copper sputtering process; And / or, the seed layer is formed on the bottom surface of the core board (1), the first dielectric layer (61) and the second dielectric layer (62) by a copper electroplating process.

10. An embedded packaging substrate structure, characterized in that: include: A core plate (1), the core plate (1) being provided with at least one first opening frame (11) penetrating the core plate (1) and at least one second opening frame (12) penetrating the core plate (1); At least one dielectric layer is attached to one or both sides of the core plate (1), the dielectric layer covers the first opening frame (11) and the second opening frame (12) to form a sealed space; An embedded body (3) is arranged in the first opening frame (11); Components, the components are arranged in the second opening frame (12); At least one circuit layer is formed on the dielectric layer or the surface of the core board (1); the embedded body (3) and the components are respectively electrically connected to the circuit layer; and the embedded body (3) and the components are connected via signals of the circuit layer.

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