Bidirectional switching capacitive converter with current limiting function and control circuit and method

Abstract

The invention provides a bidirectional switching capacitive converter with a current limiting function and a control circuit and method. A switched capacitive converter for converting a first voltage to a second voltage, and vice versa, includes: a plurality of switches including at least four switches having a first switch coupled between the first voltage and an inductive switching node; an inductor coupled between the inductor switching node and a second voltage; a flying capacitor coupled to the plurality of switches and configured as a capacitive voltage divider; the current sensing circuit is used for sensing the inductive current and sampling the inductive current during the conduction period of the first switch so as to generate a sensing current signal; the error amplifier is used for generating a first amplification signal according to a difference value between the sensing current signal and a reference current signal; and a pulse width modulation generator for comparing the first amplified signal with the ramp signal to generate a switching control signal to control a first switching current flowing through the first voltage.

Description

Technical Field

[0001] The present invention relates to a bidirectional switched capacitor converter, and more particularly to a bidirectional switched capacitor converter with a current limiting function. The present invention also relates to a control circuit and a control method for controlling the bidirectional switched capacitor converter. Background Art

[0002] Figure 1 A prior art switched capacitor converter 900 with current limiting functionality is shown. Figure 1 The input current limiting function in the embodiment requires a sensing resistor Rs to be connected to the input voltage Vin to sense the input current Iin, and requires a current sensing amplifier 90 and a control circuit 91 to control the power stage circuit 92. The control circuit 91 generates a control signal PWM according to the sensing signal Ise and the reference current signal Iref to control the power stage circuit 92, thereby limiting the input current Iin.

[0003] The disadvantages of the prior art include significant power loss caused by the sensing resistor and the need for a high voltage current sensing amplifier circuit, which results in unnecessary power consumption and higher manufacturing cost.

[0004] In view of the above situation, in order to overcome the shortcomings of the prior art, the present invention proposes a bidirectional switched capacitor converter with current limiting function, which is characterized in that input current sensing is performed through output inductance to achieve input current limiting control, so no sensing resistor and high-voltage current sensing amplifier circuit are required. The present invention also has current limiting and current regulation control functions for power converters to avoid the input power shutdown problem caused by overcurrent protection. Summary of the invention

[0005] In one aspect, the present invention provides a switched capacitor converter for converting a first voltage into a second voltage, or for converting the second voltage into the first voltage, comprising: a plurality of switches, including at least four switches, wherein the at least four switches include a first switch, wherein the first switch is coupled between the first voltage and a first inductor switching node; a first inductor, coupled between the first inductor switching node and the second voltage; a first flying capacitor, coupled to the plurality of switches and configured as a capacitive voltage divider to reduce voltage pressure on the plurality of switches; a current sensor; A detection circuit is coupled to the first inductor, and is used to sense a first inductor current flowing through the first inductor, and to sample the first inductor current during the conduction period of the first switch to generate a sensing current signal; a first error amplifier, and is used to generate a first amplified signal according to the difference between the sensing current signal and a reference current signal; and a pulse width modulation (PWM) generator, and is used to compare the first amplified signal with a first ramp signal to generate a plurality of switching control signals, wherein the plurality of switching control signals are used to control the plurality of switches, thereby controlling a first switch current flowing into or out of the first voltage.

[0006] In a preferred embodiment, the current sensing circuit includes a sensing resistor and a sensing capacitor coupled to the first inductor, and senses the first inductor current by sensing the voltage on the sensing capacitor, thereby generating the sensing current signal.

[0007] In a preferred embodiment, the current sensing circuit includes a sampling circuit and a low-pass filter for sensing the first inductor current and generating the sensing current signal.

[0008] In a preferred embodiment, the current sensing circuit is used to sample the first inductor current during the on-time of the first switch, thereby limiting the first switch current flowing into or out of the first voltage.

[0009] In a preferred embodiment, the current sensing circuit further samples the first inductor current during the non-conducting period of the first switch, thereby limiting an output current flowing into or out of the second voltage.

[0010] In a preferred embodiment, the first ramp signal operates the switched capacitor converter at a fixed switching frequency.

[0011] In a preferred embodiment, the switched capacitor converter further includes a second error amplifier for generating a second amplified signal according to a difference between the second voltage and a reference voltage signal, thereby controlling the second voltage.

[0012] In a preferred embodiment, the plurality of switching control signals include a first switching control signal and a second switching control signal; wherein the pulse width modulation generator includes: a first comparator for comparing the first amplified signal with the first ramp signal to generate the first switching control signal; and a second comparator for comparing the first amplified signal with a second ramp signal to generate the second switching control signal; wherein the plurality of switches are controlled by the first switching control signal and the second switching control signal, thereby controlling the first switch current flowing into or out of the first voltage; wherein a pulse start time point of the first switching control signal determines a first valley value of the first inductor current, and a pulse start time point of the second switching control signal determines a second valley value of the first inductor current, thereby realizing valley current mode control of the switched capacitor converter; wherein the first ramp signal and the second ramp signal are generated according to a first clock signal and a second clock signal, respectively, and are related to the first inductor current.

[0013] In a preferred embodiment, the phase shift between the first ramp signal and the second ramp signal is 180 degrees to ensure balanced control of the switched capacitor converter.

[0014] In a preferred embodiment, the switched capacitor converter further includes: a second switch, a third switch and a fourth switch, wherein the first switch is coupled between the first voltage and a first capacitor switching node, the first flying capacitor is coupled between the first capacitor switching node and a second capacitor switching node, the second switch is coupled between the first capacitor switching node and the first inductor switching node, the third switch is coupled between the second capacitor switching node and the first inductor switching node, and the fourth switch is coupled between the second capacitor switching node and a ground potential.

[0015] In a preferred embodiment, the switched capacitor converter further includes a second inductor, and the multiple switches further include a second switch, a third switch and a fourth switch, wherein the first flying capacitor is coupled between a first capacitor switching node and the first inductor switching node, the second switch is coupled between the first capacitor switching node and a second inductor switching node, the third switch is coupled between the second inductor switching node and a ground potential, the fourth switch is coupled between the first inductor switching node and the ground potential, and the second inductor is coupled between the second inductor switching node and the second voltage.

[0016] In a preferred embodiment, the switched capacitor converter further comprises a second inductor and a second flying capacitor, wherein the plurality of switches, the first inductor, the second inductor, the first flying capacitor and the second flying capacitor are configured as a cross-coupled switched capacitor converter.

[0017] From another perspective, the present invention provides a control circuit for controlling a switched capacitor converter, wherein the switched capacitor converter is used to convert a first voltage into a second voltage, or to convert the second voltage into the first voltage, wherein the switched capacitor converter comprises: a plurality of switches, including at least four switches, wherein the at least four switches comprise a first switch, wherein the first switch is coupled between the first voltage and a first inductor switching node; a first inductor, coupled between the first inductor switching node and the second voltage; and a first flying capacitor, coupled to the plurality of switches, and configured as a capacitive voltage divider to reduce the voltage applied to the plurality of switches. voltage pressure; wherein the control circuit comprises: a current sensing circuit coupled to the first inductor, for sensing a first inductor current flowing through the first inductor, and sampling the first inductor current during the conduction period of the first switch to generate a sensing current signal; a first error amplifier, for generating a first amplified signal according to the difference between the sensing current signal and a reference current signal; and a pulse width modulation (PWM) generator, for comparing the first amplified signal with a first ramp signal to generate a plurality of switching control signals, wherein the plurality of switching control signals are used to control the plurality of switches, thereby controlling a first switch current flowing into or out of the first voltage.

[0018] From another perspective, the present invention provides a control method for controlling a switched capacitor converter, the switched capacitor converter is used to convert a first voltage into a second voltage, or to convert the second voltage into the first voltage, wherein the switched capacitor converter includes: a plurality of switches, including at least four switches, wherein the at least four switches include a first switch, wherein the first switch is coupled between the first voltage and a first inductor switching node; a first inductor, coupled between the first inductor switching node and the second voltage; and a first flying capacitor, coupled to the plurality of switches and configured as a capacitive voltage divider to reduce voltage pressure on the plurality of switches; wherein the control method includes: generating a sensed current signal by sensing a first inductor current flowing through the first inductor and sampling the first inductor current during the conduction period of the first switch; generating a first amplified signal according to the difference between the sensed current signal and a reference current signal; and comparing the first amplified signal with a first ramp signal to generate a plurality of switching control signals to control the plurality of switches, thereby controlling a first switch current flowing into or out of the first voltage.

[0019] The following will be described in detail through specific embodiments to make it easier to understand the purpose, technical content, characteristics and effects achieved by the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A prior art switched capacitor converter is shown.

[0021] Figure 2A A block diagram of a switched capacitor converter according to an embodiment of the present invention is shown.

[0022] Figure 2B A block diagram of a switched capacitor converter according to another embodiment of the present invention is shown.

[0023] Figure 3A The present invention corresponds to Figure 2A An operating waveform diagram of an embodiment of a switched capacitor converter.

[0024] Figure 3B The present invention corresponds to Figure 2A FIG. 1 is a diagram of operating waveforms of another embodiment of a switched capacitor converter.

[0025] Figure 4 A schematic diagram showing a switched capacitor converter according to an embodiment of the present invention.

[0026] Figure 5 A schematic diagram showing a current signal generator of a current sensing circuit in a switched capacitor converter according to an embodiment of the present invention.

[0027] Figure 6 A schematic diagram showing a sampling circuit and a low-pass filter of a current sensing circuit in a switched capacitor converter according to an embodiment of the present invention.

[0028] Fig. 7A A schematic diagram showing a switched capacitor converter according to an embodiment of the present invention.

[0029] Figure 7B The present invention corresponds to Fig. 7A An operating waveform diagram of an embodiment of a switched capacitor converter.

[0030] Fig. 8A A schematic diagram showing a switched capacitor converter according to an embodiment of the present invention.

[0031] Figure 8B The present invention corresponds to Fig. 8A An operating waveform diagram of an embodiment of a switched capacitor converter.

[0032] Fig. 9A A schematic diagram showing a switched capacitor converter according to an embodiment of the present invention.

[0033] Fig. 9B The present invention corresponds to Fig. 9A An operating waveform diagram of an embodiment of a switched capacitor converter.

[0034] Explanation of symbols in the figure

[0035] 100, 101, 1091, 1092: Current sensing circuit

[0036] 1002A, 1002B, 1004, 1007, 1008A: Switched Capacitor Converters

[0037] 110, 111: Current signal generator

[0038] 120, 121: Sampling circuit

[0039] 130, 131: Low pass filter

[0040] 210: First error amplifier

[0041] 220: Second error amplifier

[0042] 300, 301: Pulse width modulation generator

[0043] 310: First comparator

[0044] 320: Second comparator

[0045] 90: Current Sense Amplifier

[0046] 900: Switched Capacitor Converter

[0047] 91: Control circuit

[0048] 92: Power stage circuit

[0049] C1: First flying capacitor

[0050] C2: Second flying capacitor

[0051] Cf: filter capacitor

[0052] clk1: clock signal

[0053] Cx: sensing capacitance

[0054] Dcr1: DC resistance

[0055] EA1: First amplified signal

[0056] EA2: Second amplified signal

[0057] FF1, FF2: Trigger

[0058] IC1_ch, IC2_ch: Charging current

[0059] IC1_disch, IC2_disch: discharge current

[0060] Iin: input current

[0061] Iina: average input current value

[0062] IL1: First inductor current

[0063] IL2: Second inductor current

[0064] ILf: sensing current signal

[0065] ILf1: First sensing current signal

[0066] ILf2: Second sensing current signal

[0067] ILs: Sampled current signal

[0068] ILS1: Current value of the first inductor current

[0069] ILS2: Current value of the second inductor current

[0070] IQ1: First switch current

[0071] Iref: reference current signal

[0072] Iref: reference current signal

[0073] Ise: Sensing signal

[0074] L1: First inductor

[0075] L2: Second inductor

[0076] Nc1: First capacitor switching node

[0077] Nc2: Second capacitor switching node

[0078] Nl1: First inductor switching node

[0079] Nl2: Second inductor switching node

[0080] PWM: Control signal

[0081] Q1~Q6: switch

[0082] Rf: filter resistor

[0083] Rs: sensing resistor

[0084] Rx: sensing resistor

[0085] S1~S6: Switching control signal

[0086] Str1, Str2: trigger signal

[0087] SW1: Sampling switch

[0088] Toff: Off time

[0089] Ton1: First conduction time

[0090] tsp: sampling time

[0091] Tsw, Tsw1, Tsw2, Tsw3, Tsw4: switching cycle

[0092] V1: first voltage

[0093] V2: Second voltage

[0094] VC: The voltage across the first flying capacitor

[0095] Vcc: supply voltage

[0096] Vcomp: The third amplified signal

[0097] Vfb: Signal

[0098] ViL: Inductor current signal

[0099] Vin: input voltage

[0100] VNl1: switching node voltage

[0101] Vramp1: first ramp signal

[0102] Vramp2: second ramp signal

[0103] Vref: reference voltage signal DETAILED DESCRIPTION

[0104] The drawings in the present invention are schematic, and are mainly intended to show the coupling relationship between the various circuits and the relationship between the various signal waveforms. The circuits, signal waveforms and frequencies are not drawn according to scale. For the purpose of clarity, many practical details will be described in the following description, but this is not intended to limit the scope of the patent application of the present invention.

[0105] Figure 2A A block diagram of a switched capacitor converter according to an embodiment of the present invention is shown. Figure 2B A block diagram of a switched capacitor converter according to another embodiment of the present invention is shown. Figure 2AAs shown, the switched capacitor converter 1002A is used to convert the first voltage V1 into the second voltage V2. In another embodiment, as shown in FIG. Figure 2B As shown, the switched capacitor converter 1002B is used to convert the second voltage V2 into the first voltage V1. Figure 2A For example, those skilled in the art can infer from the following description Figure 2B Operational details of the embodiment.

[0106] In one embodiment, if Figure 2A As shown, the switched capacitor converter 1002A includes: a plurality of switches, a first inductor L1, a first flying capacitor C1, a current sensing circuit 100, a first error amplifier 210 and a pulse width modulation (PWM) generator 300. In one embodiment, the plurality of switches include at least four switches. In this embodiment, the plurality of switches include a first switch Q1, a second switch Q2, a third switch Q3 and a fourth switch Q4. In one embodiment, the first switch Q1 is coupled between a first voltage V1 and a first inductor switching node Nl1. In other words, during at least one period of the switching cycle, the current flowing through the first switch Q1 is equal to the current flowing through the first inductor L1. The details are described in detail later. The first inductor L1 is coupled between the first inductor switching node Nl1 and a second voltage V2. The first flying capacitor C1 is coupled to the plurality of switches Q1~Q4 and configured as a capacitive voltage divider to reduce the voltage pressure of the plurality of switches Q1~Q4.

[0107] In one embodiment, the current sensing circuit 100 is coupled to the first inductor L1 to sense the first inductor current IL1 flowing through the first inductor L1 and generate a sensing current signal ILf. The first error amplifier 210 is used to generate a first amplified signal EA1 according to the difference between the sensing current signal ILf and the reference current signal Iref. The PWM generator 300 is used to compare the first amplified signal EA1 with the first ramp signal Vramp1 to generate switching control signals S1~S4 to control the multiple switches, thereby limiting the first switch current IQ1 flowing from the first voltage V1 to achieve input current limitation. In this embodiment, the switching control signals S1~S4 are used to control the multiple switches Q1~Q4 respectively. In one embodiment, the current sensing circuit 100 is used to sample the first inductor current IL1 during the conduction period of the first switch Q1 to generate the sensing current signal ILf. In one embodiment, the first ramp signal Vramp1 operates in the switched capacitor converter 1002A at a fixed switching frequency.

[0108] Figure 3A The present invention corresponds to Figure 2A In one embodiment, the switching capacitor converter of the embodiment of the operation waveform diagram. Figure 3AAs shown, in the switching period Tsw1, the duty cycle of the switching control signal S1 and the duty cycle of the switching control signal S2 are both less than 50% (for example, when V2 < V1 / 2). In one embodiment, during the first on-time Ton1 when the first switch Q1 is in the on-state, the first inductor current IL1 is equal to the input current (i.e., the first switch current IQ1). In one embodiment, the current sensing circuit 100 is used to sample the first inductor current IL1 during the first on-time Ton1, thereby limiting the first switch current IQ1. In another embodiment, the current sensing circuit 100 is also used to sample the first inductor current IL1 when the first switch Q1 is in the off-state (i.e., the off-time Toff) to limit an output current flowing to the second voltage V2.

[0109] Figure 3B The present invention corresponds to Figure 2A Another embodiment of the switched capacitor converter operation waveform diagram. In one embodiment, as Figure 3B As shown, in the switching period Tsw2, the duty cycle of the switching control signal S1 and the duty cycle of the switching control signal S2 are both greater than 50% (for example, the case where V2>V1 / 2). For more details about the waveform, please refer to Figure 3A Description.

[0110] Figure 4 A schematic diagram showing a switched capacitor converter according to an embodiment of the present invention. Figure 2A The switched capacitor converter 1002A shown in FIG. 1 is, in one embodiment, Figure 4 The switched capacitor converter 1004 further includes a second error amplifier 220. The current sensing circuit 101 of the switched capacitor converter 1004 includes a current signal generator 110, a sampling circuit 120, and a low-pass filter 130. In one embodiment, the current signal generator 110 is used to generate an inductor current signal ViL by sensing the first inductor current IL1. The sampling circuit 120 is used to sample the inductor current signal ViL during the first on-time Ton1 according to the sampling time tsp to generate a sampled current signal ILs. The low-pass filter 130 generates a sensed current signal ILf according to the sampled current signal ILs.

[0111] In a specific embodiment, the first switch Q1 is coupled between the first voltage V1 and the first capacitor switching node Nc1, the first flying capacitor C1 is coupled between the first capacitor switching node Nc1 and the second capacitor switching node Nc2, the second switch Q2 is coupled between the first capacitor switching node Nc1 and the first inductor switching node Nl1, the third switch Q3 is coupled between the second capacitor switching node Nc2 and the first inductor switching node Nl1, and the fourth switch Q4 is coupled between the second capacitor switching node Nc2 and the ground potential.

[0112] In one embodiment, the second error amplifier 220 is used to generate the second amplified signal EA2 according to the difference between the feedback signal Vfb (related to or equal to the second voltage V2) and the reference voltage signal Vref, thereby controlling the second voltage. In this embodiment, the PWM generator 300 is used to generate the switching control signals S1~S4 according to the first ramp signal Vramp1 and the third amplified signal Vcomp. The third amplified signal Vcomp is generated according to the lower of the first amplified signal EA1 and the second amplified signal EA2. For example, Figure 4 In the embodiment shown in FIG. 1 , the diode is used to compare and select the lower of the first amplified signal EA1 and the second amplified signal EA2 to generate the third amplified signal Vcomp. From another point of view, each loop controlled by the first error amplifier 210 and the second error amplifier 220 determines its respective duty cycle. However, through the comparison and selection mechanism, the loop with the lower duty cycle mainly controls the operation of the switched capacitor converter 1004.

[0113] See also Figure 3A , Figure 3B and Figure 4 In one embodiment, the sampling current signal ILs is generated by sampling the first inductor current IL1 during the first on-time Ton1 when the first switch Q1 is in the on-state. Therefore, the sampling current signal ILs is proportional to the input current (i.e., the first switch current IQ1) of the switched capacitor converter 1004. The switched capacitor converter 1004 of the present invention senses its input current through the first inductor current IL1, thereby controlling the input current. Therefore, the present invention does not require the input current sensing resistor and the high-voltage current sensing amplifier circuit in the prior art.

[0114] Please continue reading Figure 4 In one embodiment, when the input current (first switch current IQ1) of the switched capacitor converter 1004 increases, the sensing current signal ILf also increases. If the sensing current signal ILf is higher than the reference current signal Iref, the first error amplifier 210 will pull down the third amplified signal Vcomp to adjust the switching control signals S1-S4, thereby controlling the input current to be below the preset input current level.

[0115] Figure 5 A schematic diagram showing a current signal generator of a current sensing circuit in a switched capacitor converter according to an embodiment of the present invention. Figure 5 The current signal generator 111 shown is Figure 4A specific embodiment of direct current resistance (DCR) sensing of the current signal generator 110 is shown. In one embodiment, the first inductor L1 includes a direct current resistor Dcr1. The current signal generator 111 includes a sensing resistor Rx and a sensing capacitor Cx, which are connected in series and coupled to the first inductor L1. When the time constants of the first inductor L1, the direct current resistor Dcr1, the sensing resistor Rx and the sensing capacitor Cx are matched, the first inductor current IL1 can be sensed by the voltage across the sensing capacitor Cx. The inductor current signal ViL is generated according to the voltage across the sensing capacitor Cx. The remaining details of the current signal generator 111 are well known to those skilled in the art and are not repeated here.

[0116] It should be noted that the benefit of the above DCR sensing method is to reduce the power loss of the current sensing resistor. Figure 4 The generation method of the inductor current signal ViL is not limited to the DCR sensing method. The inductor current signal ViL can also be generated by a physical current sensing resistor connected in series with the first inductor L1, a current sensing transformer, a Hall Effect sensing device, a first flying capacitor C1, or at least one of the multiple switches Q1-Q4.

[0117] Figure 6 A schematic diagram showing a sampling circuit and a low-pass filter of a current sensing circuit in a switched capacitor converter according to an embodiment of the present invention. Figure 6 The sampling circuit 121 and the low-pass filter 131 are shown as Figure 4 Specific embodiments of the sampling circuit 120 and the low-pass filter 130 are shown. In one embodiment, the sampling switch SW1 of the sampling circuit 121 is controlled by a sampling control signal having a sampling time tsp. The sampling control signal can be a switching control signal S1 or a fixed voltage (such as a power supply voltage Vcc). In one embodiment, when the sampling control signal is the switching control signal S1, the sampling current signal ILs is proportional to the input current (i.e., the first switch current IQ1) flowing through the first switch Q1. In another embodiment, when the sampling control signal is the power supply voltage Vcc, the sampling current signal ILs is proportional to the output current corresponding to the second voltage V2.

[0118] In one embodiment, the low-pass filter 131 includes a filter resistor Rf and a filter capacitor Cf. The low-pass filter 131 is used to generate a sensing current signal ILf according to the sampled current signal ILs.

[0119] See also Fig. 7A and Figure 7B . Fig. 7A A schematic diagram showing a switched capacitor converter according to an embodiment of the present invention. Figure 7BThe present invention corresponds to Fig. 7A An operating waveform diagram of an embodiment of a switched capacitor converter. Fig. 7A The switched capacitor converter 1007 shown is Figure 4 FIG. 1 is a schematic diagram of a switched capacitor converter 1004. In one embodiment, as shown in FIG. Fig. 7A As shown, the PWM generator 301 of the switched capacitor converter 1007 includes a first comparator 310 and a second comparator 320. In one embodiment, the first comparator 310 is used to compare the third amplified signal Vcomp with the first ramp signal Vramp1 to generate a trigger signal Str1, thereby simultaneously cooperating with the trigger FF1 to generate the switching control signals S1 and S4 according to the clock signal clk1. The second comparator 320 is used to compare the third amplified signal Vcomp with the second ramp signal Vramp2 to generate a trigger signal Str2, thereby simultaneously cooperating with the trigger FF2 to generate the switching control signals S2 and S3 according to the clock signal clk2. It should be noted that the third amplified signal Vcomp is equivalent to the first amplified signal EA1 or the second amplified signal EA2 mentioned above. In addition, the first ramp signal Vramp1 and the second ramp signal Vramp2 are generated according to the clock signals clk1 and clk2, respectively, and are related to the inductor current signal ViL.

[0120] like Fig. 7A As shown, in one embodiment, the first comparator 310 and the second comparator 320 are used to generate switching control signals S1~S4 to control multiple switches Q1~Q4 to control the first switching current IQ1 flowing from the first voltage V1, so that the first inductor switching node Nl1 (i.e., the switching node voltage VNl1) switches between two of k voltage levels, thereby adjusting the first voltage V1 or the second voltage V2 to a preset target level, and adjusting and balancing the voltage on the first flying capacitor C1 to one (k-1)th of the first voltage V1.

[0121] It should be noted that the above k is an integer greater than or equal to 3 (in Fig. 7A In the embodiment shown, k is equal to 3), and the k voltage levels include the first voltage V1, the ground potential, and at least one voltage division of the first voltage V1. Figure 7B As shown, in this embodiment, the switching node voltage VNl1 switches between V1 / 2 (i.e., V1-VC or VC, VC is the voltage across the first flying capacitor C1, and its steady state is V1 / 2) and the ground potential. Tsw is the switching period in this embodiment. It should also be noted that in other embodiments, the switching node voltage VNl1 can switch between V1 and V1 / 2.

[0122] Please continue reading Figure 7BIn one embodiment, the starting time point of the pulse of the first control signal (e.g., t1) determines the first valley value of the first inductor current IL1 (by determining the first valley value of the inductor current signal ViL), and the starting time point of the pulse of the second control signal (e.g., t3) determines the second valley value of the first inductor current IL1 (by determining the second valley value of the inductor current signal ViL), thereby implementing valley current mode control. It should also be noted that in order to ensure balanced control of the switched capacitor converter 1007, the phase shift between the first ramp signal Vramp1 and the second ramp signal Vramp2 is 180 degrees.

[0123] Fig. 8A A schematic diagram of a switched capacitor converter in one embodiment of the present invention is shown. In one embodiment, the switched capacitor converter 1008A further includes a second inductor L2, and the second inductor L2 has a second inductor current IL2. In one embodiment, the power stage circuit of the switched capacitor converter 1008A is configured as a series capacitor buck (SCB) converter, including a first flying capacitor C1, a first inductor L1, a second inductor L2, and a plurality of switches Q1-Q4. In a specific embodiment, as Fig. 8A As shown, the first flying capacitor C1 is coupled between the first capacitor switching node Nc1 and the first inductor switching node Nl1, the second switch Q2 is coupled between the first capacitor switching node Nc1 and the second inductor switching node Nl2, the third switch Q3 is coupled between the second inductor switching node Nl2 and the ground potential, the fourth switch Q4 is coupled between the first inductor switching node Nl1 and the ground potential, and the second inductor L2 is coupled between the second inductor switching node Nl2 and the second voltage V2.

[0124] Figure 8B The present invention corresponds to Fig. 8A FIG. 1 is an operation waveform diagram of an embodiment of a switched capacitor converter. In one embodiment, in the switching period Tsw3, the duty cycle of the switching control signal S1 and the duty cycle of the switching control signal S2 are both less than 50%. In this embodiment, the current sensing circuit 100 is used to sample the first inductor current IL1 during the first on-time Ton1 when the first switch Q1 is in the on-state, so as to limit the first switch current IQ1. Figure 8B The details of the operating waveform in the embodiment of the present invention can be obtained by a person skilled in the art. Fig. 8A And the above description can be inferred.

[0125] Fig. 9A A schematic diagram showing a switched capacitor converter according to an embodiment of the present invention. Figure 2A As shown in the switched capacitor converter 1002A, in one embodiment, the switched capacitor converter 1009A further includes a second inductor L2 and a second flying capacitor C2. Fig. 9AThe current sensing circuit in the embodiment includes current sensing circuits 1091 and 1092, which are used to sense the first inductor current IL1 and the second inductor current IL2, respectively, to generate the first sensing current signal ILf1 and the second sensing current signal ILf2, respectively. Fig. 9A As shown, the plurality of switches further include a fifth switch Q5 and a sixth switch Q6 which are controlled by switching control signals S5 and S6 respectively.

[0126] At Fig. 9A In the illustrated embodiment, a plurality of switches Q1-Q6, a first inductor L1, a second inductor L2, a first flying capacitor C1, and a second flying capacitor C2 are configured as a cross-coupled switched capacitor converter for converting a first voltage V1 into a second voltage V2, or converting a second voltage V2 into the first voltage V1.

[0127] See also Fig. 9A and Fig. 9B . Fig. 9B The present invention corresponds to Fig. 9A An operation waveform diagram of an embodiment of a switched capacitor converter. In one embodiment, in the switching period Tsw4, the duty cycle of the switching control signal S1 and the duty cycle of the switching control signal S2 are both less than 50%. In one embodiment, Fig. 9B As shown, in the time period t0~t1, the first inductor current IL1 is excited according to the charging current IC1_ch of the first flying capacitor C1 and the discharging current IC2_disch of the second flying capacitor C2. In the time period t2~t3, the second inductor current IL2 is excited according to the discharging current IC1_disch of the first flying capacitor C1 and the charging current IC2_ch of the second flying capacitor C2. In the steady state, due to the charge balance, the charging current and the discharging current of the first flying capacitor C1 and the second flying capacitor C2 are equal. Therefore, the average input current value Iina of the input current Iin can be sampled from the first inductor current IL1 when the switching control signal S1 is at a high level, and can be sampled from the second inductor current IL2 when the switching control signal S2 is at a high level. The average input current value Iina can be calculated by the following equation.

[0128] ILS1 = IC1_ch + IC2_disch

[0129] ILS2 = IC1_disch + IC2_ch

[0130] Iina=(ILS1+ILS2) / 2

[0131] In the above equation, ILS1 is the current value of the first inductor current IL1 when the switching control signal S1 is at a high level, and ILS2 is the current value of the second inductor current IL2 when the switching control signal S2 is at a high level.

[0132] In addition, if the device parameters between the first flying capacitor C1 and the second flying capacitor C2, and between the first inductor L1 and the second inductor L2 are matched, the average input current value Iina can be obtained by sampling the first inductor current IL1 when the switching control signal S1 is at a high level, or by sampling the second inductor current IL2 when the switching control signal S2 is at a high level.

[0133] The present invention has been described above with respect to the preferred embodiment. The above description is only to make it easy for those skilled in the art to understand the content of the present invention, and is not used to limit the scope of rights of the present invention. The various embodiments described are not limited to individual applications, but can also be applied in combination. For example, two or more embodiments can be used in combination, and part of the components in one embodiment can also be used to replace the corresponding components in another embodiment. In addition, under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations. For example, the present invention refers to "processing or calculating or generating an output result according to a certain signal", which is not limited to the signal itself, but also includes, when necessary, converting the signal to voltage and current, current and voltage, and / or ratio conversion, and then processing or calculating according to the converted signal to generate an output result. It can be seen that under the same spirit of the present invention, those skilled in the art can think of various equivalent changes and various combinations, and there are many combinations, which are not listed one by one here. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

Claims

1. A switched capacitor converter for converting a first voltage into a second voltage, or for converting the second voltage into the first voltage, comprising: A plurality of switches, including at least four switches, wherein the at least four switches include a first switch, wherein the first switch is coupled between the first voltage and a first inductor switching node; a first inductor coupled between the first inductor switching node and the second voltage; a first flying capacitor coupled to the plurality of switches and configured as a capacitive voltage divider to reduce voltage pressure on the plurality of switches; a current sensing circuit coupled to the first inductor, for sensing a first inductor current flowing through the first inductor, and sampling the first inductor current during the conduction period of the first switch to generate a sensing current signal; a first error amplifier, configured to generate a first amplified signal according to a difference between the sensing current signal and a reference current signal; as well as A pulse width modulation generator is used to compare the first amplified signal with a first ramp signal to generate a plurality of switching control signals, wherein the plurality of switching control signals are used to control the plurality of switches, thereby controlling a first switching current flowing into or out of the first voltage.

2. The switched capacitor converter of claim 1, wherein: The current sensing circuit includes a sensing resistor and a sensing capacitor coupled to the first inductor, and senses the first inductor current by sensing the voltage on the sensing capacitor, thereby generating the sensing current signal.

3. The switched capacitor converter of claim 1, wherein: The current sensing circuit includes a sampling circuit and a low-pass filter for sensing the first inductor current and generating the sensing current signal.

4. The switched capacitor converter of claim 1, wherein: The current sensing circuit is used for sampling the first inductor current during the conduction period of the first switch, thereby limiting the first switch current flowing into or out of the first voltage.

5. The switched capacitor converter of claim 1, wherein: The current sensing circuit also samples the first inductor current during the non-conducting period of the first switch, thereby limiting an output current flowing into or out of the second voltage.

6. The switched capacitor converter of claim 1, wherein: The first ramp signal operates the switched capacitor converter at a fixed switching frequency.

7. The switched capacitor converter of claim 1, wherein: The device also includes a second error amplifier for generating a second amplified signal according to a difference between the second voltage and a reference voltage signal, thereby controlling the second voltage.

8. The switched capacitor converter of claim 1, wherein: The plurality of switching control signals include a first switching control signal and a second switching control signal; The pulse width modulation generator includes: a first comparator for comparing the first amplified signal with the first ramp signal to generate the first switching control signal; and a second comparator for comparing the first amplified signal with a second ramp signal to generate the second switching control signal; wherein the plurality of switches are controlled by the first switching control signal and the second switching control signal, thereby controlling the first switch current flowing into or out of the first voltage; A pulse start time point of the first switching control signal determines a first valley value of the first inductor current, and a pulse start time point of the second switching control signal determines a second valley value of the first inductor current, thereby implementing valley current mode control of the switched capacitor converter; The first ramp signal and the second ramp signal are generated according to a first clock signal and a second clock signal respectively, and are related to the first inductor current.

9. The switched capacitor converter of claim 8, wherein: The phase shift between the first ramp signal and the second ramp signal is 180 degrees to ensure balanced control of the switched capacitor converter.

10. The switched capacitor converter of claim 1, wherein: It also includes: a second switch, a third switch and a fourth switch, wherein the first switch is coupled between the first voltage and a first capacitor switching node, the first flying capacitor is coupled between the first capacitor switching node and a second capacitor switching node, the second switch is coupled between the first capacitor switching node and the first inductor switching node, the third switch is coupled between the second capacitor switching node and the first inductor switching node, and the fourth switch is coupled between the second capacitor switching node and a ground potential.

11. The switched capacitor converter of claim 1, wherein: It also includes a second inductor, and the multiple switches also include a second switch, a third switch and a fourth switch, wherein the first flying capacitor is coupled between a first capacitor switching node and the first inductor switching node, the second switch is coupled between the first capacitor switching node and a second inductor switching node, the third switch is coupled between the second inductor switching node and a ground potential, the fourth switch is coupled between the first inductor switching node and the ground potential, and the second inductor is coupled between the second inductor switching node and the second voltage.

12. The switched capacitor converter of claim 1, wherein: A second inductor and a second flying capacitor are also included, wherein the plurality of switches, the first inductor, the second inductor, the first flying capacitor and the second flying capacitor are configured as a cross-coupled switched capacitor converter.

13. A control circuit for controlling a switched capacitor converter, the switched capacitor converter being used to convert a first voltage into a second voltage, or to convert the second voltage into the first voltage, wherein the switched capacitor converter comprises: A plurality of switches, including at least four switches, wherein the at least four switches include a first switch, wherein the first switch is coupled between the first voltage and a first inductor switching node; a first inductor, coupled between the first inductor switching node and the second voltage; and a first flying capacitor, coupled to the plurality of switches and configured as a capacitive voltage divider to reduce voltage pressure on the plurality of switches; wherein the control circuit comprises: a current sensing circuit coupled to the first inductor, for sensing a first inductor current flowing through the first inductor, and sampling the first inductor current during the conduction period of the first switch to generate a sensing current signal; a first error amplifier, configured to generate a first amplified signal according to a difference between the sensing current signal and a reference current signal; as well as A pulse width modulation generator is used to compare the first amplified signal with a first ramp signal to generate a plurality of switching control signals, wherein the plurality of switching control signals are used to control the plurality of switches, thereby controlling a first switching current flowing into or out of the first voltage.

14. The control circuit according to claim 13, wherein: The current sensing circuit includes a sensing resistor and a sensing capacitor coupled to the first inductor, and senses the first inductor current by sensing the voltage on the sensing capacitor, thereby generating the sensing current signal.

15. The control circuit according to claim 13, wherein: The current sensing circuit includes a sampling circuit and a low-pass filter for sensing the first inductor current and generating the sensing current signal.

16. The control circuit according to claim 13, wherein: The current sensing circuit is used for sampling the first inductor current during the conduction period of the first switch, thereby limiting the first switch current flowing into or out of the first voltage.

17. The control circuit according to claim 13, wherein: The current sensing circuit also samples the first inductor current during the non-conducting period of the first switch, thereby limiting an output current flowing into or out of the second voltage.

18. The control circuit according to claim 13, wherein: The first ramp signal operates the switched capacitor converter at a fixed switching frequency.

19. The control circuit according to claim 13, wherein: The device also includes a second error amplifier for generating a second amplified signal according to a difference between the second voltage and a reference voltage signal, thereby controlling the second voltage.

20. The control circuit of claim 13, wherein: The plurality of switching control signals include a first switching control signal and a second switching control signal; The pulse width modulation generator includes: a first comparator for comparing the first amplified signal with the first ramp signal to generate the first switching control signal; and a second comparator for comparing the first amplified signal with a second ramp signal to generate the second switching control signal; wherein the plurality of switches are controlled by the first switching control signal and the second switching control signal, thereby controlling the first switch current flowing into or out of the first voltage; A pulse start time point of the first switching control signal determines a first valley value of the first inductor current, and a pulse start time point of the second switching control signal determines a second valley value of the first inductor current, thereby implementing valley current mode control of the switched capacitor converter; The first ramp signal and the second ramp signal are generated according to a first clock signal and a second clock signal respectively, and are related to the first inductor current.

21. The control circuit of claim 20, wherein: The phase shift between the first ramp signal and the second ramp signal is 180 degrees to ensure balanced control of the switched capacitor converter.

22. A control method for controlling a switched capacitor converter, the switched capacitor converter being used to convert a first voltage into a second voltage, or to convert the second voltage into the first voltage, wherein the switched capacitor converter comprises: A plurality of switches, including at least four switches, wherein the at least four switches include a first switch, wherein the first switch is coupled between the first voltage and a first inductor switching node; a first inductor, coupled between the first inductor switching node and the second voltage; and a first flying capacitor, coupled to the plurality of switches and configured as a capacitive voltage divider to reduce voltage pressure on the plurality of switches; wherein the control method comprises: By sensing a first inductor current flowing through the first inductor and sampling the first inductor current during the conduction period of the first switch, a sensing current signal is generated; generating a first amplified signal according to a difference between the sensing current signal and a reference current signal; as well as The first amplified signal is compared with a first ramp signal to generate a plurality of switching control signals to control the plurality of switches, thereby controlling a first switch current flowing into or out of the first voltage.

23. The control method according to claim 22, wherein: The step of generating the sensing current signal also includes: sampling the first inductor current to generate a sampled current signal; and The sampled current signal is averaged to generate the sensed current signal.

24. The control method according to claim 22, wherein: The step of generating the sensing current signal further includes: sampling the first inductor current during the conduction period of the first switch, thereby limiting the first switch current flowing into or out of the first voltage.

25. The control method according to claim 22, wherein: The step of generating the sensing current signal further includes: sampling the first inductor current during the non-conducting period of the first switch, thereby limiting an output current flowing into or out of the second voltage.

26. The control method according to claim 22, wherein: The first ramp signal operates the switched capacitor converter at a fixed switching frequency.

27. The control method according to claim 22, wherein: The method further comprises: generating a second amplified signal according to the difference between the second voltage and a reference voltage signal, thereby controlling the second voltage.

28. The control method according to claim 22, wherein: The plurality of switching control signals include a first switching control signal and a second switching control signal, wherein the step of generating the plurality of switching control signals includes: Generating the first ramp signal and the second ramp signal according to the first inductor current, and respectively according to a first clock signal and a second clock signal; comparing the first amplified signal with the first ramp signal to generate the first switching control signal; comparing the first amplified signal with the second ramp signal to generate the second switching control signal; Controlling the plurality of switches by the first switching control signal and the second switching control signal to control the first switch current flowing into or out of the first voltage; and A first valley value of the first inductor current is determined by a pulse starting time point of the first switching control signal, and a second valley value of the first inductor current is determined by a pulse starting time point of the second switching control signal, thereby realizing valley current mode control of the switched capacitor converter.

29. The control method according to claim 22, wherein: The phase shift between the first ramp signal and the second ramp signal is 180 degrees to ensure balanced control of the switched capacitor converter.

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