High-efficiency half-bridge converter control structure and control method suitable for high-voltage input

By adopting a combination of multi-level H-bridge module and control module in the half-bridge converter under high voltage input, the problems of large voltage stress and low efficiency of switching tubes in traditional full-bridge systems are solved, and higher system reliability and efficiency are achieved.

CN119765945AActive Publication Date: 2025-04-04SICHUAN UNIV
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Patent Information

Application Number
CN202510277405.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-10
Publication Date
2025-04-04
Estimated Expiration
2045-03-10

AI Technical Summary

Technical Problem

In traditional full-bridge systems, under high voltage input, the switch tubes are subjected to large voltage stress, which may lead to breakdown and reduce system efficiency, especially during heavy loads due to duty cycle loss efficiency.

Method used

The high-efficiency half-bridge converter control structure suitable for high-voltage input is adopted, including a multi-level H-bridge module, a transformer module, a diode rectifier module, a filter inductor capacitor module and a control module. The control module optimizes the working conditions of the switch tube, reduces the primary side current, and reduces switching losses.

Benefits of technology

It effectively reduces the voltage stress of the switching tube, improves the reliability and efficiency of the system, especially in heavy load, alleviates the problem of duty cycle loss, and improves efficiency within the full load range.

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Abstract

The invention belongs to the technical field of direct-current power transformation, and provides a high-efficiency half-bridge converter control structure and control method suitable for high-voltage input, and the control structure comprises a multi-level H-bridge module, a transformer module, a diode rectification module, a filter inductor-capacitor module and a control module. The control method comprises the following steps: acquiring a voltage difference value between a first voltage dividing capacitor and a second voltage dividing capacitor and a difference value between an output voltage of an output resistive load and a reference voltage through a control module; the duty ratio for controlling voltage sharing of the capacitors is obtained through the voltage difference value of the first voltage dividing capacitor and the second voltage dividing capacitor; the duty ratio for controlling the magnitude of the output voltage is obtained by outputting the difference value between the output voltage of the resistive load and the reference voltage; and the duty ratio for controlling the magnitude of the output voltage and the duty ratio for controlling the voltage sharing of the capacitors are superposed to obtain a square wave signal of the multi-level H-bridge module. The circuit is suitable for a large-voltage-class power supply system, and improves the efficiency in a full-load range.
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Description

Technical Field

[0001] The present invention relates to the technical field of direct current power conversion, and in particular to a high-efficiency half-bridge converter control structure and a control method suitable for high-voltage input. Background Art

[0002] As the country's demand for hydrogen production increases, water electrolysis has been widely used due to its excellent hydrogen production performance. Among them, the performance of hydrogen production power supply is of great significance for the preparation of hydrogen energy. With the increase of voltage level, the switch tube in the traditional full-bridge system will be subjected to greater voltage stress, which may cause the switch tube to be broken down, and the efficiency of the system will be reduced due to the large switching loss. In order to achieve stable operation of the hydrogen production power supply under high voltage level, the use of H-bridge converter and capacitor voltage divider structure can effectively reduce the voltage stress borne by the primary switch tube. Under the same input voltage, the switch tube with lower withstand voltage level is selected to improve the reliability of the system and the room for device selection. In addition, the use of switching devices with lower voltage level can further improve the light load efficiency of the system because of its lower conduction loss and switching loss. Due to the H-bridge structure adopted on the primary side, the current flowing through the primary side is twice that of the traditional full-bridge topology, which will produce non-ignorable conduction loss and large duty cycle loss when overloaded, resulting in a significant reduction in efficiency when overloaded. High voltage input usually refers to an input voltage level of more than 1kV. Summary of the invention

[0003] The purpose of the present invention is to provide a high-efficiency half-bridge converter control structure and control method suitable for high-voltage input, which can avoid the duty cycle loss problem in traditional topologies, reduce the primary current during the freewheeling period, and effectively improve the efficiency under heavy load.

[0004] The present invention solves the technical problem and adopts the following technical solution: On the one hand, the present invention provides a high-efficiency half-bridge converter control structure suitable for high-voltage input, comprising: a multi-level H-bridge module, a transformer module, a diode rectifier module, a filter inductor and capacitor module, and a control module; The voltage input end of the multi-level H-bridge module is used to connect the input voltage, the acquisition signal output end is connected to the first acquisition signal input end of the control module, the control signal input end is connected to the signal output end of the control module, the voltage output end is connected to the primary input end of the transformer module, the secondary output end of the transformer module is connected to the filter inductor and capacitor module through the diode rectifier module to obtain the output voltage of the converter, and the second acquisition signal input end of the control module is connected to the reference voltage and the output voltage of the converter.

[0005] As a further optimization, port 1 of the multi-level H-bridge module is connected to the positive terminal of the DC voltage source, port 2 is connected to the negative terminal of the DC voltage source, port 3 is connected to port 5 of the transformer module, and port 4 is connected to port 6 of the transformer module; The 7th port of the transformer module is connected to the 9th port of the diode rectifier module, and the 8th port is connected to the 10th port of the diode rectifier module; Port 11 of the diode rectifier module is connected to port 15 of the filter inductor and capacitor module, port 12 is connected to port 17 of the filter inductor and capacitor module, port 13 is connected to ports 16 and 19 of the filter inductor and capacitor module, and port 14 is connected to ports 18 and 20 of the filter inductor and capacitor module.

[0006] As a further optimization, the multi-level H-bridge module is a three-level H-bridge module, a five-level H-bridge module or a seven-level H-bridge module.

[0007] As a further optimization, when the multi-level H-bridge module is a three-level H-bridge module, the multi-level H-bridge module includes: an upper bridge arm, a lower bridge arm and a voltage dividing capacitor structure; The voltage-dividing capacitor structure includes a first voltage-dividing capacitor and a second voltage-dividing capacitor, the positive terminal of the first voltage-dividing capacitor is connected to the positive terminal of the DC voltage source, the negative terminal is connected to the positive terminal of the second voltage-dividing capacitor, and the negative terminal of the second voltage-dividing capacitor is connected to the negative terminal of the DC voltage source; the upper bridge arm includes a first clamping diode, a first semiconductor field effect transistor, a first anti-parallel diode, a first parasitic capacitor, a second semiconductor field effect transistor, a second anti-parallel diode and a second parasitic capacitor, and the lower bridge arm includes a second clamping diode, a third semiconductor field effect transistor, a third anti-parallel diode, a third parasitic capacitor, a fourth semiconductor field effect transistor, a fourth anti-parallel diode and a fourth parasitic capacitor; The anode of the first clamping diode is connected to the negative terminal of the first voltage-dividing capacitor, the cathode is connected to the drain of the first semiconductor field effect transistor, the anode of the first anti-parallel diode is connected to the drain of the first semiconductor field effect transistor, the cathode is connected to the source of the first semiconductor field effect transistor, the positive electrode of the first parasitic capacitor is connected to the source of the first semiconductor field effect transistor, and the negative electrode is connected to the drain of the first semiconductor field effect transistor, the anode of the second anti-parallel diode is connected to the drain of the second semiconductor field effect transistor, the cathode is connected to the source of the second semiconductor field effect transistor, the positive electrode of the second parasitic capacitor is connected to the source of the second semiconductor field effect transistor, and the negative electrode is connected to the drain of the second semiconductor field effect transistor; The cathode of the second clamping diode is connected to the positive terminal of the second voltage-dividing capacitor, the anode is connected to the drain of the third semiconductor field effect transistor, the anode of the third anti-parallel diode is connected to the drain of the third semiconductor field effect transistor, the cathode is connected to the source of the third semiconductor field effect transistor, the positive electrode of the third parasitic capacitor is connected to the source of the third semiconductor field effect transistor, and the negative electrode is connected to the drain of the third semiconductor field effect transistor, the anode of the fourth anti-parallel diode is connected to the drain of the fourth semiconductor field effect transistor, the cathode is connected to the source of the fourth semiconductor field effect transistor, the positive electrode of the fourth parasitic capacitor is connected to the source of the fourth semiconductor field effect transistor, and the negative electrode is connected to the drain of the fourth semiconductor field effect transistor.

[0008] As a further optimization, the transformer module includes a transformer leakage inductance, a transformer excitation inductance, a transformer primary winding, and a transformer secondary winding; The positive pole of the transformer leakage inductance is connected to the drain of the second semiconductor field effect tube, the negative pole is connected to the positive pole of the transformer primary winding, the positive pole of the transformer excitation inductance is connected to the positive pole of the transformer primary winding, the negative pole is connected to the negative pole of the transformer primary winding, and the transformer secondary winding is connected to the diode rectifier module.

[0009] As a further optimization, the diode rectifier module includes a first diode, a second diode, a third diode and a fourth diode, and the filter inductor and capacitor module includes a first coupled inductor, a second coupled inductor and a filter capacitor; The anode of the first diode is connected to the positive terminal of the secondary winding of the transformer, and the cathode is connected to the positive terminal of the first coupling inductor. The anode of the second diode is connected to the negative terminal of the secondary winding of the transformer, and the cathode is connected to the negative terminal of the first coupling inductor. The anode of the third diode is connected to the negative terminal of the second coupling inductor, and the cathode is connected to the positive terminal of the secondary winding of the transformer. The anode of the fourth diode is connected to the positive terminal of the second coupling inductor, and the cathode is connected to the negative terminal of the secondary winding of the transformer. The positive electrode of the filter capacitor is connected to the cathode of the second diode, and the negative electrode is connected to the anode of the fourth diode. The positive electrode of the filter capacitor is used to connect the input end of the output resistive load, and the negative electrode is used to connect the output end of the output resistive load.

[0010] As a further optimization, the control module includes a first subtractor, a first PI module, a second subtractor, a second PI module and a processing module; The positive input terminal of the first subtractor is used to input the voltage of the first voltage-dividing capacitor, and the negative input terminal is used to input the voltage of the second voltage-dividing capacitor. The voltage difference between the first voltage-dividing capacitor and the second voltage-dividing capacitor is output through the first subtractor, and the output terminal is connected to the input terminal of the first PI module. The duty cycle of controlling the capacitor voltage balancing is obtained through the first PI module, and is output to the processing module through the output terminal of the first PI module; The positive input terminal of the second subtractor is used to input a reference voltage, and the negative input terminal is used to input an output voltage of the output resistive load. The difference between the output voltage of the output resistive load and the reference voltage is output through the second subtractor, and the output terminal is connected to the input terminal of the second PI module. The duty cycle of controlling the output voltage is obtained through the second PI module, and is output to the processing module through the output terminal of the second PI module; The processing module is used to control the duty cycle of the output voltage and the duty cycle of the capacitor voltage sharing to obtain square wave signals of the first semiconductor field effect transistor and the fourth semiconductor field effect transistor.

[0011] As a further optimization, the difference between the output voltage of the output resistive load and the reference voltage passes through the second PI module to obtain a duty cycle D for controlling the output voltage, so that the first semiconductor field effect tube and the fourth semiconductor field effect tube output a square wave with a duration of DT in each cycle, and the opening timing of the fourth semiconductor field effect tube lags behind the opening timing of the first semiconductor field effect tube by half a cycle, and the second semiconductor field effect tube and the third semiconductor field effect tube output a square wave with a fixed duration of T / 2 in each cycle, and the opening timing of the third semiconductor field effect tube lags behind the opening timing of the second semiconductor field effect tube by half a cycle; The voltage difference between the first voltage-dividing capacitor and the second voltage-dividing capacitor is passed through the first PI module to obtain the control capacitor voltage-equalizing duty cycle ΔD. When ΔD is a value greater than zero, it means that the voltage of the first voltage-dividing capacitor is greater than the voltage of the second voltage-dividing capacitor. At this time, the first voltage-dividing capacitor is discharged and the second voltage-dividing capacitor is charged. At this time, the turn-on time of the first semiconductor field effect tube is extended to (ΔD+D)T, and the turn-on time of the fourth semiconductor field effect tube is shortened to (D-ΔD)T. When ΔD is a value less than zero, the turn-on time of the first semiconductor field effect tube is shortened to (D-ΔD)T, and the turn-on time of the fourth semiconductor field effect tube is extended to (ΔD+D)T.

[0012] On the other hand, the present invention also provides a control method for a high-efficiency half-bridge converter suitable for high-voltage input, comprising the following steps: Acquire the voltage difference between the first voltage-dividing capacitor and the second voltage-dividing capacitor, and the difference between the output voltage of the output resistive load and the reference voltage through the control module; The duty ratio of the control capacitor voltage balancing is obtained by the voltage difference between the first voltage dividing capacitor and the second voltage dividing capacitor; The duty cycle of the output voltage is obtained by the difference between the output voltage of the output resistive load and the reference voltage. The duty cycle of controlling the output voltage and the duty cycle of controlling the capacitor voltage balancing are superimposed to obtain a square wave signal of the multi-level H-bridge module.

[0013] The beneficial effects of the present invention are as follows: through the above-mentioned high-efficiency half-bridge converter control structure and control method suitable for high-voltage input, the present invention can reduce the voltage stress of each switch tube in the multi-level H bridge, and solve the voltage balancing problem of the midpoint capacitor through the control module, which can greatly reduce the voltage stress of the device, improve the reliability of the system and the room for device selection, and use switching devices with lower voltage levels, because their conduction loss and switching loss are usually low, further improving the system efficiency. In addition, through the diode rectifier module, the filter inductor and capacitor module and the control module, the freewheeling large current on the primary side of the converter can be further eliminated, further reducing the switching loss and conduction loss of the converter when lightly loaded, and can alleviate the problem of duty cycle loss when heavily loaded, further improving the efficiency of the converter within the full load range. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is an electrical schematic diagram of a high-efficiency half-bridge converter control structure suitable for high-voltage input in Embodiment 1 of the present invention; Figure 2 1 is an electrical schematic diagram of a three-level H-bridge module HB in Embodiment 1 of the present invention; Figure 3 The electrical schematic diagram of the transformer module TS, the diode rectifier module DH, and the filter inductor and capacitor module LCF in the first embodiment of the present invention; Figure 4 A high-efficiency half-bridge converter topology suitable for high-voltage input and a control block diagram thereof in Embodiment 1 of the present invention; Figure 5a : is a voltage waveform diagram of the voltage dividing capacitor before voltage equalization control in the first embodiment of the present invention, Figure 5b This is a voltage waveform diagram of the voltage-dividing capacitor after voltage-equalizing control in the first embodiment of the present invention; Figure 6a Schematic diagram of voltage waveforms across the switch tube of a conventional two-level phase-shifted full-bridge converter under the same power, load, and circuit topology conditions in the first embodiment of the present invention. Figure 6b Schematic diagram of voltage waveform across the switch tube of the converter proposed by the present invention under the same power, load and circuit topology conditions in the first embodiment of the present invention; Figure 7 The waveform diagram of the primary current of the transformer before and after the coupled inductor is used in the first embodiment of the present invention; Figure 8 It is a schematic diagram of comparing the efficiency of a converter without a coupled inductor and a converter with a coupled inductor within a full load range under the same power, load, and circuit topology conditions in the first embodiment of the present invention; Fig. 9 This is a flow chart of a control method for a high-efficiency half-bridge converter suitable for high-voltage input in a second embodiment of the present invention.

[0015] Among them, HB represents a multi-level H-bridge module, TS represents a transformer module, DH represents a diode rectifier module, LCF represents a filter inductor and capacitor module, Us represents a DC voltage source, V ref represents the reference voltage, V0 represents the output voltage of the converter, 1~4 represent the 1st to 4th ports of the multi-level H-bridge module, 5~8 represent the 5th to 8th ports of the transformer module, 9~14 represent the 9th to 14th ports of the diode rectifier module, 15~20 represent the 15th to 20th ports of the filter inductor and capacitor module, R0 represents the output resistive load, u o represents the output voltage of the output resistive load, i0 represents the output current of the output resistive load, C1 represents the first voltage-dividing capacitor, C2 represents the second voltage-dividing capacitor, u c1 Represents the voltage of the first voltage-dividing capacitor, u c2 represents the voltage of the second voltage-dividing capacitor, S1 represents the first semiconductor field effect transistor, S2 represents the second semiconductor field effect transistor, S3 represents the third semiconductor field effect transistor, S4 represents the fourth semiconductor field effect transistor, and D r1 Represents the first clamping diode, D r2 Represents the second clamping diode, D s1 Denotes the first anti-parallel diode, D s2 Represents the second anti-parallel diode, D s3 Denotes the third anti-parallel diode, D s4 Represents the fourth anti-parallel diode, C oss1 Represents the first parasitic capacitance, C oss2 Represents the second parasitic capacitance, C oss3 Represents the third parasitic capacitance, C oss4 represents the fourth parasitic capacitor, P represents the positive terminal of the DC voltage source, N represents the negative terminal of the DC voltage source, Q represents the negative terminal of the first voltage-dividing capacitor, M represents the positive terminal of the second voltage-dividing capacitor, D1 represents the first diode, D2 represents the second diode, D3 represents the third diode, D4 ​​represents the fourth diode, L r Represents the transformer leakage inductance, L m Represents the transformer excitation inductance, L o1Represents the first coupled inductance, L o2 Represents the second coupled inductor, C f represents the filter capacitor, a represents the drain of the second semiconductor field effect tube, b represents the anode of the first clamping diode, c represents the positive terminal of the secondary winding of the transformer, d represents the negative terminal of the secondary winding of the transformer, n in n:1 represents the turns ratio of the primary winding to the secondary winding (n=N1 / N2), i represents the current, A represents the unit ampere, t represents the time, S represents the unit second, D represents the duty cycle of the output voltage, ΔD represents the ratio of the change of the on-time of the switching device in a switching cycle to the total cycle, V c1 Represents the measured voltage value on the first voltage divider capacitor C1, V c2 represents the measured voltage value on the second voltage-dividing capacitor C2. DETAILED DESCRIPTION

[0016] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0017] Embodiment 1

[0018] See also Figure 1 , this embodiment provides a high-efficiency half-bridge converter control structure suitable for high-voltage input, including: a multi-level H-bridge module HB, a transformer module TS, a diode rectifier module DH, a filter inductor and capacitor module LCF and a control module; The voltage input end of the multi-level H-bridge module HB is used to connect the input voltage, the acquisition signal output end is connected to the first acquisition signal input end of the control module, the control signal input end is connected to the signal output end of the control module, the voltage output end is connected to the primary input end of the transformer module TS, the secondary output end of the transformer module TS is connected to the filter inductor and capacitor module LCF through the diode rectifier module DH to obtain the output voltage of the converter, and the second acquisition signal input end of the control module is connected to the reference voltage and the output voltage of the converter.

[0019] It should be noted that the port 1 of the multi-level H-bridge module HB is connected to the positive terminal P of the DC voltage source, the port 2 is connected to the negative terminal N of the DC voltage source, the port 3 is connected to the port 5 of the transformer module TS, and the port 4 is connected to the port 6 of the transformer module TS; The 7th port of the transformer module TS is connected to the 9th port of the diode rectifier module DH, and the 8th port is connected to the 10th port of the diode rectifier module DH; Port 11 of the diode rectifier module DH is connected to port 15 of the filter inductor and capacitor module LCF, port 12 is connected to port 17 of the filter inductor and capacitor module LCF, port 13 is connected to ports 16 and 19 of the filter inductor and capacitor module LCF, and port 14 is connected to ports 18 and 20 of the filter inductor and capacitor module LCF.

[0020] During application, the multi-level H-bridge module HB may be a three-level H-bridge module, a five-level H-bridge module, a seven-level H-bridge module or the like.

[0021] For example, see Figure 2 , when the multi-level H-bridge module HB is a three-level H-bridge module, the multi-level H-bridge module HB comprises: an upper bridge arm, a lower bridge arm and a voltage-dividing capacitor structure; The voltage-dividing capacitor structure includes a first voltage-dividing capacitor C1 and a second voltage-dividing capacitor C2, wherein the positive terminal of the first voltage-dividing capacitor C1 is connected to the positive terminal P of the DC voltage source, the negative terminal Q is connected to the positive terminal M of the second voltage-dividing capacitor C2, and the negative terminal of the second voltage-dividing capacitor C2 is connected to the negative terminal N of the DC voltage source; the upper bridge arm includes a first clamping diode D r1 , the first semiconductor field effect transistor S1, the first anti-parallel diode D s1 , the first parasitic capacitance C oss1 , the second semiconductor field effect transistor S2, the second anti-parallel diode D s2 and the second parasitic capacitance C oss2 , the lower bridge arm includes a second clamping diode D r2 , the third semiconductor field effect transistor S3, the third anti-parallel diode D s3 、The third parasitic capacitor C oss3 , the fourth semiconductor field effect transistor S4, the fourth anti-parallel diode D s4 and the fourth parasitic capacitance C oss4 ; The first clamping diode D r1 The anode b is connected to the negative terminal of the first voltage-dividing capacitor C1, the cathode is connected to the drain of the first semiconductor field effect transistor S1, and the first anti-parallel diode D s1 The anode is connected to the drain of the first semiconductor field effect transistor S1, the cathode is connected to the source of the first semiconductor field effect transistor S1, and the first parasitic capacitor C oss1 The positive electrode is connected to the source of the first semiconductor field effect transistor S1, the negative electrode is connected to the drain of the first semiconductor field effect transistor S1, and the second anti-parallel diode D s2 The anode of the capacitor is connected to the drain of the second semiconductor field effect transistor S2, the cathode is connected to the source of the second semiconductor field effect transistor S2, and the second parasitic capacitor C oss2The positive electrode of the second clamping diode is connected to the source of the second semiconductor field effect transistor S2, and the negative electrode is connected to the drain of the second semiconductor field effect transistor S2; the cathode of the second clamping diode is connected to the positive terminal of the second voltage-dividing capacitor C2, the anode is connected to the drain of the third semiconductor field effect transistor S3, and the third anti-parallel diode D s3 The anode of the capacitor is connected to the drain of the third semiconductor field effect transistor S3, the cathode is connected to the source of the third semiconductor field effect transistor S3, and the third parasitic capacitor C oss3 The positive electrode is connected to the source of the third semiconductor field effect transistor S3, the negative electrode is connected to the drain of the third semiconductor field effect transistor S3, and the fourth anti-parallel diode D s4 The anode of the capacitor is connected to the drain of the fourth semiconductor field effect transistor S4, the cathode is connected to the source of the fourth semiconductor field effect transistor S4, and the fourth parasitic capacitor C oss4 The positive electrode is connected to the source of the fourth semiconductor field effect transistor S4, and the negative electrode is connected to the drain of the fourth semiconductor field effect transistor S4.

[0022] See also Figure 3 and Figure 4 , the transformer module TS may include a transformer leakage inductance L r , transformer excitation inductance L m , transformer primary winding, transformer secondary winding; the transformer leakage inductance L r The positive electrode is connected to the drain of the second semiconductor field effect tube S2, and the negative electrode is connected to the positive electrode of the primary winding of the transformer. The transformer excitation inductance L m The positive pole is connected to the positive pole of the primary winding of the transformer, the negative pole is connected to the negative pole of the primary winding of the transformer, and the secondary winding of the transformer is connected to the diode rectifier module DH.

[0023] The diode rectifier module DH comprises a first diode D1, a second diode D2, a third diode D3 and a fourth diode D4, and the filter inductor and capacitor module L CF Including the first coupled inductor L o1 , the second coupled inductor L o2 And filter capacitor C f ; The anode of the first diode D1 is connected to the positive terminal c of the secondary winding of the transformer, and the cathode is connected to the first coupling inductor L o1 The positive terminal of the second diode D2 is connected to the negative terminal d of the secondary winding of the transformer, and the cathode is connected to the first coupling inductor L o1 The anode of the third diode D3 is connected to the negative terminal of the second coupling inductor L o2 The cathode of the fourth diode D4 is connected to the positive terminal c of the secondary winding of the transformer, and the anode of the fourth diode D4 is connected to the second coupling inductor L o2 The positive terminal is connected to the positive terminal of the transformer, and the cathode is connected to the negative terminal d of the secondary winding of the transformer; The filter capacitor C f The positive electrode is connected to the cathode of the second diode D2, and the negative electrode is connected to the anode of the fourth diode D4. The filter capacitor C f The positive electrode is used to connect the input end of the output resistive load R0, and the negative electrode is used to connect the output end of the output resistive load R0.

[0024] The control module includes a first subtractor, a first PI module, a second subtractor, a second PI module and a processing module; The positive input terminal of the first subtractor is used to input the voltage of the first voltage-dividing capacitor C1, and the negative input terminal is used to input the voltage of the second voltage-dividing capacitor C2. The voltage difference between the first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2 is output through the first subtractor, and the output terminal is connected to the input terminal of the first PI module. The duty cycle of controlling the capacitor voltage balancing is obtained through the first PI module, and is output to the processing module through the output terminal of the first PI module; The positive input terminal of the second subtractor is used to input a reference voltage, and the negative input terminal is used to input the output voltage of the output resistive load R0. The output voltage u of the output resistive load R0 is output through the second subtractor. o The difference between the reference voltage and the reference voltage is connected to the input end of the second PI module through the output end, the duty cycle of the output voltage is obtained through the second PI module, and the duty cycle is output to the processing module through the output end of the second PI module; The processing module is used to control the duty cycle of the output voltage and the duty cycle of the capacitor voltage sharing to obtain square wave signals of the first semiconductor field effect transistor S1 and the fourth semiconductor field effect transistor S4.

[0025] The difference between the output voltage of the output resistive load R0 and the reference voltage passes through the second PI module to obtain a duty cycle D for controlling the output voltage, so that the first semiconductor field effect transistor S1 and the fourth semiconductor field effect transistor S4 output a square wave with a duration of DT in each cycle, and the opening timing of the fourth semiconductor field effect transistor S4 lags behind the opening timing of the first semiconductor field effect transistor S1 by half a cycle, and the second semiconductor field effect transistor S2 and the third semiconductor field effect transistor S3 output a square wave with a fixed duration of T / 2 in each cycle, and the opening timing of the third semiconductor field effect transistor S3 lags behind the opening timing of the second semiconductor field effect transistor S2 by half a cycle; The voltage difference between the first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2 is passed through the first PI module to obtain the duty cycle ΔD of the control capacitor voltage sharing. When ΔD is a value greater than zero, it means that the voltage of the first voltage-dividing capacitor C1 is greater than the voltage of the second voltage-dividing capacitor C2. At this time, the first voltage-dividing capacitor C1 is discharged and the second voltage-dividing capacitor C2 is charged. At this time, the turn-on time of the first semiconductor field effect transistor S1 is extended to (ΔD+D)T, and the turn-on time of the fourth semiconductor field effect transistor S4 is shortened to (D-ΔD)T. When ΔD is a value less than zero, the turn-on time of the first semiconductor field effect transistor S1 is shortened to (D-ΔD)T, and the turn-on time of the fourth semiconductor field effect transistor S4 is extended to (ΔD+D)T.

[0026] refer to Figure 4 It can be seen that the output voltage V0 of the converter is consistent with the set reference voltage V ref The difference is passed through the PI link to obtain the duty cycle D for controlling the output voltage. The duty cycle D of the output voltage refers to the ratio of the on-time of the switch device in a switching cycle to the total cycle, so that the first semiconductor field effect tube S1 and the fourth semiconductor field effect tube S4 output a square wave with a duration of DT in each cycle, and the opening timing of S4 lags behind the opening timing of S1 by half a cycle, and the second semiconductor field effect tube switch tube S2 and the third semiconductor field effect tube S3 output a square wave with a duration of T / 2 in each cycle, and the opening timing of S3 lags behind the opening timing of S2 by half a cycle; the voltage V of the first voltage-dividing capacitor C1 c1 The voltage V of the second voltage-dividing capacitor C2 c2 The difference is passed through the PI link to obtain the duty cycle ΔD of the control capacitor voltage sharing. When ΔD is greater than zero, the turn-on time of the first semiconductor field effect tube S1 is extended to (ΔD+D)T, and the turn-on time of the fourth semiconductor field effect tube S4 is shortened to (D-ΔD)T. When ΔD is less than zero, the turn-on time of S1 is shortened to (D-ΔD)T, and the turn-on time of S4 is extended to (ΔD+D)T. Since the extended turn-on time of S1 is equal to the shortened turn-on time of S4 in one cycle, and the output voltage is only related to the total turn-on time of S1 and S4 in one cycle, the output voltage value can be maintained stable.

[0027] See also Figure 5a and Figure 5b The voltage waveform diagram on the voltage-dividing capacitor before and after the voltage-equalizing control is adopted shows that before the voltage-equalizing control is adopted, the capacitor voltage is not a stable value but fluctuates by about 3V. After the voltage-equalizing control is adopted, the fluctuation of the capacitor voltage is significantly improved.

[0028] See also Figure 6a and Figure 6bUnder the same power, load, and circuit topology conditions, a schematic diagram of the voltage waveform at both ends of the switch tube of the traditional two-level phase-shifted full-bridge converter and a schematic diagram of the voltage waveform at both ends of the switch tube of the converter proposed in this embodiment are shown. It can be seen that the voltage stress on both sides of the switch tube of the original topology is twice that of the new topology, and the new topology effectively reduces the voltage stress on both sides of the switch tube.

[0029] Figure 7 The waveform diagram of the primary current of the transformer before and after the coupled inductor is adopted. It can be seen that after the coupled inductor is adopted, the primary current of the transformer is significantly reduced during the freewheeling period, which solves the problem of large conduction loss caused by the large primary current of this topology and can effectively improve the efficiency under heavy load.

[0030] Figure 5- Figure 7 In the figure, the horizontal axis t represents time, S represents the unit second, and the vertical axis i represents current, A represents the unit ampere.

[0031] Figure 8 The figure is a schematic diagram comparing the efficiency of a converter without a coupled inductor and a converter with a coupled inductor within the full load range under the same power, load, and circuit topology conditions. It can be seen that the efficiency of the three-level phase-shifted full-bridge converter with a coupled inductor is slightly higher than that of the three-level phase-shifted full-bridge converter without a coupled inductor at light load, and the efficiency is greatly improved at heavy load.

[0032] Therefore, this embodiment reduces the voltage stress of each switch tube to half of the total input voltage, greatly reducing the voltage stress of the device, improving the reliability of the system and the room for device selection, and using switching devices with lower voltage levels, because their conduction loss and switching loss are usually lower, further improving the system efficiency; replacing the ordinary filter inductor with a coupled inductor on the secondary side can effectively solve the problem of duty cycle loss caused by the rectifier diode being directly connected during the freewheeling period under heavy load, and can further improve the overall system performance. Therefore, the use of this structure can effectively achieve high efficiency in the full load range of the full-bridge system under a high-voltage and high-power hydrogen production system.

[0033] Embodiment 2

[0034] Based on the first embodiment, this embodiment provides a control method for a high-efficiency half-bridge converter suitable for high-voltage input. Fig. 9 , wherein the method may include the following steps: S1, obtain the voltage difference between the first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2, and the output voltage of the output resistive load R0 and the reference voltage V ref The difference between S2, obtaining the duty cycle of the capacitor voltage balancing control according to the voltage difference between the first voltage-dividing capacitor C1 and the second voltage-dividing capacitor C2; S3, the output voltage through the output resistive load R0 and the reference voltage V ref The difference between the values ​​of is used to obtain the duty cycle of the output voltage. S4, the duty cycle of controlling the output voltage and the duty cycle of controlling the capacitor voltage are superimposed to obtain a square wave signal of the multi-level H-bridge module HB.

[0035] Based on the description of the first embodiment, it can be seen that the application scenario and implementation principle of this embodiment are consistent with those of the first embodiment, and therefore will not be described in detail.

[0036] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A high-efficiency half-bridge converter control structure suitable for high-voltage input, characterized in that: include: Multi-level H-bridge module, transformer module, diode rectifier module, filter inductor and capacitor module and control module; The voltage input end of the multi-level H-bridge module is used to connect the input voltage, the acquisition signal output end is connected to the first acquisition signal input end of the control module, the control signal input end is connected to the signal output end of the control module, the voltage output end is connected to the primary input end of the transformer module, the secondary output end of the transformer module is connected to the filter inductor and capacitor module through the diode rectifier module to obtain the output voltage of the converter, and the second acquisition signal input end of the control module is connected to the reference voltage and the output voltage of the converter.

2. The high-efficiency half-bridge converter control structure suitable for high-voltage input according to claim 1, characterized in that: Port 1 of the multi-level H-bridge module is connected to the positive terminal of the DC voltage source, port 2 is connected to the negative terminal of the DC voltage source, port 3 is connected to port 5 of the transformer module, and port 4 is connected to port 6 of the transformer module; The 7th port of the transformer module is connected to the 9th port of the diode rectifier module, and the 8th port is connected to the 10th port of the diode rectifier module; Port 11 of the diode rectifier module is connected to port 15 of the filter inductor and capacitor module, port 12 is connected to port 17 of the filter inductor and capacitor module, port 13 is connected to ports 16 and 19 of the filter inductor and capacitor module, and port 14 is connected to ports 18 and 20 of the filter inductor and capacitor module.

3. The high-efficiency half-bridge converter control structure suitable for high-voltage input according to claim 1, characterized in that: The multi-level H-bridge module is a three-level H-bridge module, a five-level H-bridge module or a seven-level H-bridge module.

4. The high-efficiency half-bridge converter control structure suitable for high-voltage input according to claim 3, characterized in that: When the multi-level H-bridge module is a three-level H-bridge module, the multi-level H-bridge module comprises: an upper bridge arm, a lower bridge arm and a voltage dividing capacitor structure; The voltage-dividing capacitor structure includes a first voltage-dividing capacitor and a second voltage-dividing capacitor, the positive terminal of the first voltage-dividing capacitor is connected to the positive terminal of the DC voltage source, the negative terminal is connected to the positive terminal of the second voltage-dividing capacitor, and the negative terminal of the second voltage-dividing capacitor is connected to the negative terminal of the DC voltage source; the upper bridge arm includes a first clamping diode, a first semiconductor field effect transistor, a first anti-parallel diode, a first parasitic capacitor, a second semiconductor field effect transistor, a second anti-parallel diode and a second parasitic capacitor, and the lower bridge arm includes a second clamping diode, a third semiconductor field effect transistor, a third anti-parallel diode, a third parasitic capacitor, a fourth semiconductor field effect transistor, a fourth anti-parallel diode and a fourth parasitic capacitor; The anode of the first clamping diode is connected to the negative terminal of the first voltage-dividing capacitor, the cathode is connected to the drain of the first semiconductor field effect transistor, the anode of the first anti-parallel diode is connected to the drain of the first semiconductor field effect transistor, the cathode is connected to the source of the first semiconductor field effect transistor, the positive electrode of the first parasitic capacitor is connected to the source of the first semiconductor field effect transistor, and the negative electrode is connected to the drain of the first semiconductor field effect transistor, the anode of the second anti-parallel diode is connected to the drain of the second semiconductor field effect transistor, the cathode is connected to the source of the second semiconductor field effect transistor, the positive electrode of the second parasitic capacitor is connected to the source of the second semiconductor field effect transistor, and the negative electrode is connected to the drain of the second semiconductor field effect transistor; The cathode of the second clamping diode is connected to the positive terminal of the second voltage-dividing capacitor, the anode is connected to the drain of the third semiconductor field effect transistor, the anode of the third anti-parallel diode is connected to the drain of the third semiconductor field effect transistor, the cathode is connected to the source of the third semiconductor field effect transistor, the positive electrode of the third parasitic capacitor is connected to the source of the third semiconductor field effect transistor, and the negative electrode is connected to the drain of the third semiconductor field effect transistor, the anode of the fourth anti-parallel diode is connected to the drain of the fourth semiconductor field effect transistor, the cathode is connected to the source of the fourth semiconductor field effect transistor, the positive electrode of the fourth parasitic capacitor is connected to the source of the fourth semiconductor field effect transistor, and the negative electrode is connected to the drain of the fourth semiconductor field effect transistor.

5. The high-efficiency half-bridge converter control structure suitable for high-voltage input according to claim 4, characterized in that: The transformer module includes a transformer leakage inductance, a transformer excitation inductance, a transformer primary winding, and a transformer secondary winding; The positive pole of the transformer leakage inductance is connected to the drain of the second semiconductor field effect tube, the negative pole is connected to the positive pole of the transformer primary winding, the positive pole of the transformer excitation inductance is connected to the positive pole of the transformer primary winding, the negative pole is connected to the negative pole of the transformer primary winding, and the transformer secondary winding is connected to the diode rectifier module.

6. The high-efficiency half-bridge converter control structure suitable for high-voltage input according to claim 5, characterized in that: The diode rectifier module includes a first diode, a second diode, a third diode and a fourth diode, and the filter inductor and capacitor module includes a first coupling inductor, a second coupling inductor and a filter capacitor; The anode of the first diode is connected to the positive terminal of the secondary winding of the transformer, and the cathode is connected to the positive terminal of the first coupling inductor. The anode of the second diode is connected to the negative terminal of the secondary winding of the transformer, and the cathode is connected to the negative terminal of the first coupling inductor. The anode of the third diode is connected to the negative terminal of the second coupling inductor, and the cathode is connected to the positive terminal of the secondary winding of the transformer. The anode of the fourth diode is connected to the positive terminal of the second coupling inductor, and the cathode is connected to the negative terminal of the secondary winding of the transformer. The positive electrode of the filter capacitor is connected to the cathode of the second diode, and the negative electrode is connected to the anode of the fourth diode. The positive electrode of the filter capacitor is used to connect the input end of the output resistive load, and the negative electrode is used to connect the output end of the output resistive load.

7. The high-efficiency half-bridge converter control structure suitable for high-voltage input according to claim 6, characterized in that: The control module includes a first subtractor, a first PI module, a second subtractor, a second PI module and a processing module; The positive input terminal of the first subtractor is used to input the voltage of the first voltage-dividing capacitor, and the negative input terminal is used to input the voltage of the second voltage-dividing capacitor. The voltage difference between the first voltage-dividing capacitor and the second voltage-dividing capacitor is output through the first subtractor, and the output terminal is connected to the input terminal of the first PI module. The duty cycle of controlling the capacitor voltage balancing is obtained through the first PI module, and is output to the processing module through the output terminal of the first PI module; The positive input terminal of the second subtractor is used to input a reference voltage, and the negative input terminal is used to input an output voltage of the output resistive load. The difference between the output voltage of the output resistive load and the reference voltage is output through the second subtractor, and the output terminal is connected to the input terminal of the second PI module. The duty cycle of controlling the output voltage is obtained through the second PI module, and is output to the processing module through the output terminal of the second PI module; The processing module is used to control the duty cycle of the output voltage and the duty cycle of the capacitor voltage sharing to obtain square wave signals of the first semiconductor field effect transistor and the fourth semiconductor field effect transistor.

8. The high-efficiency half-bridge converter control structure suitable for high-voltage input according to claim 7, characterized in that: The difference between the output voltage of the output resistive load and the reference voltage passes through the second PI module to obtain a duty cycle D for controlling the output voltage, so that the first semiconductor field effect tube and the fourth semiconductor field effect tube output a square wave with a duration of DT in each cycle, and the opening timing of the fourth semiconductor field effect tube lags behind the opening timing of the first semiconductor field effect tube by half a cycle, and the second semiconductor field effect tube and the third semiconductor field effect tube output a square wave with a fixed duration of T / 2 in each cycle, and the opening timing of the third semiconductor field effect tube lags behind the opening timing of the second semiconductor field effect tube by half a cycle; The voltage difference between the first voltage-dividing capacitor and the second voltage-dividing capacitor is passed through the first PI module to obtain the control capacitor voltage-equalizing duty cycle ΔD. When ΔD is a value greater than zero, it means that the voltage of the first voltage-dividing capacitor is greater than the voltage of the second voltage-dividing capacitor. At this time, the first voltage-dividing capacitor is discharged and the second voltage-dividing capacitor is charged. At this time, the turn-on time of the first semiconductor field effect tube is extended to (ΔD+D)T, and the turn-on time of the fourth semiconductor field effect tube is shortened to (D-ΔD)T. When ΔD is a value less than zero, the turn-on time of the first semiconductor field effect tube is shortened to (D-ΔD)T, and the turn-on time of the fourth semiconductor field effect tube is extended to (ΔD+D)T.

9. A control method for a high-efficiency half-bridge converter suitable for high-voltage input, applied to a high-efficiency half-bridge converter control structure suitable for high-voltage input as claimed in any one of claims 1 to 8, characterized in that: The steps include: Acquire the voltage difference between the first voltage-dividing capacitor and the second voltage-dividing capacitor, and the difference between the output voltage of the output resistive load and the reference voltage through the control module; The duty ratio of the control capacitor voltage balancing is obtained by the voltage difference between the first voltage dividing capacitor and the second voltage dividing capacitor; The duty cycle of the output voltage is obtained by the difference between the output voltage of the output resistive load and the reference voltage. The duty cycle of controlling the output voltage and the duty cycle of controlling the capacitor voltage are superimposed to obtain a square wave signal of the multi-level H-bridge module.

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