Orthogonal down-conversion mixer

Abstract

The invention provides an orthogonal down-conversion mixer, which comprises a first signal input port, a signal processing module and a mixing module, and is characterized in that a radio frequency signal is converted into a differential radio frequency signal through the first signal input port, and phase shift, amplification and impedance matching are performed on an initial local oscillator signal through the signal processing module; a first local oscillator signal and a second local oscillator signal are used for receiving a differential radio frequency signal, two local oscillator signals with orthogonal phases are obtained, the differential radio frequency signal is amplified through a pseudo-differential structure in a frequency mixing module, and frequency mixing is performed on the first local oscillator signal, the second local oscillator signal and the amplified differential radio frequency signal to obtain two target intermediate frequency signals. According to the orthogonal down-conversion mixer provided by the invention, the differential radio frequency signal is amplified through the pseudo-differential structure, the noise coefficient and power consumption of the mixer are reduced, the mixing speed is increased through the two local oscillator signals, and the noise coefficient of the mixer is further reduced.

Description

Technical Field

[0001] The invention relates to the field of mixer circuit design, and in particular to an orthogonal down-conversion mixer. Background Art

[0002] In recent years, due to the growing demand for wireless products, RF circuits are also developing towards high integration and high efficiency. From a structural point of view, the structure of the mixer is mainly divided into two categories: active mixer and passive mixer. Most active mixers are based on the expansion of the Gilbert structure. As a key module in the RF receiver, the down-conversion mixer plays a vital role in the wireless RF system. Whether it is RF communication, radar, remote control and remote sensing, or many microwave measurement systems, the RF signal must be converted to the intermediate frequency by the mixer for processing. The down-conversion mixer multiplies the signal received by the antenna with the local oscillator signal to move the signal of useful information to the low frequency band, so as to amplify the target intermediate frequency signal and perform analog-to-digital conversion. The performance parameters that the mixer focuses on are noise figure, gain, linearity and isolation. However, the mixer circuit expanded by the traditional Gilbert structure cannot effectively solve the problems of image suppression, linearity, noise figure, high power consumption, etc. of the receiver.

[0003] Therefore, how to provide an orthogonal down-conversion mixer with low noise figure and low power consumption is a technical problem that needs to be solved urgently. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, the present invention provides a technical solution of an orthogonal down-conversion mixer to solve at least one of the above-mentioned technical problems.

[0005] In order to achieve the above-mentioned purpose and other related purposes, the technical solution provided by this application is as follows.

[0006] According to an embodiment of the present application, an orthogonal down-conversion mixer is provided, comprising:

[0007] A first signal input port receives a radio frequency signal and converts the radio frequency signal into a differential radio frequency signal;

[0008] A signal processing module receives an initial local oscillator signal, performs phase shifting, amplification and impedance matching on the initial local oscillator signal, and obtains two local oscillator signals with orthogonal phases;

[0009] The mixing module receives the differential RF signal, the first local oscillator signal and the second local oscillator signal, amplifies the differential RF signal through a pseudo-differential structure, and performs mixing processing based on the first local oscillator signal and the second local oscillator signal and the amplified differential RF signal to obtain two target intermediate frequency signals.

[0010] In one embodiment of the present application, the first signal input end includes a first transformer and a first capacitor, the first end of the primary coil in the first transformer is connected to the RF signal, the second end of the primary coil in the first transformer is grounded, the first end of the secondary coil in the first transformer is connected to the first end of the first capacitor, the second end of the secondary coil in the first transformer is connected to the second end of the first capacitor, and the center tap of the secondary coil in the first transformer is connected to a first bias voltage, wherein the two ends of the first capacitor output the differential RF signal to the outside.

[0011] In one embodiment of the present application, the signal processing module includes a phase shifting unit, two amplifying units, and two impedance matching units. The phase shifting unit performs phase shifting on the initial local oscillator signal to obtain two transitional local oscillator signals with orthogonal phases. The amplifying unit amplifies the transitional local oscillator signal. The matching unit is connected to the amplifying unit. The matching unit is used to match the impedance between the amplifying unit and the mixing module to output the first local oscillator signal and the second local oscillator signal to the outside.

[0012] In one embodiment of the present application, the phase shift unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a second capacitor, a third capacitor, a fourth capacitor, and a fifth capacitor. The first end of the first resistor is connected to the second end of the second resistor via the second capacitor, the first end of the second resistor is connected to the second end of the third resistor via the third capacitor, the first end of the third resistor is connected to the second end of the fourth resistor via the fourth capacitor, and the first end of the fourth resistor is connected to the second end of the first resistor via the fifth capacitor. The first end of the first resistor and the first end of the third resistor cooperate to input the initial local oscillation signal, the second end of the first resistor and the second end of the third resistor output a first transition local oscillation signal to the outside, and the second end of the second resistor and the second end of the fourth resistor output a second transition local oscillation signal to the outside.

[0013] In one embodiment of the present application, the amplification unit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a sixth capacitor, a seventh capacitor, a first NPN transistor, a second NPN transistor, a third NPN transistor and a fourth NPN transistor, the first end of the fifth resistor is connected to the second bias voltage, the second end of the fifth resistor is grounded after passing through the sixth capacitor, the second end of the fifth resistor is also connected to the base of the first NPN transistor, the emitter of the first NPN transistor is connected to the collector of the third NPN transistor, the base of the third NPN transistor is connected to the first end of the seventh resistor, the second end of the seventh resistor is connected to the first bias voltage, the emitter of the third NPN transistor is grounded, and the sixth resistor The first end of the sixth resistor is connected to the second bias voltage, the second end of the sixth resistor is grounded after passing through the seventh capacitor, the second end of the sixth resistor is also connected to the base of the second NPN transistor, the emitter of the second NPN transistor is connected to the collector of the fourth NPN transistor, the base of the fourth NPN transistor is connected to the first end of the eighth resistor, the second end of the eighth resistor is connected to the first bias voltage, the emitter of the fourth NPN transistor is connected to the emitter of the third NPN transistor, wherein the base of the third NPN transistor and the base of the fourth NPN transistor are the input ends of the amplifying unit, and the collector of the first NPN transistor and the collector of the second NPN transistor are the output ends of the amplifying unit.

[0014] In one embodiment of the present application, the impedance matching unit includes an eighth capacitor, a second transformer, and a ninth capacitor, wherein the first end of the eighth capacitor is connected to the first end of the primary coil in the second transformer, the second end of the eighth capacitor is connected to the second end of the primary coil in the second transformer, the center tap of the primary coil in the second transformer is connected to the power supply voltage, the first end of the secondary coil in the second transformer is connected to the first end of the ninth capacitor, the second end of the secondary coil in the second transformer is connected to the second end of the ninth capacitor, and the middle tap of the secondary coil in the second transformer is connected to the second bias voltage, wherein the two ends of the eighth capacitor are input ends of the impedance matching unit, and the two ends of the ninth capacitor are output ends of the impedance matching unit.

[0015] In one embodiment of the present application, the mixing module includes four load units, a fifth NPN transistor, a sixth NPN transistor, a seventh NPN transistor, an eighth NPN transistor, a ninth NPN transistor, a tenth NPN transistor, an eleventh NPN transistor, a twelfth NPN transistor, a thirteenth NPN transistor, a fourteenth NPN transistor, a first inductor and a second inductor, the power supply voltage is connected to the collector of the fifth NPN transistor after passing through the first load unit, the collector of the fifth NPN transistor is also connected to the collector of the seventh NPN transistor, the emitter of the fifth NPN transistor is connected to the emitter of the sixth NPN transistor, and the emitter of the fifth NPN transistor is also connected to the ninth NPN transistor. The emitter of the fifth NPN transistor is also connected to the collector of the thirteenth NPN transistor, the emitter of the thirteenth NPN transistor is grounded after passing through the first inductor, the power supply voltage is connected to the collector of the eighth NPN transistor after passing through the second load unit, the collector of the eighth NPN transistor is also connected to the collector of the sixth NPN transistor, the base of the sixth NPN transistor is connected to the base of the seventh NPN transistor, the emitter of the eighth NPN transistor is connected to the emitter of the seventh NPN transistor, the emitter of the eighth NPN transistor is also connected to the emitter of the eleventh NPN transistor, and the emitter of the eighth NPN transistor is also connected to the fourteenth NPN transistor. The collector of the fourteenth NPN transistor is also connected to ground after passing through the second inductor. The power supply voltage is connected to the collector of the ninth NPN transistor after passing through the third load unit. The collector of the ninth NPN transistor is also connected to the collector of the eleventh NPN transistor. The base of the eleventh NPN transistor is connected to the base of the tenth NPN transistor. The emitter of the ninth NPN transistor is connected to the emitter of the tenth NPN transistor. The power supply voltage is connected to the collector of the twelfth NPN transistor after passing through the fourth load unit. The collector of the twelfth NPN transistor is also connected to the collector of the tenth NPN transistor. The emitter of the twelfth NPN transistor is connected to the eleventh NPN transistor. The emitter of the transistor, wherein the base of the fifth NPN transistor and the base of the eighth NPN transistor are connected to the positive end of the first local oscillation signal, the base of the sixth NPN transistor is connected to the negative end of the first local oscillation signal, the base of the ninth NPN transistor and the base of the twelfth NPN transistor are connected to the positive end of the second local oscillation signal, the base of the tenth NPN transistor is connected to the negative end of the second local oscillation signal, the base of the thirteenth NPN transistor is connected to the positive end of the differential RF signal, the base of the fourteenth NPN transistor is connected to the negative end of the differential RF signal, the collector of the fifth NPN transistor and the collector of the eighth NPN transistor are the first differential output end of the mixing module,The collector of the ninth NPN transistor and the collector of the twelfth NPN transistor are the second differential output terminals of the mixing module.

[0016] In one embodiment of the present application, the mixer also includes a second signal input port, the input end of the second input port is connected to the initial local oscillator signal, the output end of the second input port is connected to the input end of the signal processing module, the second signal input port is used to match the impedance of the initial local oscillator signal input, the second signal input port includes a tenth capacitor, an eleventh capacitor, and a third transformer, the first end of the tenth capacitor is connected to the first end of the primary coil in the third transformer, the second end of the tenth capacitor is connected to the second end of the primary coil in the third transformer, the first end of the secondary coil in the third transformer is connected to the first end of the eleventh capacitor, the second end of the secondary coil in the third transformer is connected to the second end of the eleventh capacitor, and the middle tap of the secondary coil in the third transformer is connected to the first bias voltage, wherein the two ends of the tenth capacitor are the input ends of the second signal input port, and the two ends of the eleventh capacitor are the output ends of the second signal input port.

[0017] The present application provides an orthogonal down-conversion mixer, which includes a first signal input port, a signal processing module and a mixing module. The RF signal is converted into a differential RF signal through the first signal input port, and the initial local oscillator signal is phase-shifted, amplified and impedance-matched through the signal processing module to obtain two local oscillator signals with orthogonal phases. The differential RF signal is amplified through a pseudo-differential structure in the mixing module, and the first local oscillator signal and the second local oscillator signal are mixed with the amplified differential RF signal to obtain two target intermediate frequency signals. The orthogonal down-conversion mixer provided in the present application amplifies the differential RF signal through a pseudo-differential structure, reduces the noise coefficient and power consumption of the mixer, and improves the mixing speed through two local oscillator signals, further reducing the noise coefficient of the mixer.

[0018] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present invention, and together with the specification, are used to explain the principles of the present invention. Obviously, the drawings described below are only some embodiments of the present invention, and for those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0020] Figure 1 is a block diagram of an orthogonal down-conversion mixer shown in an exemplary embodiment of the present invention;

[0021] Figure 2 is a specific circuit structure of a first signal input port shown in an exemplary embodiment of the present invention;

[0022] Figure 3 is a specific circuit structure of a phase shift unit shown in an exemplary embodiment of the present invention;

[0023] Figure 4 is a specific circuit structure of an amplifying unit shown in an exemplary embodiment of the present invention;

[0024] Figure 5 is a specific circuit structure of an impedance matching unit shown in an exemplary embodiment of the present invention;

[0025] Figure 6 is a specific circuit structure of a frequency mixing module shown in an exemplary embodiment of the present invention;

[0026] Figure 7 is a block diagram of an orthogonal down-conversion mixer including a second signal input port according to an exemplary embodiment of the present invention;

[0027] Figure 8 FIG. 4 is a specific circuit structure of a second signal input port shown in an exemplary embodiment of the present invention. DETAILED DESCRIPTION

[0028] The following will describe the embodiments of the present invention with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention, not for limiting the scope of protection of the present invention.

[0029] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0030] In the following description, numerous details are discussed to provide a more thorough explanation of the embodiments of the present invention. However, it is obvious to those skilled in the art that the embodiments of the present invention can be implemented without these specific details. In other embodiments, well-known structures and devices are shown in the form of block diagrams rather than in detail to avoid making the embodiments of the present invention difficult to understand.

[0031] The Gilbert structure is based on a multi-emitter or gate structure of a bipolar junction transistor (BJT) or a field effect transistor (FET), which combines two transconductors. The output currents of these transconductors are combined through a radio frequency balun (Balanced-Unbalanced Transformer, Balun) to achieve signal mixing or frequency conversion.

[0032] In recent years, due to the growing demand for wireless products, RF circuits are also developing towards high integration and high efficiency. From a structural point of view, the structure of the mixer is mainly divided into two categories: active mixer and passive mixer. Most active mixers are based on the expansion of the Gilbert structure. As a key module in the RF receiver, the down-conversion mixer plays a vital role in the wireless RF system. Whether it is RF communication, radar, remote control and remote sensing, or many microwave measurement systems, the RF signal must be converted to an intermediate frequency by a mixer for processing. The down-conversion mixer multiplies the signal received by the antenna with the local oscillator signal to move the signal containing useful information to the low frequency band, so that the target intermediate frequency signal can be amplified and analog-to-digital converted later. The performance parameters that the mixer focuses on are noise figure, gain, linearity and isolation. However, the down-conversion mixer circuit expanded by the traditional Gilbert structure cannot effectively solve the problems of image rejection, linearity, noise figure, etc. of the receiver.

[0033] To solve the above problems, Figure 1 As shown, the present application provides an orthogonal down-conversion mixer, comprising:

[0034] A first signal input port receives a radio frequency signal RF_in and converts the radio frequency signal RF_in into a differential radio frequency signal (RF+, RF-);

[0035] The signal processing module receives the initial local oscillator signal (L0+, L0-), performs phase shifting, amplification and impedance matching on the initial local oscillator signal (L0+, L0-), and obtains two local oscillator signals (L0_Q, L0_P) with orthogonal phases;

[0036] The mixing module receives the differential RF signal (RF+, RF-), the first local oscillator signal (L0_P+, L0_P-) and the second local oscillator signal (L0_Q+, L0_Q-), amplifies the differential RF signal (RF+, RF-) through a pseudo-differential structure, and mixes the first local oscillator signal (L0_P+, L0_P-) and the second local oscillator signal (L0_Q+, L0_Q-) with the amplified differential RF signal to obtain two target intermediate frequency signals (IF_Q, IF_P).

[0037] like Figure 1 As shown, the RF signal is a single-ended signal, and the differential RF signal, the initial local oscillator signal, the local oscillator signal and the target intermediate frequency signal are differential signals.

[0038] In detail, Figure 2 As shown, the first signal input end includes a first transformer T1 and a first capacitor C1, the first end of the primary coil in the first transformer T1 is connected to the radio frequency signal RF_in, the second end of the primary coil in the first transformer T1 is grounded, the first end of the secondary coil in the first transformer T1 is connected to the first end of the first capacitor C1, the second end of the secondary coil in the first transformer T1 is connected to the second end of the first capacitor C1, and the center tap of the secondary coil in the first transformer T1 is connected to the first bias voltage Vb1, wherein the two ends of the first capacitor C1 output differential radio frequency signals (RF+, RF-), the first end of the first capacitor C1 outputs the positive end RF+ of the differential radio frequency signal, and the second end of the first capacitor C1 outputs the negative end RF- of the differential radio frequency signal.

[0039] In detail, the signal processing module includes a phase shift unit, two amplifying units, and two impedance matching units. The phase shift unit performs phase shift processing on the initial local oscillator signal (L0+, L0-) to obtain two transitional local oscillator signals with orthogonal phases. The amplifying unit amplifies the transitional local oscillator signal. The matching unit is connected to the amplifying unit. The matching unit is used to match the impedance between the amplifying unit and the mixing module to output the first local oscillator signal (L0_P+, L0_P-) and the second local oscillator signal (L0_Q+, L0_Q-) to the outside.

[0040] In more detail, Figure 3As shown, the phase shift unit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a fifth capacitor C5. The first end of the first resistor R1 is connected to the second end of the second resistor R2 via the second capacitor C2, the first end of the second resistor R2 is connected to the second end of the third resistor R3 via the third capacitor C3, the first end of the third resistor R3 is connected to the second end of the fourth resistor R4 via the fourth capacitor C4, and the first end of the fourth resistor R4 is connected to the second end of the first resistor R1 via the fifth capacitor C5. The first end of the first resistor R1 and the first end of the third resistor R3 cooperate to input the initial local oscillation signal (L0+, L0-), and the first end of the first resistor R1 The positive end L0+ of the initial local oscillator signal is terminated, the first end of the third resistor R3 is connected to the negative end L0- of the initial local oscillator signal, the second end of the first resistor R1 and the second end of the third resistor R3 output the first transition local oscillator signal to the outside, the second end of the first resistor R1 outputs the positive end L0_A_P+ of the first transition local oscillator signal, the second end of the third resistor R3 outputs the negative end L0_A_P- of the first transition local oscillator signal, the second end of the second resistor R2 and the second end of the fourth resistor R4 output the second transition local oscillator signal to the outside, the second end of the second resistor R2 outputs the positive end L0_A_Q+ of the second transition local oscillator signal, and the second end of the fourth resistor R4 outputs the negative end L0_A_Q- of the second transition local oscillator signal.

[0041] In more detail, Figure 4As shown, the amplification unit includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a sixth capacitor C6, a seventh capacitor C7, a first NPN transistor Q1, a second NPN transistor Q2, a third NPN transistor Q3 and a fourth NPN transistor Q4, a first end of the fifth resistor R5 is connected to the second bias voltage Vb2, a second end of the fifth resistor R5 is grounded after passing through the sixth capacitor C6, a second end of the fifth resistor R5 is also connected to the base of the first NPN transistor Q1, an emitter of the first NPN transistor Q1 is connected to the collector of the third NPN transistor Q3, a base of the third NPN transistor Q3 is connected to the first end of the seventh resistor R7, a second end of the seventh resistor R7 is connected to the first bias voltage Vb1, and an emitter of the third NPN transistor Q3 is connected to The first end of the sixth resistor R6 is connected to the second bias voltage Vb2, the second end of the sixth resistor R6 is grounded after passing through the seventh capacitor C7, the second end of the sixth resistor R6 is also connected to the base of the second NPN transistor Q2, the emitter of the second NPN transistor Q2 is connected to the collector of the fourth NPN transistor Q4, the base of the fourth NPN transistor Q4 is connected to the first end of the eighth resistor R8, the second end of the eighth resistor R8 is connected to the first bias voltage Vb1, the emitter of the fourth NPN transistor Q4 is connected to the emitter of the third NPN transistor Q3, wherein the base of the third NPN transistor Q3 and the base of the fourth NPN transistor Q4 are the input ends of the amplifying unit, and the collector of the first NPN transistor Q1 and the collector of the second NPN transistor Q2 are the output ends of the amplifying unit.

[0042] It should be emphasized that the base of the third NPN transistor Q3 in the first amplifying unit is connected to the positive end L0_A_P+ of the first transition local oscillator signal, the base of the fourth NPN transistor Q4 in the first amplifying unit is connected to the negative end L0_A_P- of the first transition local oscillator signal, the base of the third NPN transistor Q3 in the second amplifying unit is connected to the positive end L0_A_Q+ of the second transition local oscillator signal, and the base of the fourth NPN transistor Q4 in the second amplifying unit is connected to the negative end L0_A_Q- of the second transition local oscillator signal.

[0043] In more detail, Figure 5As shown, the impedance matching unit includes an eighth capacitor C8, a second transformer T2, and a ninth capacitor C9, wherein a first end of the eighth capacitor C8 is connected to a first end of a primary coil in the second transformer T2, a second end of the eighth capacitor C8 is connected to a second end of the primary coil in the second transformer T2, a center tap of the primary coil in the second transformer T2 is connected to a power supply voltage VCC, a first end of a secondary coil in the second transformer T2 is connected to a first end of a ninth capacitor C9, a second end of the secondary coil in the second transformer T2 is connected to a second end of the ninth capacitor C9, and a center tap of the secondary coil in the second transformer T2 is connected to a second bias voltage Vb2, wherein: The two ends of the eighth capacitor C8 are the input ends of the impedance matching unit, the two ends of the eighth capacitor C8 in the first impedance matching unit are connected to the first transition local oscillator signal L0_A_P, the two ends of the eighth capacitor C8 in the second impedance matching unit are connected to the second transition local oscillator signal L0_A_Q, and the two ends of the ninth capacitor C9 are the output ends of the impedance matching unit. The two ends of the ninth capacitor C9 in the first impedance matching unit output the first local oscillator signal (L0_P+, L0_P-) to the outside, and the two ends of the ninth capacitor C9 in the second impedance matching unit output the second local oscillator signal (L0_Q+, L0_Q-) to the outside.

[0044] In detail, Figure 6As shown, the mixing module includes four load units, a fifth NPN transistor Q5, a sixth NPN transistor Q6, a seventh NPN transistor Q7, an eighth NPN transistor Q8, a ninth NPN transistor Q9, a tenth NPN transistor Q10, an eleventh NPN transistor Q11, a twelfth NPN transistor Q12, a thirteenth NPN transistor Q13, a fourteenth NPN transistor Q14, a first inductor L1 and a second inductor L2. The power supply voltage VCC is connected to the collector of the fifth NPN transistor Q5 after passing through the first load unit. The collector of the fifth NPN transistor Q5 is also connected to the collector of the seventh NPN transistor Q7. The emitter of the fifth NPN transistor Q5 is connected to the emitter of the sixth NPN transistor Q6. The fifth NPN The emitter of the transistor Q5 is also connected to the emitter of the ninth NPN transistor Q9, the emitter of the fifth NPN transistor Q5 is also connected to the collector of the thirteenth NPN transistor Q13, the emitter of the thirteenth NPN transistor Q13 is grounded via the first inductor L1, the power supply voltage VCC is connected to the collector of the eighth NPN transistor Q8 via the second load unit, the collector of the eighth NPN transistor Q8 is also connected to the collector of the sixth NPN transistor Q6, the base of the sixth NPN transistor Q6 is connected to the base of the seventh NPN transistor Q7, the emitter of the eighth NPN transistor Q8 is connected to the emitter of the seventh NPN transistor Q7, the emitter of the eighth NPN transistor Q8 is also connected to the emitter of the eleventh NPN transistor Q11, and the eighth NPN transistor The emitter of transistor Q8 is also connected to the collector of the fourteenth NPN transistor Q14, and the emitter of the fourteenth NPN transistor Q14 is also grounded after passing through the second inductor L2. The power supply voltage VCC is connected to the collector of the ninth NPN transistor Q9 after passing through the third load unit. The collector of the ninth NPN transistor Q9 is also connected to the collector of the eleventh NPN transistor Q11. The base of the eleventh NPN transistor Q11 is connected to the base of the tenth NPN transistor Q10. The emitter of the ninth NPN transistor Q9 is connected to the emitter of the tenth NPN transistor Q10. The power supply voltage VCC is connected to the collector of the twelfth NPN transistor Q12 after passing through the fourth load unit. The collector of the twelfth NPN transistor Q12 is also connected to the collector of the tenth NPN transistor Q10. The emitter of the twelfth NPN transistor Q12 is connected to the emitter of the eleventh NPN transistor Q11, wherein the base of the fifth NPN transistor Q5 and the base of the eighth NPN transistor Q8 are connected to the positive terminal L0_P+ of the first local oscillation signal, the base of the sixth NPN transistor Q6 is connected to the negative terminal L0_P- of the first local oscillation signal, the base of the ninth NPN transistor Q9 and the base of the twelfth NPN transistor Q12 are connected to the positive terminal L0_Q+ of the second local oscillation signal, the base of the tenth NPN transistor Q10 is connected to the negative terminal L0_Q- of the second local oscillation signal, the base of the thirteenth NPN transistor Q13 is connected to the positive terminal RF+ of the differential radio frequency signal, and the base of the fourteenth NPN transistor Q14 is connected to the negative terminal RF- of the differential radio frequency signal,The collector of the fifth NPN transistor Q5 and the collector of the eighth NPN transistor Q8 are the first differential output end of the mixing module, and the first differential output end of the mixing module outputs the first target intermediate frequency signal IF_P to the outside. The collector of the ninth NPN transistor Q9 and the collector of the twelfth NPN transistor Q12 are the second differential output end of the mixing module, and the second differential output end of the mixing module outputs the second target intermediate frequency signal IF_Q to the outside.

[0045] In more detail, the load unit is usually a resistor. A parallel capacitor can be added to filter out the RF signal, or a higher-order filter circuit structure can be used as the load unit. If the target intermediate frequency signal has a higher frequency, an inductor can also be used in the load unit. The selection of the load unit is determined according to the required target intermediate frequency signal.

[0046] In detail, Figure 7 As shown, the mixer also includes a second signal input port, the input end of the second input port is connected to the initial local oscillator signal (L0+, L0-), the output end of the second input port is connected to the input end of the signal processing module, and the second signal input port is used to match the impedance of the initial local oscillator signal (L0+, L0-) input, as shown in FIG. Figure 8 As shown, the second signal input port includes a tenth capacitor C10, an eleventh capacitor C11, and a third transformer T3, wherein a first end of the tenth capacitor C10 is connected to a first end of a primary coil in the third transformer T3, a second end of the tenth capacitor C10 is connected to a second end of the primary coil in the third transformer T3, a first end of a secondary coil in the third transformer T3 is connected to a first end of the eleventh capacitor C11, a second end of the secondary coil in the third transformer T3 is connected to a second end of the eleventh capacitor C11, and a middle tap of the secondary coil in the third transformer T3 is connected to a first bias voltage Vb1, wherein two ends of the tenth capacitor C10 are input ends of the second signal input port, two ends of the tenth capacitor C10 are connected to an initial local oscillation signal (L0+, L0-), two ends of the eleventh capacitor C11 are output ends of the second signal input port, and two ends of the eleventh capacitor C11 are connected to an input end of the phase shift unit.

[0047] like Figures 1 to 8 As shown, the working principle of the orthogonal down-conversion mixer provided by the present application is as follows:

[0048] like Figure 7 As shown, the orthogonal down-conversion mixer includes a first signal input port, a second signal input port, a phase shift unit, two amplification units, two matching units and a mixing module.

[0049] The RF signal RF_in is converted into a differential RF signal (RF+, RF-) through the first signal input port, and has the impedance matching function of the RF port. The impedance of the local oscillator signal input port is matched through the second signal input port. It should be noted that if the input initial local oscillator signal impedance matches the input port of the signal processing module, the second signal input port may not be set.

[0050] The initial local oscillator signal (L0+, L0-) is phase-shifted by the phase shift unit to obtain two transitional local oscillator signals with orthogonal phases. The resistance values ​​of the multiple resistors in the phase shift unit are equal and the capacitance values ​​of the multiple capacitors are equal. The values ​​of the resistors and capacitors satisfy the expression (1):

[0051]

[0052] In expression (1), ω0 is the frequency of the initial local oscillator signal, R is the resistance in the phase shift unit, and C is the capacitance in the phase shift unit.

[0053] When the phase shift unit meets all frequencies, all load impedances and source impedances, the first transition local oscillator signal L0_A_P and the second transition local oscillator signal L0_A_Q have a phase difference of 90 degrees. When the first transition local oscillator signal L0_A_P and the second transition local oscillator signal L0_A_Q are connected to the same load, they output the same amplitude only at the frequency ω0. When the resistor in the phase shift unit can be composed of multiple identical resistors connected in series or in parallel, and the capacitor in the phase shift unit can be composed of multiple identical capacitors connected in series or in parallel, the influence of process fluctuations is reduced, the values ​​of resistors and capacitors in the phase shift unit are adjusted, and the circuit loss of the phase shift unit is reduced.

[0054] The two orthogonal transition local oscillator signals are amplified to a preset power threshold by the first amplification unit and the second amplification unit to meet the driving requirements of the orthogonal down-mixer for the local oscillator port. The output impedance of the two amplification units is matched to the corresponding input impedance of the mixing module by the matching unit, and the matching method is conjugate matching.

[0055] The differential RF signal (RF+, RF-) is input through the base of the two NPN transistors (Q13, Q14) of the transconductance stage in the mixing module, and the differential RF signal (RF+, RF-) is amplified. The first local oscillator signal (L0_P+, L0_P-) and the second local oscillator signal (L0_Q+, L0_Q-) are input through the eight NPN transistors (Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12) of the switch stage in the mixing module. Based on the first local oscillator signal (L0_P+, L0_P-) and the second local oscillator signal (L0 _Q+, L0_Q-) control the eight NPN transistors (Q5, Q6, Q7, Q8, Q9, Q10, Q11, Q12) switches, mix the first local oscillator signal (L0_P+, L0_P-) with the RF signal amplified by the thirteenth NPN transistor Q13 to obtain the first target intermediate frequency signal (IF_P+, IF_P-), mix the second local oscillator signal (L0_Q+, L0_Q-) with the RF signal amplified by the fourteenth NPN transistor Q14 to obtain the second target intermediate frequency signal (IF_Q+, IF_Q-). The load unit in the mixing module provides the intermediate frequency load and has the function of filtering out the RF and local oscillator signals. Figure 6 As shown, since the first local oscillator signal and the second local oscillator signal are identical except for the phase difference, the transconductance stages of the two signals are combined into an NPN transistor to reduce the current in the switch-stage transistor, increase the switching speed, and ensure the low noise coefficient of the mixer. A pseudo-differential transconductance structure is formed by two NPN transistors (Q13, Q14) to save voltage margin, and an inductor is connected in series with the emitter of the transconductance stage NPN transistor (Q13, Q14) to improve the linearity of the mixer.

[0056] The layout design of the orthogonal down-conversion mixer follows the principle of symmetry to ensure the consistency of the two-phase local oscillator signal. The mixer module is symmetrical about the central axis. For the switch-level NPN transistors that input the two-phase local oscillator signal, the four NPN transistors in each channel are symmetrically arranged. In order to increase the isolation between each module, a grounded substrate (Ptap) isolation should be added between each module. From the layout of the orthogonal down-conversion mixer, if the RF signal is input from the left, the initial local oscillator signal is input from the opposite side (right side), and the two target intermediate frequency signals are output from the other two sides (upper and lower sides), which further improves the isolation between each port.

[0057] The present application provides an orthogonal down-conversion mixer, which includes a first signal input port, a signal processing module and a mixing module. The radio frequency signal is converted into a differential radio frequency signal through the first signal input port, the initial local oscillator signal is phase-shifted, amplified and impedance-matched through the signal processing module to obtain two local oscillator signals with orthogonal phases, the differential radio frequency signal is amplified through a pseudo-differential structure in the mixing module, and the first local oscillator signal and the second local oscillator signal are mixed with the amplified differential radio frequency signal to obtain two target intermediate frequency signals. The orthogonal down-conversion mixer provided by the present application performs mixing processing through the same transconductance structure, reduces the current of the switching-level transistor, improves the switching speed, and enables the mixer to maintain a low noise coefficient. The pseudo-differential structure is used to enhance the voltage margin saving, the inductor is connected in series with the emitter of the transconductance-level transistor, and the linearity of the mixer is improved. By optimizing the values ​​of the resistor and capacitor in the phase shift unit, the loss generated by the phase shift unit is reduced, and the influence of process fluctuations is reduced by connecting multiple resistors and capacitors in series and parallel, and good orthogonality and low loss can be guaranteed in the full frequency band. The modules are isolated from each other, the layout is highly symmetrical, and the RF port, local oscillator port, and two IF output ports are placed in different directions of the layout and away from each other, further improving the isolation between the ports.

[0058] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by a person of ordinary skill in the art without departing from the spirit and technical ideas disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A quadrature down-conversion mixer, characterized in that: include: A first signal input port, receiving a radio frequency signal, and converting the radio frequency signal into a differential radio frequency signal; A signal processing module receives an initial local oscillator signal, performs phase shifting, amplification and impedance matching on the initial local oscillator signal, and obtains two local oscillator signals with orthogonal phases; The mixing module receives the differential RF signal, the first local oscillator signal and the second local oscillator signal, amplifies the differential RF signal through a pseudo-differential structure, and mixes the first local oscillator signal and the second local oscillator signal with the amplified differential RF signal to obtain two target intermediate frequency signals.

2. The quadrature down-conversion mixer according to claim 1, characterized in that: The first signal input end includes a first transformer and a first capacitor, wherein the first end of the primary coil in the first transformer is connected to the RF signal, the second end of the primary coil in the first transformer is grounded, the first end of the secondary coil in the first transformer is connected to the first end of the first capacitor, the second end of the secondary coil in the first transformer is connected to the second end of the first capacitor, and the center tap of the secondary coil in the first transformer is connected to a first bias voltage, wherein the two ends of the first capacitor output the differential RF signal to the outside.

3. The quadrature down-conversion mixer according to claim 2, characterized in that: The signal processing module includes a phase shift unit, two amplifying units, and two impedance matching units. The phase shift unit performs phase shift processing on the initial local oscillator signal to obtain two transitional local oscillator signals with orthogonal phases. The amplifying unit amplifies the transitional local oscillator signal. The matching unit is connected to the amplifying unit and is used to match the impedance between the amplifying unit and the mixing module to output the first local oscillator signal and the second local oscillator signal to the outside.

4. The quadrature down-conversion mixer according to claim 3, characterized in that: The phase shift unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a second capacitor, a third capacitor, a fourth capacitor, and a fifth capacitor. The first end of the first resistor is connected to the second end of the second resistor via the second capacitor, the first end of the second resistor is connected to the second end of the third resistor via the third capacitor, the first end of the third resistor is connected to the second end of the fourth resistor via the fourth capacitor, and the first end of the fourth resistor is connected to the second end of the first resistor via the fifth capacitor. The first end of the first resistor and the first end of the third resistor cooperate to input the initial local oscillation signal, the second end of the first resistor and the second end of the third resistor output a first transition local oscillation signal to the outside, and the second end of the second resistor and the second end of the fourth resistor output a second transition local oscillation signal to the outside.

5. The quadrature down-conversion mixer according to claim 3, characterized in that: The amplification unit includes a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a sixth capacitor, a seventh capacitor, a first NPN transistor, a second NPN transistor, a third NPN transistor and a fourth NPN transistor. The first end of the fifth resistor is connected to the second bias voltage, the second end of the fifth resistor is grounded after passing through the sixth capacitor, the second end of the fifth resistor is also connected to the base of the first NPN transistor, the emitter of the first NPN transistor is connected to the collector of the third NPN transistor, the base of the third NPN transistor is connected to the first end of the seventh resistor, the second end of the seventh resistor is connected to the first bias voltage, the emitter of the third NPN transistor is grounded, the first end of the sixth resistor is connected to the collector of the third NPN transistor, the base of the third NPN transistor is connected to the first end of the seventh resistor, the second end of the seventh resistor is connected to the first bias voltage, the emitter of the third NPN transistor is grounded, the first end of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the third NPN transistor ... grounded, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, the emitter of the sixth resistor is connected to the collector of the third NPN transistor, The second bias voltage is connected, the second end of the sixth resistor is grounded after passing through the seventh capacitor, the second end of the sixth resistor is also connected to the base of the second NPN transistor, the emitter of the second NPN transistor is connected to the collector of the fourth NPN transistor, the base of the fourth NPN transistor is connected to the first end of the eighth resistor, the second end of the eighth resistor is connected to the first bias voltage, the emitter of the fourth NPN transistor is connected to the emitter of the third NPN transistor, wherein the base of the third NPN transistor and the base of the fourth NPN transistor are the input ends of the amplifying unit, and the collector of the first NPN transistor and the collector of the second NPN transistor are the output ends of the amplifying unit.

6. The quadrature down-conversion mixer according to claim 5, characterized in that: The impedance matching unit includes an eighth capacitor, a second transformer, and a ninth capacitor, wherein a first end of the eighth capacitor is connected to a first end of a primary coil in the second transformer, a second end of the eighth capacitor is connected to a second end of the primary coil in the second transformer, a center tap of the primary coil in the second transformer is connected to a power supply voltage, a first end of a secondary coil in the second transformer is connected to a first end of the ninth capacitor, a second end of the secondary coil in the second transformer is connected to a second end of the ninth capacitor, and a center tap of the secondary coil in the second transformer is connected to the second bias voltage, wherein two ends of the eighth capacitor are input ends of the impedance matching unit, and two ends of the ninth capacitor are output ends of the impedance matching unit.

7. The quadrature down-conversion mixer according to claim 6, characterized in that: The mixing module includes four load units, a fifth NPN transistor, a sixth NPN transistor, a seventh NPN transistor, an eighth NPN transistor, a ninth NPN transistor, a tenth NPN transistor, an eleventh NPN transistor, a twelfth NPN transistor, a thirteenth NPN transistor, a fourteenth NPN transistor, a first inductor and a second inductor. The power supply voltage is connected to the collector of the fifth NPN transistor after passing through the first load unit. The collector of the fifth NPN transistor is also connected to the collector of the seventh NPN transistor. The emitter of the fifth NPN transistor is connected to the emitter of the sixth NPN transistor. The emitter of the fifth NPN transistor is also connected to the emitter of the ninth NPN transistor. The emitter of the fifth NPN transistor is also connected to the collector of the thirteenth NPN transistor, the emitter of the thirteenth NPN transistor is grounded after passing through the first inductor, the power supply voltage is connected to the collector of the eighth NPN transistor after passing through the second load unit, the collector of the eighth NPN transistor is also connected to the collector of the sixth NPN transistor, the base of the sixth NPN transistor is connected to the base of the seventh NPN transistor, the emitter of the eighth NPN transistor is connected to the emitter of the seventh NPN transistor, the emitter of the eighth NPN transistor is also connected to the emitter of the eleventh NPN transistor, and the emitter of the eighth NPN transistor is also connected to the collector of the fourteenth NPN transistor, The emitter of the fourteenth NPN transistor is also grounded after passing through the second inductor, the power supply voltage is connected to the collector of the ninth NPN transistor after passing through the third load unit, the collector of the ninth NPN transistor is also connected to the collector of the eleventh NPN transistor, the base of the eleventh NPN transistor is connected to the base of the tenth NPN transistor, the emitter of the ninth NPN transistor is connected to the emitter of the tenth NPN transistor, the power supply voltage is connected to the collector of the twelfth NPN transistor after passing through the fourth load unit, the collector of the twelfth NPN transistor is also connected to the collector of the tenth NPN transistor, the emitter of the twelfth NPN transistor is connected to the eleventh NPN transistor The emitter of the first local oscillator module is connected to the positive end of the first local oscillator signal by the base of the fifth NPN transistor and the base of the eighth NPN transistor, and the base of the sixth NPN transistor is connected to the negative end of the first local oscillator signal by the base of the ninth NPN transistor and the base of the twelfth NPN transistor are connected to the positive end of the second local oscillator signal, and the base of the tenth NPN transistor is connected to the negative end of the second local oscillator signal. The base of the thirteenth NPN transistor is connected to the positive end of the differential RF signal, and the base of the fourteenth NPN transistor is connected to the negative end of the differential RF signal. The collector of the fifth NPN transistor and the collector of the eighth NPN transistor are the first differential output end of the mixing module.The collector of the ninth NPN transistor and the collector of the twelfth NPN transistor are the second differential output terminals of the mixing module.

8. The quadrature down-conversion mixer according to claim 2, characterized in that: The mixer also includes a second signal input port, an input end of the second input port is connected to the initial local oscillator signal, an output end of the second input port is connected to the input end of the signal processing module, the second signal input port is used to match the impedance of the initial local oscillator signal input, the second signal input port includes a tenth capacitor, an eleventh capacitor, and a third transformer, a first end of the tenth capacitor is connected to the first end of the primary coil in the third transformer, a second end of the tenth capacitor is connected to the second end of the primary coil in the third transformer, a first end of the secondary coil in the third transformer is connected to the first end of the eleventh capacitor, a second end of the secondary coil in the third transformer is connected to the second end of the eleventh capacitor, and a middle tap of the secondary coil in the third transformer is connected to the first bias voltage, wherein the two ends of the tenth capacitor are the input ends of the second signal input port, and the two ends of the eleventh capacitor are the output ends of the second signal input port.

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