A static error calibration system and method for a current steering digital-to-analog converter

Abstract

This application discloses a static error calibration system and method for a current-driven digital-to-analog converter (D / A converter), relating to the field of circuit technology. The system includes a current-driven D / A converter module, a measurement system, and a control system. The current-driven D / A converter module includes multiple current-driven D / A converter units, and each current-driven D / A converter unit includes multiple compensated D / A converter units. The measurement system is used to measure the output current or load voltage of the current-driven D / A converter module. The control system is used to calibrate the current-driven D / A converter module based on the output current or load voltage measured by the measurement system and the control signal. The compensated D / A converter units of this application use field-effect transistors of the same type as the first current source transistors, making their temperature drift similar and reducing errors. Simultaneously, this application can adjust the static current of each input bit to make the current source transistors proportional to each other, and can also expand the compensation range and achieve high compensation accuracy.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and in particular to a static error calibration system and method for a current-controlled digital-to-analog converter. Background Technology

[0002] Digital-to-analog converters (DACs) are crucial components of signal processing systems, audio systems, and automotive electronics systems. Their research is rooted in the growing demand for increasingly efficient and accurate conversion between digital and analog signals, and is closely related to society's increasing need for high-quality digital signal processing. In these scenarios, DACs are often required to accurately convert digital signals into analog signals. However, due to unavoidable mismatches introduced during manufacturing processes, such as uneven doping or dimensional mismatches, DACs suffer from output errors. Summary of the Invention

[0003] The main objective of this application is to propose a static error calibration system and method for a current-controlled digital-to-analog converter (DAC) to reduce the output error of the DAC.

[0004] To achieve the above objectives, one aspect of this application proposes a static error calibration system for a current-rudder type digital-to-analog converter, the calibration system comprising a current-rudder type digital-to-analog converter module, a measurement system, and a control system;

[0005] The current-rudder type digital-to-analog converter module includes multiple current-rudder type digital-to-analog converter units, and each current-rudder type digital-to-analog converter unit includes multiple compensated digital-to-analog converter units.

[0006] The current-driven digital-to-analog converter unit includes a resistor ladder, a first switching transistor, a common-source cascode transistor, and a first current source transistor; the resistor ladder is provided with a first differential output terminal and a second differential output terminal, and the first switching transistor is provided with a first differential input terminal and a second differential input terminal; the first switching transistor and the common-source cascode transistor are respectively connected to the resistor ladder and the first current source transistor; the first current source transistor is also connected to a reference ground;

[0007] The compensated digital-to-analog converter unit includes a second switching transistor and a second current source transistor; the second switching transistor is respectively provided with the input terminal and the output terminal of the compensated digital-to-analog converter unit, the second switching transistor is connected to the second current source transistor, and the second current source transistor is also connected to a reference ground;

[0008] The output terminals of several of the compensated digital-to-analog converter units are connected to the common connection terminal of the first switching transistor and the common source cascode transistor and the first current source transistor;

[0009] The measurement system is used to measure the output current or load voltage of the current-controlled digital-to-analog converter module;

[0010] The control system is used to calibrate the current-rudder type digital-to-analog converter module based on the output current or load voltage measured by the measurement system and the control signal.

[0011] In some embodiments, a current-rudder type digital-to-analog converter unit includes one or more of the compensated digital-to-analog converter units;

[0012] Wherein, when one of the current-driven digital-to-analog converter units includes one of the compensated digital-to-analog converter units, the output terminal of the compensated digital-to-analog converter unit is connected to the common connection terminal of the first switching transistor and the common-source cascode transistor and the first current source transistor;

[0013] When a current-controlled digital-to-analog converter unit includes multiple compensated digital-to-analog converter units, the output terminal of each compensated digital-to-analog converter unit is connected to the common connection terminal of the first switching transistor and the common-source cascode transistor and the first current source transistor.

[0014] In some embodiments, when a current-driven digital-to-analog converter unit includes a plurality of compensated digital-to-analog converter units, each compensated digital-to-analog converter unit includes one of the second switching transistors, and each compensated digital-to-analog converter unit includes 2 i The second current source transistor;

[0015] Where i is an integer, ranging from 0 to n, and n represents the total number of the compensated digital-to-analog converter units. The number of the second current source transistors in each of the compensated digital-to-analog converter units is different.

[0016] In some embodiments, the compensated digital-to-analog converter unit includes a single-ended output type or a differential output type;

[0017] When the compensated digital-to-analog converter unit adopts the single-ended output type, the single-ended output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is connected to the common connection terminal of the first switching transistor and the common source cascode transistor and the first current source transistor; the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively provided with a single-ended input terminal;

[0018] When the compensated digital-to-analog converter unit adopts the differential output type, the first differential output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is connected to the common connection terminal of the first switching transistor, the common source cascode transistor and the first current source transistor, and the second differential output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively connected to the power supply; the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively provided with a first differential input terminal and a second differential input terminal.

[0019] In some embodiments, the measurement system employs a transimpedance amplifier;

[0020] The transimpedance amplifier is used to measure the output current of the current-controlled digital-to-analog converter module, and then output a voltage corresponding to the output current.

[0021] In some embodiments, the measurement system and the control system are integrated within the current-controlled digital-to-analog converter module;

[0022] Alternatively, the measurement system and the control system may be located outside the current-controlled digital-to-analog converter module.

[0023] In some embodiments, the calibration system further includes a host computer;

[0024] The host computer is used to output the control signal;

[0025] The control system is used to calibrate the current-rudder type digital-to-analog converter module based on the output current or load voltage measured by the measurement system and the control signal output by the host computer.

[0026] To achieve the above objectives, another aspect of this application proposes a static error calibration method for a current-controlled digital-to-analog converter. This calibration method is applied to a static error calibration system for a current-controlled digital-to-analog converter as described in this application. The calibration method includes the following steps:

[0027] Gain calibration is performed on the current-rudder type digital-to-analog converter module to ensure that the compensation current does not exceed the coverage range of the compensation digital-to-analog converter unit in the current-rudder type digital-to-analog converter module;

[0028] Nonlinear calibration is performed on the current-controlled digital-to-analog converter module to reduce differential and integral nonlinearities;

[0029] The step of performing gain calibration on the current-steering digital-to-analog converter module is repeated to reduce the gain error introduced by the nonlinear calibration.

[0030] In some embodiments, the gain calibration of the current-controlled digital-to-analog converter module includes the following steps:

[0031] Turn off all the compensated digital-to-analog converter units in the current-controlled digital-to-analog converter module;

[0032] The compensated digital-to-analog converter unit of the reference current source is placed in the middle codeword;

[0033] Measure the first full-scale output current of the current-rudder type digital-to-analog converter module;

[0034] Increase or decrease the input bits of the compensated digital-to-analog converter unit to adjust the output of the compensated digital-to-analog converter unit;

[0035] Measure the second output full-scale current of the current-rudder type digital-to-analog converter module;

[0036] The gain error is calculated based on the first full-scale output current and the second full-scale output current.

[0037] If the gain error decreases, return to the step of increasing or decreasing the input bits of the compensation digital-to-analog converter unit to adjust the output of the compensation digital-to-analog converter unit until the gain error reaches its minimum value, then decrease or increase the input bits of the compensation digital-to-analog converter unit to adjust the output of the compensation digital-to-analog converter unit, and then end the calibration.

[0038] If the gain error increases or remains unchanged, the input bits of the compensated digital-to-analog converter unit are decreased or increased to adjust the output of the compensated digital-to-analog converter unit until the gain error reaches its minimum value, and then the calibration ends.

[0039] In some embodiments, the nonlinear calibration of the current-driven digital-to-analog converter module includes the following steps:

[0040] Calculate the equivalent current of each current-rudder type digital-to-analog converter unit in the current-rudder type digital-to-analog converter module; wherein, each equivalent current includes the output current when the thermometer code control corresponds to the current-rudder type digital-to-analog converter unit and the output current when the binary code control corresponds to the current-rudder type digital-to-analog converter unit;

[0041] The maximum value among the various equivalent currents is determined as the standard current value;

[0042] Adjusting the compensated digital-to-analog converter unit of the thermometer code so that the output current of the current-controlled digital-to-analog converter unit is consistent with NI STD The difference between them reaches its minimum value; where N is a positive integer, I STD This represents the standard current value;

[0043] The compensated digital-to-analog converter unit adjusts the binary code so that the output current of the current-controlled digital-to-analog converter unit is consistent with... The difference between them reaches its minimum value; where M is a positive integer.

[0044] The embodiments of this application include at least the following beneficial effects:

[0045] The calibration system of this application includes a current-steering digital-to-analog converter (DAC) module, a measurement system, and a control system. The current-steering DAC module includes multiple current-steering DAC units, and each current-steering DAC unit includes multiple compensated DAC units. The measurement system measures the output current or load voltage of the current-steering DAC module. The control system calibrates the current-steering DAC module based on the output current or load voltage measured by the measurement system and the control signal. This application provides an independent compensated DAC unit for the first current source transistor of each current-steering DAC unit, thus avoiding the limitations of a segmented architecture for the compensated DAC. Furthermore, the compensated DAC units use the same type of field-effect transistor as the first current source transistor, making their temperature drift similar and reducing errors. Simultaneously, this application can adjust the quiescent current of each input bit to make the current source transistors proportional to each other, expanding the compensation range and achieving high compensation accuracy. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 An example structural diagram of the CSDAC unit provided in the embodiments of this application;

[0048] Figure 2 An example diagram of an optional 14-bit CSDAC architecture provided for embodiments of this application;

[0049] Figure 3 This is a schematic diagram of the structure of a static error calibration system for a current-controlled digital-to-analog converter provided in an embodiment of this application;

[0050] Figure 4 A flowchart illustrating a static error calibration method for a current-controlled digital-to-analog converter provided in this application embodiment;

[0051] Figure 5 A schematic diagram of a CSDAC unit with a CALDAC unit provided in an embodiment of this application;

[0052] Figure 6 A schematic diagram of the CALDAC unit provided in the embodiments of this application;

[0053] Figure 7 A schematic diagram of a differential CALDAC unit provided in an embodiment of this application;

[0054] Figure 8 A schematic diagram of a single-ended CALDAC unit provided in an embodiment of this application;

[0055] Figure 9 A schematic diagram of a 3-bit CALDAC unit provided in an embodiment of this application;

[0056] Figure 10 A schematic diagram of a CSDAC unit with a CALDAC unit provided for an embodiment of this application;

[0057] Figure 11 An example structural diagram of a calibration system provided in an embodiment of this application;

[0058] Figure 12 A schematic diagram of a more specific calibration system provided in this application embodiment;

[0059] Figure 13 This is a schematic flowchart of a calibration method provided in an embodiment of this application.

[0060] Figure 14 A flowchart of the first gain calibration provided in this application embodiment;

[0061] Figure 15 A schematic diagram of the transmission characteristic curves and the endpoint fitting curve before and after the first gain calibration provided in the embodiments of this application;

[0062] Figure 16 A flowchart of nonlinear calibration provided for embodiments of this application;

[0063] Figure 17 A schematic diagram of the transmission characteristic curves before and after nonlinear calibration provided for embodiments of this application;

[0064] Figure 18 A flowchart of the second gain calibration provided in this application embodiment;

[0065] Figure 19 A schematic diagram of the transmission characteristic curves before and after the second gain calibration provided in an embodiment of this application;

[0066] Figure 20 This is a schematic diagram of the transmission characteristic curve after one round of calibration, provided for an embodiment of this application. Detailed Implementation

[0067] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit it. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those of this application; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this application as detailed in the appended claims.

[0068] It is understood that the terms “first,” “second,” etc., used in this application may be used herein to describe various concepts, but unless otherwise stated, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another. For example, without departing from the scope of the embodiments of this application, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the words “if,” “when,” or “in response to a determination” as used herein may be interpreted as “when…” or “when…” or “in response to a determination.”

[0069] As used in this application, the terms "at least one", "multiple", "each", "any", etc., "at least one" includes one, two or more, "multiple" includes two or more, "each" refers to each of the corresponding multiples, and "any" refers to any one of the multiples.

[0070] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0071] Before providing a detailed description of the embodiments of this application, some terms and related technologies involved in the embodiments of this application will be explained as follows:

[0072] DAC, or digital-to-analog converter, is a chip that converts input bit signals (digital signals) into analog signals. In this article, it mainly refers to the DAC core module, which mainly includes three parts: a switching transistor, a cascode transistor, and a current source transistor. It may also include a resistor ladder used to shunt current.

[0073] CSDAC, or current steering DAC, is a type of digital-to-analog converter composed of similar CSDAC units.

[0074] CALDAC, calibration DAC: used to provide compensation current.

[0075] The static performance of a DAC is generally described by four parameters: gain error, offset error, differential nonlinearity, and integral nonlinearity. Smaller values ​​for these parameters indicate better static performance.

[0076] Gain error: The percentage of the actual full-scale current output by the DAC relative to the standard full-scale current.

[0077] Offset error: The percentage of the actual DAC output current relative to the standard full-scale current when the input is zero. It is related to the leakage current when the switching transistor is in the cutoff region.

[0078] Differential Nonlinearity (DNL): The difference between the output difference of adjacent codewords and the ideal step height (1 LSB).

[0079] Integral Nonlinearity (INL): The difference between the actual output value and the ideal converter output value.

[0080] Least Significant Bit (LSB): The unit for INL and DNL. LSB represents the magnitude of the output current of the least significant bit in the DAC, or the voltage value it generates across the load. For example, for a 16-bit precision DAC, assuming the full-scale output voltage V... ref =1V, then LSB can also represent the lower bits of binary code control.

[0081] The dynamic performance of a DAC, or its dynamic range, can be described by parameters such as spurious-free dynamic range (SFDR).

[0082] Front-end calibration: Calibration is performed after the chip is powered on.

[0083] Background calibration: Calibration during chip operation.

[0084] DAC resolution: The resolution of a DAC is determined by the number of bits of digital code it receives as input.

[0085] Segmented architecture of a DAC: For example, for a 14-bit DAC, using thermometer code for the high 4 bits and binary code for the low 10 bits is a segmented architecture. In the binary code control method, each bit controls one CSDAC unit; in the thermometer code control method, k bits control 2... k -1 unit.

[0086] IFSR, Current of Full Scale Range, refers to the maximum output current of the DAC.

[0087] The transfer function or transfer characteristic curve of a DAC: the horizontal axis represents the input bits (i.e., digital code) of the DAC, and the vertical axis is generally the magnitude of the DAC output current or load voltage, which is an analog quantity.

[0088] TIA, trans-impedance amplifier, is used to convert current input into voltage output.

[0089] SPI: Serial Peripheral Interface.

[0090] Amplifier converters (DACs) are crucial components of signal processing systems, audio systems, and automotive electronics systems. Their research is rooted in the growing demand for efficient and accurate conversion between digital and analog signals, and is closely related to society's increasing need for high-quality digital signal processing. In these scenarios, DACs are often required to accurately convert digital signals into analog signals. However, mismatches inevitably introduced during manufacturing processes, such as uneven doping or dimensional mismatches, lead to errors in the DAC output. These errors are primarily manifested in time and amplitude; for low-to-mid-frequency DACs, amplitude errors are more significant than time errors. Amplitude errors degrade the DAC's static performance, affect its linearity, may cause harmonic distortion, and consequently impact dynamic performance.

[0091] CSDACs are characterized by high speed and ease of integration; their output current can directly drive loads or power amplifiers, making them widely used. For example... Figure 1 As shown, a basic CSDAC unit with differential output includes several components such as a switching transistor, a cascode transistor, and a current source transistor, and may also include a resistor ladder. A possible DAC architecture with differential output is as follows: Figure 2 As shown in the figure, the binary code and thermometer code are 4 bits and 10 bits respectively. In reality, the number of bits in the binary code and thermometer code can be arbitrary.

[0092] Existing calibration schemes mostly use CALDAC to compensate for quiescent current to calibrate the CSDAC output, resisting the effects of temperature and aging through background calibration. However, this method has high power consumption, complex procedures, and high implementation difficulty. Similarly, the scheme in this patent also uses CALDAC to compensate for quiescent output current, but adopts front-end calibration, that is, calibration is performed after each power-on, which can reduce power consumption, and the calibration results have small errors and a simpler calibration process.

[0093] Reference Figure 3 This application provides a static error calibration system for a current-rudder type digital-to-analog converter. The calibration system includes a current-rudder type digital-to-analog converter module, a measurement system, and a control system.

[0094] The current-rudder type digital-to-analog converter module includes multiple current-rudder type digital-to-analog converter units, and each current-rudder type digital-to-analog converter unit includes multiple compensated digital-to-analog converter units.

[0095] The current-driven digital-to-analog converter unit includes a resistor ladder, a first switching transistor, a common-source cascode transistor, and a first current source transistor; the resistor ladder is provided with a first differential output terminal and a second differential output terminal, and the first switching transistor is provided with a first differential input terminal and a second differential input terminal; the first switching transistor and the common-source cascode transistor are respectively connected to the resistor ladder and the first current source transistor; the first current source transistor is also connected to a reference ground;

[0096] The compensated digital-to-analog converter unit includes a second switching transistor and a second current source transistor; the second switching transistor is respectively provided with the input terminal and the output terminal of the compensated digital-to-analog converter unit, the second switching transistor is connected to the second current source transistor, and the second current source transistor is also connected to a reference ground;

[0097] The output terminals of several of the compensated digital-to-analog converter units are connected to the common connection terminal of the first switching transistor and the common source cascode transistor and the first current source transistor;

[0098] The measurement system is used to measure the output current or load voltage of the current-controlled digital-to-analog converter module;

[0099] The control system is used to calibrate the current-rudder type digital-to-analog converter module based on the output current or load voltage measured by the measurement system and the control signal.

[0100] As an optional implementation, one of the current-controlled digital-to-analog converter units includes one or more of the compensated digital-to-analog converter units;

[0101] Wherein, when one of the current-driven digital-to-analog converter units includes one of the compensated digital-to-analog converter units, the output terminal of the compensated digital-to-analog converter unit is connected to the common connection terminal of the first switching transistor and the common-source cascode transistor and the first current source transistor;

[0102] When a current-controlled digital-to-analog converter unit includes multiple compensated digital-to-analog converter units, the output terminal of each compensated digital-to-analog converter unit is connected to the common connection terminal of the first switching transistor and the common-source cascode transistor and the first current source transistor.

[0103] Furthermore, when one of the current-controlled digital-to-analog converter units includes multiple compensated digital-to-analog converter units, each compensated digital-to-analog converter unit includes one second switching transistor, and each compensated digital-to-analog converter unit includes 2 i The second current source transistor;

[0104] Where i is an integer, ranging from 0 to n, and n represents the total number of the compensated digital-to-analog converter units. The number of the second current source transistors in each of the compensated digital-to-analog converter units is different.

[0105] As another optional implementation, the compensated digital-to-analog converter unit includes a single-ended output type or a differential output type;

[0106] When the compensated digital-to-analog converter unit adopts the single-ended output type, the single-ended output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is connected to the common connection terminal of the first switching transistor and the common source cascode transistor and the first current source transistor; the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively provided with a single-ended input terminal;

[0107] When the compensated digital-to-analog converter unit adopts the differential output type, the first differential output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is connected to the common connection terminal of the first switching transistor, the common source cascode transistor and the first current source transistor, and the second differential output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively connected to the power supply; the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively provided with a first differential input terminal and a second differential input terminal.

[0108] Optionally, the measurement system employs a transimpedance amplifier;

[0109] The transimpedance amplifier is used to measure the output current of the current-controlled digital-to-analog converter module, and then output a voltage corresponding to the output current.

[0110] Optionally, the measurement system and the control system are integrated within the current-controlled digital-to-analog converter module;

[0111] Alternatively, the measurement system and the control system may be located outside the current-controlled digital-to-analog converter module.

[0112] Furthermore, the calibration system also includes a host computer;

[0113] The host computer is used to output the control signal;

[0114] The control system is used to calibrate the current-rudder type digital-to-analog converter module based on the output current or load voltage measured by the measurement system and the control signal output by the host computer.

[0115] Reference Figure 4 This application also provides a static error calibration method for a current-controlled digital-to-analog converter. The calibration method is applied to a static error calibration system for a current-controlled digital-to-analog converter according to an embodiment of this application. The calibration method includes steps S400 to S420:

[0116] S400: Perform gain calibration on the current-rudder type digital-to-analog converter module to ensure that the compensation current does not exceed the coverage range of the compensation digital-to-analog converter unit in the current-rudder type digital-to-analog converter module;

[0117] S410: Performs nonlinear calibration on the current-controlled digital-to-analog converter module to reduce differential nonlinearity and integral nonlinearity; the nonlinear calibration is to reduce differential nonlinearity (DNL) and integral nonlinearity (INL), which are two metrics of the DAC.

[0118] S420: Repeat the step of gain calibration of the current-steering digital-to-analog converter module to reduce the gain error introduced by the nonlinear calibration.

[0119] As a further implementation, step S400 may include steps S401 to S408:

[0120] S401: Turn off all the compensated digital-to-analog converter units in the current-controlled digital-to-analog converter module;

[0121] S402: Place the compensated digital-to-analog converter unit of the reference current source in the intermediate codeword;

[0122] S403: Measure the first output full-scale current of the current-controlled digital-to-analog converter module;

[0123] S404: Increase or decrease the input bits of the compensated digital-to-analog converter unit to adjust the output of the compensated digital-to-analog converter unit;

[0124] S405: Measure the second output full-scale current of the current-controlled digital-to-analog converter module;

[0125] S406: Calculate the gain error based on the first output full-scale current and the second output full-scale current;

[0126] S407: If the gain error decreases, return to the step of increasing or decreasing the input bits of the compensation digital-to-analog converter unit to adjust the output of the compensation digital-to-analog converter unit until the gain error reaches its minimum value, decrease or increase the input bits of the compensation digital-to-analog converter unit to adjust the output of the compensation digital-to-analog converter unit, and then end the calibration.

[0127] S408: If the gain error increases or remains unchanged, decrease or increase the input bits of the compensation digital-to-analog converter unit to adjust the output of the compensation digital-to-analog converter unit until the gain error reaches its minimum value, and then end the calibration.

[0128] As a further implementation, step S410 may include steps S411 to S414:

[0129] S411: Calculate the equivalent current of each current-rudder type digital-to-analog converter unit in the current-rudder type digital-to-analog converter module; wherein, each equivalent current includes the output current when the thermometer code controls the current-rudder type digital-to-analog converter unit and the output current when the binary code controls the current-rudder type digital-to-analog converter unit.

[0130] Specifically, this embodiment calculates the output current of each current-controlled digital-to-analog converter (DAC) unit, including those controlled by thermometer codes and binary codes, and represents each current-controlled DAC unit as equivalent to a thermometer code. For example, a 14-bit DAC has 4 bits of thermometer code + 10 bits of binary code. The 14 bits are represented by D13-D0 from high to low, where D13-D10 are the thermometer code and D9-D0 are the binary code. If D0 controls the current source output to be I... D0 The equivalent current is I. STD0 =2 10 I D0 If the output of the control current source D1 is I D1 The equivalent current is I. STD1 =2 9 I D1 And so on; while D13-D10 control a total of 2 4 -1 = 15, the thermometer code does not need to be multiplied by the weight, and they are respectively I SRD10 ~I STD25 The standard current value is defined as I. STD =max{I STDn}, n = 0 ~ 25.

[0131] S412: Determine the maximum value among the various equivalent currents as the standard current value.

[0132] S413: Adjust the compensated digital-to-analog converter unit of the thermometer code so that the output current of the current-controlled digital-to-analog converter unit is consistent with NI. STD The difference between them reaches its minimum value; where N is a positive integer, I STD This represents the standard current value;

[0133] S414: Adjust the compensated digital-to-analog converter unit of the binary code so that the output current of the current-controlled digital-to-analog converter unit is consistent with... The difference between them reaches its minimum value; where M is a positive integer.

[0134] For example, taking S411 as an example, during calibration, I... STD For reference, adjust the compensation digital-to-analog converter unit to make I D0 Towards Closer, I D1 Towards Approaching, and so on; for the thermometer code, the compensation digital-to-analog converter unit is adjusted to make I... D10 To I STD Closer, I D11 +I D10 To 2I STD Closer, I D12 +I D11 +I D10 To 3I STD To get closer, and so on.

[0135] Therefore, the adjustment steps can specifically be: adjusting the compensation digital-to-analog converter unit of the thermometer code so that the output current of the current-controlled digital-to-analog converter unit flows to NI. STD The binary code compensation digital-to-analog converter unit is moved closer to adjust the output current of the current-controlled digital-to-analog converter unit, causing the output current to be directed towards... Close to; N and M are positive integers, depending on the specific segmentation architecture.

[0136] The following section will provide a detailed introduction and explanation of the solutions in the embodiments of this application, using specific application examples.

[0137] To address the amplitude error issue in the output of CSDAC, this embodiment proposes a relatively simple solution that effectively reduces gain error, INL, and DNL.

[0138] Specifically, this embodiment may include the following technical solutions:

[0139] Add a CALDAC to each CSDAC unit, such as Figure 5 As shown. A CALDAC unit can have a structure similar to that of a CSDAC unit. For example... Figure 6As shown, the CALDAC unit should have a switching transistor and a current source transistor. The high and low levels of the input bits control the switching transistor to turn on or off, while the current source transistor provides compensation current to the CALDAC unit. The switching transistor may have a differential input 310 or a single-ended input 320. The CALDAC may have a differential output 330 or a single-ended output 340. The CALDAC input should have multiple bits, and the number of CALDAC units controlled by each bit should be equal to the weight of the bit, enabling it to output a certain range of current. Assuming the CALDAC has n input bits, such as... Figure 7 As shown, CD0 represents the least significant bit, controlling one CALDAC unit; CD1 represents the second most significant bit, controlling two; and so on, CDn controls two... n One CALDAC unit. Figure 7 , Figure 8 Schematic diagrams of differential and single-ended CALDACs are shown respectively. The specific number of bits and the minimum current output per bit need to be determined based on simulation results. Switches for the same bit can be shared. (Refer to...) Figure 5 , Figure 5 A schematic diagram of a CSDAC unit including a differential or single-ended CALDAC. Figure 9 This demonstrates a possible implementation of a 3-bit CALDAC. Figure 9 In the transistor configuration, M1-M7 are current source transistors, M8-M10 are switching transistors, M2-M3 share the switching transistor M9, and M4-M7 share the switching transistor M10. The current source transistors in the CALDAC and CSDAC should be of the same type and use the same bias voltage. Figure 10 This demonstrates one implementation of a CSDAC unit with CALDAC, where Vb is the bias voltage for all current source transistors.

[0140] Figure 11 This is an example block diagram of a calibration system. Besides the CSDAC to be calibrated, the calibration system may also include a measurement system and a control system. The measurement system measures the output current or load voltage of the CSDAC; its input is the CSDAC output. The control system controls the calibration process, including controlling the input bits of the CSDAC and individual CALDACs; its input signals include the output of the measurement system and some necessary control signals. The measurement and control systems can be located within the CSDAC chip or externally. A more specific calibration system is shown below. Figure 12 As shown, using TIA can yield more accurate measurement results, and the control system can interact with the host computer via SPI signals.

[0141] The output current of the CSDAC unit is copied from the reference current source. Generally, all CSDAC units use the same reference current source. In some cases, however, units controlled by thermometer codes and units controlled by binary codes can each use their own reference current source. Adding a CALDAC to the reference current source allows adjustment of the full-scale output current and calibration of the gain error.

[0142] A single calibration round is performed on CSDAC units using the same reference current source. This calibration round consists of three steps: gain calibration, nonlinearity calibration, and gain calibration again. Figure 13 As shown. The first gain calibration process is as follows. Figure 14 As shown, the first gain calibration is to ensure that the compensation current does not exceed the coverage range of the CALDAC during subsequent calibration nonlinearity. The CALDAC of the reference current source is placed in the intermediate codeword 1210 (assuming the CALDAC input is CD3-CD0, then the intermediate codeword is 100 bits). The CALDAC output 1220 is adjusted by increasing (or decreasing) the input bits, generally in one direction, i.e., either increasing or decreasing the input bits. A schematic diagram of the transfer function before and after calibration is shown below. Figure 15 In the middle, the slope of the fitted endpoint of the transfer characteristic curve is the gain magnitude. During this process, the gain is calibrated to a standard value, reducing gain error. However, this does not improve nonlinearity; integral and differential nonlinearities remain significant, manifesting as uneven step heights in the transfer function.

[0143] Nonlinear calibration process as follows Figure 16 As shown, Figure 16 The dashed box shows the... Figure 2 The calibration process for a CSDAC, using the architecture as an example, improves nonlinearity but introduces gain error, and this introduced gain error is inevitably large. Here, "equivalent current" is defined as the output current of a single CSDAC unit controlled by a thermometer code. Figure 2 Taking the architecture shown as an example, D13-D10 represent thermometer codes. When the input to D13-D10 is 0001b, it controls one CSDAC unit, and the output is I. M1 When the inputs to D13-D10 are 0010b, they control two CSDAC units, and the output is I. M1 +I M2 I M1 and I M2 Each bit represents the magnitude of the equivalent current; the remaining input bits follow the same logic. D9-D0 are binary codes. When D9-D0 = 1000_0000_00b, only the CSDAC output controlled by D9 is active. D9 is one bit lower than D10, and the output current is I9, therefore the equivalent current is 2. 1When the input is shifted right by one bit (i.e., D9 - D0 = 0100_0000_00b), only the CSDAC output controlled by D8 is executed. Since D8 is 2 bits lower than D10, the output current is I8, and the equivalent current is 2. 2 I8; and so on. The maximum value among all equivalent currents is used as the calibration standard value I. STD Adjust the input bits of the CALDAC so that the equivalent output current of each CSDAC is closest to I. STD .

[0144] The calibration methods for the thermometer code and binary code controlled units differ slightly. First, the thermometer code is calibrated. The first CALDAC calibrates the output of one CSDAC unit, the second CALDAC calibrates the outputs of the first two CSDAC units, the third CALDAC calibrates the outputs of the first three CSDAC units, and so on. This calibrates the integral nonlinearity. Next, the binary code is calibrated. The CALDACs within each CSDAC unit only calibrate the deviation of their own output current. During this process, the number of calibrations corresponds to the number of CSDACs. Figure 2 Taking the structure shown as an example, there are a total of (2) 4 -1) + 10 = 25 CSDAC units, meaning there are a total of 25 CALDACs, requiring 25 calibrations. Considering that low bits are easily overwhelmed by noise, the calibration of the lowest 2-4 binary codes controlling the CSDAC units can be abandoned based on actual measurement conditions. For example, Figure 17 This is a schematic diagram of the transmission characteristic curves before and after nonlinear calibration.

[0145] The second gain calibration procedure is as follows Figure 18 As shown, similar to the first gain calibration procedure, Figure 19 This is a schematic diagram of the transfer characteristic curves before and after the second gain calibration. After the second gain calibration, the gain error, integral nonlinearity, and differential nonlinearity are all greatly improved, and the static parameter calibration is complete. After completing one round of calibration, the transfer function exhibits a uniform step height, and theoretically, all points on the step will fall on the standard gain curve, such as... Figure 20 As shown. In summary, the beneficial effects of this embodiment include:

[0146] 1. Provide an independent CALDAC for each current source transistor, without being limited by the CSDAC segmentation architecture.

[0147] 2. Since CALDAC uses the same type of MOSFET as the current source transistor, CALDAC has a similar temperature drift as the current source transistor, so that the output static current of each CSDAC unit remains proportional to the temperature change during operation.

[0148] 3. Since this embodiment is a front-end calibration, power consumption can be reduced.

[0149] 4. Effectively reduces the static error of the DAC: It can adjust the static current of each bit to make the current sources proportional to each other, while expanding the compensation range and achieving high compensation accuracy.

[0150] 5. Matching between CSDACs is not required, simplifying the layout difficulties when drawing the board.

[0151] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0152] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0153] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0154] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0155] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A static error calibration system for a current-controlled digital-to-analog converter, characterized in that, The calibration system includes a current-rudder type digital-to-analog converter module, a measurement system, and a control system; The current-rudder type digital-to-analog converter module includes multiple current-rudder type digital-to-analog converter units, and each current-rudder type digital-to-analog converter unit includes multiple compensated digital-to-analog converter units. The current-driven digital-to-analog converter unit includes a resistor ladder, a first switching transistor, a common-source cascode transistor, and a first current source transistor; the resistor ladder is provided with a first differential output terminal and a second differential output terminal, and the first switching transistor is provided with a first differential input terminal and a second differential input terminal; the first switching transistor and the common-source cascode transistor are respectively connected to the resistor ladder and the first current source transistor; the first current source transistor is also connected to a reference ground; Wherein, the first switching transistor includes NMOS transistor 1 and NMOS transistor 2, the common source cascode transistor is NMOS transistor 3, and the first current source transistor is NMOS transistor 4; The drain of NMOS transistor 1 is connected to the first differential output terminal of the resistor ladder, and the drain of NMOS transistor 2 is connected to the second differential output terminal of the resistor ladder. The gate of NMOS transistor 1 and the gate of NMOS transistor 2 serve as the first differential input terminal and the second differential input terminal of the first switch, respectively. The source of NMOS transistor 1 and the source of NMOS transistor 2 are both connected to the drain of NMOS transistor 3, and the source of NMOS transistor 3 is connected to the drain of NMOS transistor 4. The source of the NMOS transistor 4 is connected to the reference ground; The output terminal of the compensated digital-to-analog converter unit is connected to the common connection terminal of the source of the NMOS transistor 3 and the drain of the NMOS transistor 4. The compensated digital-to-analog converter unit includes a second switching transistor and a second current source transistor; the second switching transistor is respectively provided with the input terminal and the output terminal of the compensated digital-to-analog converter unit, the second switching transistor is connected to the second current source transistor, and the second current source transistor is also connected to a reference ground; Wherein, the second switching transistor is an NMOS transistor 5, and the second current source transistor includes one or more NMOS transistors 6; The drain of the NMOS transistor 5 serves as the output terminal of the compensated digital-to-analog converter unit, and the gate of the NMOS transistor 5 serves as the input terminal of the compensated digital-to-analog converter unit. When the second current source includes one of the NMOS transistors 6, the drain of the NMOS transistor 6 is connected to the source of the NMOS transistor 5, and the source of the NMOS transistor 6 is connected to the reference ground; When the second current source includes a plurality of NMOS transistors 6, the drains of each NMOS transistor 6 are connected to the source of the NMOS transistor 5, and the sources of each NMOS transistor 6 are connected to reference ground. The output terminals of several of the compensated digital-to-analog converter units are connected to the common connection terminal of the first switching transistor and the common source cascode transistor and the first current source transistor; The measurement system is used to measure the output current or load voltage of the current-controlled digital-to-analog converter module; The control system is used to calibrate the current-rudder type digital-to-analog converter module based on the output current or load voltage measured by the measurement system and the control signal.

2. The static error calibration system for a current-controlled digital-to-analog converter according to claim 1, characterized in that, One of the current-controlled digital-to-analog converter units includes one or more of the compensated digital-to-analog converter units; Wherein, when one of the current-driven digital-to-analog converter units includes one of the compensated digital-to-analog converter units, the output terminal of the compensated digital-to-analog converter unit is connected to the common connection terminal of the first switching transistor and the common-source cascode transistor and the first current source transistor; When a current-controlled digital-to-analog converter unit includes multiple compensated digital-to-analog converter units, the output terminal of each compensated digital-to-analog converter unit is connected to the common connection terminal of the first switching transistor and the common-source cascode transistor and the first current source transistor.

3. The static error calibration system for a current-controlled digital-to-analog converter according to claim 2, characterized in that, When a current-controlled digital-to-analog converter unit includes multiple compensated digital-to-analog converter units, each compensated digital-to-analog converter unit includes one second switching transistor, and each compensated digital-to-analog converter unit includes 2 i The second current source transistor; in, i The value is an integer, ranging from 0 to n, where n represents the total number of the compensated digital-to-analog converter units. The number of the second current source transistors in each of the compensated digital-to-analog converter units is different.

4. The static error calibration system for a current-controlled digital-to-analog converter according to claim 1, characterized in that, The compensated digital-to-analog converter unit includes single-ended output type or differential output type; When the compensated digital-to-analog converter unit adopts the single-ended output type, the single-ended output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is connected to the common connection terminal of the first switching transistor and the common source cascode transistor and the first current source transistor; the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively provided with a single-ended input terminal; When the compensated digital-to-analog converter unit adopts the differential output type, the first differential output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is connected to the common connection terminal of the first switching transistor, the common source cascode transistor and the first current source transistor, and the second differential output terminal of the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively connected to the power supply; the second switching transistor in the plurality of compensated digital-to-analog converter units is respectively provided with a first differential input terminal and a second differential input terminal.

5. The static error calibration system for a current-controlled digital-to-analog converter according to claim 1, characterized in that, The measurement system employs a transimpedance amplifier; The transimpedance amplifier is used to measure the output current of the current-controlled digital-to-analog converter module, and then output a voltage corresponding to the output current.

6. The static error calibration system for a current-controlled digital-to-analog converter according to claim 1, characterized in that, The measurement system and the control system are integrated within the current-controlled digital-to-analog converter module; Alternatively, the measurement system and the control system may be located outside the current-controlled digital-to-analog converter module.

7. A static error calibration system for a current-controlled digital-to-analog converter according to any one of claims 1 to 6, characterized in that, The calibration system also includes a host computer; The host computer is used to output the control signal; The control system is used to calibrate the current-rudder type digital-to-analog converter module based on the output current or load voltage measured by the measurement system and the control signal output by the host computer.

8. A static error calibration method for a current-controlled digital-to-analog converter, characterized in that, The calibration method is applied to a static error calibration system for a current-controlled digital-to-analog converter as described in any one of claims 1 to 7, and the calibration method includes the following steps: Gain calibration is performed on the current-rudder type digital-to-analog converter module to ensure that the compensation current does not exceed the coverage range of the compensation digital-to-analog converter unit in the current-rudder type digital-to-analog converter module; Nonlinear calibration is performed on the current-controlled digital-to-analog converter module to reduce differential and integral nonlinearities; The step of performing gain calibration on the current-steering digital-to-analog converter module is repeated to reduce the gain error introduced by the nonlinear calibration.

9. A static error calibration method for a current-controlled digital-to-analog converter according to claim 8, characterized in that, The gain calibration of the current-controlled digital-to-analog converter module includes the following steps: Turn off all the compensated digital-to-analog converter units in the current-controlled digital-to-analog converter module; The compensated digital-to-analog converter unit of the reference current source is placed in the middle codeword; Measure the first full-scale output current of the current-rudder type digital-to-analog converter module; Increase or decrease the input bits of the compensated digital-to-analog converter unit to adjust the output of the compensated digital-to-analog converter unit; Measure the second output full-scale current of the current-rudder type digital-to-analog converter module; The gain error is calculated based on the first full-scale output current and the second full-scale output current. If the gain error decreases, return to the step of increasing or decreasing the input bits of the compensation digital-to-analog converter unit to adjust the output of the compensation digital-to-analog converter unit until the gain error reaches its minimum value, then decrease or increase the input bits of the compensation digital-to-analog converter unit to adjust the output of the compensation digital-to-analog converter unit, and then end the calibration. If the gain error increases or remains unchanged, the input bits of the compensated digital-to-analog converter unit are decreased or increased to adjust the output of the compensated digital-to-analog converter unit until the gain error reaches its minimum value, and then the calibration ends.

10. A static error calibration method for a current-controlled digital-to-analog converter according to claim 8, characterized in that, The nonlinear calibration of the current-controlled digital-to-analog converter module includes the following steps: Calculate the equivalent current of each current-rudder type digital-to-analog converter unit in the current-rudder type digital-to-analog converter module; wherein, each equivalent current includes the output current when the thermometer code control corresponds to the current-rudder type digital-to-analog converter unit and the output current when the binary code control corresponds to the current-rudder type digital-to-analog converter unit; The maximum value among the various equivalent currents is determined as the standard current value; Adjusting the compensated digital-to-analog converter unit of the thermometer code so that the output current of the current-controlled digital-to-analog converter unit is consistent with... The difference between them reaches its minimum value; where N is a positive integer. This represents the standard current value; The compensated digital-to-analog converter unit adjusts the binary code so that the output current of the current-controlled digital-to-analog converter unit is consistent with... The difference between them reaches its minimum value; where M is a positive integer.

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