Time synchronization method, vehicle system, node, vehicle, computer readable storage medium and computer program product

Abstract

The embodiment of the invention provides a time synchronization method, a vehicle system, a node, a vehicle, a computer readable storage medium and a computer program product, and the method comprises the steps: a first node sends a time message to a second node, and the time message carries the current time of the first node; and when the first node sends the time message to the second node, the first node sends a pulse signal to the second node through a power line, so that the second node updates the current time of the second node according to the current time of the first node and the receiving time of the pulse signal. According to the embodiment of the invention, the time synchronization precision can be improved.

Description

Technical Field

[0001] The present application relates to the field of vehicle technology, and in particular to a time synchronization method, a vehicle system, a node, a vehicle, a computer-readable storage medium, and a computer program product. Background Art

[0002] With the development of in-vehicle networks, local interconnectnetwork (LIN), controller area network (CAN), Ethernet, Bluetooth, WiFi, StarFlash and other networks have emerged in the in-vehicle network. The time synchronization method between various networks is currently mainly through network protocols, such as precision time protocol (PTP), generalized precision time protocol (GPTP), etc. The above time synchronization methods are based on the network, but the network is unstable, the network load at each moment is different, and the measured delay is also different, so it is impossible to achieve continuous and accurate time synchronization. Summary of the invention

[0003] Embodiments of the present application provide a time synchronization method, a vehicle system, a node, a vehicle, a computer-readable storage medium, and a computer program product, which can improve the accuracy of time synchronization.

[0004] A first aspect of an embodiment of the present application provides a time synchronization method, the method being applied to a vehicle system, the vehicle system comprising a first node and a second node, the first node and the second node being connected via a power line; the method comprising:

[0005] The first node sends a time message to the second node, where the time message carries the current time of the first node;

[0006] While the first node sends a time message to the second node, the first node sends a pulse signal to the second node through the power line, so that the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

[0007] Optionally, the current time of the second node updated by the second node is obtained based on the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

[0008] Optionally, the time difference is obtained according to the timing duration, that is, the second node starts timing when it receives the pulse signal and stops timing when it receives the time message.

[0009] Optionally, the first node sending a time message to the second node includes:

[0010] After receiving the timing information and completing time synchronization according to the timing information, the first node sends a time message to the second node.

[0011] Optionally, the vehicle system further includes a third node, the first node and the second node are in a first network, the first node is a master node in the first network, the second node is a slave node in the first network, the first node and the third node are in a second network, the third node is a master node in the second network, the first node is a slave node in the second network, and the synchronization priority of the second network is greater than the synchronization priority of the first network;

[0012] The first node sending a time message to the second node includes:

[0013] After the first node completes time synchronization through the third node, the first node sends a time message to the second node.

[0014] Optionally, the time message and the pulse signal are sent at whole seconds.

[0015] A second aspect of an embodiment of the present application provides a time synchronization method, the method being applied to a vehicle system, the vehicle system comprising a first node and a second node, the first node and the second node being connected via a power line; the method comprising:

[0016] The second node receives a pulse signal sent from the first node;

[0017] The second node receives the time message sent from the first node, where the time message carries the current time of the first node, and the time message and the pulse signal are sent simultaneously by the first node;

[0018] The second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

[0019] Optionally, the current time of the second node updated by the second node is obtained based on the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

[0020] Optionally, the time difference is obtained according to the timing duration when the second node starts timing when it receives a pulse signal from the first node and stops timing when it receives a time message from the first node.

[0021] Optionally, the time message and the pulse signal are sent at the whole second; after the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, the method further includes:

[0022] When the absolute value of the difference between the time difference between two consecutive received pulse signals and 1 second is greater than a third threshold, the second node calibrates the clock crystal oscillator of the second node according to the difference between the time difference between the two consecutive received pulse signals and 1 second; and / or

[0023] When the absolute value of the time difference between two consecutive received pulse signals and 1 second is less than or equal to the third threshold, the second node determines that the clock crystal oscillator of the second node has completed calibration.

[0024] Optionally, the time difference between two consecutive received pulse signals is recorded by the second node through a clock crystal oscillator of the second node.

[0025] Optionally, the second node calibrates the clock crystal oscillator of the second node according to the difference between the time difference between the two consecutive received pulse signals and 1 second, including:

[0026] The crystal oscillator voltage or the frequency division coefficient of the clock crystal oscillator of the second node is calibrated according to the difference between the time difference between the two consecutive received pulse signals and 1 second.

[0027] Optionally, before the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, the method further includes:

[0028] In the case where the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the first time is less than the first absolute value, the second node executes the step of updating the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, the first time is the current time of the first node plus the timing duration; the first absolute value is the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the second time, and the second time is the time updated by the second node through the network protocol;

[0029] When the absolute value of the difference between the time recorded by the clock crystal of the second node and the first time is greater than or equal to the first absolute value, the second node updates the current time of the second node to the second time.

[0030] Optionally, the first node includes: a pulse generating module and a first main control chip, and the second node includes: a filtering protection module and a second main control chip;

[0031] The first main control chip is used to control the pulse generating module to generate a pulse signal, and the pulse signal is transmitted to the filtering protection module through the power line;

[0032] The filtering protection module is used to send a timing start signal to the second main control chip when the pulse signal is detected, so that the second main control chip starts timing.

[0033] Optionally, the second node further includes: a second auxiliary chip; the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, including:

[0034] The second node updates the current time of the second main control chip to the first time, where the first time is the current time of the first node plus the timing duration;

[0035] The second node synchronizes the time of the second main control chip with the second auxiliary chip by means of shared memory, or the second node synchronizes the time of the second main control chip with the second auxiliary chip by means of interruption.

[0036] Optionally, the second node synchronizes the time of the second main control chip with the second auxiliary chip by means of a shared memory, including:

[0037] In the case where the second main control chip and the second auxiliary chip have a shared memory, the second main control chip writes the current time of the second main control chip into the shared memory, and the second main control chip sends the current time of the second main control chip to the second auxiliary chip and writes it into the storage address of the shared memory;

[0038] The second auxiliary chip obtains the current time of the second main control chip from the shared memory according to the storage address, and the second auxiliary chip updates the current time of the second auxiliary chip to the current time of the second main control chip.

[0039] Optionally, the second node synchronizes the time of the second main control chip with the second auxiliary chip by interruption, including:

[0040] In the case where the second main control chip and the second auxiliary chip do not have a shared memory, the second main control chip sends an interrupt request to the second auxiliary chip, and the second main control chip sends time information to the second auxiliary chip, where the time information carries the current time of the second main control chip;

[0041] When receiving the interrupt request, the second auxiliary chip records a first current time of the second auxiliary chip;

[0042] When receiving the time information, the second auxiliary chip records a second current time of the second auxiliary chip;

[0043] The second auxiliary chip updates the current time of the second auxiliary chip based on the current time of the second main control chip, the first current time and the second current time.

[0044] A third aspect of an embodiment of the present application provides a vehicle system, including a first node and a second node, wherein the first node and the second node are connected via a power line;

[0045] The first node is configured to send a time message to the second node, where the time message carries the current time of the first node;

[0046] When the first node is configured to send a time message to the second node, a pulse signal is sent to the second node through the power line;

[0047] The second node is configured to update the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

[0048] Optionally, the current time of the second node updated by the second node is obtained based on the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

[0049] Optionally, the time difference is obtained according to the timing duration, that is, the second node starts timing when it receives the pulse signal and stops timing when it receives the time message.

[0050] Optionally, the first node includes: a pulse generating module and a first main control chip, and the second node includes: a filtering protection module and a second main control chip;

[0051] The first main control chip is configured to control the pulse generating module to generate a pulse signal, and the pulse signal is transmitted to the filtering protection module through the power line;

[0052] The filtering protection module is configured to send a timing start signal to the second main control chip when the pulse signal is detected, so that the second main control chip starts timing.

[0053] Optionally, the vehicle system further comprises a power supply, wherein the power supply is configured to supply power to the first node and the second node through the power line;

[0054] The voltage fluctuation of the pulse signal is greater than a first threshold value, and the voltage fluctuation of the pulse signal is the difference between the maximum voltage and the minimum voltage of the pulse signal; the voltage fluctuation of the pulse signal is greater than the first threshold value, so that the voltage fluctuation of the pulse signal can be detected by the filtering protection module;

[0055] An absolute value of a difference between a voltage of the pulse signal and a power supply voltage of the power supply is smaller than a second threshold value, so as to reduce interference of the pulse signal on a circuit of the second node.

[0056] Optionally, the time message is sent by the first node to the second node after the first node receives the timing information and completes time synchronization according to the timing information.

[0057] Optionally, the vehicle system further includes a third node, the first node and the second node are in a first network, the first node is a master node in the first network, the second node is a slave node in the first network, the first node and the third node are in a second network, the third node is a master node in the second network, the first node is a slave node in the second network, and the synchronization priority of the second network is greater than the synchronization priority of the first network;

[0058] The time message is sent by the second node after the first node completes time synchronization through the third node.

[0059] Optionally, the time message and the pulse signal are sent at whole seconds.

[0060] Optionally, the second node is further configured to calibrate the clock crystal oscillator of the second node according to the difference between the time difference between two consecutive received pulse signals and 1 second when the absolute value of the difference between the time difference between the two consecutive received pulse signals and 1 second is greater than a third threshold; and / or

[0061] When the absolute value of the time difference between two consecutive received pulse signals and 1 second is less than or equal to the third threshold, it is determined that the clock crystal oscillator of the second node has completed calibration.

[0062] Optionally, the time difference between two consecutive received pulse signals is recorded by the second node through a clock crystal oscillator of the second node.

[0063] Optionally, the calibration of the clock crystal oscillator of the second node includes: calibration of the crystal oscillator voltage or the frequency division coefficient of the clock crystal oscillator of the second node.

[0064] Optionally, the second node is further configured to update the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal when the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the first time is less than the first absolute value, the first time is the current time of the first node plus the timing duration; the first absolute value is the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the second time, and the second time is the time updated by the second node through the network protocol;

[0065] The second node is further configured to update the current time of the second node to the second time when an absolute value of a difference between a time recorded by a clock crystal of the second node and the first time is greater than or equal to the first absolute value.

[0066] Optionally, the second node also includes: a second auxiliary chip; the current time updated by the second auxiliary chip is obtained by adding the timing duration to the current time of the first node, and the time synchronization between the second main control chip and the second auxiliary chip is achieved through shared memory or interruption.

[0067] The fourth aspect of an embodiment of the present application provides a first node, including a processor, the processor is connected to a memory, the memory is used to store a computer program, the computer program includes program instructions, and the processor is configured to call the program instructions to execute the step instructions in the first aspect of the embodiment of the present application.

[0068] The fifth aspect of an embodiment of the present application provides a second node, including a processor, the processor is connected to a memory, the memory is used to store a computer program, the computer program includes program instructions, and the processor is configured to call the program instructions to execute the step instructions in the second aspect of the embodiment of the present application.

[0069] The sixth aspect of the embodiments of the present application provides a vehicle, including the vehicle system of the third aspect of the embodiments of the present application, or including the first node of the fourth aspect of the embodiments of the present application and the second node of the fifth aspect of the embodiments of the present application.

[0070] The seventh aspect of the embodiments of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, wherein the computer program enables a computer to execute part or all of the steps described in the first aspect or the second aspect of the embodiments of the present application.

[0071] The eighth aspect of the embodiments of the present application provides a computer program product, wherein the computer program product includes a computer program, and the computer program is operable to cause a computer to execute some or all of the steps described in the first aspect or the second aspect of the embodiments of the present application. The computer program product can be a software installation package.

[0072] In an embodiment of the present application, the first node sends a time message to the second node, and the time message carries the current time of the first node; while the first node sends the time message to the second node, the first node sends a pulse signal to the second node through the power line, so that the second node updates the current time of the second node according to the current time of the first node and the reception time of the pulse signal. In an embodiment of the present application, the first node sends a pulse signal and a time message to the second node through the power line, so that the second node synchronizes time with the first node. Compared with time synchronization through a network protocol, it will not be affected by the instability of the network, thereby improving the accuracy of time synchronization. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0074] Figure 1 is a structural schematic diagram of a vehicle system provided in an embodiment of the present application;

[0075] Figure 2 is a structural schematic diagram of another vehicle system provided in an embodiment of the present application;

[0076] Figure 3 is a structural schematic diagram of another vehicle system provided in an embodiment of the present application;

[0077] Figure 4 is a structural schematic diagram of another vehicle system provided in an embodiment of the present application;

[0078] Figure 5 It is a flowchart of a time synchronization method provided in an embodiment of the present application;

[0079] Figure 6 It is a flowchart of another time synchronization method provided in an embodiment of the present application;

[0080] Figure 7 It is a schematic diagram of realizing time synchronization between control cores on the same circuit board through shared memory provided by an embodiment of the present application;

[0081] Figure 8 It is a schematic diagram of realizing time synchronization between control cores on the same circuit board through interruption provided by an embodiment of the present application;

[0082] Fig. 9 It is a flowchart of another time synchronization method provided in an embodiment of the present application;

[0083] Fig.10 It is a flowchart of another time synchronization method provided in an embodiment of the present application;

[0084] Fig.11 It is a specific flow chart of a time synchronization method provided by an embodiment of the present application;

[0085] Fig.12 It is a schematic diagram of a specific process of crystal oscillator calibration provided in an embodiment of the present application;

[0086] Fig.13 It is a flowchart of a cross-network time synchronization method provided by an embodiment of the present application;

[0087] Fig.14 It is a structural diagram of a node provided in an embodiment of the present application. DETAILED DESCRIPTION

[0088] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0089] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally includes steps or units that are not listed, or optionally includes other steps or units inherent to these processes, methods, products or devices.

[0090] Reference to "embodiments" in this application means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments.

[0091] See also Figure 1 , Figure 1 Schematic diagram of a vehicle system provided by an embodiment of the present application. Figure 1 As shown, the vehicle system includes a first node and a second node, and the first node and the second node are connected by a power line.

[0092] The first node is configured to send a time message to the second node, where the time message carries the current time of the first node;

[0093] When the first node is configured to send a time message to the second node, a pulse signal is sent to the second node through the power line;

[0094] The second node is configured to update the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

[0095] The power lines may include a positive power line and a negative power line, such as Figure 1 As shown, the positive power line is connected to the positive electrode of the power supply, and the negative power line is connected to the negative electrode of the power supply. The power supply can supply power to the first node and the second node through the power line.

[0096] The first node and the second node are located in the same network, for example, the first node and the second node are in a first network. The first network may be a local interconnect network (LIN), a controller area network (CAN), Ethernet, or a wireless network (for example, Bluetooth, WiFi, or a star flash network).

[0097] The first node is a master node in the first network, and the second node is a slave node in the first network. The first network may be composed of a master node and at least one slave node. For each slave node in the first network, the master node may initiate time synchronization to synchronize the time of the slave node in the first network with the time of the master node. All nodes in the first network are connected via power lines.

[0098] The first node sends a time message to the second node through the first network.

[0099] When the first node sends the time message to the second node, a pulse signal is sent to the second node through the power line.

[0100] The master node (first node) has the ability to send a pulse signal through the power line, and the slave node (second node) has the ability to receive and identify the pulse signal through the power line.

[0101] The node in the embodiment of the present application may be a controller with communication function in the vehicle, such as a domain controller, gateway, body domain controller, door controller, Bluetooth controller, etc. for intelligent driving.

[0102] Optionally, the current time of the second node updated by the second node is obtained based on the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

[0103] In the embodiment of the present application, the current time of the second node can be updated to the current time of the first node plus the time difference, so that the time of the first node and the second node can be kept synchronized.

[0104] Optionally, the time difference is obtained according to the timing duration, that is, the second node starts timing when it receives the pulse signal and stops timing when it receives the time message.

[0105] The time difference is the timing duration obtained by starting the timing when the second node receives the pulse signal and stopping the timing when the time message is received. In the embodiment of the present application, the current time of the second node can be updated to the current time of the first node plus the timing duration, so that the time of the first node and the second node can be kept synchronized.

[0106] Optional, such as Figure 2 As shown, Figure 2 It is a structural schematic diagram of another vehicle system provided in an embodiment of the present application. Figure 2 is Figure 1 Based on this, we can further obtain Figure 2 As shown, the first node includes: a pulse generation module and a first main control chip, and the second node includes: a filtering protection module and a second main control chip;

[0107] The first main control chip is configured to control the pulse generating module to generate a pulse signal, and the pulse signal is transmitted to the filtering protection module through the power line;

[0108] The filtering protection module is configured to send a timing start signal to the second main control chip when the pulse signal is detected, so that the second main control chip starts timing.

[0109] It should be noted that each master node includes a pulse generation module, and each slave node includes a filtering protection module.

[0110] Optionally, the voltage fluctuation of the pulse signal is greater than a first threshold value, and the voltage fluctuation of the pulse signal is the difference between the maximum voltage and the minimum voltage of the pulse signal; the voltage fluctuation of the pulse signal is greater than the first threshold value, so that the voltage fluctuation of the pulse signal can be detected by the filtering protection module;

[0111] An absolute value of a difference between a voltage of the pulse signal and a power supply voltage of the power supply is smaller than a second threshold value, so as to reduce interference of the pulse signal on a circuit of the second node.

[0112] The pulse generating module can be composed of a capacitor, a triode switch, a voltage-stabilizing diode, etc. It can cooperate with the input and output ports of the first main control chip to output a specific pulse signal on the positive power line. For example, if the standard voltage of the positive pole of a passenger car is 12V, the output pulse signal can be a rectangular wave of 14V-10V-14V-10V, with a period of 80uS, and each voltage lasts for 20us. This voltage fluctuation can be detected and identified in the filtering protection module, and can be filtered without affecting the circuit stability inside the controller. Among them, the pulse signal can also be artificially specified, as long as it can be ensured to be distinguished from the clutter signal in the power line, and the time is as short as possible, and the impact on the circuit network is as small as possible.

[0113] The filter protection module can be composed of capacitors, resistors, voltage-stabilizing diodes, triodes, magnetic beads, etc. A circuit that meets the requirements can be designed based on different positive voltage standards for passenger cars. After the filter protection module detects the pulse signal on the power line, it can give a high level to the second main control chip as a timing start signal for the internal timer of the second node. The filter protection module can isolate the voltage fluctuations on the power line from the circuit in the second node.

[0114] It should be noted that the first node is used as a master node in the first network and may be used as a slave node in other networks, and the first node may also include a filtering protection module. The second node is used as a slave node in the first network and may be used as a master node in other networks, and the second node may also include a pulse generating module.

[0115] In an embodiment of the present application, the first node is configured to send a pulse signal and a time message to the second node through a power line, so that the second node can be synchronized with the first node in time. Compared with time synchronization through a network protocol, it will not be affected by the instability of the network, thereby improving the accuracy of time synchronization.

[0116] Optionally, the time message and the pulse signal are sent at whole seconds.

[0117] Optionally, in addition to the main control chip, each node may also include at least one auxiliary chip. Figure 2 As shown, the second node may further include: a second auxiliary chip. The first node may further include a first auxiliary chip ( Figure 2 not shown).

[0118] The main control chip may be an MCU, and the MCU may be a single chip microcomputer or a single chip microcomputer.

[0119] The auxiliary chip may be a system on chip (SOC) or a microprocessor unit (MPU).

[0120] See also Figure 3 , Figure 3 It is a structural schematic diagram of another vehicle system provided in an embodiment of the present application. Figure 3 is Figure 1 Based on this, we can further obtain Figure 3 As shown, the vehicle system also includes a third node, the first node and the second node are in a first network, the first node is a master node in the first network, the second node is a slave node in the first network, the first node and the third node are in a second network, the third node is a master node in the second network, the first node is a slave node in the second network, and the synchronization priority of the second network is greater than the synchronization priority of the first network; the time message is sent by the second node after the first node completes time synchronization through the third node.

[0121] In the embodiment of the present application, the first node can be in the first network or in the second network. In the first network, the first node is the master node and the second node is the slave node. In the second network, the first node is the slave node and the third node is the master node. Since the synchronization priority of the second network is greater than the synchronization priority of the first network, the first node first completes time synchronization in the second network by the third node, and then performs time synchronization in the first network with other nodes in the first network.

[0122] The synchronization priority of the second network is greater than the synchronization priority of the first network, which means that the master node in the second network can obtain more accurate time than the master node in the first network. Exemplarily, the second network can be Ethernet, and the first network can be LIN, CAN, wireless network, etc. The third node receives the timing information of the global navigation satellite system (GNSS) and completes time synchronization according to the timing information. After completing the time synchronization, the third node initiates time synchronization to the slave node in the second network (for example, sending a time message to the slave node in the second network and sending a pulse signal at the same time).

[0123] See also Figure 4 , Figure 4 is a schematic diagram of the structure of another vehicle system provided in an embodiment of the present application. Figure 4 As shown, the vehicle system includes node 1, node 2, node 3, node 4, node 5, node 6, node 7, node 8, node 9, node 10 and node 11, wherein node 1, node 2, node 3, node 11 are in a CAN network, node 4, node 5, node 6 are in a LIN network, node 7 and node 8 are in a wireless network, and node 9 and node 10 are in an Ethernet network.

[0124] You can first synchronize the clocks between devices connected to the GNSS system, usually Ethernet, and complete time synchronization for nodes in the same network. After the nodes in the Ethernet complete time synchronization, the gateway or switch 2 sends the time message to the gateway or switch 1, and the gateway or switch 1 converts the time message into a CAN network message, a LIN network message or a wireless communication message structure, and synchronizes it in the CAN network, LIN network and wireless network. It should be noted that the gateway or switch 1 can set the frame priority of the transmission message to a high priority, or transmit a frame specifically used for time synchronization to reduce transmission delays. The master node of each network can be set manually according to the network structure, or a certain node can be designated as the master node. The master node can be a slave node in other different networks. The master and slave nodes are relative.

[0125] The above hardware structure and cross-network time synchronization method do not add additional wiring harnesses, and the time message only needs the first frame. The time synchronization accuracy between nodes is very high and the adaptability is strong.

[0126] See also Figure 5 , Figure 5 It is a flowchart of a time synchronization method provided in an embodiment of the present application. Figure 5 The time synchronization method can be applied to Figure 1 to Figure 4 Any vehicle system. Figure 5 As shown, the time synchronization method may include the following steps.

[0127] 501. A first node sends a time message to a second node. The time message carries the current time of the first node.

[0128] In the embodiment of the present application, the current time of the first node is the time recorded by the clock crystal oscillator of the first node when the first node sends a time message to the second node.

[0129] It should be noted that before the first node sends the time message to the second node, the first node has completed time synchronization.

[0130] The first node may complete time synchronization according to the timing information, or the first node may complete time synchronization through other nodes.

[0131] Optionally, step 501 may include the following steps:

[0132] After receiving the timing information and completing time synchronization according to the timing information, the first node sends a time message to the second node.

[0133] In the embodiment of the present application, the first node can complete time synchronization according to the timing information. After completing the time synchronization, the first node initiates and completes time synchronization to the second node.

[0134] Timing information is the time information granted. The timing information may be timing information from GNSS, which can provide accurate time. Or the timing information may be information from an accurate clock. Exemplarily, the first node may carry an accurate clock, and the time of the very accurate clock may be used to complete time synchronization.

[0135] Optionally, step 501 may include the following steps:

[0136] After the first node completes time synchronization through the third node, the first node sends a time message to the second node.

[0137] The embodiments of the present application can be applied to Figure 3 The vehicle system shown. In the embodiment of the present application, the first node can complete time synchronization through the third node, and after completing time synchronization, the first node initiates and completes time synchronization with the second node. Before the first node can complete time synchronization through the third node, the third node has completed time synchronization. The third node can receive credit information, and after completing time synchronization according to the timing information, the third node initiates and completes time synchronization with the first node.

[0138] 502. While the first node sends a time message to the second node, the first node sends a pulse signal to the second node through the power line.

[0139] 503 The second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

[0140] In the embodiment of the present application, the time for sending the time message and the pulse signal can be pre-agreed, for example, the time message and the pulse signal are sent simultaneously at an agreed specific time.

[0141] Optionally, the first node sending a time message to the second node may specifically include: the first node sending the time message to the second node at an integer second.

[0142] The first node sends a pulse signal to the second node through the power line, which may specifically include: the first node sends a pulse signal to the second node through the power line at an integer second.

[0143] In the embodiment of the present application, the first node can initiate time synchronization at every whole second. For example, the first node can send a time message and a pulse signal at XX day YY hour ZZ minute 0 second, XX day YY hour ZZ minute 1 second, XX day YY hour ZZ minute 2 seconds, etc. Since the time of sending the time message and the pulse signal is the agreed whole second, it can be ensured that the time message and the pulse signal are sent at the same time.

[0144] In the embodiment of the present application, the transmission time of the pulse signal on the power line can be ignored. The second node can record the reception time of the pulse signal and the reception time of the time message, and can obtain the difference between the reception time of the time message and the reception time of the pulse signal, and update the current time of the second node to the current time of the first node plus the difference.

[0145] In the embodiment of the present application, the first node sends a pulse signal and a time message to the second node through the power line, so that the second node and the first node are synchronized in time. Compared with time synchronization through a network protocol, it will not be affected by the instability of the network, thereby improving the accuracy of time synchronization. Optionally, the current time of the second node updated by the second node is obtained based on the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

[0146] In the embodiment of the present application, the current time of the second node can be updated to the current time of the first node plus the time difference, so that the time of the first node and the second node can be kept synchronized.

[0147] Optionally, the time difference is obtained according to the timing duration, that is, the second node starts timing when it receives the pulse signal and stops timing when it receives the time message.

[0148] The time difference is the timing duration obtained by starting the timing when the second node receives the pulse signal and stopping the timing when the time message is received. In the embodiment of the present application, the current time of the second node can be updated to the current time of the first node plus the timing duration, so that the time of the first node and the second node can be kept synchronized.

[0149] See also Figure 6 , Figure 6 It is a flowchart of another time synchronization method provided in an embodiment of the present application. Figure 6 The time synchronization method can be applied to Figure 1 to Figure 4 Any vehicle system. Figure 6 As shown, the time synchronization method may include the following steps.

[0150] 601. A first node sends a time message to a second node. The time message carries the current time of the first node.

[0151] 602. While the first node sends a time message to the second node, the first node sends a pulse signal to the second node through a power line.

[0152] The specific implementation of step 601 to step 602 may refer to the above-mentioned step 501 to step 502, which will not be repeated here.

[0153] 603, the second node starts timing when receiving the pulse signal, stops timing when receiving the time message, and records the timing duration.

[0154] In the embodiment of the present application, the transmission time of the pulse signal on the power line can be ignored, and when the second node receives the pulse signal, the clock crystal of the second node can start timing from 0. Since it takes time for the time message to be sent through the network (for example, if the first node and the second node are in the first network, the time message can be sent through the first network), the timing is stopped when the time message is received, and the timing duration is recorded, which can be understood as the time required from sending to receiving the time message.

[0155] 604. The second node updates the current time of the second node based on the current time of the first node and the timing duration.

[0156] In the embodiment of the present application, when the second node stops timing, the current time of the first node and the timing duration are added to obtain the time of the first node at the current moment. The current time of the second node is updated to the current time of the first node plus the timing duration, so that the time of the first node and the second node can be synchronized.

[0157] The above step 503 may include the above step 603 and step 604.

[0158] Step 601 to step 604 is a process of initiating and completing time synchronization from the first node to the second node.

[0159] In an embodiment of the present application, the first node sends a pulse signal and a time message to the second node through the power line, so that the second node is synchronized with the first node. Compared with time synchronization through a network protocol, it will not be affected by the instability of the network, thereby improving the accuracy of time synchronization.

[0160] Optional, based on Figure 2 In the vehicle system shown, step 604 may include the following steps:

[0161] (11) The second node updates the current time of the second master control chip to a first time, where the first time is the current time of the first node plus the timing duration;

[0162] (12) The second node synchronizes the time of the second main control chip with the second auxiliary chip by means of shared memory, or the second node synchronizes the time of the second main control chip with the second auxiliary chip by means of interruption.

[0163] In the embodiment of the present application, step (11) and step (12) are the time synchronization process between chips in the second node. The second node first updates the current time of the second main control chip to the first time, and then synchronizes the time of the second main control chip with the second auxiliary chip.

[0164] When there is a shared memory between the second main control chip and the second auxiliary chip, the second node synchronizes the time of the second main control chip and the second auxiliary chip through the shared memory; when there is no shared memory between the second main control chip and the second auxiliary chip, the second node synchronizes the time of the second main control chip and the second auxiliary chip through interruption.

[0165] Optionally, in step (12), the second node synchronizes the time of the second main control chip with the second auxiliary chip by means of a shared memory, which may specifically include the following steps:

[0166] (121) In the case where a shared memory exists between the second main control chip and the second auxiliary chip, the second main control chip writes the current time of the second main control chip into the shared memory, and the second main control chip sends the current time of the second main control chip to the second auxiliary chip and writes it into the storage address of the shared memory;

[0167] (122) The second auxiliary chip obtains the current time of the second main control chip from the shared memory according to the storage address, and the second auxiliary chip updates the current time of the second auxiliary chip to the current time of the second main control chip.

[0168] The second main control chip writing the current time of the second main control chip into the shared memory and the second main control chip sending the current time of the second main control chip to the second auxiliary chip and writing it into the storage address of the shared memory can be executed simultaneously.

[0169] In the embodiment of the present application, the time synchronization between the chips in the second node can also be referred to as the time synchronization of board-level communication. The second main control chip and the second auxiliary chip are control cores located in the same circuit board. For the time synchronization of board-level communication, the mechanism of inter-core communication can be adopted, that is, the time is written into the shared memory, and the stored address pointer is sent to the core that needs to obtain the time. The method of reading and writing memory can be completed in nanoseconds. Time synchronization can be provided for the control cores (such as MCU, MPU, SOC, etc.) between the same circuit boards.

[0170] See also Figure 7 , Figure 7 Schematic diagram of a method for realizing time synchronization between control cores on the same circuit board through shared memory provided by an embodiment of the present application. Figure 7 As shown, control core 1 and control core 2. Control core 1 can write the acquired synchronization time into the shared memory, and at the same time send a pointer of the address of the written synchronization time to control core 2. Control core 2 obtains the synchronization time from the shared memory according to the pointer transmitted by control core 1, thereby completing time synchronization.

[0171] Optionally, in step (12), the second node synchronizes the time of the second main control chip with the second auxiliary chip by interruption, which may specifically include the following steps:

[0172] (131) When the second main control chip and the second auxiliary chip do not have a shared memory, the second main control chip sends an interrupt request to the second auxiliary chip, and the second main control chip sends time information to the second auxiliary chip (for example, sending the time information through a serial peripheral interface (SPI)), where the time information carries the current time of the second main control chip;

[0173] (132) when the second auxiliary chip receives the interrupt request, recording a first current time of the second auxiliary chip;

[0174] (133) when the second auxiliary chip receives the time information, recording a second current time of the second auxiliary chip;

[0175] (134) The second auxiliary chip updates the current time of the second auxiliary chip based on the current time of the second main control chip, the first current time and the second current time.

[0176] In the embodiment of the present application, for control cores without shared memory, time synchronization is performed by using an interrupt method. Figure 8 , Figure 8 It is a schematic diagram of achieving time synchronization between control cores on the same circuit board through interruption provided by an embodiment of the present application.

[0177] The second main control chip is MCU as an example, and the second auxiliary chip is SOC as an example. When the SOC in the second node does not have an Ethernet interface or does not support the GPTP protocol, the time synchronization solution between the MCU and the SOC requires a general-purpose input / output port (GPIO) interface and a communication interface that can carry MCU timestamp information (for example, SPI communication, etc.), with the MCU as the main clock and the SOC clock synchronized. Follow the steps below to synchronize the time of the MCU and the SOC:

[0178] (1) The MCU records the current time Tx and notifies the SOC through GPIO (the time synchronization between the MCU and the SOC is achieved by using GPIO for interrupt notification to ensure that the time reference points of the MCU and the SOC are as close as possible).

[0179] (2) The SOC responds to the GPIO request and records the current time T1 of the SOC.

[0180] (3) MCU sends the recorded current time Tx to SOC via SPI message (GPIO interrupt request and SPI transmission timestamp information should be as short as possible to ensure synchronization accuracy). SIP message carries timestamp Tx.

[0181] (4) The SOC system time when the SOC receives the SIP message is T2, and the SOC system time is immediately updated to (T2-T1+Tx).

[0182] See also Fig. 9 , Fig. 9 It is a flowchart of another time synchronization method provided in an embodiment of the present application. Fig. 9 The time synchronization method can be applied to Figure 1 to Figure 4 Any vehicle system. Fig. 9 is Figure 6 Based on Fig. 9 As shown, the time synchronization method may include the following steps.

[0183] 901. The first node sends a time message to the second node at the whole second, and the time message carries the current time of the first node.

[0184] 902. While the first node is sending a time message to the second node, the first node is sending a pulse signal to the second node through the power line at the exact second.

[0185] 903. The second node starts timing when receiving the pulse signal, stops timing when receiving the time message, and records the timing duration.

[0186] 904. The second node updates the current time of the second node based on the current time of the first node and the timing duration.

[0187] The specific implementation of steps 901 to 904 may refer to the above steps 601 to 604, which will not be described again here.

[0188] After the above steps 901 to 904, the time of the nodes under the same power supply can be initially adjusted to be the same. However, due to the difference in the clock crystal oscillators of each node, the temperature difference at each position of the vehicle causes the clock temperature drift of the crystal oscillator, etc., after a period of time, the time of each node will have different differences; at this time, the master node can obtain the GNSS time at intervals, and then repeat the above steps 901 to 904 to adjust the time of each node. At the same time, the clock crystal oscillators of each node can also be adjusted to make the time synchronization higher. For details, please refer to the following steps 905 to 907.

[0189] Among them, step 905 to step 907 are executed after step 904.

[0190] 905. The second node records the time difference between two consecutive received pulse signals through the clock crystal oscillator of the second node.

[0191] In the embodiment of the present application, the clock crystal oscillator of the second node can record the pulse signal received twice in succession. Since the first node sends a pulse signal to the second node through the power line at the full second, the time difference between the pulse signals sent twice in succession by the first node is 1 second (under the record of the clock crystal oscillator of the first node). Before executing step 901, the first node has completed time synchronization, and the time and clock crystal oscillator of the first node are calibrated. The second node determines whether to calibrate the clock crystal oscillator of the second node by recording the time difference between the pulse signals received twice in succession by the clock crystal oscillator of the second node and the size of 1 second.

[0192] The time difference between two consecutive pulse signals received by the clock crystal oscillator of the second node refers to the difference between the time of the current pulse signal received by the clock crystal oscillator of the second node and the time of the last pulse signal received by the clock crystal oscillator of the second node. The time difference is about 1 second.

[0193] 906. When the absolute value of the time difference between two consecutive received pulse signals and 1 second is greater than a third threshold, the second node calibrates the clock crystal oscillator of the second node according to the time difference between two consecutive received pulse signals and 1 second.

[0194] 907, when the absolute value of the time difference between two consecutive received pulse signals and 1 second is less than or equal to the third threshold, the second node determines that the clock crystal oscillator of the second node has completed calibration.

[0195] In the embodiment of the present application, the third threshold value may be pre-set. The third threshold value may be within 200 microseconds, and illustratively, the third threshold value may be set to 30 microseconds.

[0196] When the absolute value of the time difference between two consecutive received pulse signals and 1 second is greater than the third threshold, it indicates that the error between the clock crystal oscillator of the first node and the clock crystal oscillator of the second node is large, and the clock crystal oscillator of the second node needs to be calibrated.

[0197] When the absolute value of the time difference between two consecutive received pulse signals and 1 second is less than or equal to the third threshold, it indicates that the error between the clock crystal oscillator of the first node and the clock crystal oscillator of the second node is small, and the clock crystal oscillator of the second node does not need to be calibrated.

[0198] Optionally, in step 906, the second node calibrates the clock crystal oscillator of the second node according to the time difference between two consecutive received pulse signals and 1 second, which may specifically include the following steps:

[0199] The second node calibrates the crystal oscillator voltage or the frequency division coefficient of the clock crystal oscillator of the second node according to the difference between the time difference between the two consecutive received pulse signals and 1 second.

[0200] In the embodiments of the present application, different calibration methods are used for different clock crystal oscillators. For a fixed-frequency crystal oscillator (e.g., a ceramic crystal oscillator), calibration can be performed by using the frequency division coefficient of the clock crystal oscillator. For a non-fixed-frequency crystal oscillator (e.g., a pressure-sensitive crystal oscillator), calibration can be performed by adjusting the crystal oscillator voltage of the clock crystal oscillator.

[0201] In the crystal oscillator adjustment mode, the master node sends a pulse waveform on the power line every full second, and after receiving it from the node, it compares the timing difference of the internal clock crystal oscillator. When the difference is greater than the third threshold, the frequency of the clock crystal oscillator can be adjusted. Different adjustment methods are used for different crystal oscillators. For example, for non-fixed frequency crystal oscillators such as varistor crystal oscillators, the voltage of the crystal oscillator can be adjusted to change its crystal oscillator frequency. For fixed-frequency crystal oscillators (such as ceramic crystal oscillators) whose crystal oscillator frequency cannot be adjusted, the proportional integral differential (PID) algorithm can be used to adjust the division coefficient of the internal frequency divider of the crystal oscillator.

[0202] For a crystal oscillator with a non-fixed frequency, since the crystal oscillator voltage is positively correlated with the frequency of the crystal oscillator, when the time difference between two consecutive received pulse signals is less than 1 second, the crystal oscillator voltage of the clock crystal oscillator of the second node can be adjusted by increasing the crystal oscillator voltage; when the time difference between two consecutive received pulse signals is greater than 1 second, the crystal oscillator voltage of the clock crystal oscillator of the second node can be adjusted by lowering the crystal oscillator voltage.

[0203] See also Fig.10 , Fig.10 It is a flowchart of another time synchronization method provided in an embodiment of the present application. Fig.10 The time synchronization method can be applied to Figure 1 to Figure 4 Any vehicle system. Fig.10 is Figure 6 Based on Fig.10 As shown, the time synchronization method may include the following steps.

[0204] 1001. A first node sends a time message to a second node. The time message carries the current time of the first node.

[0205] 1002. While the first node is sending a time message to the second node, the first node is sending a pulse signal to the second node through the power line.

[0206] 1003. The second node starts timing when receiving a pulse signal, stops timing when receiving a time message, and records the timing duration.

[0207] The specific implementation of steps 1001 to 1003 may refer to the above steps 601 to 603, which will not be repeated here.

[0208] 1004. When the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the first time is less than the first absolute value, the second node updates the current time of the second node based on the current time of the first node and the timing duration, where the first time is the current time of the first node plus the timing duration; the first absolute value is the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the second time, and the second time is the time updated by the second node through the network protocol.

[0209] 1005. When the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the first time is greater than or equal to the first absolute value, the second node updates the current time of the second node to the second time.

[0210] In the embodiment of the present application, after executing step 1003, a first time and a second time can be obtained, the first time is the time calculated based on the pulse signal sent by the power line, and the second time is the time when the second node is updated through the network protocol.

[0211] By comparing the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the first time, and the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the second time, the time with the smallest error is found.

[0212] Due to the instability of the network, the time updated through the network protocol may have a large deviation. Finding the time with the smallest error can improve the accuracy of time synchronization.

[0213] Among them, the network protocol can be a precision time protocol (PTP) and a generalized precision time protocol (GPTP). For example, Ethernet uses the GPTP protocol, the CAN network application layer uses the PTP protocol, and the LIN network and the wireless network application layer also use the PTP protocol. Specifically, the network delay can be measured through the network protocol, and the self-time can be adjusted to achieve time synchronization of the entire network. The entire vehicle network is unstable, the network load is different at each moment, and the measured delay is also different. Continuous precise time synchronization cannot be achieved through the network protocol. The embodiment of the present application can compare the absolute value of the difference between the first time (the time calculated based on the pulse signal sent by the power line) and the second time (the time updated by the network protocol) and the time recorded by the clock crystal oscillator of the second node to calculate the error of the two methods, and select the time with the smaller error.

[0214] See also Fig.11 , Fig.11 It is a specific flow chart of a time synchronization method provided in an embodiment of the present application. Fig.11The method shown may include the following steps.

[0215] 1101, the master node obtains the current time;

[0216] 1102, the master node sends a time message at the full second time T0, and sends a pulse signal on the power line at the full second time T0;

[0217] 1103, the slave node receives a pulse signal to trigger the clock crystal oscillator of the slave node to start timing, and the slave node stops timing when receiving the time message, and records the timing duration T1;

[0218] 1104. The slave node updates the current time to: T1+T0.

[0219] In an embodiment of the present application, the master node sends a pulse signal and a time message to the slave node through the power line, so that the slave node and the master node are synchronized in time. Compared with time synchronization through a network protocol, it will not be affected by the instability of the network, thereby improving the accuracy of time synchronization.

[0220] See also Fig.12 , Fig.12 It is a schematic diagram of a specific process of crystal oscillator calibration provided in an embodiment of the present application. Fig.12 The method shown may include the following steps.

[0221] 1201, the master node obtains the current time;

[0222] 1202, the master node sends a pulse signal on the power line at the full second;

[0223] 1203, the slave node starts timing when it receives a pulse signal and stops timing when it receives a pulse signal next time, and records the timing duration Ts.

[0224] 1204, the slave node calculates the absolute value of the difference between Ts and 1 second.

[0225] 1205, the slave node adjusts the frequency of its own clock crystal oscillator through the PID algorithm.

[0226] Specifically, the slave node adjusts the frequency division coefficient of the internal frequency divider of its own clock crystal oscillator through the PID algorithm.

[0227] 1206, recalculate the absolute value of the difference and determine whether the absolute value of the difference is less than the third threshold; if so, execute step 1207; if not, continue to execute step 1202.

[0228] 1207, adjustment completed.

[0229] In the embodiment of the present application, after updating the current time, the slave node can further adjust the clock crystal of the slave node to make the time synchronization higher. Fig.13 , Fig.13 It is a flowchart of a cross-network time synchronization method provided in an embodiment of the present application. Fig.13 The time synchronization method can be based on Figure 4 Vehicle systems shown. Fig.13 The method may include the following steps:

[0230] 1301, the master node in the Ethernet performs time synchronization through GNSS timing;

[0231] 1302, the master node in the Ethernet performs time synchronization on the slave nodes in the Ethernet;

[0232] Among them, after executing step 1302, step 1303, step 1304 and step 1305 are executed.

[0233] 1303, nodes in the CAN network perform time synchronization;

[0234] 1304, nodes in the LIN network perform time synchronization;

[0235] 1305. Nodes in the wireless network perform time synchronization.

[0236] There is no limitation on the execution order of step 1303 , step 1304 and step 1305 , and they may be executed simultaneously or not simultaneously.

[0237] Among them, in step 1303, when the nodes in the CAN network are time synchronized, the master node in the CAN network is time synchronized first, and then the slave nodes in the CAN network are time synchronized through the master node in the CAN network.

[0238] In step 1304, when the nodes in the LIN network are time synchronized, the master node in the LIN network is time synchronized first, and then the slave nodes in the LIN network are time synchronized through the master node in the LIN network.

[0239] In step 1305, the nodes in the wireless network perform time synchronization, firstly the master node in the wireless network performs time synchronization, and then the slave nodes in the wireless network are synchronized through the master node in the wireless network.

[0240] In the embodiment of the present application, clock synchronization can be first performed on the nodes in the Ethernet connected to the GNSS system. After the nodes in the Ethernet complete time synchronization, the gateway or switch 2 sends the time message to the gateway or switch 1, and the gateway or switch 1 converts the time message into a CAN network message, a LIN network message or a message structure of wireless communication, and synchronizes it in the CAN network, LIN network and wireless network. It should be noted that the gateway or switch 1 can set the frame priority of the transmission message to a high priority, or transmit a frame specifically used for time synchronization to reduce transmission delay.

[0241] in, Figures 11 to 13 The master node in may be the first node mentioned above, and the slave node may be the second node mentioned above.

[0242] The above-mentioned scheme of the embodiment of the present application is introduced from the perspective of the execution process of the method side. It is understandable that, in order to realize the above-mentioned functions, the node includes a hardware structure and / or software module corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of each example described in the embodiment provided herein, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present application.

[0243] The embodiment of the present application can divide the node into functional units according to the above method example. For example, each functional unit can be divided corresponding to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of software functional units. It should be noted that the division of units in the embodiment of the present application is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0244] See also Fig.14 , Fig.14 is a schematic diagram of a node structure provided by an embodiment of the present application, such as Fig.14As shown, the node 1400 includes a processor 1401 and a memory 1402. The processor 1401 and the memory 1402 can be connected to each other via a communication bus 1403. The communication bus 1403 can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus. The communication bus 1403 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig.14 The memory 1402 is used to store computer programs. The computer programs include program instructions. The processor 1401 is configured to call the program instructions. The above program includes instructions for executing Figure 5 to Figure 12 Some or all of the steps in the method included.

[0245] The processor 1401 may be a general-purpose central processing unit (CPU), a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits for controlling the execution of the above program. Specifically, the processor 1401 may be a VCU.

[0246] The memory 1402 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may exist independently and be connected to the processor via a bus. The memory may also be integrated with the processor.

[0247] The node in the embodiment of the present application may be the first node or the second node mentioned above or a master node or a slave node in any network.

[0248] In an embodiment of the present application, the first node sends a pulse signal and a time message to the second node through the power line, so that the second node is synchronized with the first node. Compared with time synchronization through a network protocol, it will not be affected by the instability of the network, thereby improving the accuracy of time synchronization.

[0249] An embodiment of the present application also provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program for electronic data exchange, and the computer program enables a computer to execute part or all of the steps of any time synchronization method recorded in the above method embodiments.

[0250] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the described order of actions, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

[0251] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0252] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, such as the division of the units, which is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the device or unit can be electrical or other forms.

[0253] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0254] In addition, the functional units in the various embodiments of the application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated units may be implemented in the form of hardware or in the form of software program modules.

[0255] If the integrated unit is implemented in the form of a software program module and sold or used as an independent product, it can be stored in a computer-readable memory. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a memory, including a number of instructions to enable a computer device (which can be a personal computer, server or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned memory includes: U disk, read-only memory (ROM), random access memory (RAM), mobile hard disk, disk or optical disk and other media that can store program codes.

[0256] A person of ordinary skill in the art can understand that all or part of the steps in the various methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable memory, which can include: a flash drive, a read-only memory, a random access memory, a magnetic disk or an optical disk, etc.

[0257] The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A time synchronization method, characterized in that: The method is applied to a vehicle system, the vehicle system comprising a first node and a second node, the first node and the second node being connected via a power line; the method comprising: The first node sends a time message to the second node, where the time message carries the current time of the first node; While the first node sends a time message to the second node, the first node sends a pulse signal to the second node through the power line, so that the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

2. The method according to claim 1, characterized in that The current time of the second node updated by the second node is obtained according to the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

3. The method according to claim 2, characterized in that The time difference is obtained according to the timing duration when the second node starts timing when receiving the pulse signal and stops timing when receiving the time message.

4. The method according to any one of claims 1 to 3, characterized in that: The first node sending a time message to the second node includes: After receiving the timing information and completing time synchronization according to the timing information, the first node sends a time message to the second node.

5. The method according to any one of claims 1 to 3, characterized in that: The vehicle system further includes a third node, the first node and the second node are in a first network, the first node is a master node in the first network, the second node is a slave node in the first network, the first node and the third node are in a second network, the third node is a master node in the second network, the first node is a slave node in the second network, and the synchronization priority of the second network is greater than the synchronization priority of the first network; The first node sending a time message to the second node includes: After the first node completes time synchronization through the third node, the first node sends a time message to the second node.

6. The method according to any one of claims 1 to 5, characterized in that: The time message and the pulse signal are sent at the whole second.

7. A time synchronization method, characterized in that: The method is applied to a vehicle system, the vehicle system comprising a first node and a second node, the first node and the second node being connected via a power line; the method comprising: The second node receives a pulse signal from the first node; The second node receives a time message from the first node, where the time message carries the current time of the first node, and the time message and the pulse signal are sent simultaneously by the first node; The second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

8. The method according to claim 7, characterized in that The current time of the second node updated by the second node is obtained according to the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

9. The method according to claim 8, characterized in that The time difference is obtained according to the timing duration when the second node starts timing when receiving a pulse signal from the first node and stops timing when receiving a time message from the first node.

10. The method according to claim 9, characterized in that The time message and the pulse signal are sent at the whole second; after the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, the method further includes: When the absolute value of the difference between the time difference between two consecutive received pulse signals and 1 second is greater than a third threshold, the second node calibrates the clock crystal oscillator of the second node according to the difference between the time difference between the two consecutive received pulse signals and 1 second; and / or When the absolute value of the time difference between two consecutive received pulse signals and 1 second is less than or equal to the third threshold, the second node determines that the clock crystal oscillator of the second node has completed calibration.

11. The method according to claim 10, characterized in that The time difference between the two consecutive received pulse signals is recorded by the second node through the clock crystal oscillator of the second node.

12. The method according to claim 10, characterized in that The second node calibrates the clock crystal oscillator of the second node according to the difference between the time difference between the two consecutive received pulse signals and 1 second, including: The second node calibrates the crystal oscillator voltage or the frequency division coefficient of the clock crystal oscillator of the second node according to the difference between the time difference between the two consecutive received pulse signals and 1 second.

13. The method according to claim 10, characterized in that Before the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, the method further includes: In the case where the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the first time is less than the first absolute value, the second node executes the step of updating the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, the first time is the current time of the first node plus the timing duration; the first absolute value is the absolute value of the difference between the time recorded by the clock crystal oscillator of the second node and the second time, and the second time is the time updated by the second node through the network protocol; When the absolute value of the difference between the time recorded by the clock crystal of the second node and the first time is greater than or equal to the first absolute value, the second node updates the current time of the second node to the second time.

14. The method according to any one of claims 9 to 13, characterized in that: The first node includes: a pulse generation module and a first main control chip, and the second node includes: a filtering protection module and a second main control chip; The first main control chip is used to control the pulse generating module to generate a pulse signal, and the pulse signal is transmitted to the filtering protection module through the power line; The filtering protection module is used to send a timing start signal to the second main control chip when the pulse signal is detected, so that the second main control chip starts timing.

15. The method according to claim 14, characterized in that The second node further includes: a second auxiliary chip; the second node updates the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal, including: The second node updates the current time of the second main control chip to the first time, where the first time is the current time of the first node plus the timing duration; The second node synchronizes the time of the second main control chip with the second auxiliary chip by means of shared memory, or the second node synchronizes the time of the second main control chip with the second auxiliary chip by means of interruption.

16. The method according to claim 15, characterized in that The second node synchronizes the time of the second main control chip with the second auxiliary chip by means of a shared memory, including: In the case where the second main control chip and the second auxiliary chip have a shared memory, the second main control chip writes the current time of the second main control chip into the shared memory, and the second main control chip sends the current time of the second main control chip to the second auxiliary chip and writes it into the storage address of the shared memory; The second auxiliary chip obtains the current time of the second main control chip from the shared memory according to the storage address, and the second auxiliary chip updates the current time of the second auxiliary chip to the current time of the second main control chip.

17. The method according to claim 15, characterized in that The second node synchronizes the time of the second main control chip with the second auxiliary chip by interruption, including: In the case where the second main control chip and the second auxiliary chip do not have a shared memory, the second main control chip sends an interrupt request to the second auxiliary chip, and the second main control chip sends time information to the second auxiliary chip, where the time information carries the current time of the second main control chip; When receiving the interrupt request, the second auxiliary chip records a first current time of the second auxiliary chip; When receiving the time information, the second auxiliary chip records a second current time of the second auxiliary chip; The second auxiliary chip updates the current time of the second auxiliary chip based on the current time of the second main control chip, the first current time and the second current time.

18. A vehicle system, characterized in that: comprising a first node and a second node, wherein the first node and the second node are connected via a power line; The first node is configured to send a time message to the second node, where the time message carries the current time of the first node; When the first node is configured to send a time message to the second node, a pulse signal is sent to the second node through the power line; The second node is configured to update the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal.

19. The system according to claim 18, characterized in that The current time of the second node updated by the second node is obtained according to the time difference between the reception time of the pulse signal and the reception time of the time message, and the current time of the first node.

20. The system according to claim 19, characterized in that The time difference is obtained according to the timing duration when the second node starts timing when receiving the pulse signal and stops timing when receiving the time message.

21. The system according to claim 20, characterized in that The first node includes: a pulse generation module and a first main control chip, and the second node includes: a filtering protection module and a second main control chip; The first main control chip is configured to control the pulse generating module to generate a pulse signal, and the pulse signal is transmitted to the filtering protection module through the power line; The filtering protection module is configured to send a timing start signal to the second main control chip when the pulse signal is detected, so that the second main control chip starts timing.

22. The system according to claim 21, characterized in that The vehicle system further includes a power supply configured to supply power to the first node and the second node through the power line; The voltage fluctuation of the pulse signal is greater than a first threshold value, and the voltage fluctuation of the pulse signal is the difference between the maximum voltage and the minimum voltage of the pulse signal; An absolute value of a difference between a voltage of the pulse signal and a power supply voltage of the power supply is smaller than a second threshold.

23. The system according to claim 18, characterized in that The time message is sent by the first node to the second node after the first node receives the timing information and completes time synchronization according to the timing information.

24. The system according to claim 18, characterized in that The vehicle system further includes a third node, the first node and the second node are in a first network, the first node is a master node in the first network, the second node is a slave node in the first network, the first node and the third node are in a second network, the third node is a master node in the second network, the first node is a slave node in the second network, and the synchronization priority of the second network is greater than the synchronization priority of the first network; The time message is sent by the second node after the first node completes time synchronization through the third node.

25. The system according to any one of claims 18 to 24, characterized in that: The time message and the pulse signal are sent at the whole second.

26. The system according to claim 25, characterized in that The second node is further configured as: When the absolute value of the difference between the time difference between two consecutive received pulse signals and 1 second is greater than a third threshold, calibrating the clock crystal oscillator of the second node according to the difference between the time difference between the two consecutive received pulse signals and 1 second; and / or When the absolute value of the time difference between two consecutive received pulse signals and 1 second is less than or equal to the third threshold, it is determined that the clock crystal oscillator of the second node has completed calibration.

27. The system according to claim 26, characterized in that The time difference between the two consecutive received pulse signals is recorded by the second node through the clock crystal oscillator of the second node.

28. The system according to claim 27, characterized in that The calibration of the clock crystal oscillator of the second node includes: calibration of the crystal oscillator voltage or the frequency division coefficient of the clock crystal oscillator of the second node.

29. The system according to claim 20, characterized in that The second node is further configured to update the current time of the second node according to the current time of the first node, the reception time of the time message, and the reception time of the pulse signal when the absolute value of the difference between the time recorded by the clock crystal of the second node and the first time is less than the first absolute value, and the first time is the current time of the first node plus the timing duration; The first absolute value is an absolute value of a difference between a time recorded by a clock crystal of the second node and a second time, and the second time is a time updated by the second node through a network protocol; The second node is further configured to update the current time of the second node to the second time when an absolute value of a difference between a time recorded by a clock crystal of the second node and the first time is greater than or equal to the first absolute value.

30. The system according to claim 21 or 22, characterized in that The second node also includes: a second auxiliary chip; the current time updated by the second auxiliary chip is obtained by adding the timing duration to the current time of the first node, and the time synchronization between the second main control chip and the second auxiliary chip is achieved through shared memory or interruption.

31. A first node, characterized in that: The method comprises a processor, wherein the processor is connected to a memory, wherein the memory is used to store a computer program, wherein the computer program comprises program instructions, and wherein the processor is configured to call the program instructions to execute the method according to any one of claims 1 to 6.

32. A second node, characterized in that: The method comprises a processor connected to a memory, wherein the memory is used to store a computer program, wherein the computer program comprises program instructions, and the processor is configured to call the program instructions to execute the method according to any one of claims 7 to 17.

33. A vehicle, characterized in that: The system comprises any one of claims 18 to 30, or comprises the first node as described in claim 31 and the second node as described in claim 32.

34. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is caused to perform the method according to any one of claims 1 to 17.

35. A computer program product, characterized in that The computer program product comprises a computer program, and the computer program is operable to cause a computer to execute the method according to any one of claims 1 to 17.

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