A method, device, equipment, medium and product for synchronizing clocks between clusters

Abstract

The present invention discloses a method, device, equipment, medium and product for clock synchronization between clusters. The method is applied to a slave clock synchronization system in each cluster, and the slave clock synchronization system includes: a clock synchronization module and a calculation module; the clock synchronization module obtains the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the master clock server, and sends the timestamp to the calculation module; wherein the PTP message includes at least: a synchronization message, a follow-up message, a delay request message and a delay response message; the calculation module determines the corresponding master-slave clock deviation and transmission delay according to the received timestamp, and sends the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and the local slave clock to the clock synchronization module; the clock synchronization module generates the corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module to complete the slave clock correction. This scheme can realize accurate clock synchronization between computing clusters in a multi-computing cluster system.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a method, device, equipment, medium and product for inter-cluster clock synchronization. Background Art

[0002] In a multi-computing cluster system, the task status, calculation results, queue sorting, audio and video transmission and other tasks between computing clusters have placed high demands on the accuracy of time. However, due to software scheduling, software processing, task congestion queuing, large link delay jitter and other reasons, the clocks between computing clusters cannot be accurately synchronized, which affects the time accuracy of various computing tasks. Summary of the invention

[0003] The present invention provides a method, device, equipment, medium and product for clock synchronization between clusters to solve the problem of inability to accurately synchronize clocks between computing clusters due to software scheduling, software processing, task congestion queuing, large link delay jitter and other reasons in a multi-computing cluster system.

[0004] According to one aspect of the present invention, a method for clock synchronization between clusters is provided, which is applied to a slave clock synchronization system in each cluster, wherein the slave clock synchronization system comprises: a clock synchronization module and a calculation module; the method comprises:

[0005] Obtain the timestamp of the high-precision time synchronization protocol PTP message between the master clock server through the clock synchronization module, and send the timestamp to the calculation module; wherein the PTP message includes at least: synchronization message, follow-up message, delay request message and delay response message;

[0006] Determine the corresponding master-slave clock deviation and transmission delay according to the received timestamp through the calculation module, and send the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and local slave clock to the clock synchronization module;

[0007] The clock synchronization module generates a corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module to complete the slave clock correction.

[0008] According to another aspect of the present invention, an inter-cluster clock synchronization device is provided, which is applied to a slave clock synchronization system in each cluster, wherein the slave clock synchronization system comprises: a clock synchronization module and a calculation module; the device comprises:

[0009] A timestamp acquisition and sending module is used to obtain the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the clock synchronization module, and send the timestamp to the calculation module; wherein the PTP message includes at least: a synchronization message, a follow-up message, a delay request message, and a delay response message;

[0010] A clock synchronization signal determination module is used to determine the corresponding master-slave clock deviation and transmission delay according to the received timestamp through the calculation module, and send the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and local slave clock to the clock synchronization module;

[0011] The slave clock synchronization module is used to generate a corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module through the clock synchronization module to complete the slave clock correction.

[0012] According to another aspect of the present invention, there is provided an electronic device, the electronic device comprising:

[0013] at least one processor; and

[0014] a memory communicatively connected to the at least one processor; wherein,

[0015] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the inter-cluster clock synchronization method described in any embodiment of the present invention.

[0016] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the inter-cluster clock synchronization method described in any embodiment of the present invention when executed.

[0017] According to another aspect of the present invention, a computer program product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, the inter-cluster clock synchronization method according to any embodiment of the present invention is implemented.

[0018] The technical solution of the embodiment of the present invention is applied to the slave clock synchronization system in each cluster, and the slave clock synchronization system includes: a clock synchronization module and a calculation module; the clock synchronization module obtains the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the master clock server, and sends the timestamp to the calculation module; wherein the PTP message includes at least: synchronization message, follow-up message, delay request message and delay response message; the calculation module determines the corresponding master-slave clock deviation and transmission delay according to the received timestamp, and sends the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and local slave clock to the clock synchronization module; the clock synchronization module generates the corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module to complete the slave clock correction. This solution solves the problem that the clocks cannot be accurately synchronized between computing clusters due to software scheduling, software processing, task congestion queuing, large link delay jitter and other reasons in a multi-computing cluster system, and can ensure the needs of high-precision time synchronization for tasks such as task status, calculation results, queue sorting, audio and video transmission, etc. between computing clusters.

[0019] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 is a flowchart of a method for synchronizing clocks between clusters provided according to Embodiment 1 of the present invention;

[0022] Figure 2 is a structural diagram of an inter-cluster clock synchronization system provided according to Embodiment 2 of the present invention;

[0023] Figure 3 is a schematic diagram of a specific structure of a slave clock synchronization system provided according to Embodiment 2 of the present invention;

[0024] Figure 4 is a schematic diagram of the structure of an inter-cluster clock synchronization device provided according to Embodiment 3 of the present invention;

[0025] Figure 5 The present invention is a schematic diagram of the structure of an electronic device for implementing the inter-cluster clock synchronization method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0027] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0028] Embodiment 1

[0029] Figure 1 A flowchart of a method for clock synchronization between clusters is provided for the first embodiment of the present invention. This embodiment is applicable to the case of realizing precise clock synchronization between computing clusters in a multi-computing cluster system. The method can be executed by a clock synchronization device between clusters. The clock synchronization device between clusters can be implemented in the form of hardware and / or software. The clock synchronization device between clusters can be configured in an electronic device. Figure 1 As shown, a method for clock synchronization between clusters provided in the first embodiment is applied to a slave clock synchronization system in each cluster. The slave clock synchronization system includes: a clock synchronization module and a calculation module, and specifically includes the following steps:

[0030] S110, obtaining the timestamp of the high-precision time synchronization protocol PTP message between the master clock server through the clock synchronization module, and sending the timestamp to the calculation module; wherein the PTP message includes at least: synchronization message, follow-up message, delay request message and delay response message.

[0031] The master clock server may include a PTP (Precision Time Protocol) clock server deployed outside the computing cluster, which can provide an accurate time source. PTP messages include at least the following four messages for achieving PTP clock synchronization: Sync message, Follow message, Delay Request message and Delay Response message; among them, Sync message: sent by the master clock (Master), used to start the master-slave clock synchronization process, and the message does not contain the timestamp when the message is sent; Follow message (Follow_Up message): sent by the master clock immediately after the Sync message, containing the actual sending timestamp of the Sync message, so that the slave clock (Slave) can calculate the master-slave clock deviation and transmission delay; Delay Request message (Delay_Req message): sent by the slave clock, used to measure the transmission delay from the slave clock to the master clock, and the message contains the timestamp when the message is sent; Delay Response message (Delay_Resp message): sent by the master clock after receiving the Delay_Req message, containing the timestamp when the Delay_Req message is received, so that the slave clock can complete the calculation of the master-slave clock deviation and transmission delay. The timestamps may include: a first timestamp of the message sending time carried in the follow-up message, a second timestamp of the reception time of the synchronization message, a third timestamp of the sending time of the delay request message, and a fourth timestamp of the message reception time carried in the delay response message.

[0032] In an embodiment of the present invention, each computing cluster in a multi-computing cluster system is configured with a corresponding slave clock synchronization system for realizing master-slave clock synchronization between each cluster and a master clock server, wherein the slave clock synchronization system includes a clock synchronization module and a computing module, and the clock synchronization process of each cluster is as follows: the clock synchronization module can receive and send four types of PTP messages for realizing PTP clock synchronization, namely, synchronization messages, follow-up messages, delay request messages and delay response messages, and obtain timestamps corresponding to the above four types of PTP messages, and then send the obtained timestamps to the computing module.

[0033] S120, determining the corresponding master-slave clock deviation and transmission delay according to the received timestamp through the calculation module, and sending the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and local slave clock to the clock synchronization module.

[0034] Among them, the master-slave clock deviation (offset) may refer to the clock deviation between the master clock server and the local slave clock in the cluster. The transmission delay (delay) may refer to the delay between the master clock server and the local slave clock in the cluster on the communication link, and it is assumed that the two-way delay symmetry is satisfied. The clock synchronization signal (ptp clk) may refer to a signal determined according to the master-slave clock deviation, transmission delay and local slave clock for achieving master-slave clock synchronization, and the clock synchronization signal may include adjustment information of clock phase and clock frequency.

[0035] In an embodiment of the present invention, after receiving the timestamp of the four types of PTP messages sent by the clock synchronization module, the calculation module can determine the master-slave clock deviation and transmission delay between the local slave clock and the master clock server based on the above timestamp, and use the master-slave clock deviation, transmission delay and its own local slave clock to determine the corresponding clock synchronization signal.

[0036] S130 , generating a corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module through the clock synchronization module to complete the slave clock correction.

[0037] Pulse Per Second (PPS) refers to a pulse signal generated every second, and the pulse per second signal can reflect the clock synchronization situation.

[0038] In an embodiment of the present invention, after receiving the clock synchronization signal sent by the computing module, the clock synchronization module can generate a slave clock PPS that matches the master clock PPS of the master clock server based on the clock synchronization signal, thereby realizing the correction of the local slave clock, so that the local slave clock is infinitely close to the master clock, and after all clusters have completed their respective master-slave clock synchronization, the clock synchronization between clusters can be achieved.

[0039] The technical solution of the embodiment of the present invention is applied to the slave clock synchronization system in each cluster, and the slave clock synchronization system includes: a clock synchronization module and a calculation module; the clock synchronization module obtains the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the master clock server, and sends the timestamp to the calculation module; wherein the PTP message includes at least: synchronization message, follow-up message, delay request message and delay response message; the calculation module determines the corresponding master-slave clock deviation and transmission delay according to the received timestamp, and sends the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and local slave clock to the clock synchronization module; the clock synchronization module generates the corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module to complete the slave clock correction. This solution solves the problem that the clocks cannot be accurately synchronized between computing clusters due to software scheduling, software processing, task congestion queuing, large link delay jitter and other reasons in a multi-computing cluster system, and can ensure the needs of high-precision time synchronization for tasks such as task status, calculation results, queue sorting, audio and video transmission, etc. between computing clusters.

[0040] Further, based on the above-mentioned embodiment of the invention, the clock synchronization module includes an Ethernet MAC module configured on a microprocessor, and the Ethernet MAC module includes a PTP clock module and a 10G Ethernet interface; S110 specifically includes:

[0041] S1101, receiving a synchronization message and a follow-up message sent by a master clock server based on a 10G Ethernet interface through a PTP clock module, and recording a message sending time carried in the follow-up message as a first timestamp, and recording a receiving time of the received synchronization message as a second timestamp;

[0042] S1102, sending a delay request message to the master clock server based on the 10G Ethernet interface through the PTP clock module, and receiving a delay response message returned by the master clock server, recording the sending time of the delay request message as a third timestamp, and recording the message receiving time carried in the delay response message as a fourth timestamp;

[0043] S1103. Send the first timestamp, the second timestamp, the third timestamp and the fourth timestamp to the calculation module through the PTP clock module.

[0044] Each computing cluster is equipped with a microprocessor, which is equipped with an Ethernet MAC (TMAC) module. The TMAC module includes a PTP clock module and a 10G Ethernet interface. The PTP clock module can accurately timestamp the IEEE 1588 message when it passes through the TMAC module; the 10G Ethernet interface is used to transmit IEEE 1588 messages at high speed, reducing network delays and jitter, thereby helping to achieve more accurate clock synchronization.

[0045] In an embodiment of the present invention, the timestamps of four types of PTP messages can be obtained through the PTP clock module. Specifically, the time when the message carried in the follow-up message is sent can be recorded as the first timestamp, the time when the synchronization message is received can be recorded as the second timestamp, the time when the delay request message is sent can be recorded as the third timestamp, and the time when the message carried in the delay response message is received can be recorded as the fourth timestamp, and the first timestamp, the second timestamp, the third timestamp and the fourth timestamp can be sent to the calculation module for subsequent calculation of the master-slave clock deviation and transmission delay. In one embodiment, the master clock server can send synchronization messages to the slave clock synchronization system in each cluster according to the preset frequency to trigger the master-slave clock synchronization process of each cluster.

[0046] Further, based on the above-mentioned embodiment of the invention, the computing module includes an IEEE 1588 protocol stack and a clock servo unit; S120 specifically includes:

[0047] S1201, determining the corresponding master-slave clock deviation and transmission delay according to the received first timestamp, second timestamp, third timestamp and fourth timestamp through the IEEE 1588 protocol stack, and sending the obtained master-slave clock deviation and transmission delay to the clock servo unit;

[0048] S1202. Call the preset clock synchronization algorithm through the clock servo unit to determine the master-slave clock deviation, transmission delay and the clock frequency adjustment amount and clock phase adjustment amount corresponding to the local slave clock, generate the corresponding clock synchronization signal based on the clock frequency adjustment amount and the clock phase adjustment amount, and send the clock synchronization signal to the clock synchronization module.

[0049] The clock frequency adjustment amount and the clock phase adjustment amount are used to represent the frequency and phase adjustment conditions of the local slave clock respectively.

[0050] In an embodiment of the present invention, the calculation module may include an IEEE 1588 protocol stack and a clock servo unit, wherein the IEEE 1588 protocol stack is used to calculate the master-slave clock deviation and transmission delay according to the first timestamp, the second timestamp, the third timestamp and the fourth timestamp, and the clock servo unit is used to call a preset clock synchronization algorithm to determine the master-slave clock deviation, the transmission delay and the clock frequency adjustment amount and the clock phase adjustment amount corresponding to the local slave clock, and then generate a corresponding clock synchronization signal based on the clock frequency adjustment amount and the clock phase adjustment amount, and send the clock synchronization signal to the clock synchronization module.

[0051] Further, based on the above-mentioned embodiment of the invention, determining the corresponding master-slave clock deviation and transmission delay according to the received first timestamp, second timestamp, third timestamp and fourth timestamp includes:

[0052] determining a first time difference between the first timestamp and the second timestamp, and determining a second time difference between the third timestamp and the fourth timestamp;

[0053] A half of the difference between the first time difference and the second time difference is determined as the master-slave clock deviation, and a half of the sum of the first time difference and the second time difference is determined as the transmission delay.

[0054] In the embodiment of the present invention, based on the first timestamp t1, the second timestamp t2, the third timestamp t3 and the fourth timestamp t4, the following formula can be called to determine the master-slave clock deviation offset and the transmission delay delay:

[0055] offset=[(t2-t1)-(t4-t3)] / 2

[0056] delay=[(t2-t1)+(t4-t3)] / 2

[0057] Further, based on the above-mentioned embodiment of the invention, S130 specifically includes:

[0058] The PTP clock module receives the clock synchronization signal sent by the clock servo unit of the calculation module, and generates a slave clock second pulse that matches the master clock second pulse of the master clock server according to the clock synchronization signal to correct the slave clock.

[0059] In an embodiment of the present invention, the PTP clock module can generate a slave clock PPS that matches the master clock PPS of the master clock server based on the clock synchronization signal sent by the clock servo unit, thereby realizing the correction of the local slave clock, making the local slave clock infinitely close to the master clock, and after all clusters have completed their respective master-slave clock synchronization, clock synchronization between clusters can be achieved.

[0060] Furthermore, based on the above-mentioned embodiment of the invention, the clock synchronization module further includes: a phase-locked filtering module, which is used to perform phase locking, frequency tracking control and noise suppression processing on the clock synchronization signal.

[0061] In an embodiment of the present invention, the clock synchronization module may further include a phase-locked filtering module for performing phase locking, frequency tracking control, and noise suppression processing on the clock synchronization signal, thereby improving the stability and accuracy of the clock synchronization signal output.

[0062] Embodiment 2

[0063] Figure 2 This is a schematic diagram of the structure of an inter-cluster clock synchronization system provided by Embodiment 2 of the present invention. Figure 2As shown in the figure, the PTP clock server, as the master clock server, can provide an accurate time source and distribute synchronization messages to the slave clock synchronization systems in each cluster through the 10G 1588 switch at a preset frequency to trigger the master-slave clock synchronization process of each cluster. The microprocessor board in each cluster is equipped with a clock synchronization module and a computing module. Figure 3 Figure 1 is a schematic diagram of the specific structure of the slave clock synchronization system. Figure 3 As shown, when the IEEE 1588 message passes through the TMAC module, the PTP clock module can accurately timestamp the message and send the timestamps t1, t2, t3 and t4 corresponding to the four types of PTP messages, namely, the synchronization message, the follow-up message, the delay request message and the delay response message, to the IEEE 1588 protocol stack. The IEEE 1588 protocol stack is used to calculate the master-slave clock deviation offset and the transmission delay delay according to the timestamps t1, t2, t3 and t4, and feed back the calculation results to the clock servo unit. The clock servo unit is used to call the preset clock synchronization algorithm to determine the master-slave clock deviation, the transmission delay and the clock frequency adjustment amount and the clock phase adjustment amount corresponding to the local slave clock, and then generate the corresponding clock synchronization signal (ptp clk) based on the clock frequency adjustment amount and the clock phase adjustment amount, and send the clock synchronization signal to the phase-locked filter module. The phase-locked filter module is used to perform phase locking, frequency tracking control and noise suppression on the clock synchronization signal, and then send the processed clock synchronization signal to the PTP clock module. The PTP clock module generates a slave clock PPS that matches the master clock PPS of the master clock server based on the above clock synchronization signal, thereby realizing the correction of the local slave clock, making the local slave clock infinitely close to the master clock, and after all clusters have completed their respective master-slave clock synchronization, the clock synchronization between clusters can be achieved.

[0064] An inter-cluster clock synchronization system provided by an embodiment of the present invention can solve the problem of inability to accurately synchronize clocks between computing clusters due to software scheduling, software processing, task congestion queuing, large link delay jitter, etc. in a multi-computing cluster system; it can ensure the requirements of high-precision time synchronization for tasks such as task status, calculation results, queue sorting, audio and video transmission, etc. between computing clusters; it achieves consistency between the queue entry order and the actual order of cluster computing results, and ensures the accuracy of computing time.

[0065] Embodiment 3

[0066] Figure 4 This is a schematic diagram of the structure of an inter-cluster clock synchronization device provided by Embodiment 3 of the present invention. Figure 4 As shown, the device is applied to a slave clock synchronization system in each cluster, and the slave clock synchronization system includes: a clock synchronization module and a calculation module; the device includes:

[0067] The timestamp acquisition and sending module 21 is used to obtain the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the clock synchronization module, and send the timestamp to the calculation module; wherein the PTP message includes at least: a synchronization message, a follow-up message, a delay request message and a delay response message;

[0068] A clock synchronization signal determination module 22 is used to determine the corresponding master-slave clock deviation and transmission delay according to the received timestamp through the calculation module, and send the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and local slave clock to the clock synchronization module;

[0069] The slave clock synchronization module 23 is used to generate a corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module through the clock synchronization module to complete the slave clock correction.

[0070] The technical solution of the embodiment of the present invention is applied to the slave clock synchronization system in each cluster, and the slave clock synchronization system includes: a clock synchronization module and a calculation module; the clock synchronization module obtains the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the master clock server, and sends the timestamp to the calculation module; wherein the PTP message includes at least: synchronization message, follow-up message, delay request message and delay response message; the calculation module determines the corresponding master-slave clock deviation and transmission delay according to the received timestamp, and sends the clock synchronization signal determined according to the master-slave clock deviation, transmission delay and local slave clock to the clock synchronization module; the clock synchronization module generates the corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module to complete the slave clock correction. This solution solves the problem that the clocks cannot be accurately synchronized between computing clusters due to software scheduling, software processing, task congestion queuing, large link delay jitter and other reasons in a multi-computing cluster system, and can ensure the needs of high-precision time synchronization for tasks such as task status, calculation results, queue sorting, audio and video transmission, etc. between computing clusters.

[0071] Further, based on the above-mentioned embodiment of the invention, the clock synchronization module includes an Ethernet MAC module configured on a microprocessor, and the Ethernet MAC module includes a PTP clock module and a 10G Ethernet interface; the timestamp acquisition and sending module 21 includes:

[0072] A first timestamp and a second timestamp acquisition unit, configured to receive a synchronization message and a follow-up message sent by a master clock server based on a 10G Ethernet interface through a PTP clock module, and record the message sending time carried in the follow-up message as a first timestamp, and record the receiving time of the synchronization message as a second timestamp;

[0073] A third timestamp and a fourth timestamp acquisition unit, configured to send a delay request message to the master clock server based on the 10G Ethernet interface through the PTP clock module, and receive a delay response message returned by the master clock server, record the sending time of the delay request message as the third timestamp, and record the message reception time carried in the delay response message as the fourth timestamp;

[0074] The timestamp sending unit is used to send the first timestamp, the second timestamp, the third timestamp and the fourth timestamp to the calculation module through the PTP clock module.

[0075] Further, based on the above-mentioned embodiment of the invention, the calculation module includes an IEEE 1588 protocol stack and a clock servo unit; the clock synchronization signal determination module 22 includes:

[0076] A master-slave clock deviation and transmission delay determination unit, configured to determine the corresponding master-slave clock deviation and transmission delay according to the received first timestamp, second timestamp, third timestamp and fourth timestamp through the IEEE 1588 protocol stack, and send the obtained master-slave clock deviation and transmission delay to the clock servo unit;

[0077] The clock synchronization signal generating unit is used to call the preset clock synchronization algorithm through the clock servo unit to determine the master-slave clock deviation, transmission delay and the clock frequency adjustment amount and clock phase adjustment amount corresponding to the local slave clock, generate the corresponding clock synchronization signal based on the clock frequency adjustment amount and the clock phase adjustment amount, and send the clock synchronization signal to the clock synchronization module.

[0078] Further, based on the above-mentioned embodiment of the invention, determining the corresponding master-slave clock deviation and transmission delay according to the received first timestamp, second timestamp, third timestamp and fourth timestamp includes:

[0079] determining a first time difference between the first timestamp and the second timestamp, and determining a second time difference between the third timestamp and the fourth timestamp;

[0080] A half of the difference between the first time difference and the second time difference is determined as the master-slave clock deviation, and a half of the sum of the first time difference and the second time difference is determined as the transmission delay.

[0081] Further, based on the above-mentioned embodiment of the invention, the slave clock synchronization module 23 includes:

[0082] The slave clock correction unit is used to receive the clock synchronization signal sent by the clock servo unit of the calculation module through the PTP clock module, and generate a slave clock second pulse that matches the master clock second pulse of the master clock server according to the clock synchronization signal to correct the slave clock.

[0083] Furthermore, based on the above-mentioned embodiment of the invention, the clock synchronization module further includes: a phase-locked filtering module, which is used to perform phase locking, frequency tracking control and noise suppression processing on the clock synchronization signal.

[0084] The inter-cluster clock synchronization device provided in the embodiment of the present invention can execute the inter-cluster clock synchronization method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0085] Embodiment 5

[0086] Figure 5 A schematic diagram of the structure of an electronic device 30 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0087] like Figure 5 As shown, the electronic device 30 includes at least one processor 31, and a memory connected to the at least one processor 31, such as a read-only memory (ROM) 32, a random access memory (RAM) 33, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 31 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 32 or the computer program loaded from the storage unit 38 to the random access memory (RAM) 33. In the RAM 33, various programs and data required for the operation of the electronic device 30 can also be stored. The processor 31, the ROM 32, and the RAM 33 are connected to each other through a bus 34. An input / output (I / O) interface 35 is also connected to the bus 34.

[0088] A number of components in the electronic device 30 are connected to the I / O interface 35, including: an input unit 36, such as a keyboard, a mouse, etc.; an output unit 37, such as various types of displays, speakers, etc.; a storage unit 38, such as a disk, an optical disk, etc.; and a communication unit 39, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 39 allows the electronic device 30 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0089] The processor 31 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 31 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 31 executes the various methods and processes described above, such as a cluster clock synchronization method.

[0090] In some embodiments, the inter-cluster clock synchronization method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 38. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 30 via the ROM 32 and / or the communication unit 39. When the computer program is loaded into the RAM 33 and executed by the processor 31, one or more steps of the inter-cluster clock synchronization method described above may be performed. Alternatively, in other embodiments, the processor 31 may be configured to perform the inter-cluster clock synchronization method in any other appropriate manner (e.g., by means of firmware).

[0091] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0092] In some embodiments, the inter-cluster clock synchronization method may be implemented as a computer program, which is invisibly included in a computer program product. When the computer program is executed by a processor, the inter-cluster clock synchronization method of the present invention is implemented. The computer program product can be understood as a software product that mainly implements its solution through a computer program. The computer program for implementing the method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flowchart and / or block diagram are implemented. The computer program can be executed entirely on the machine, partially on the machine, partially on the machine as an independent software package and partially on a remote machine, or entirely on a remote machine or server.

[0093] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0094] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0095] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0096] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0097] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0098] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for synchronizing clocks between clusters, characterized in that: The slave clock synchronization system is applied to each cluster, and the slave clock synchronization system includes: a clock synchronization module and a calculation module; the method includes: The clock synchronization module obtains the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the master clock server, and sends the timestamp to the calculation module; wherein the PTP message includes at least: a synchronization message, a follow-up message, a delay request message, and a delay response message; Determine the corresponding master-slave clock deviation and transmission delay according to the received timestamp by the calculation module, and send the clock synchronization signal determined according to the master-slave clock deviation, the transmission delay and the local slave clock to the clock synchronization module; The clock synchronization module generates a corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module to complete the slave clock correction.

2. The method according to claim 1, characterized in that The clock synchronization module includes an Ethernet MAC module configured on a microprocessor, and the Ethernet MAC module includes a PTP clock module and a 10G Ethernet interface; The method of acquiring the timestamp of the high-precision time synchronization protocol PTP message between the clock synchronization module and the master clock server and sending the timestamp to the calculation module includes: Receiving the synchronization message and the follow-up message sent by the master clock server based on the 10G Ethernet interface through the PTP clock module, recording the message sending time carried in the follow-up message as a first timestamp, and recording the receiving time of the synchronization message as a second timestamp; Sending the delay request message to the master clock server based on the 10G Ethernet interface through the PTP clock module, and receiving the delay response message returned by the master clock server, recording the sending time of the delay request message as a third timestamp, and recording the message reception time carried in the delay response message as a fourth timestamp; The first timestamp, the second timestamp, the third timestamp and the fourth timestamp are sent to the calculation module through the PTP clock module.

3. The method according to claim 1, characterized in that The computing module includes an IEEE 1588 protocol stack and a clock servo unit; The method of determining the corresponding master-slave clock deviation and transmission delay according to the received timestamp by the calculation module, and sending a clock synchronization signal determined according to the master-slave clock deviation, the transmission delay and the local slave clock to the clock synchronization module includes: Determine the corresponding master-slave clock deviation and the transmission delay according to the received first timestamp, second timestamp, third timestamp and fourth timestamp through the IEEE 1588 protocol stack, and send the obtained master-slave clock deviation and the transmission delay to the clock servo unit; The clock servo unit calls a preset clock synchronization algorithm to determine the master-slave clock deviation, the transmission delay, and the clock frequency adjustment amount and clock phase adjustment amount corresponding to the local slave clock, generates the corresponding clock synchronization signal based on the clock frequency adjustment amount and the clock phase adjustment amount, and sends the clock synchronization signal to the clock synchronization module.

4. The method according to claim 3, characterized in that The determining the corresponding master-slave clock deviation and the transmission delay according to the received first timestamp, second timestamp, third timestamp and fourth timestamp includes: determining a first time difference between the first timestamp and the second timestamp, and determining a second time difference between the third timestamp and the fourth timestamp; A half of the difference between the first time difference and the second time difference is determined as the master-slave clock deviation, and a half of the sum of the first time difference and the second time difference is determined as the transmission delay.

5. The method according to claim 2, characterized in that: The step of generating a corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module by the clock synchronization module to complete the slave clock correction includes: The clock synchronization signal sent by the clock servo unit of the computing module is received through the PTP clock module, and the slave clock second pulse matching the master clock second pulse of the master clock server is generated according to the clock synchronization signal to correct the slave clock.

6. The method according to claim 5, characterized in that The clock synchronization module further includes: a phase-locked filtering module, which is used to perform phase locking, frequency tracking control and noise suppression processing on the clock synchronization signal.

7. An inter-cluster clock synchronization device, characterized in that: The slave clock synchronization system applied to each cluster includes: a clock synchronization module and a calculation module; the device includes: A timestamp acquisition and sending module, used to acquire the timestamp of the high-precision time synchronization protocol PTP message between the master clock server and the clock synchronization module, and send the timestamp to the calculation module; wherein the PTP message includes at least: a synchronization message, a follow-up message, a delay request message and a delay response message; A clock synchronization signal determination module, configured to determine the corresponding master-slave clock deviation and transmission delay according to the received timestamp through the calculation module, and send the clock synchronization signal determined according to the master-slave clock deviation, the transmission delay and the local slave clock to the clock synchronization module; The slave clock synchronization module is used to generate a corresponding slave clock second pulse according to the clock synchronization signal sent by the calculation module through the clock synchronization module to complete the slave clock correction.

8. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the inter-cluster clock synchronization method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the inter-cluster clock synchronization method according to any one of claims 1 to 6 when executed.

10. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the computer program implements the inter-cluster clock synchronization method according to any one of claims 1 to 6.

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