Pixel circuit, image sensor, camera module and electronic equipment

Abstract

The invention discloses a pixel circuit, an image sensor, a camera module and electronic equipment, and belongs to the technical field of electronics. The pixel circuit comprises at least one pixel unit; the first exposure control circuit is connected with each pixel unit; the second exposure control circuit is connected with each pixel unit; the area processing circuit is connected with each pixel unit and the second exposure control circuit, and the area processing circuit is used for enabling the second exposure control circuit; wherein the first exposure control circuit is used for controlling any pixel unit to read a photoelectric signal by taking a first exposure time length as a signal reading interval, the second exposure control circuit is used for controlling any pixel unit to read the photoelectric signal by taking a second exposure time length as a signal reading interval, and the first exposure time length is greater than the second exposure time length.

Description

Technical Field

[0001] The present application belongs to the field of electronic technology, and specifically relates to a pixel circuit, an image sensor, a camera module and an electronic device. Background Art

[0002] At present, the competition in the mobile phone camera industry is extremely fierce. Manufacturers are not only pursuing higher frame rate recording, but also constantly pursuing the improvement of photo and video quality. Among them, higher frame rates require the camera to have faster image processing and transmission capabilities, which will also bring higher power consumption. Improving image quality not only depends on the original imaging capabilities of the camera, but also requires a combination of color enhancement, temporal and spatial noise reduction, bad pixel correction, clarity improvement and other post-processing algorithms. Furthermore, the increased complexity of the post-processing algorithm will increase power consumption, and the increase in power consumption will affect camera performance, which will lead to a decrease in video quality. Based on this, the existing methods of achieving high frame rate recording include: reducing the amount of camera data, reducing the modules of the post-processing algorithm or reducing the processing accuracy of the algorithm, and interpolating frames.

[0003] However, with regard to the method of reducing the amount of data from the camera, that is, reducing the resolution, although lowering the resolution can increase the frame rate under the same data throughput conditions, it will also cause blurred video quality and loss of details, thereby reducing the video quality; with regard to the method of reducing the modules of the post-processing algorithm or reducing the processing accuracy of the algorithm, although the frame rate can be improved by reducing the amount of calculation, it will also affect the clarity of the video, the accuracy of color restoration, and the signal-to-noise ratio of the image quality, and also reduce the quality of the video; with regard to the interpolation method, although the frame rate can be improved by generating additional frames through interpolation, the generated additional frames do not truly record the changes in the scenery, but are just simulated picture transitions, and there is no substantial improvement in the authenticity and smoothness of the video. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a pixel circuit, an image sensor, a camera module and an electronic device that can achieve high frame rate recording while taking into account the requirements for video quality, power consumption and image processing capabilities.

[0005] In a first aspect, an embodiment of the present application provides a pixel circuit, comprising: at least one pixel unit; a first exposure control circuit connected to each pixel unit; a second exposure control circuit connected to each pixel unit; a regional processing circuit connected to each pixel unit and the second exposure control circuit, the regional processing circuit being used to enable the second exposure control circuit; wherein the first exposure control circuit is used to control any pixel unit to read out a photoelectric signal with a first exposure duration as a signal reading interval, and the second exposure control circuit is used to control any pixel unit to read out a photoelectric signal with a second exposure duration as a signal reading interval, and the first exposure duration is greater than the second exposure duration.

[0006] In a second aspect, an embodiment of the present application provides an image sensor, comprising: a plurality of pixel circuits according to the first aspect.

[0007] In a third aspect, an embodiment of the present application provides a camera module, comprising: a base; an image sensor of the second aspect, disposed on the base; a filter element, disposed on the image sensor; a lens, disposed on the filter element; a motor, connected to the lens; and a signal processing circuit, connected to the image sensor.

[0008] In a fourth aspect, an embodiment of the present application provides an electronic device, comprising: the camera module of the third aspect.

[0009] The pixel circuit provided by the embodiment of the present application includes at least one pixel unit, a first exposure control circuit, a second exposure control circuit and a regional processing circuit. Among them, the first exposure control circuit is connected to each pixel unit; the second exposure control circuit is connected to each pixel unit; the regional processing circuit is connected to each pixel unit and the second exposure control circuit. Further, the first exposure control circuit is used to control any pixel unit to read out the photoelectric signal with the first exposure time as the signal reading interval, the regional processing circuit is used to enable the second exposure control circuit, and the second exposure control circuit is used to control any pixel unit to read out the photoelectric signal with the second exposure time as the signal reading interval, and the first exposure time is greater than the second exposure time. Through the above-mentioned pixel circuit, two exposure control circuits are set to respectively control the pixel unit to read out the photoelectric signal according to different exposure times, so as to realize the partition control of the exposure time of any pixel unit and the corresponding image frame rate, so as to facilitate the control of the normal photosensitivity of some pixel units while controlling the high-speed operation of another part of the pixel units, so that the image sensor can simultaneously output image data with high and low frame rates. In this way, high frame rate recording can be achieved without adjusting the post-processing algorithm, and will not affect the video quality, power consumption and image processing capabilities. While achieving high frame rate recording, the requirements for video quality, power consumption and image processing capabilities are met. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A schematic diagram of the structure of a pixel circuit provided in some embodiments of the present application;

[0011] Figure 2 A schematic diagram of the structure of a pixel unit provided in some embodiments of the present application;

[0012] Figure 3 A schematic diagram of a pixel array provided for some embodiments of the present application;

[0013] Figure 4 A schematic diagram of a pixel array provided for some embodiments of the present application;

[0014] Figure 5A schematic diagram of a pixel array provided for some embodiments of the present application;

[0015] Figure 6 A schematic diagram of a pixel array provided for some embodiments of the present application;

[0016] Figure 7 A structural block diagram of an image sensor provided for some embodiments of the present application;

[0017] Figure 8 A schematic diagram of the structure of a camera module provided in some embodiments of the present application;

[0018] Fig. 9 A schematic diagram of the structure of a camera module provided in some embodiments of the present application;

[0019] Fig.10 A schematic diagram of the hardware structure of an electronic device provided for some embodiments of the present application.

[0020] Description of reference numerals:

[0021] 100-pixel circuit, 102-pixel unit, 104-first exposure control circuit, 106-second exposure control circuit, 108-region processing circuit, 110-image analysis circuit, 112-pixel path, 114-first transistor, 116-second transistor, 118-first power supply, 120-third transistor, 122-second power supply, 124-fourth transistor, 126-third power supply, 128-capacitor device, 130-fifth transistor, 132-photodiode, 134-sixth transistor, 200-image sensor, 300-camera module, 302-base, 304-filter element, 306-lens, 308-motor, 310-signal processing circuit, 312-analog-to-digital converter, 314-image processor. DETAILED DESCRIPTION

[0022] The embodiments of the present application will be described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limitations on the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0023] The features of the terms "first" and "second" in the specification and claims of this application may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, the meaning of "plurality" is two or more.

[0024] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0025] Combine the following Figure 1-Figure 10 The pixel circuit, image sensor, camera module and electronic device according to the embodiments of the present application are described in detail.

[0026] like Figure 1 As shown, an embodiment of the present application provides a pixel circuit 100 , wherein the pixel circuit 100 includes at least one pixel unit 102 , a first exposure control circuit 104 , a second exposure control circuit 106 , and a region processing circuit 108 .

[0027] The first exposure control circuit 104 is connected to each pixel unit 102 .

[0028] Furthermore, the first exposure control circuit 104 is a main exposure control system, and is responsible for the photosensitivity control of regular pixels. Specifically, the first exposure control circuit 104 is used to control any pixel unit 102 to read out the photoelectric signal with the first exposure duration as the signal reading interval.

[0029] Furthermore, the second exposure control circuit 106 is connected to each pixel unit 102 .

[0030] Furthermore, the second exposure control circuit 106 is a slave exposure control system, and the second exposure control circuit 106 is responsible for the photosensitivity control of the user ROI (Region Of Interest) pixels to meet the user's demand for the video frame rate. Specifically, the second exposure control circuit 106 is used to control any pixel unit 102 to read out the photoelectric signal with the second exposure duration as the signal reading interval.

[0031] Among them, the frame rate, namely FPS (Frames Per Second), is one of the important indicators of video quality, which indicates the number of image frames displayed per second. Each frame is equivalent to a picture, and the frame rate is the frequency of picture updates per second. If 5 photos are played in one second, the frame rate is 5fps. The frame rate directly affects the smoothness of the video. The higher the frame rate, the smoother the picture; when the frame rate is low, the picture will appear jumpy and incoherent. However, it should be noted that although a higher frame rate can provide a smoother picture, this does not mean higher video quality. The choice of frame rate depends on the content and scene of the shooting. There is no uniform standard, and the appropriate frame rate varies from situation to situation.

[0032] Furthermore, the first exposure duration is greater than the second exposure duration. In this way, the frame rate of the image data corresponding to the photoelectric signal read out with the second exposure duration as the signal reading interval is higher than the frame rate of the image data corresponding to the photoelectric signal read out with the first exposure duration as the signal reading interval. The image sensor corresponding to the pixel circuit 100 can output image data with high and low frame rates at the same time. Combined with the subsequent video synthesis processing technology, high frame rate recording can be achieved without affecting the video quality, power consumption and image processing capabilities, thereby improving the video quality in dynamic scenes.

[0033] Furthermore, the regional processing circuit 108 is connected to each pixel unit 102 and the second exposure control circuit 106 .

[0034] Furthermore, the area processing circuit 108 is used to enable the second exposure control circuit 106 to start the second exposure control circuit 106, so that the second exposure control circuit 106 controls the pixel unit 102 in the user ROI to read out the photoelectric signal with the second exposure time as the signal reading interval. In this way, during the video recording process, when the user ROI requires a high frame rate operation, the first exposure control circuit 104 can be used to control the pixel unit 102 outside the user ROI to operate at a normal frame rate, and the second exposure control circuit 106 can be used to control the pixel unit 102 in the user ROI to operate at a high frame rate, thereby realizing a slow motion function in the user ROI.

[0035] In actual application, technical personnel in this field can set the specific values ​​of the first exposure time and the second exposure time according to actual conditions. For example, the first exposure time is 33ms, and its corresponding frame rate is 30fps; the second exposure time is 11ms, and its corresponding frame rate is 90fps. No specific limitation is made here.

[0036] According to the pixel circuit 100 of the embodiment of the present application, it includes at least one pixel unit 102, a first exposure control circuit 104, a second exposure control circuit 106 and a regional processing circuit 108. The first exposure control circuit 104 is connected to each pixel unit 102; the second exposure control circuit 106 is connected to each pixel unit 102; the regional processing circuit 108 is connected to each pixel unit 102 and the second exposure control circuit 106. Further, the first exposure control circuit 104 is used to control any pixel unit 102 to read out the photoelectric signal with the first exposure time as the signal reading interval, the regional processing circuit 108 is used to enable the second exposure control circuit 106, and the second exposure control circuit 106 is used to control any pixel unit 102 to read out the photoelectric signal with the second exposure time as the signal reading interval, and the first exposure time is greater than the second exposure time. Through the above-mentioned pixel circuit 100, two exposure control circuits are set to control the pixel unit 102 to read out the photoelectric signal according to different exposure durations, thereby realizing the partition control of the exposure duration of any pixel unit 102 and the corresponding image frame rate, so as to facilitate the control of the high-speed operation of another part of the pixel units 102 while controlling the normal photosensitivity of some pixel units 102, so that the image sensor can output high and low frame rate image data at the same time. In this way, high frame rate recording can be realized without adjusting the post-processing algorithm, and the video quality, power consumption and image processing capability will not be affected. While realizing high frame rate recording, the requirements for video quality, power consumption and image processing capability are met.

[0037] According to some embodiments of the present application, optionally, Figure 1 As shown, the pixel circuit 100 further includes an image analysis circuit 110 .

[0038] The image analysis circuit 110 is connected to the region processing circuit 108 .

[0039] Further, the image analysis circuit 110 is used to determine at least one pixel unit 102 that reads out the photoelectric signal with the second exposure duration as the signal reading interval. Specifically, the image analysis circuit 110 is used to determine the user ROI that requires high frame rate operation, that is, the user region of interest and its pixel coordinate set, the pixel coordinate set including the position information of all pixel units 102 in the user region of interest, and send the pixel coordinate set to the region processing circuit 108. On this basis, the region processing circuit 108 is used to send an enable signal to the second exposure control circuit 106 according to the position information of all pixel units 102 in the region of interest, so that the second exposure control circuit 106 controls all pixel units 102 in the region of interest to read out the photoelectric signal with the second exposure duration as the signal reading interval.

[0040] The size of the user ROI is determined according to the output result of the image analysis circuit 110 .

[0041] In actual application, the image analysis circuit 110 can perform motion detection based on previously output image data, automatically analyze the user ROI with signs of motion in the shooting scene, and automatically calculate the pixel coordinate set of the user ROI, generate a control signal based on the pixel coordinate set, and transmit the control signal to the regional processing circuit 108, so that the regional processing circuit 108 drives the second exposure control circuit 106 to control the pixel unit 102 in the user ROI for exposure.

[0042] Furthermore, during the video recording process, the user can also manually select a region of interest, and the image analysis circuit 110 calculates a pixel coordinate set of the user ROI based on the selected user ROI, and generates a corresponding control signal to transmit to the region processing circuit 108 .

[0043] According to the pixel circuit 100 of the embodiment of the present application, it also includes an image analysis circuit 110, which is connected to the regional processing circuit 108. The image analysis circuit 110 is used to determine the user's area of ​​interest and send the position information of all pixel units 102 in the area of ​​interest to the regional processing circuit 108; the regional processing circuit 108 is used to send an enable signal to the second exposure control circuit 106 according to the position information of all pixel units 102 in the area of ​​interest, so that the second exposure control circuit 106 controls all pixel units 102 in the area of ​​interest to read out the photoelectric signal with the second exposure time as the signal reading interval. In this way, the user's area of ​​interest is determined by the image analysis circuit 110, which facilitates accurate high frame rate operation of the user's area of ​​interest, and improves the video quality in dynamic scenes.

[0044] According to some embodiments of the present application, optionally, Figure 1 As shown, each pixel unit 102 includes at least one pixel path 112 , a first transistor 114 , and a capacitor 128 .

[0045] Each pixel path 112 is connected to both the first exposure control circuit 104 and the second exposure control circuit 106 .

[0046] Furthermore, the first exposure control circuit 104 is used to control any pixel channel 112 to read out the photoelectric signal with the first exposure time as the signal reading interval, and the second exposure control circuit 106 is used to control any pixel channel 112 to read out the photoelectric signal with the second exposure time as the signal reading interval.

[0047] Furthermore, a first terminal of the first transistor 114 is connected to each pixel path 112 , and a control terminal of the first transistor 114 is connected to both the first exposure control circuit 104 and the second exposure control circuit 106 .

[0048] Furthermore, the first transistor 114 is used to control whether the electrons in the pixel path 112 flow into the capacitor 128 .

[0049] Further, a first terminal of the capacitor 128 is connected to the second terminal of the first transistor 114 , a second terminal of the capacitor 128 is grounded, and a third terminal of the capacitor 128 is connected to the regional processing circuit 108 .

[0050] Furthermore, the capacitor device 128 may be a floating diffusion, which is equivalent to a capacitor element. The capacitor device 128 is responsible for carrying the charges transmitted from the pixel path 112 .

[0051] During the video recording process, the first exposure control circuit 104 and the second exposure control circuit 106 jointly control different pixel paths 112, so that according to the user's high frame rate video recording requirements, the pixel paths 112 in the user ROI in the shooting scene are controlled to read out the photoelectric signal at the first frame rate, and the pixel paths 112 in other areas of the shooting scene are controlled to read out the photoelectric signal at the second frame rate. The first frame rate is greater than the second frame rate, so as to realize the slow motion function in the user ROI.

[0052] According to the pixel circuit 100 of the embodiment of the present application, each pixel unit 102 includes at least one pixel channel 112, a first transistor 114 and a capacitor 128. The first end of the first transistor 114 is connected to each pixel channel 112, and the control end of the first transistor 114 is connected to both the first exposure control circuit 104 and the second exposure control circuit 106; the first end of the capacitor 128 is connected to the second end of the first transistor 114, the second end of the capacitor 128 is grounded, and the third end of the capacitor 128 is connected to the regional processing circuit 108. Further, the first exposure control circuit 104 is used to control any one of the pixel channels 112 to read out the photoelectric signal with the first exposure time as the signal reading interval, and the second exposure control circuit 106 is used to control any one of the pixel channels 112 to read out the photoelectric signal with the second exposure time as the signal reading interval. In this way, the first exposure control circuit 104 and the second exposure control circuit 106 jointly control the exposure duration of the pixel path 112 in each pixel unit 102, so that each pixel path 112 can read out the photoelectric signal with long exposure or short exposure, so that the pixel circuit 100 can output the image data of the corresponding position of each pixel path 112 with a high frame rate or a low frame rate, thereby realizing the partitioned control of the image data output frame rate, thereby realizing the high frame rate recording requirement for the user's area of ​​interest.

[0053] According to some embodiments of the present application, optionally, Figure 1 As shown, each pixel unit 102 further includes a second transistor 116 , a third transistor 120 and a fourth transistor 124 .

[0054] Among them, the first end of the second transistor 116 is connected to the first power supply 118, the second end of the second transistor 116 is connected to the second end of the first transistor 114 and the first end of the capacitor 128, and the control end of the second transistor 116 is connected to both the first exposure control circuit 104 and the second exposure control circuit 106.

[0055] Furthermore, the second transistor 116 serves as a restart transistor, responsible for clearing the residual photogenerated electrons in the pixel path 112 and the capacitor 128 .

[0056] Further, the first end of the third transistor 120 is connected to the second power supply 122 , the control end of the third transistor 120 is connected to both the second end of the first transistor 114 and the first end of the capacitor 128 , and the second end of the third transistor 120 is connected to the first end of the fourth transistor 124 .

[0057] Furthermore, the third transistor 120 acts as a source follower and is responsible for transferring the charge in the capacitor 128 to the second terminal of the fourth transistor 124 .

[0058] Furthermore, the second end of the fourth transistor 124 is connected to the first end of the third power supply 126, the control end of the fourth transistor 124 is connected to both the first exposure control circuit 104 and the second exposure control circuit 106, the second end of the fourth transistor 124 is used to output a photoelectric signal to the outside, and the second end of the third power supply 126 is grounded.

[0059] Furthermore, the fourth transistor 124 serves as a row selector and is responsible for controlling the photoelectric signal output of the pixel path 112. When the fourth transistor 124 is turned on, the charge in the capacitor 128 is transmitted through the third transistor 120, thereby realizing the readout of the photoelectric signal.

[0060] During the video recording process, the first exposure control circuit 104 and the second exposure control circuit 106 jointly control the on / off of the pixel path 112, the first transistor 114, the second transistor 116, the third transistor 120, and the fourth transistor 124, so as to control the pixel path 112 in the user ROI in the shooting scene to read out the photoelectric signal at the first frame rate according to the user's high frame rate video recording requirements, and control the pixel path 112 in other areas of the shooting scene to read out the photoelectric signal at the second frame rate. The first frame rate is greater than the second frame rate, so as to realize the slow motion function in the user ROI.

[0061] According to the pixel circuit 100 of the embodiment of the present application, each pixel unit 102 further includes a second transistor 116, a third transistor 120 and a fourth transistor 124. The first end of the second transistor 116 is connected to the first power source 118, the second end of the second transistor 116 is connected to the second end of the first transistor 114 and the first end of the capacitor 128, and the control end of the second transistor 116 is connected to the first exposure control circuit 104 and the second exposure control circuit 106; the first end of the third transistor 120 is connected to the second power source 122, and the control end of the third transistor 120 is connected to the second end of the first transistor 114 and the first end of the capacitor 128; the first end of the fourth transistor 124 is connected to the second end of the third transistor 120, the second end of the fourth transistor 124 is connected to the first end of the third power source 126, the control end of the fourth transistor 124 is connected to the first exposure control circuit 104 and the second exposure control circuit 106, the second end of the fourth transistor 124 is used to output a photoelectric signal, and the second end of the third power source 126 is grounded. In this way, the first exposure control circuit 104 and the second exposure control circuit 106 jointly control the on and off of the pixel path 112, the first transistor 114, the second transistor 116, the third transistor 120 and the fourth transistor 124 in each pixel unit 102, so that the exposure time of each pixel unit 102 can be controlled, so that each pixel unit 102 can read out the photoelectric signal with long exposure or short exposure, so that the pixel circuit 100 can output the image data of the corresponding position of each pixel unit 102 with a high frame rate or a low frame rate, thereby realizing the partition control of the image data output frame rate, thereby realizing the high frame rate recording requirement for the user's area of ​​interest.

[0062] According to some embodiments of the present application, optionally, when the pixel circuit 100 is used to control a single pixel, the pixel circuit 100 includes one pixel unit 102 , and the pixel unit 102 includes one pixel path 112 .

[0063] The pixel path 112 is connected to the first exposure control circuit 104 , the second exposure control circuit 106 and the first end of the first transistor 114 .

[0064] Furthermore, a pixel circuit 100 is used to control the exposure and signal readout of a single pixel such as an R pixel, a Gr pixel, a Gb pixel or a B pixel. Figure 3 As shown, for an image sensor including multiple single pixels, the exposure of the single pixel is controlled by the pixel circuit 100 corresponding to each single pixel, so that each single pixel can read out the photoelectric signal according to the long exposure time or the short exposure time, so that each single pixel can output image data according to the low frame rate or the high frame rate, thereby realizing the slow motion function of the user's area of ​​interest during the shooting process.

[0065] According to the pixel circuit 100 of the embodiment of the present application, when the pixel circuit 100 is used to control a single pixel, the pixel circuit 100 includes a pixel unit 102, the pixel unit 102 includes a pixel path 112, and the pixel path 112 is connected to the first exposure control circuit 104, the second exposure control circuit 106, and the first end of the first transistor 114. In this way, the exposure time of the pixel path 112 is jointly controlled by the first exposure control circuit 104 and the second exposure control circuit 106, giving each single pixel two photoelectric signal readout modes, so that each single pixel can read out the photoelectric signal according to the long exposure time or the short exposure time, so that each single pixel can output image data at a low frame rate or a high frame rate, and realizes the partition control of the image data output frame rate with a single pixel as the minimum unit, so as to facilitate the high frame rate recording requirements of the user's area of ​​interest through multiple single pixels.

[0066] According to some embodiments of the present application, optionally, when the pixel circuit 100 is used to control M×M pixels, the pixel circuit 100 includes M pixel units 102 .

[0067] Each pixel unit 102 includes M pixel paths 112 , that is, the pixel circuit 100 includes M×M pixel paths 112 .

[0068] Furthermore, each pixel channel 112 is connected to the first exposure control circuit 104 , the second exposure control circuit 106 , and the first end of the first transistor 114 .

[0069] Furthermore, in the case where the pixel circuit 100 is used to control the all-in-one pixel obtained by merging M×M pixels, the all-in-one pixel of the M×M pixel merging mode is a pixel, and one pixel circuit 100 is used to control the exposure and signal readout of the M×M pixels in one all-in-one pixel. Among them, one pixel in the all-in-one pixel corresponds to one pixel channel 112, and the first exposure control circuit 104 and the second exposure control circuit 106 jointly control the exposure time of each pixel channel 112, so that each pixel in the all-in-one pixel can read out the photoelectric signal according to the long exposure time or the short exposure time, so that each pixel in the all-in-one pixel can output the image data according to the low frame rate or the high frame rate, so as to realize the high frame rate recording demand of the user's area of ​​interest through the all-in-one pixel.

[0070] Wherein, M is a positive integer greater than 1.

[0071] In actual application, M can be 2, that is, one pixel circuit 100 can be used to control the exposure and signal readout of a four-in-one pixel. Figure 4As shown, a pixel circuit 100 is used to control the exposure and signal readout of four pixels in a four-in-one pixel, such as four R pixels, four Gr pixels, four Gb pixels or four B pixels.

[0072] Furthermore, M can also be 3, that is, one pixel circuit 100 can be used to control the exposure and signal readout of a nine-in-one pixel. Figure 5 As shown, a pixel circuit 100 is used to control exposure and signal readout of 9 pixels in a 9-in-1 pixel, such as 9 R pixels, 9 Gr pixels, 9 Gb pixels or 9 B pixels.

[0073] Furthermore, M can also be 4, that is, one pixel circuit 100 can be used to control a sixteen-in-one pixel. Figure 6 As shown, a pixel circuit 100 is used to control the exposure and signal readout of 16 pixels in a 16-in-1 pixel, such as 16 R pixels, 16 Gr pixels, 16 Gb pixels or 16 B pixels.

[0074] In actual application, the specific value of M can be selected by those skilled in the art according to actual conditions, and no specific limitation is made here.

[0075] According to the pixel circuit 100 of the embodiment of the present application, when the pixel circuit 100 is used to control M×M pixels, the pixel circuit 100 includes M pixel units 102, each pixel unit 102 includes M pixel paths 112, and each pixel path 112 is connected to the first exposure control circuit 104, the second exposure control circuit 106, and the first end of the first transistor 114; wherein M is a positive integer greater than 1. In this way, by jointly controlling the exposure time of each pixel path 112 by the first exposure control circuit 104 and the second exposure control circuit 106, each pixel in the multi-in-one pixel can be controlled to read out the photoelectric signal according to the long exposure time or the short exposure time, so that each pixel in the multi-in-one pixel outputs image data according to the low frame rate or the high frame rate, realizing the individual control of the image data output frame rate of each pixel in the multi-in-one pixel, and facilitating the high frame rate recording requirement of the user's area of ​​interest through the multi-in-one pixel.

[0076] According to some embodiments of the present application, optionally, Figure 1 As shown, each pixel channel 112 includes a fifth transistor 130 and a photodiode 132 .

[0077] The first end of the fifth transistor 130 is connected to the first end of the first transistor 114 , the control end of the fifth transistor 130 is connected to both the first exposure control circuit 104 and the second exposure control circuit 106 , and the second end of the fifth transistor 130 is connected to the cathode of the photodiode 132 .

[0078] Furthermore, the anode of the photodiode 132 is grounded.

[0079] Furthermore, the photodiode 132 is used for sensing light. The photodiode 132 is controlled by the fifth transistor 130 . The fifth transistor 130 is responsible for switching the photodiode 132 to control the light sensing time of the photodiode 132 .

[0080] In actual application, when the pixel unit 102 includes a pixel path 112, the pixel unit 102 is a PPD (Pinned Photodiode Pixel) structure. The structural schematic diagram of the pixel unit 102 can be specifically as follows: Figure 2 As shown. Figure 2 As shown, the pixel unit 102 includes a photodiode 132, a fifth transistor 130, a capacitor 128, a second transistor 116, a third transistor 120, and a fourth transistor 124. The anode of the photodiode 132 is grounded, the cathode of the photodiode 132 is connected to the first end of the fifth transistor 130, the second end of the fifth transistor 130 is connected to the first end of the capacitor 128, the second end of the second transistor 116, and the control end of the third transistor 120, the first end of the second transistor 116 is connected to the first power supply 118, the second end of the capacitor 128 is grounded, the first end of the third transistor 120 is connected to the second power supply 122, the second end of the third transistor 120 is connected to the first end of the fourth transistor 124, the second end of the fourth transistor 124 is connected to the first end of the third power supply 126, and the second end of the third power supply 126 is grounded.

[0081] Among them, the second transistor 116 is used as a reset transistor, the fifth transistor 130 is used as a floating switch, the fourth transistor 124 is used as a row selector, and the third transistor 120 is used as a signal amplifier. It can be understood that the PPD structure allows the introduction of a CDS (Correlated Double Sampling) circuit, thereby eliminating the KTC noise introduced by the reset, i.e., the reset noise, and the 1 / f noise and offset noise introduced by the MOS (Metal-Oxide-Semiconductor) tube. The offset noise is bias noise, and the 1 / f noise is also called flicker noise or low-frequency noise. Among them, in different working states, the working modes of each component in the pixel unit 102 are as follows:

[0082] (1) Exposure: The second transistor 116 and the fifth transistor 130 are turned on simultaneously to clear the photodiode 132, and then the two are disconnected to start exposure. The "electron-hole pairs" generated by light irradiation will be separated due to the existence of the electric field of the photodiode 132, so that the electrons move to the N region and the holes move to the P region.

[0083] (2) Reset: At the end of exposure, the second transistor 116 is activated to reset the capacitor 128 to a high level.

[0084] (3) Reset level reading: After the reset is completed, the reset level of the capacitor device 128 is read as A, which includes the offset noise, 1 / f noise of the MOS tube and the KTC noise introduced by the reset, and the read reset point level signal is stored in the first capacitor.

[0085] (4) Charge transfer: Activate the fifth transistor 130 to completely transfer the charge from the photodiode 132 to the capacitor device 128 for readout.

[0086] (5) Signal level readout: The voltage signal B of the capacitor device 128 is read out to the second capacitor. The voltage signal B includes the signal generated by the photoelectric conversion and the offset noise, 1 / f noise, and KTC noise introduced by the operational amplifier.

[0087] (6) Signal output: The signals stored in the two capacitors are subtracted, i.e., BA. If a CDS circuit is used, the main noise in the pixel can be eliminated, and the obtained signal is a pure photoelectric signal. The photoelectric signal is analog-amplified by the third transistor 120 and output as V out , and then sampled by ADC (Analog-to-Digital Converter) to achieve digital signal output.

[0088] On this basis, the first exposure control circuit 104 and the second exposure control circuit 106 jointly control the on and off of the first transistor 114, the second transistor 116, the third transistor 120, the fourth transistor 124 and the fifth transistor 130, so as to control the pixel path 112 in the user ROI in the shooting scene to read out the photoelectric signal at the first frame rate according to the user's high frame rate recording requirements, and control the pixel path 112 in other areas of the shooting scene to read out the photoelectric signal at the second frame rate, and the first frame rate is greater than the second frame rate, so as to realize the slow motion function in the user ROI.

[0089] For example, a pixel circuit 100 controlling a four-in-one pixel is taken as an example, that is, a pixel circuit 100 includes four photodiodes 132. Figure 1As shown, the four photodiodes 132 in the pixel circuit 100 are named PD1, PD2, PD3 and PD4, the four fifth transistors 130 in the pixel circuit 100 are named TG1, TG2, TG3 and TG4, the two first transistors 114 in the pixel circuit 100 are named TG5 and TG6, the two second transistors 116 in the pixel circuit 100 are named RST1 and RST2, the two capacitors 128 in the pixel circuit 100 are named FD1 and FD2, the two third transistors 120 in the pixel circuit 100 are named SF1 and SF2, and the two fourth transistors 124 in the pixel circuit 100 are named Rsel1 and Rsel2. If the first frame rate is 90fps, that is, the second exposure time is 11ms, and the second frame rate is 30fps, that is, the first exposure time is 33ms, after analysis by the image analysis circuit 110, it is determined that the user ROI corresponds to PD2, and other image areas correspond to PD1, PD3 and PD4. At this time, through the joint control of the first exposure control circuit 104 and the second exposure control circuit 106, PD2 is controlled to sense light and read out photoelectric signals at the first frame rate 90fps, and PD1, PD3 and PD4 are controlled to sense light and read out photoelectric signals at the second frequency 30fps.

[0090] Specifically, the first exposure control circuit 104 is connected to lines K, L, N, O, P, Q, R, S, T, and U. At 0 ms, the first exposure control circuit 104 pulls up the lines K, L, O, and P connected thereto to open TG5, RST1, TG2, and TG1, thereby clearing the residual electrons in PD1, PD2, and FD1. At the same time, the first exposure control circuit 104 pulls up the lines Q, R, T, and U connected thereto to open TG6, RST2, TG4, and TG3, thereby clearing the residual electrons in PD3, PD4, and FD2. After clearing, all transistors are disconnected, and at this time, PD1, PD2, PD3, and PD4 begin to be in a controlled light-sensitive state.

[0091] Further, the second exposure control circuit 106 is connected to lines A, B, C, D, E, F, G, H, I and J. At 11 ms, the second exposure control circuit 106 pulls up the lines D, A, and C connected thereto to open TG2, TG5 and Rsel1, so that the photoelectric signal of PD2 is read out for the first time at 11 ms. After the first photoelectric signal is read out, the second exposure control circuit 106 immediately pulls up the lines D, A, and B connected thereto to open TG2, TG5 and RST1, so that the residual electrons in PD2 and FD1 are cleared, and at this time, PD2 is in a controlled exposure state. Further, at 22 ms, the second exposure control circuit 106 pulls up the lines D, A, and C connected thereto again to open TG2, TG5 and Rsel1, so that the photoelectric signal of PD2 is read out for the second time at 22 ms. The above actions are repeated. At 33 ms, the first exposure control circuit 104 controls PD1, PD3 and PD4 to read out the photoelectric signal for the first time, and the second exposure control circuit 106 controls PD2 to read out the photoelectric signal for the third time.

[0092] On this basis, if Figure 1 As shown, the photoelectric signal read out by PD2 at 90fps and the photoelectric signals read out by PD1, PD3 and PD4 at 30fps are all converted into digital signals by ADC, and then synthesized by ISP (Image Signal Processing) and output by MIPI (Mobile Industry Processor Interface) to obtain a special effects video with a local slow motion effect, so as to achieve a high frame rate dynamic effect in the local area without affecting the overall frame rate.

[0093] According to the pixel circuit 100 of the embodiment of the present application, each pixel path 112 includes a fifth transistor 130 and a photodiode 132. The first end of the fifth transistor 130 is connected to the first end of the first transistor 114, and the control end of the fifth transistor 130 is connected to both the first exposure control circuit 104 and the second exposure control circuit 106; the anode of the photodiode 132 is grounded, and the cathode of the photodiode 132 is connected to the second end of the fifth transistor 130. In this way, by jointly controlling the on and off of the fifth transistor 130, the first transistor 114, the second transistor 116, the third transistor 120 and the fourth transistor 124 in each pixel unit 102 through the first exposure control circuit 104 and the second exposure control circuit 106, the exposure time of any photodiode 132 can be controlled, so that each photodiode 132 can read out the photoelectric signal with long exposure or short exposure, so that the pixel circuit 100 can output the image data of the corresponding position of each photodiode 132 at a high frame rate or a low frame rate, and realize the partition control of the image data output frame rate with a single photodiode 132 as the smallest unit, so as to realize the frame rate control of any image area, thereby realizing the high frame rate recording requirement of the user's area of ​​interest.

[0094] According to some embodiments of the present application, optionally, the regional processing circuit 108 is further configured to control the capacitance value of the capacitor device 128 to be a first value when the pixel unit 102 reads out the photoelectric signal with the second exposure duration as the signal reading interval.

[0095] Furthermore, the regional processing circuit 108 is further configured to control the capacitance value of the capacitor 128 to be a second value when the pixel unit 102 reads out the photoelectric signal with the first exposure duration as the signal reading interval.

[0096] The first value is smaller than the second value, and the ratio of the first value to the second value is equal to the ratio of the second exposure time to the first exposure time.

[0097] That is, when the pixel unit 102 reads out the photoelectric signal with the second exposure duration as the signal reading interval, the regional processing circuit 108 controls the capacitor device 128 to maintain a small capacitance value, and when the pixel unit 102 reads out the photoelectric signal with the first exposure duration as the signal reading interval, the regional processing circuit 108 controls the capacitor device 128 to maintain a large capacitance value.

[0098] It can be understood that when controlling different pixel units 102 to read out photoelectric signals according to different exposure times, the exposure values ​​of the photoelectric signals read out by different pixel units 102 are different. In order to align the output brightness of different pixel units 102, the regional processing circuit 108 is required to dynamically adjust the capacitance value of the capacitor device 128 accordingly when different pixel units 102 read out photoelectric signals.

[0099] Exemplarily, following the above example, through the joint control of the first exposure control circuit 104 and the second exposure control circuit 106, PD2 is controlled to sense light and read out the photoelectric signal according to the first frame rate 90fps, and PD1, PD3 and PD4 are controlled to sense light and read out the photoelectric signal according to the second frequency 30fps. When PD1, PD3 and PD4 read out the photoelectric signal, the exposure time of PD1, PD3 and PD4 is 33ms, and the output signals of PD1, PD3 and PD4 are all X×33=33X, where X is the exposure value of 1ms for each pixel; when PD2 reads out the photoelectric signal, the exposure time of PD2 is 11ms, and the output signal of PD2 is X×11=11X. At this time, when PD2 reads out the photoelectric signal, the regional processing circuit 108 needs to adjust the capacitance value of FD1 to 1 / 3 of the original value to ensure that the output brightness of PD1, PD2, PD3 and PD4 is consistent.

[0100] According to the pixel circuit 100 of the embodiment of the present application, the regional processing circuit 108 is also used to control the capacitance value of the capacitor device 128 to be a first value when the pixel unit 102 reads out the photoelectric signal with the second exposure time as the signal reading interval; and to control the capacitance value of the capacitor device 128 to be a second value when the pixel unit 102 reads out the photoelectric signal with the first exposure time as the signal reading interval; wherein the ratio of the first value to the second value is equal to the ratio of the second exposure time to the first exposure time. In this way, the output brightness of each region of each frame image is guaranteed to be consistent, and the video quality is guaranteed.

[0101] According to some embodiments of the present application, optionally, Figure 1 As shown, when the number of pixel units 102 is greater than 1, the pixel circuit 100 further includes a sixth transistor 134 .

[0102] The sixth transistor 134 is connected between the first transistors 114 in different pixel units 102 .

[0103] Specifically, Figure 1 As shown, the first end of the sixth transistor 134 is connected to the second end of the first transistor 114 in one pixel unit 102, and the second end of the sixth transistor 134 is connected to the first end of the first transistor 114 in another pixel unit 102. In this way, by controlling the sixth transistor 134 to turn on, the electrons in the photodiodes 132 in different pixel units 102 can be transferred to the same capacitor 128.

[0104] According to the pixel circuit 100 of the embodiment of the present application, when the number of pixel units 102 is greater than 1, the pixel circuit 100 further includes a sixth transistor 134. The sixth transistor 134 is connected between the first transistors 114 in different pixel units 102. In this way, it is convenient to realize the combined transfer of electrons of the photodiodes 132 in different pixel units 102 through the sixth transistor 134.

[0105] According to some embodiments of the present application, optionally, Figure 7 As shown, the embodiment of the present application further provides an image sensor 200. The image sensor 200 includes at least one pixel circuit 100 in any of the above embodiments. The image sensor 200 provided in the embodiment of the present application includes the pixel circuit 100 in any of the above embodiments, and can achieve the same technical effect. To avoid repetition, it will not be described here.

[0106] In actual application, the pixel array of the image sensor 200 can be specifically as follows: Figure 3 As shown, the image sensor 200 includes at least two single pixels. In this case, one pixel circuit 100 is used to control the exposure and signal readout of one pixel, such as an R pixel, a Gr pixel, a Gb pixel, or a B pixel, and one pixel circuit 100 includes one photodiode. The upper limit of the single pixel included in the image sensor 200 is related to the size of the image sensor 200 and the size of each single pixel, and is not specifically limited here.

[0107] Furthermore, the pixel array of the image sensor 200 may be specifically Figure 4 As shown, the image sensor 200 includes at least one four-in-one pixel. In this case, one pixel circuit 100 is used to control the exposure and signal readout of four pixels in each four-in-one pixel, such as four R pixels, four Gr pixels, four Gb pixels or four B pixels, and one pixel circuit 100 includes four photodiodes. The upper limit of the four-in-one pixel included in the image sensor 200 is related to the size of the image sensor 200 and the size of each four-in-one pixel, and is not specifically limited here.

[0108] Furthermore, if Figure 5 As shown, the image sensor 200 may further include at least one nine-in-one pixel, and one pixel circuit 100 is used to control the exposure and signal readout of nine pixels in each nine-in-one pixel, such as nine R pixels, nine Gr pixels, nine Gb pixels, or nine B pixels, and one pixel circuit 100 includes nine photodiodes. The upper limit of the nine-in-one pixel included in the image sensor 200 is related to the size of the image sensor 200 and the size of each nine-in-one pixel, and is not specifically limited here.

[0109] Furthermore, if Figure 6 As shown, the image sensor 200 may include at least one 16-in-1 pixel, and one pixel circuit 100 is used to control the exposure and signal readout of 16 pixels in each 16-in-1 pixel, such as 16 R pixels, 16 Gr pixels, 16 Gb pixels, or 16 B pixels, and one pixel circuit 100 includes 16 photodiodes. The upper limit of the 16-in-1 pixel included in the image sensor 200 is related to the size of the image sensor 200 and the size of each 16-in-1 pixel, and is not specifically limited here.

[0110] In actual application, those skilled in the art may select a specific pixel array of the image sensor 200 according to actual conditions, and no specific limitation is made herein.

[0111] According to some embodiments of the present application, optionally, Figure 8 As shown, the embodiment of the present application further provides a camera module 300. The camera module 300 includes a base 302, the image sensor 200 in the above embodiment, a filter element 304, a lens 306, a motor 308, and a signal processing circuit 310. The camera module 300 provided in the embodiment of the present application includes the image sensor 200 in the above embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0112] The image sensor 200 is disposed on a base 302 .

[0113] Furthermore, the image sensor 200 is the core hardware of the camera module 300, and is a key factor in determining the imaging quality of the camera module 300. The main parameters of the image sensor 200 include sensor size, number of effective pixels, and size of a single pixel. The image sensor 200 may be a sensor using CMOS (Complementary Metal Oxide Semiconductor) technology. The manufacturing process of a CMOS sensor is similar to that of a computer chip, and mainly uses semiconductor materials such as silicon and germanium to form a chip with an N-type and P-type semiconductor structure.

[0114] Furthermore, the filter element 304 is disposed on the image sensor 200 .

[0115] Furthermore, the filter element 304 may be specifically an infrared filter. Figure 8 As shown, the scene light gathered into the camera module 300 is projected toward the filter element 304, and the light passing through the filter element 304 can be sensed by the image sensor 200. The function of the filter element 304 is to filter out unnecessary light projected toward the image sensor 200 to prevent the image sensor 200 from generating false colors and ripples, thereby improving the effective resolution and color reproduction of the image sensor 200.

[0116] Furthermore, the lens 306 is disposed on the filter element 304 .

[0117] Furthermore, the lens 306 is used for gathering and focusing, and the lens 306 can be specifically composed of a plurality of glass or plastic lenses. For example, a 6P lens refers to a lens composed of 6 lenses. The design and quality of the lens 306 directly affects the way light enters the image sensor 200, thereby affecting the imaging effect.

[0118] Further, the motor 308 is connected to the lens 306 .

[0119] Further, the motor 308 encases the fixed lens 306 .

[0120] In actual application, the upper and lower ends of the motor 308 are connected to the spring. When focusing, the motor 308 generates electromagnetic force by powering on, and the electromagnetic force is finally balanced with the elastic force of the spring. The position of the motor 308 can be controlled by the power level, thereby pushing the motor 308 and the lens 306 to the focus position.

[0121] Furthermore, the signal processing circuit 310 is connected to the image sensor 200. The signal processing circuit 310 is used to process the output signal of the image sensor 200 to obtain storable image data.

[0122] According to some embodiments of the present application, optionally, Fig. 9 As shown, the signal processing circuit 310 includes an analog-to-digital converter 312 and an image processor 314 .

[0123] The analog-to-digital converter 312 is connected to the output terminal of each pixel circuit 100 in the image sensor 200 .

[0124] Furthermore, the analog-to-digital converter 312 is used to perform analog-to-digital conversion on the photoelectric signal output by the pixel circuit 100 to convert the photoelectric signal into a digital signal.

[0125] Furthermore, the image processor 314 is connected to the analog-to-digital converter 312 .

[0126] Furthermore, the image processor 314 is used to process the digital signal output by the analog-to-digital converter 312 to generate storable image data.

[0127] Specifically, Fig. 9As shown, when shooting, light is irradiated onto the image sensor 200 through the lens 306. After the light enters the image sensor 200, a large number of photodiodes sense the light signal and convert it into an electrical signal, i.e., an analog signal. The analog signal is converted into a digital signal through an analog-to-digital converter 312. The digital signal is then processed by an image processor 314 to generate storable image data, which is then transmitted to the memory for storage.

[0128] According to some embodiments of the present application, optionally, Fig.10 As shown, the embodiment of the present application further provides an electronic device 400. The electronic device 400 includes the camera module 300 in any of the above embodiments. The electronic device 400 provided in the embodiment of the present application includes the camera module 300 in any of the above embodiments, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0129] Furthermore, if Fig.10 As shown, the electronic device 400 also includes: a radio frequency unit 401, a network module 402, an audio output unit 403, an input unit 404, a sensor 405, a display unit 406, a user input unit 407, an interface unit 408, a memory 409 and a processor 410 and other components.

[0130] Those skilled in the art will appreciate that the electronic device 400 may also include a power source, such as a battery, to power each component, and the power source may be logically connected to the processor 410 through a power management system, thereby implementing functions such as managing charging, discharging, and power consumption management through the power management system. Fig.10 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be described in detail here.

[0131] It should be understood that in the embodiment of the present application, the input unit 404 may include a graphics processor (GPU) 4041 and a microphone 4042, and the graphics processor 4041 processes the image data of the static picture or video obtained by the image capture device such as the camera module 300 in the video capture mode or the image capture mode. The display unit 406 may include a display panel 4061, and the display panel 4061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 407 includes a touch panel 4071 and at least one of other input devices 4072. The touch panel 4071 is also called a touch screen. The touch panel 4071 may include two parts: a touch detection device and a touch controller. Other input devices 4072 may include, but are not limited to, a physical keyboard, a function key, a trackball, a mouse, and a joystick. The function key may include a volume control button, a switch button, etc., which will not be repeated here.

[0132] The memory 409 can be used to store software programs and various data. The memory 409 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, at least one application program or instruction required for a function such as a sound playback function, an image playback function, etc. In addition, the memory 409 may include a volatile memory or a non-volatile memory, or the memory 409 may include both a volatile and a non-volatile memory. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM) and a direct memory bus random access memory (DRRAM). The memory 409 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0133] The processor 410 may include one or more processing units; optionally, the processor 410 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It is understandable that the modem processor may not be integrated into the processor 410.

[0134] It should be noted that the electronic device 400 in the embodiment of the present application includes a mobile electronic device and a non-mobile electronic device.

[0135] In the actual application process, the electronic device 400 can be a terminal or other devices other than a terminal. For example, the electronic device 400 can be a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted electronic device, a mobile Internet device (Mobile Internet Device, MID), an augmented reality (augmented reality, AR) / virtual reality (virtual reality, VR) device, a robot, a wearable device, an ultra-mobile personal computer (ultra-mobile personal computer, UMPC), a netbook or a personal digital assistant (personal digital assistant, PDA), etc., and can also be a server, a network attached storage (Network Attached Storage, NAS), a personal computer (personal computer, PC), a television (television, TV), a teller machine or a self-service machine, etc., which is not specifically limited in the embodiments of the present application.

[0136] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0137] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A pixel circuit, characterized in that: include: at least one pixel unit; A first exposure control circuit is connected to each pixel unit; A second exposure control circuit is connected to each pixel unit; A regional processing circuit connected to each pixel unit and the second exposure control circuit, wherein the regional processing circuit is used to enable the second exposure control circuit; Among them, the first exposure control circuit is used to control any pixel unit to read out the photoelectric signal with a first exposure time as the signal reading interval, and the second exposure control circuit is used to control any pixel unit to read out the photoelectric signal with a second exposure time as the signal reading interval, and the first exposure time is greater than the second exposure time.

2. The pixel circuit according to claim 1, characterized in that: Also includes: An image analysis circuit connected to the region processing circuit, the image analysis circuit is used to determine the region of interest of the user and send the position information of all pixel units in the region of interest to the region processing circuit; The regional processing circuit is used to send an enable signal to the second exposure control circuit according to the position information of all pixel units in the region of interest, so that the second exposure control circuit controls all pixel units in the region of interest to read out photoelectric signals with the second exposure duration as the signal reading interval.

3. The pixel circuit according to claim 1, characterized in that: Each pixel unit consists of: at least one pixel path, each pixel path being connected to both the first exposure control circuit and the second exposure control circuit; a first transistor, wherein a first terminal of the first transistor is connected to each pixel path, and a control terminal of the first transistor is connected to both the first exposure control circuit and the second exposure control circuit; a capacitor, wherein a first terminal of the capacitor is connected to the second terminal of the first transistor, a second terminal of the capacitor is grounded, and a third terminal of the capacitor is connected to the regional processing circuit; Among them, the first exposure control circuit is used to control any pixel channel to read out the photoelectric signal with the first exposure time as the signal reading interval, and the second exposure control circuit is used to control any pixel channel to read out the photoelectric signal with the second exposure time as the signal reading interval.

4. The pixel circuit according to claim 3, characterized in that: Each pixel unit also includes: a second transistor, wherein a first end of the second transistor is connected to a first power source, a second end of the second transistor is connected to both the second end of the first transistor and the first end of the capacitor, and a control end of the second transistor is connected to both the first exposure control circuit and the second exposure control circuit; a third transistor, wherein a first terminal of the third transistor is connected to a second power source, and a control terminal of the third transistor is connected to both the second terminal of the first transistor and the first terminal of the capacitor; A fourth transistor, wherein the first end of the fourth transistor is connected to the second end of the third transistor, the second end of the fourth transistor is connected to the first end of a third power supply, the control end of the fourth transistor is connected to both the first exposure control circuit and the second exposure control circuit, the second end of the fourth transistor is used to output a photoelectric signal, and the second end of the third power supply is grounded.

5. The pixel circuit according to claim 3, characterized in that: When the pixel circuit is used to control a single pixel, the pixel circuit includes a pixel unit, the pixel unit includes a pixel path, and the pixel path is connected to the first exposure control circuit, the second exposure control circuit and the first end of the first transistor.

6. The pixel circuit according to claim 3, characterized in that: In the case where the pixel circuit is used to control M×M pixels, the pixel circuit includes M pixel units, each pixel unit includes M pixel paths, and each pixel path is connected to the first exposure control circuit, the second exposure control circuit and the first end of the first transistor; Wherein, M is a positive integer greater than 1.

7. The pixel circuit according to any one of claims 3 to 6, characterized in that: Each pixel path consists of: a fifth transistor, wherein a first end of the fifth transistor is connected to the first end of the first transistor, and a control end of the fifth transistor is connected to both the first exposure control circuit and the second exposure control circuit; A photodiode, wherein an anode of the photodiode is grounded, and a cathode of the photodiode is connected to the second end of the fifth transistor.

8. The pixel circuit according to any one of claims 3 to 6, characterized in that: The regional processing circuit is further configured to: In the process of the pixel unit reading out the photoelectric signal with the second exposure time as the signal reading interval, the capacitance value of the capacitor device is controlled to be a first value; in the process of the pixel unit reading out the photoelectric signal with the first exposure time as the signal reading interval, the capacitance value of the capacitor device is controlled to be a second value; The ratio of the first value to the second value is equal to the ratio of the second exposure time to the first exposure time.

9. An image sensor, characterized in that: The method comprises at least one pixel circuit according to any one of claims 1 to 8.

10. A camera module, characterized in that: include: Base; The image sensor of claim 9, disposed on the base; A filter element, disposed on the image sensor; A lens, disposed on the filter element; A motor connected to the lens; The signal processing circuit is connected to the image sensor.

11. The camera module according to claim 10, characterized in that: The signal processing circuit comprises: an analog-to-digital converter connected to an output terminal of each pixel circuit in the image sensor; An image processor is connected to the analog-to-digital converter.

12. An electronic device, characterized in that: Including the camera module described in claim 10 or 11.

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