Fabrication methods for millimeter-wave radar circuit boards and millimeter-wave radar circuit boards

Abstract

This invention discloses a method for fabricating a millimeter-wave radar circuit board. It replaces the multiple independent blind via structures in traditional methods with continuous blind slots, thereby forming continuous radio frequency (RF) circuit patterns and effectively increasing the signal shielding area, resulting in better signal shielding performance for the millimeter-wave radar circuit board. Furthermore, the fabrication method of this invention eliminates the multiple electroplating, single-sided copper reduction, and circuit etching processes required in traditional methods. The outer circuitry, the first copper layer, and the second copper layer can be directly fabricated through activation and copper plating, significantly shortening the fabrication process and improving the production efficiency of the millimeter-wave radar circuit board. In addition, this invention also discloses a millimeter-wave radar circuit board fabricated using the above-described method.

Description

Technical Field

[0001] This invention relates to the field of circuit board processing technology, and in particular to a processing method for a millimeter-wave radar circuit board and a millimeter-wave radar circuit board. Background Technology

[0002] Currently, the main method for shielding signals on millimeter-wave radar circuit boards is to add blind vias to the radio frequency (RF) circuit layer, and then fill the blind vias through electroplating, achieving signal shielding through a copper layer. The specific process is as follows: inner layer circuit fabrication → plate pressing → browning → laser blind via drilling → browning removal → mechanical drilling → high-pressure water washing → adhesive removal → via metallization → via-filling electroplating → pulse electroplating → copper reduction film → single-sided copper reduction → circuit etching. Millimeter-wave radar circuit boards formed using this method cannot achieve complete signal sealing due to the spacing between adjacent blind vias, making them prone to signal leakage. Furthermore, because the circuit board contains both blind and through vias, the through-hole plating capability is limited, typically preventing simultaneous plating of both. It requires through-hole plating and pulse electroplating, followed by single-sided copper reduction and circuit etching to fabricate the RF antenna layer. This process is lengthy and has low production efficiency. Summary of the Invention

[0003] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes a processing method for millimeter-wave radar circuit boards, which can not only improve the signal shielding effect, but also shorten the processing flow and improve the production efficiency of millimeter-wave radar circuit boards.

[0004] The present invention also proposes a millimeter-wave radar circuit board manufactured by the above-described millimeter-wave radar circuit board manufacturing method.

[0005] The method for fabricating a millimeter-wave radar circuit board according to an embodiment of the present invention includes the following steps:

[0006] S1: Obtain at least two copper substrates and fabricate inner layer circuits on the copper substrates;

[0007] S2: Press plate, all the copper substrates and semi-cured sheets are stacked alternately to form an inner core board assembly, an upper insulating layer is provided on the upper surface of the inner core board assembly, a lower insulating layer is provided on the lower surface of the inner core board assembly, and the upper insulating layer, the inner core board assembly and the lower insulating layer are pressed together to form a multilayer board;

[0008] S3: Mechanical drilling to form through holes penetrating the multilayer board;

[0009] S4: Laser blind slot, wherein one of the copper substrates is a shielding layer, and a blind slot extending downward to the shielding layer is processed on the upper surface of the upper insulating layer by CO2 ablation. The blind slots are continuously arranged to form a radio frequency circuit pattern.

[0010] S5: Remove adhesive residue from the bottom of the blind groove;

[0011] S6: Activation, depositing an activation factor on the upper surface of the upper insulating layer, the lower surface of the lower insulating layer, the wall of the through hole and the inner wall of the blind groove to form an activation layer;

[0012] S7: Exposure and development, dry film is attached to the upper surface of the upper insulating layer and the lower surface of the lower insulating layer, and the outer circuit area, the blind trench and the through hole are exposed by exposure and development;

[0013] S8: Plating copper, forming outer layer circuits in the outer layer circuit area, forming a first copper layer on the inner wall of the blind slot, and forming a second copper layer on the inner wall of the through hole;

[0014] S9: Film Removal, removing the dry film from the surface of the inner core panel assembly;

[0015] S10: Subsequent process.

[0016] The millimeter-wave radar circuit board processing method according to embodiments of the present invention has at least the following beneficial effects:

[0017] By employing the millimeter-wave radar circuit board processing method of this invention, continuous blind slots are used to replace the multiple independent blind via structures in the traditional structure. This allows for the formation of continuous radio frequency circuit patterns, effectively increasing the signal shielding area and resulting in better signal shielding performance for the millimeter-wave radar circuit board. Furthermore, the processing method of this invention eliminates the multiple electroplating, single-sided copper reduction, and circuit etching processes found in traditional methods. The outer circuitry, the first copper layer, and the second copper layer can be directly fabricated through activation and copper plating, significantly shortening the millimeter-wave radar circuit board processing flow and improving its production efficiency.

[0018] According to some embodiments of the present invention, step S2 further includes: attaching a resist film to the upper surface of the upper insulating layer and the lower surface of the lower insulating layer, pressing the stacked resist film, upper insulating layer, inner core board assembly and lower insulating layer together, and removing the two resist films after pressing.

[0019] According to some embodiments of the present invention, in step S2, the pressing process is divided into 10 segments, and at least one parameter among temperature, time, and pressure of adjacent pressing segments is adjusted; a vacuum operation is performed in segments 1 to 8, with a vacuum setpoint of <30 mbar, and the total pressing time of segments 1 to 10 is 180 min to 220 min; the vacuum is stopped in segment 9, and the vacuum is released in segment 10, with the pressing time of segment 9 being 45 min and the pressing time of segment 10 being 20 min.

[0020] According to some embodiments of the present invention, the thickness of the shielding layer is C, where C ≥ 25 μm, the ablation depth of the blind groove on the shielding layer in step S4 is c, where c ≤ 3 μm, the top width of the blind groove is a, the bottom width is b, and 0.8 ≤ a / b ≤ 1.

[0021] According to some embodiments of the present invention, the blind groove is processed by stacked hole ablation. The CO2 ablation process is divided into 7 pulses, each with a pulse energy of 28 mJ and a beam diameter of 3 mm. The pulse width of the first pulse is 18 μs, the pulse width of the second to fourth pulses is 10 μs, and the pulse width of the fifth to seventh pulses is 8 μs.

[0022] According to some embodiments of the present invention, step S5 includes:

[0023] S5.1: Grinding plate, to remove burrs from the through holes and blind grooves, and to grind the upper surface of the upper insulating layer and the lower surface of the lower insulating layer;

[0024] S5.2: First-time adhesive removal, using plasma adhesive removal to remove adhesive from the bottom of the blind groove;

[0025] S5.3: Secondary adhesive removal: Chemical adhesive removal is used to remove adhesive from the bottom of the blind groove, and the upper surface of the upper insulating layer and the lower surface of the lower insulating layer are roughened.

[0026] According to some embodiments of the present invention, step S6 includes: adjusting the charge of the upper surface of the upper insulating layer, the lower surface of the lower insulating layer, the semi-cured sheet layer located on the wall of the through hole, and the semi-cured sheet layer located on the inner wall of the blind groove using an alkaline pore-forming agent; then depositing an activating factor, which is palladium ions, on the upper surface of the upper insulating layer, the lower surface of the lower insulating layer, the wall of the through hole, and the inner wall of the blind groove by physical adsorption; and then drying the multilayer board.

[0027] According to some embodiments of the present invention, step S7 includes:

[0028] S7.1: Pickling, using sulfuric acid to pickle the inner core plate assembly;

[0029] S7.2: Apply dry film. Apply dry film to the upper surface of the upper insulating layer and the lower surface of the lower insulating layer. The film application temperature is 110±5℃, and the film application pressure is 4.0±1.0 kg / cm². 2 ;

[0030] S7.3: Exposure, using an LDI exposure device to expose the non-line area, with a JE / PE value of 25 / 25um;

[0031] S7.4: Development, using sodium carbonate system developer, to remove the portion of the dry film covering the outer circuit area, the blind trench, and the via.

[0032] According to some embodiments of the present invention, in step S4, the processing depth of the blind slot is 100 μm; in step S8, a high-speed copper plating method is used, the copper plating equipment is a gantry vertical copper plating equipment, the copper plating time is 60 min, the copper thickness of the outer layer circuit formed in the outer layer circuit area is h1, h1 = 40 μm, and the thickness of the first copper layer formed on the bottom wall of the blind slot is h2, h2 ≥ 35 μm.

[0033] The millimeter-wave radar circuit board according to an embodiment of the present invention is formed by processing the millimeter-wave radar circuit board according to any of the above embodiments.

[0034] The millimeter-wave radar circuit board according to embodiments of the present invention has at least the following beneficial effects:

[0035] By employing the millimeter-wave radar circuit board processing method described in any of the above embodiments, continuous blind slots can replace multiple independent blind via structures in traditional configurations. This allows for the formation of continuous RF circuit patterns, effectively increasing the signal shielding area and resulting in better signal shielding performance for the millimeter-wave radar circuit board. Furthermore, the millimeter-wave radar circuit board of this invention eliminates the multiple electroplating, single-sided copper reduction, and circuit etching processes found in traditional methods. The outer circuitry, the first copper layer, and the second copper layer can be directly fabricated through activation and copper plating, significantly shortening the processing flow and improving the production efficiency of the millimeter-wave radar circuit board.

[0036] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0037] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0038] Figure 1 This is a schematic diagram of the stacking of boards in step S2 of the millimeter-wave radar circuit board processing method according to an embodiment of the present invention;

[0039] Figure 2 This is a schematic diagram of step S2, which involves removing the resist film, in the millimeter-wave radar circuit board processing method according to an embodiment of the present invention.

[0040] Figure 3 This is a schematic diagram of a multilayer board used in the fabrication method of a millimeter-wave radar circuit board according to an embodiment of the present invention.

[0041] Figure 4 This is a schematic diagram of steps S3 and S4 of the millimeter-wave radar circuit board processing method according to an embodiment of the present invention, which involves mechanical drilling and laser blind holes.

[0042] Figure 5 This is a schematic diagram of steps S6 and S7, activation and exposure development, in the millimeter-wave radar circuit board processing method according to an embodiment of the present invention.

[0043] Figure 6 This is a schematic diagram of step S8, copper plating, in the millimeter-wave radar circuit board processing method according to an embodiment of the present invention.

[0044] Figure 7 This is a schematic diagram of step S9 of the millimeter-wave radar circuit board processing method according to an embodiment of the present invention.

[0045] Figure label:

[0046] Multilayer board 100, inner core board assembly 110, copper substrate 111, prepreg layer 112, upper insulating layer 120, lower insulating layer 130, resist film 140, activating factor 150, dry film 160, outer circuit area 170, outer circuit 171, shielding layer 180.

[0047] Through-hole 200, first copper layer 210;

[0048] Blind slot 300, second copper layer 310. Detailed Implementation

[0049] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0050] In the description of this invention, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., are based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0051] In the description of this invention, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0052] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0053] By employing the millimeter-wave radar circuit board processing method of this invention, during the pressing process, the upper insulating layer 120 and the lower insulating layer 130 are used to replace the copper foil on the upper and lower surfaces of the inner core board assembly 110 in the traditional pressing process. That is, the upper insulating layer 120 and the lower insulating layer 130 are pressed onto the upper and lower sides of the inner core board assembly 110 respectively. Then, through holes 200 are processed by mechanical drilling, and blind slots 300 are processed by CO2 ablation. After mechanical drilling and laser blind slots 300, an activation factor 150 can be directly deposited on the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the hole wall of the through hole 200, and the inner wall of the blind slot 300 to form an activation layer. This facilitates the subsequent direct formation of the outer layer circuit 171 in the outer layer circuit area 170 by copper plating, the formation of the first copper layer 210 on the inner wall of the blind slot 300, and the formation of the second copper layer 310 on the inner wall of the through hole 200. In this processing method, signal shielding is achieved by creating continuous blind trenches 300 extending to the shielding layer 180, and then forming a first copper layer 210 within the blind trenches 300 through copper plating. This replaces the multiple independent blind vias in the traditional structure with continuous blind trenches 300, thereby forming a continuous RF circuit pattern and effectively increasing the signal shielding area, resulting in better signal shielding for the millimeter-wave radar circuit board. Furthermore, the processing method of this embodiment eliminates the multiple electroplating, single-sided copper reduction, and circuit etching processes found in traditional methods. The outer layer circuit 171, the first copper layer 210, and the second copper layer 310 can be directly fabricated through activation and copper plating, significantly shortening the processing flow of the millimeter-wave radar circuit board and improving its production efficiency.

[0054] Understandably, referring to Figures 1 to 7 The inner core board assembly 110 may specifically include four copper substrates 111 and three prepreg layers 112. Of course, in addition, the number of copper substrates 111 in the inner core board assembly 110 may be two, three, five or more. The present invention does not make a specific limitation. Furthermore, since an insulating layer 120 is provided on the upper surface of the inner core board assembly 110 and a lower insulating layer 130 is provided on the lower surface of the inner core board assembly 110 during lamination, when stacking the inner core board assembly 110, copper substrates 111 can be placed on both the uppermost and lowermost layers. Of course, in addition, prepreg can be placed on both the uppermost and lowermost layers, or one of the uppermost and lowermost layers may be a prepreg layer 112 and the other may be a copper substrate 111. The present invention does not make a specific limitation. As long as all copper substrates 111 and prepreg layers 112 are stacked alternately to form the inner core board assembly 110.

[0055] It is understood that, by adopting the millimeter-wave radar circuit board processing method of the present invention, the surface of the laminated multilayer board 100 is an upper insulating layer 120 and a lower insulating layer 130, and there is no copper foil. Therefore, when performing mechanical drilling in step S3, it is necessary to strictly control the cutting speed. Moreover, compared with mechanical drilling on a circuit board with copper foil on the surface, the present invention directly starts drilling from the upper insulating layer 120 or the lower insulating layer 130, which is beneficial to extending the life of the drill bit.

[0056] It is understandable that in step S4, since the surface of the multilayer board 100 after lamination is an upper insulating layer 120 and a lower insulating layer 130, and there is no copper foil to reflect the laser and prevent corrosion, the blind groove 300 can be processed by direct CO2 ablation.

[0057] It is understood that the upper insulating layer 120 and the lower insulating layer 130 can be made of PP. Specifically, the upper insulating layer 120 disposed on the upper surface of the inner core board assembly 110 can be resin PP coated on the upper surface of the inner core board assembly 110, and the lower insulating layer 130 disposed on the lower surface of the inner core board assembly 110 can be made of FR4PP material. This embodiment of the present invention does not specifically limit the specific use of PP material.

[0058] It is understood that in step S9, the subsequent process may specifically include processes such as solder masking, surface treatment, and forming in the conventional processing flow of circuit boards, and the embodiments of the present invention do not specifically limit this.

[0059] Reference Figure 1 and Figure 2In some embodiments, step S2 further includes: attaching a resist film 140 to the upper surface of the upper insulating layer 120 and the lower surface of the lower insulating layer 130, pressing the stacked resist film 140, upper insulating layer 120, inner core board assembly 110 and lower insulating layer 130 together, and removing the two resist films 140 after pressing.

[0060] By adopting the above processing method, since the upper insulating layer 120 and the lower insulating layer 130 are used to replace the copper foil on the upper and lower surfaces of the inner core board assembly 110 in the traditional pressing process, a resist film 140 can be attached to the surface of the upper insulating layer 120 and the lower insulating layer 130 during pressing. The resist film 140 has good temperature resistance, separation properties and chemical stability, which can prevent adhesion between the pressing plate and the upper insulating layer 120, and between the support plate and the lower insulating layer 130 during the pressing process. In addition, it can also block external moisture, oxygen, dust and so on, thereby protecting the pressing of the multilayer board 100 and reducing the influence of the external environment on the multilayer board 100 during the pressing process.

[0061] Understandably, when removing the adhesive resist film 140, it is possible to start peeling it off from both corners on the same side at the same time, maintain a uniform speed throughout the peeling process, and avoid pulling too hard on one corner. After peeling, it is also necessary to check whether there are any residual film fragments on the surfaces of the upper insulating layer 120 and the lower insulating layer 130.

[0062] In some embodiments, in step S2, the pressing process is divided into 10 segments, and at least one parameter among temperature, time, and pressure in adjacent pressing segments is adjusted; a vacuum operation is performed in segments 1 to 8, with a vacuum setpoint < 30 mbar, and the total pressing time for segments 1 to 10 is 180 min to 220 min; the vacuum is stopped in segment 9, and the vacuum is released in segment 10, with the pressing time for segment 9 being 45 min and the pressing time for segment 10 being 20 min.

[0063] By employing the above processing method, the pressing process is divided into 10 stages. This allows for flexible adjustment of the temperature, time, and pressure parameters between adjacent pressing stages, resulting in a better pressing effect. Furthermore, by performing a vacuum operation during the first 8 pressing stages—that is, applying pressure and heat to the multilayer board 100 in a vacuum environment—the generation of bubbles and voids can be effectively reduced, thereby improving the pressing quality of the multilayer board 100. In addition, the vacuum condition reduces oxidation and other chemical changes, thus helping to maintain the stability of the multilayer board 100.

[0064] It is understood that in some embodiments, the pressing process is divided into 10 stages, and the specific temperature, time, and pressure parameters for each stage can be referred to in the following example:

[0065] Hot plate temperature (°C) Hot plate time (min) Pressure (psi) Pressure time (min) 1 120 1 200 1 2 120 14 450 14 3 140 4 550 4 4 115 5 550 5 5 115 40 550 40 6 200 11 550 12 7 200 30 550 30 8 185 10 550 10 9 185 45 550 45 10 120 20 150 20

[0066] Reference Figure 5 In some embodiments, step S6 includes: applying an alkaline pore-forming agent to the charge of the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the semi-cured sheet 112 located on the wall of the through hole 200, and the semi-cured sheet 112 located on the inner wall of the blind groove 300; then depositing an activating factor 150, which is palladium ions, on the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the wall of the through hole 200, and the inner wall of the blind groove 300 by physical adsorption; and then drying the multilayer board 100.

[0067] By employing the above method, an alkaline pore-forming agent is used to adjust the charge of the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the semi-cured sheet 112 located on the wall of the through hole 200, and the semi-cured sheet 112 located on the inner wall of the blind trench 300. This allows the upper insulating layer 120, the lower insulating layer 130, the inner wall of the through hole 200, and the inner wall of the blind trench 300 to more easily adsorb the activating factor 150. Subsequently, a layer of palladium ions is deposited on the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the semi-cured sheet 112 located on the wall of the through hole 200, and the semi-cured sheet 112 located on the inner wall of the blind trench 300 through physical adsorption, thereby facilitating the subsequent copper plating process.

[0068] It is understood that, since palladium ions are used as the activating factor 150 in the embodiments of the present invention, and palladium ions are usually positively charged, the charge of the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the semi-cured sheet 112 located on the wall of the through hole 200, and the semi-cured sheet 112 located on the inner wall of the blind groove 300 can be adjusted to be negatively charged by the alkaline pore-forming agent, thereby enabling the upper insulating layer 120, the lower insulating layer 130, the inner wall of the through hole 200, and the inner wall of the blind groove 300 to more easily adsorb palladium ions.

[0069] It is understood that the activation factor 150 can be made of palladium ions or nano-metal particles, etc., and the present invention does not specifically limit it. In addition, for the positively charged activation factor 150, the charge of the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the semi-cured sheet 112 located on the wall of the through hole 200, and the semi-cured sheet 112 located on the inner wall of the blind groove 300 needs to be adjusted to be negatively charged; for the negatively charged activation factor 150, the charge of the upper surface of the upper insulating layer 120, the lower surface of the lower insulating layer 130, the semi-cured sheet 112 located on the wall of the through hole 200, and the semi-cured sheet 112 located on the inner wall of the blind groove 300 needs to be adjusted to be positively charged.

[0070] Reference Figures 5 to 7In some embodiments, step S7 includes:

[0071] S7.1: Pickling, using sulfuric acid to pickle the inner core panel assembly 110;

[0072] S7.2: Apply dry film 160. Apply dry film 160 to the upper surface of the upper insulating layer 120 and the lower surface of the lower insulating layer 130. The film application temperature is 110±5℃, and the film application pressure is 4.0±1.0 kg / cm². 2 ;

[0073] S7.3: Exposure, using an LDI exposure device to expose the non-line area, with a JE / PE value of 25 / 25um;

[0074] S7.4: Development, using sodium carbonate system developer, remove the portion of dry film 160 covering the outer circuit area 170, blind trench 300 and via 200.

[0075] By employing the above processing method, after applying the dry film 160, the non-circuit areas on the upper insulating layer 120 and the lower insulating layer 130 are exposed. Then, the dry film 160 at the outer circuit area 170, blind trench 300, and via 200 on the upper insulating layer 120 and the lower insulating layer 130 is dissolved by the developing solution. This exposes the outer circuit area 170, blind trench 300, and via 200 on the surface of the multilayer board 100 that needs to be copper-plated, while the non-circuit areas that do not need to be copper-plated are covered by the dry film 160. This facilitates subsequent copper plating operations on the outer circuit area 170, the inner wall of the blind trench 300, and the inner wall of the via 200.

[0076] It is understandable that the non-circuit area specifically refers to the area on the upper insulation layer 120 and the lower insulation layer 130 where no circuit is designed, and the outer circuit area 170 specifically refers to the area on the upper insulation layer 120 and the lower insulation layer 130 where the outer circuit 171 is designed.

[0077] It is understandable that during the pickling process in step S7.1, since the surface of the multilayer board 100 consists of an upper insulating layer 120 and a lower insulating layer 130, and not copper foil, sulfuric acid can be used directly as the pickling solution without the need to add micro-etching agents or etching solutions.

[0078] Reference Figure 6 In some embodiments, in step S4, the processing depth of the blind trench 300 is 100μm; in step S8, a high-speed copper plating method is used, the copper plating equipment is a gantry vertical copper plating equipment, the copper plating time is 60min, the copper thickness of the outer layer circuit 171 layer formed in the outer layer circuit area 170 is h1, h1=40μm, and the thickness of the first copper layer 210 formed on the bottom wall of the blind trench 300 is h2, h2≥35μm.

[0079] By adopting the above processing method, copper can be easily deposited on the inner wall of the outer layer circuit area 170, the blind trench 300, and the through hole 200, thereby facilitating the fabrication of the outer layer circuit 171, the first copper layer 210, and the second copper layer 310. By processing the copper thickness h1 of the outer layer circuit 171 to 40μm, the electrical performance of the millimeter-wave radar circuit board can be improved. By setting the processing thickness of the blind trench 300 to 100μm and processing the thickness of the first copper layer 210 on the bottom wall of the blind trench 300 to h2≥35μm, the signal shielding effect of the millimeter-wave radar circuit board can be improved.

[0080] An embodiment of the present invention also proposes a millimeter-wave radar circuit board, which is formed by processing the millimeter-wave radar circuit board using the processing method of any of the above embodiments.

[0081] In the millimeter-wave radar circuit board of this invention, by using the processing method of the millimeter-wave radar circuit board in any of the above embodiments, the multiple independent blind via structures in the traditional structure can be replaced by continuous blind slots 300. This allows for the formation of continuous radio frequency circuit patterns, effectively increasing the signal shielding area and giving the millimeter-wave radar circuit board better signal shielding performance. Furthermore, the millimeter-wave radar circuit board of this invention eliminates the multiple electroplating, single-sided copper reduction, and circuit etching processes in traditional processing methods. The outer layer circuit 171, the first copper layer 210, and the second copper layer 310 can be directly fabricated through activation and copper plating, significantly shortening the processing flow of the millimeter-wave radar circuit board and improving its production efficiency.

[0082] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A method for fabricating a millimeter-wave radar circuit board, characterized in that, Includes the following steps: S1: Obtain at least two copper substrates (111) and fabricate inner layer circuits on the copper substrates (111); S2: Press plate, all the copper substrates (111) and the semi-cured sheets (112) are stacked alternately to form an inner core board assembly (110), an upper insulating layer (120) is provided on the upper surface of the inner core board assembly (110), a lower insulating layer (130) is provided on the lower surface of the inner core board assembly (110), and the upper insulating layer (120), the inner core board assembly (110) and the lower insulating layer (130) are pressed together to form a multilayer board (100); S3: Mechanical drilling to form a through hole (200) through the multilayer board (100); S4: Laser blind slot (300), wherein one of the copper substrates (111) is a shielding layer (180), and a blind slot (300) extending downward to the shielding layer (180) is processed on the upper surface of the upper insulating layer (120) by CO2 ablation. The blind slots (300) are continuously arranged to form a radio frequency circuit pattern. S5: Remove adhesive residue from the bottom of the blind groove (300); S6: Activation, depositing an activation factor (150) on the upper surface of the upper insulating layer (120), the lower surface of the lower insulating layer (130), the hole wall of the through hole (200) and the inner wall of the blind groove (300) to form an activation layer; S7: Exposure and development, dry film (160) is attached to the upper surface of the upper insulating layer (120) and the lower surface of the lower insulating layer (130), and the outer circuit area (170), the blind trench (300) and the through hole (200) are exposed by exposure and development; S8: Plating copper, forming an outer layer circuit (171) in the outer layer circuit area (170), forming a first copper layer (210) on the inner wall of the blind slot (300), and forming a second copper layer (310) on the inner wall of the through hole (200); S9: Remove the dry film (160) from the surface of the inner core panel assembly (110); S10: Subsequent process; In step S2, the pressing process is divided into 10 segments, and at least one of the parameters of temperature, time, and pressure in two adjacent pressing segments is adjusted. Vacuuming is performed in stages 1 to 8, with a vacuum setting value of <30 mbar. The total pressing time for stages 1 to 10 is 180 min to 220 min. Vacuuming is stopped in stage 9, and vacuum is released in stage 10. The pressing time for stage 9 is 45 min, and the pressing time for stage 10 is 20 min. The thickness of the shielding layer (180) is C, where C ≥ 25 μm. The ablation depth of the blind groove (300) on the shielding layer (180) in step S4 is c, where c ≤ 3 μm. The top width of the blind groove (300) is a, and the bottom width is b, where 0.8 ≤ a / b ≤ 1. The blind groove (300) was processed by stacked hole ablation. The CO2 ablation process was divided into 7 pulses, each with a pulse energy of 28mJ and a beam diameter of 3mm. The pulse width of the first pulse was 18μs, the pulse width of the second to fourth pulses was 10μs, and the pulse width of the fifth to seventh pulses was 8μs. Step S5 includes: S5.1: Grinding plate, remove burrs from the through hole (200) and the blind groove (300), and grind the upper surface of the upper insulating layer (120) and the lower surface of the lower insulating layer (130); S5.2: First-time degumming, plasma degumming is used to degumme the bottom of the blind groove (300) once; S5.3: Secondary degumming, chemical degumming is used to perform secondary degumming on the bottom of the blind groove (300), and the upper surface of the upper insulating layer (120) and the lower surface of the lower insulating layer (130) are roughened; In step S4, the processing depth of the blind groove (300) is 100 μm; In step S8, a high-speed copper plating method is used, the copper plating equipment is a gantry vertical copper plating equipment, the copper plating time is 60 minutes, the copper thickness of the outer layer circuit (171) formed in the outer layer circuit area (170) is h1, h1=40μm, and the thickness of the first copper layer (210) formed on the bottom wall of the blind slot (300) is h2, h2≥35μm.

2. The processing method of the millimeter-wave radar circuit board according to claim 1, characterized in that, Step S2 further includes: attaching a resist film (140) to the upper surface of the upper insulating layer (120) and the lower surface of the lower insulating layer (130), pressing the stacked resist film (140), upper insulating layer (120), inner core board assembly (110), and lower insulating layer (130), and removing the two resist films (140) after pressing.

3. The processing method of the millimeter-wave radar circuit board according to claim 1, characterized in that, Step S6 includes: applying an alkaline pore-forming agent to the upper surface of the upper insulating layer (120), the lower surface of the lower insulating layer (130), the semi-cured sheet (112) located on the wall of the through hole (200), and the semi-cured sheet (112) located on the inner wall of the blind groove (300) for charge adjustment; then depositing an activating factor (150) on the upper surface of the upper insulating layer (120), the lower surface of the lower insulating layer (130), the wall of the through hole (200), and the inner wall of the blind groove (300) by physical adsorption. The activating factor (150) is palladium ions. After that, the multilayer board (100) is dried.

4. The processing method of the millimeter-wave radar circuit board according to claim 1, characterized in that, Step S7 includes: S7.1: Pickling, using sulfuric acid to pickle the inner core panel assembly (110); S7.2: Applying dry film (160): Applying dry film (160) to the upper surface of the upper insulating layer (120) and the lower surface of the lower insulating layer (130), with an application temperature of 110±5℃ and an application pressure of 4.0±1.0 kg / cm². 2 ; S7.3: Exposure, using an LDI exposure device to expose the non-line area, with a JE / PE value of 25 / 25um; S7.4: Development, using sodium carbonate system developer, to remove the portion of the dry film (160) covering the outer circuit area (170), the blind trench (300) and the via (200).

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