A method for manufacturing a circuit board with double-sided large-area gold bonding pads

Abstract

The application discloses a manufacturing method of a double-sided large-area electric gold bonding pad circuit board, which comprises the following steps: arranging a plurality of unit boards to form a spliced board structure, and arranging small pad patterns on the front surface of the spliced board structure; the edge area of the spliced board structure is a process edge; drilling and electroplating the spliced board structure, and then manufacturing a circuit pattern including the small pad patterns to form an outer circuit board; etching the board edge to form a copper-free frame; etching the partial process edge to form an etching window pattern; fixing a first insulating plate on the front surface of the spliced board structure in a non-contact mode, and the size of the first insulating plate covers the small pad patterns; arranging a second insulating plate at the bottom of the spliced board structure to form a structure to be electroplated; electroplating gold and processing the structure to form the circuit board; the spliced board structure is designed, and the small pad patterns are covered by the insulating plate to reduce the contact density of the small pad patterns with electroplating chemicals, so that the electroplating effect is more uniform, the front and rear processes are effectively matched, and the reliability and service life of the whole circuit board are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of circuit board manufacturing, in particular to a method for manufacturing a circuit board with double-sided large-area ratio electroplated gold pads. BACKGROUND

[0002] For some high-frequency circuit boards or some antenna circuit boards, there are large-area gold-plated patterns on the board surface. According to application requirements, the other side of the circuit board is designed with small electroplated gold pads in a plug-in or press-in pattern. Therefore, both sides of the circuit board have large-area electroplated gold pads.

[0003] For such circuit boards with pad patterns on both sides and an area ratio of more than 8:1, during the processing, the small-area gold-plated pads are more "intense" in the electroplating process, forming thick electroplated gold, which appears white in appearance. The large-area gold-plated pads are more "weak" in the electroplating process, forming thin electroplated gold, resulting in a large difference in the thickness of the electroplated gold on the pad patterns on both sides, affecting the reliability of the circuit board in the final application.

[0004] The existing manufacturing method is to arrange the pad patterns, with large pad patterns and small pad patterns alternately arranged on the same side to balance the distribution of electric field lines and improve the uniformity of electroplated gold. However, this method is more suitable for cases where the area ratio is less than 8:1. For larger area ratios, the problem of uneven electroplated gold still exists.

[0005] Therefore, to solve the above problems, a method for manufacturing a circuit board with double-sided large-area ratio electroplated gold pads is needed. SUMMARY

[0006] The present application aims to solve the problem of uneven electroplated gold on the pad patterns on both sides of the circuit board with double-sided large-area ratio electroplated gold pads manufactured by the existing technology. A method for manufacturing a circuit board with double-sided large-area ratio electroplated gold pads is proposed. The circuit board is processed using a plurality of unit boards spliced into a panel structure. One side of the unit board is designed with a large pad pattern, and the other side is designed with a small pad pattern. The area ratio of the large pad pattern to the small pad pattern is greater than 8:1. The manufacturing method includes the following steps:

[0007] S10: Arrange a plurality of unit boards to form the panel structure, and the small pad patterns are located on the front side of the panel structure. The edge area of the panel structure is the process edge, and the area enclosed by the process edge is the pattern area. The process edge includes the clamping edge during electroplating, and the edge opposite to the clamping edge is the bottom edge, and the other two edges are the support edges.

[0008] S20: Drilling and electroplating the panel structure, then making a circuit pattern to form an outer layer circuit board; the drilling includes drilling positioning holes on the process edge; the circuit pattern includes the large pad pattern and the small pad pattern; the making of the circuit pattern includes etching the plate edge to form a non-copper frame; etching the process edge to form an etching window pattern; and further including etching the positioning holes;

[0009] S30: Taking a first insulating plate and drilling through holes corresponding to the positioning holes; the first insulating plate is fixed to the front of the panel structure through the positioning holes without contact, the size of the first insulating plate covers the small pad pattern in the panel structure; and a second insulating plate is arranged at the bottom of the panel structure to form a whole structure to be electroplated;

[0010] S40: Gold plating processing the structure to be electroplated, then post-processing to form the circuit board.

[0011] Further, to form the circuit board, the front faces of a plurality of the structures to be electroplated are arranged in the same direction, the distance between two structures to be electroplated is greater than the distance between the insulating plate and the small pad pattern in a single structure, a multi-layer structure to be electroplated is formed, then electroplating and post-processing are performed to form the circuit board.

[0012] Further, the multi-layer structure to be electroplated includes arranging an insulating plastic mesh plate on the side where the large pad pattern is exposed.

[0013] Further, the mesh number of the insulating plastic mesh plate is 35 to 71, preferably 45.

[0014] Further, the distance between the first insulating plate and the small pad pattern in the structure to be electroplated is 5 to 20 mm.

[0015] Further, the thickness of the first insulating plate is 1.0 to 10.0 mm, preferably 3.0 mm.

[0016] Further, the drilling includes drilling fixing holes on the panel structure and the second insulating plate, and the second insulating plate is fixed to the panel structure through the fixing holes.

[0017] Further, the length of the second insulating plate is 5 to 20 cm extending outward from the bottom edge, and the width is greater than or equal to the width of the size of the panel structure.

[0018] Further, the etching window pattern is located on the support edge.

[0019] Further, the width of the non-copper frame is 1 to 5 mm.

[0020] The technical scheme of the present application can effectively adjust the disturbance speed of the electroplating solution, reduce the exchange speed of the electroplating solution on the small pad pattern surface, make the electroplating gold thickness on the large pad and the small pad more uniform, reduce the phenomenon that the plating layer thickness is not uniform due to area difference, and finally realize more uniform electroplating effect, solve the problems such as uneven electroplating gold when the pad pattern with large area ratio is made in the prior art; the second insulating plate is arranged at the bottom of the spliced board structure, which replaces the floating frame to form a blocking disturbance effect on the electroplating solution at the bottom of the spliced board structure, and can avoid the problem that the bottom of the spliced board structure is clamped in the floating frame, avoid the problems such as collision and adhesion between the boards, ensure that the electroplating solution fully flows and contacts, and avoid the problems of too thin or missing plating; the front and rear processes form effective cooperation to form a uniform electroplating layer, effectively improving the reliability and service life of the entire circuit board. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the technical schemes in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained according to the structures shown in the drawings without creative labor for those skilled in the art.

[0022] Figure 1 It is a process flow diagram of the embodiment of the present application.

[0023] Figure 2 It is a reverse side diagram of the spliced board structure of the embodiment of the present application.

[0024] Figure 3 It is a front side diagram of the spliced board structure of the embodiment of the present application.

[0025] Figure 4 It is a reverse side diagram of the outer layer circuit board of the embodiment of the present application.

[0026] Figure 5 It is a front side diagram of the outer layer circuit board of the embodiment of the present application.

[0027] Figure 6 It is a plane diagram of the cover plate structure of the embodiment of the present application.

[0028] Figure 7 It is a side view diagram of the cover plate structure of the embodiment of the present application.

[0029] Figure 8 It is a plane diagram of the structure to be electroplated of the embodiment of the present application.

[0030] Figure 9 A side view of a structure to be plated according to an embodiment of the present application;

[0031] Figure 10 A side view of a multi-layer structure to be plated according to an embodiment of the present application;

[0032] Figure 11 A plan view of a large pad pattern according to an embodiment of the present application;

[0033] Figure 12 A plan view of a small pad pattern according to an embodiment of the present application.

[0034] BRIEF DESCRIPTION OF THE DRAWINGS

[0035]

[0036] The objectives, features and advantages of the present application will be further understood from the following detailed description of the embodiments of the present application, taken in conjunction with the accompanying drawings. DETAILED DESCRIPTION

[0037] The technical solutions in the embodiments of the present application will be apparently and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments of the present application, all the other embodiments obtained by those skilled in the art without any creative effort fall within the scope of protection of the present application.

[0038] It should be noted that all the directionality indications (such as up, down, left, right, front, back, inside, outside, etc.) in the embodiments of the present application are only used to explain the relative position relationship, movement condition, etc. between the components in a certain specific posture (as shown in the drawings), and if the specific posture changes, the directionality indications also change accordingly.

[0039] In addition, the descriptions such as “first”, “second” and the like in the present application are only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features. Therefore, the features limited by “first”, “second” can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of “multiple” is at least two, such as two, three, etc., unless otherwise specifically limited.

[0040] In addition, the technical solutions of each embodiment of the present application can be combined with each other, but it must be based on the fact that a person skilled in the art can realize it, and when the combination of technical solutions appears to be contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is not within the scope of protection claimed by the present application.

[0041] Please refer toFigure 1 , Figure 1 The process flow diagram of the embodiment of the present application.

[0042] The circuit board of the embodiment of the present application is processed by using the spliced board structure 100 formed by splicing a plurality of unit boards, one side of the unit board is designed with a large pad pattern 1010, and the other side is designed with a small pad pattern 1020, and the area ratio of the large pad pattern 1010 to the small pad pattern 1020 is greater than 8:1.

[0043] The manufacturing process of the embodiment of the present application includes the implementation of each step flow in Figure 1 The following will make further step-by-step description of each step flow in Figure 1 .

[0044] Please refer to Figure 2 and Figure 3 , Figure 2 is a back view schematic diagram of the spliced board structure of the embodiment of the present application; Figure 3 is a front view schematic diagram of the spliced board structure of the embodiment of the present application.

[0045] S10: arrange a plurality of unit boards to form a spliced board structure 10, and the small pad pattern 1020 is located on the front side of the spliced board structure 10; the edge area of the spliced board structure 10 is a process edge 1030, and the area enclosed by the process edge 1030 is a pattern area; the process edge 1030 includes a clamping edge in the electroplating process, and the edge opposite to the clamping part is a bottom edge, and the other two edges are support edges, which provide a board basis for the subsequent process.

[0046] By designing to splice a plurality of unit boards to form a spliced board structure 10, the spliced board is used to form a plurality of unit boards to be processed at the same time, and the repetitive steps of processing a single board are reduced.

[0047] Please refer to Figure 4 and Figure 5 , Figure 4 is a back view schematic diagram of the outer layer circuit board of the embodiment of the present application; Figure 5 is a front view schematic diagram of the outer layer circuit board of the embodiment of the present application.

[0048] S20: drill and electroplate the spliced board structure 10, and then manufacture a circuit pattern to form an outer layer circuit board 20; the drilling includes drilling a positioning hole 2010 in the process edge 1030; the circuit pattern includes a large pad pattern 1010 and a small pad pattern 1020; the manufacturing of the circuit pattern includes etching a board edge to form a copper-free frame 2020; etching a part of the process edge to form an etching window pattern 2030; and further including etching the positioning hole 2010.

[0049] In the embodiment, the positioning holes 2010 are drilled on the supporting edges of the two sides of the panel structure 10, which on one hand provides a processing basis for fixing the first insulating plate 3010 through the positioning holes 2010 in the subsequent process, and on the other hand provides a larger processing space for the subsequent process to set the second insulating plate 4010 by avoiding drilling holes on the bottom edge.

[0050] Further, in order to avoid that the electroplating clamp 3030 cannot hold the conductive area and cannot form the electroplating effect, the width of the copper-free frame 2020 needs to be relatively narrow, generally 1mm to 5mm.

[0051] Further, the etching window pattern 2030 is located on the supporting edge, which prevents the vertical edge from forming more adsorption of the electric field lines and effectively avoids the current shunt phenomenon caused by the clamp contact, so that the current can flow more concentratedly through the to-be-plated area, thereby improving the consistency and quality of the plating layer.

[0052] Optionally, the width of the etching window pattern 2030 is 5mm to 20mm, and by reasonably setting the width of the etching window pattern 2030, the interference of some circuit conduction on the electric field environment during the electroplating process can be avoided to a large extent, and a high-quality flat plating layer is formed.

[0053] Please refer to Figure 6 、 Figure 7 、 Figure 8 、 Figure 9 , Figure 6 for the plan view of the cover plate structure of the embodiment of the application;

[0054] Figure 7 for the side view of the cover plate structure of the embodiment of the application; Figure 8 for the plan view of the to-be-electroplated structure of the embodiment of the application; Figure 9 for the side view of the to-be-electroplated structure of the embodiment of the application.

[0055] S30: Take the first insulating plate 3010 and drill a through hole corresponding to the positioning hole 2010; the first insulating plate 3010 is fixed to the front surface of the panel structure 10 through the non-contact positioning hole 2010, and the size of the first insulating plate 3010 covers the small pad pattern 1020 in the panel structure 10; the cover plate structure 30 is formed, and the second insulating plate 4010 is set at the bottom of the panel structure 10, and the whole forms the to-be-electroplated structure 40.

[0056] Since the area of the small pad pattern 1020 is small, the reaction with the electroplating gold solution is more intense. Therefore, the first insulating plate 3010 is designed in front of the small pad pattern 1020 to form a physical barrier to the electroplating gold solution, reduce the exchange intensity of the solution with the small pad pattern 1020, and thus reduce the electroplating gold reaction process. The overall electroplating speed of the small pad pattern 1020 is much smaller than that of the large pad pattern 1010. That is, by slowing down the electroplating reaction speed of the small pad pattern 1020, the electroplating completion time of the large pad pattern 1010 is close to the electroplating completion time of the small pad pattern 1020, and a uniform gold plating surface layer is formed.

[0057] Optionally, the distance between the first insulating plate 3010 and the small pad pattern 1020 in the structure to be electroplated 40 is 5-20 mm. By controlling the distance between the first insulating plate 3010 and the small pad pattern 1010, the disturbance speed of the electroplating solution can be effectively adjusted, thereby reducing the exchange speed of the electroplating solution on the small pad surface, helping to maintain stable chemical reaction conditions, ensuring that metal ions can be deposited on the target surface at a stable rate, and forming an ideal plating layer.

[0058] Optionally, since the first insulating plate 3010 does not conduct electricity during electroplating, the positioning hole 2010 has been etched in the process of manufacturing the circuit pattern in the previous process. Therefore, the fixing buckle 3020 for fixing the first insulating plate cannot form a conductive loop, and the material is selected from insulating materials such as plastic bolts, plastic rivets, or plastic pins.

[0059] Further, the thickness of the first insulating plate 3010 is 1.0-10.0 mm, preferably 3.0 mm.

[0060] Optionally, the material of the first insulating plate 3010 is PP, PVC, PTFE, epoxy resin, or PET.

[0061] It is worth noting that the direction of the first insulating plate 3010 towards the clamping edge and the bottom edge is greater than or equal to the length of the distribution area of the small pad pattern 1020 by 20 mm, ensuring that the small pad pattern 1020 can be completely covered, and the first insulating plate 3010 needs to leave a position for the electroplating chuck to ensure that the electroplating chuck can effectively clamp the panel structure 10.

[0062] In this embodiment, the drilling includes drilling a fixing hole 4020 in the panel structure 10 and the second insulating plate 4010. The second insulating plate 4010 is fixed with the panel structure 10 through the fixing hole 4020, that is, the bottom of the panel structure 10 and the second insulating plate 4010 are provided with more than or equal to 2 copper-free fixing holes 4020, and the panel structure 10 and the second insulating plate 4010 are fixed by means of plastic ropes, plastic pins, plastic bolts, or plastic rivets.

[0063] Further, the second insulating plate 4010 can prevent the bottom of the assembled plate structure 10 from being clamped in the floating frame, avoid the problems of collision and adhesion between the plates, ensure the full flow and contact of the plating solution, and avoid the problems of too thin or missing plating of gold; further, the length of the second insulating plate 4010 is 5 cm to 20 cm extending outward from the bottom edge, and the width is greater than or equal to the width of the size of the assembled plate structure 10, which plays a role of replacing the floating frame to form a disturbance to the plating solution of the bottom of the assembled plate structure 10.

[0064] Optionally, the material of the second insulating plate 4010 can be PVC, epoxy resin or PTFE insulating material, or a scrapped copper-free surface plate, which realizes the recycling of plate resources and effectively reduces the processing cost.

[0065] Optionally, the thickness of the second insulating plate 4010 is 2.0 mm to 5.0 mm, preferably 2.0 mm or 3.0 mm.

[0066] Please refer to Figure 10 , Figure 10 The side view of the multi-layer structure to be plated according to the embodiment of the application.

[0067] In one embodiment, the circuit board is formed by arranging a plurality of front surfaces of the structures to be plated 40 in the same direction, the distance between two structures to be plated 40 is greater than the distance between the first insulating plate 3010 and the small pad pattern 1020 in a single structure, and the whole forms a multi-layer structure to be plated 50, and then plating and post-processing are performed to form a circuit board, that is, a whole hanging plate structure 5010 is first made, then a through hole is made in the plate edge of the structure to be plated 40 close to one end of the hook, then a conductive fixing tool is used for fixing, so that the fixed whole structure can be hung on the plating fixture through the whole hanging plate structure 5010, and then post-processing is performed.

[0068] Since the stacked structure is a multi-layer structure, even if the distance of the large gap is large, it may also hinder the disturbance and exchange of the solution, so as to balance the hindering effect of the solution exchange on the large pad pattern 1010 in the plating process. Therefore, the multi-layer structure to be plated 50 includes an insulating plastic mesh plate 5020 arranged on the side exposing the large pad pattern 1010, so that the disturbance and exchange of the solution on one side of the large pad pattern 1010 exposed on the outermost surface is hindered, so as to balance the plating effect on one side of all the large pad patterns 1010 in the whole multi-layer structure to be plated 50; by reasonably designing the shape and position of the insulating plastic mesh plate 5020, the concentration of the exchanged solution can be controlled, and then the speed and direction of metal ion deposition are affected, so as to ensure the consistency of the plating thickness.

[0069] It is worth noting that the distance between the insulating plastic stencil 5020 and the large pad pattern 1010 in the multi-layer structure to be plated 50 is less than or equal to the distance between two adjacent structures to be plated 40 .

[0070] Optionally, the mesh number of the insulating plastic mesh 5020 is 35 mesh to 71 mesh, preferably 45 mesh.

[0071] It is worth noting that in the actual processing process, in order to save processing costs and simplify the processing structure, a metal rope can be used to string insulating beads at intervals, so that the first insulating plate 3010 in each structure to be electroplated 40 and the puzzle structure 10 and the insulating plastic mesh 5020 are isolated from each other using insulating beads, replacing the hanging plate structure 5010. If a larger isolation distance is required, relatively more beads can be strung, and then the metal rope is tied to the clamp of the electroplating fixture to complete the electroplating process. The metal rope forms an interval conductive effect according to the position of the beads, that is, the position of the beads is not conductive to the electroplating solution, and the position in contact with the conductive hole is conductive to the electroplating solution; similarly, the second insulating plate 4010 and the bottom of the puzzle structure 10 are fixed to each other, and can also be achieved by using an insulating rope combined with an interval string of insulating beads.

[0072] Please participate Figure 11 and Figure 12 , Figure 11 A schematic plan view of a large pad pattern according to an embodiment of the present invention; Figure 12 A schematic plan view of a small pad pattern according to an embodiment of the present invention.

[0073] S40: performing gold electroplating on the structure to be electroplated 40, and then performing post-processing to form a circuit board.

[0074] The structure to be electroplated 40 is placed in an electroplating tank containing a gold salt solution of appropriate concentration, and a certain voltage is applied to start the electroplating process.

[0075] After electroplating is completed, the circuit board is removed, cleaned and dried, and then subjected to detailed inspection and testing to confirm whether the quality of the coating has reached the predetermined target, and then continues with the subsequent processing and final molding.

[0076] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made by using the contents of the present invention description and drawings under the inventive concept of the present invention, or direct / indirect application in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A method for manufacturing a circuit board with large double-sided gold pads, wherein the circuit board is processed using a panel structure formed by splicing together several unit boards, wherein one side of the unit board is designed with a large pad pattern and the other side is designed with a small pad pattern, and the area ratio of the large pad pattern to the small pad pattern is greater than 8:1, characterized in that: The manufacturing method comprises the following steps: S10: arranging a plurality of unit boards to form the panel structure, and the small pad patterns are located on the front surface of the panel structure; The edge area of the panel structure is a process edge, and the area enclosed by the process edge is a pattern area; The process edge comprises a clamping edge in the electroplating process, the edge opposite to the clamping edge is a bottom edge, and the other two edges are support edges; S20: drilling and electroplating the panel structure, and then manufacturing a circuit pattern to form an outer layer circuit board; The drilling comprises drilling positioning holes in the process edge; The circuit pattern comprises the large pad pattern and the small pad pattern; The manufacturing of the circuit pattern comprises etching the plate edge to form a copper-free frame, etching part of the process edge to form an etching window pattern, and further etching the positioning holes; S30: taking a first insulating plate and drilling through holes corresponding to the positioning holes; The first insulating plate is fixed on the front surface of the panel structure through the positioning holes in a non-contact manner, and the size of the first insulating plate covers the small pad pattern in the panel structure; A second insulating plate is arranged at the bottom of the panel structure to form a whole to-be-electroplated structure; S40: electroplating gold processing on the to-be-electroplated structure, and then performing subsequent processing to form the circuit board.

2. The method for manufacturing a circuit board with double-sided large-area gold pads according to claim 1, characterized in that: The circuit board is formed by arranging a plurality of front surfaces of the to-be-electroplated structures in the same direction, the distance between two to-be-electroplated structures is greater than the distance between the insulating plate and the small pad pattern in a single structure, a multi-layer to-be-electroplated structure is formed, and then electroplating and subsequent processing are performed to form the circuit board.

3. The method of claim 2, wherein the step of forming a pair of pads on the circuit board comprises the steps of: forming a pair of pads on the circuit board; and forming a pair of pads on the circuit board, wherein the pair of pads on the circuit board are electrically connected to the pair of pads on the circuit board. The multi-layer to-be-electroplated structure comprises arranging an insulating plastic mesh plate on the side exposing the large pad pattern.

4. The method of claim 3, wherein the step of forming the solderable pads comprises the steps of: forming a first solderable pad on the first surface of the substrate; and forming a second solderable pad on the second surface of the substrate. The mesh number of the insulating plastic mesh plate is 35 to 71.

5. The method of claim 1 or 2, wherein the method further comprises the step of: The distance between the first insulating plate and the small pad pattern in the to-be-electroplated structure is 5 mm to 20 mm. ​ 6. The method of claim 1 or 2, wherein the method further comprises the step of: The thickness of the insulating plate is 1.0 mm to 10.0 mm. ​ 7. The method for manufacturing a circuit board with double-sided large-area gold pads according to claim 1, characterized in that: The drilling comprises drilling fixing holes in the panel structure and the second insulating plate, and the second insulating plate is fixed with the panel structure through the fixing holes.

8. The method of claim 1 or 7, wherein the method further comprises the step of: The length of the second insulating plate is 5 cm to 20 cm extending outward from the bottom edge, and the width is greater than or equal to the width of the size of the panel structure. ​ 9. The method for manufacturing a circuit board with double-sided large-area gold pads according to claim 1, characterized in that: The etching window pattern is located on the support edge.

10. The method of claim 1, wherein the method further comprises: forming a solder mask on the first and second surfaces of the circuit board; and removing the solder mask from the first and second surfaces of the circuit board to expose the first and second surfaces of the circuit board. The width of the copper-free frame is 1 mm to 5 mm.

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