A four-element optical coupler infrared LED epitaxial wafer and its preparation method

Abstract

The present invention relates to the field of LED technology, and specifically to a quaternary optical coupling infrared LED epitaxial wafer and a preparation method thereof. The quaternary optical coupling infrared LED epitaxial wafer includes, from bottom to top, an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type current expansion layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type restriction layer, an N-side space layer, a first active region, a second active region, a P-side space layer, a P-type restriction layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current expansion layer, and a P-side contact layer; the thickness of the second active region is less than the thickness of the first active region. The present invention combines the current tunneling layer design with the dual current active region structure design, and the obtained quaternary optical coupling infrared LED epitaxial wafer has high power and good uniformity, improves the power characteristics under small current, and can be used to replace the existing binary optical coupling infrared LED materials.

Description

Technical Field

[0001] The invention relates to the technical field of LEDs, and in particular to a quaternary optical coupler infrared LED epitaxial wafer and a preparation method thereof. Background Art

[0002] Optocouplers (or optocouplers for short) are devices that use light as a medium to transmit electrical signals. Usually, the light emitter (infrared LED) and the receiver are encapsulated in the same tube shell. When an electrical signal is applied to the input end, the light emitter emits light, and the light receiver generates a photocurrent after receiving the light, which flows out from the output end, thus realizing the "electricity-light-electricity" conversion, and is widely used in digital circuits.

[0003] Conventional optical coupler emitters use binary infrared LED materials grown by liquid phase epitaxy (LPE). Figure 1 As shown, the N-type GaAs electron layer 2 and the P-type GaAs hole layer 3 are grown from bottom to top on the N-type GaAs substrate 1 using LPE epitaxial technology. Since conventional binary optical coupler light emitters LED epitaxial wafers use liquid phase epitaxy LPE growth technology, the raw material cost and production cost are high, and there are also disadvantages such as low power, poor uniformity, and large power attenuation under low current. As a light emitter, the binary infrared LED cannot achieve high power and cannot meet the rapid development of the optical coupler market. Therefore, it is of great significance to develop a quaternary high-power infrared LED to replace the binary optical coupler light emitter. Summary of the invention

[0004] In view of the shortcomings of the prior art, the present invention provides a quaternary optocoupler infrared LED epitaxial wafer, which has the advantages of high power, good uniformity, low cost, etc., and can effectively replace the existing binary optocoupler infrared LED epitaxial material.

[0005] The first object of the present invention is to provide a quaternary optical coupler infrared LED epitaxial wafer, which comprises, from bottom to top, an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type current expansion layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type restriction layer, an N-side space layer, a first active area, a second active area, a P-side space layer, a P-type restriction layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current expansion layer, and a P-side contact layer; the thickness of the second active area is less than the thickness of the first active area.

[0006] On the one hand, the present invention adopts a current tunneling layer design so that carriers under low current can directly pass through the confinement layer through the tunneling effect to enter the light-emitting active area, thereby solving the problem of voltage rise and power shortage caused by the inability of carriers to cross the potential barrier between the confinement layer and the current expansion layer under low current; on the other hand, by adopting a structural design of dual current active areas with different thicknesses in the light-emitting area, it can be ensured that the optical coupler infrared LED has good power response characteristics under both high and low currents; the obtained quaternary optical coupler infrared LED epitaxial wafer has high power and good uniformity, improves the power characteristics under low current, can be used to replace the original binary optical coupler infrared LED material, and has a broader application market.

[0007] Furthermore, the material of the N-type tunneling transition layer is Al x2 Ga 1-x2 As, wherein the Al composition x2 is gradual, starting from an initial set composition of 0.2 on the side close to the N-type current spreading layer, and then gradually changing to 0.02, with a composition gradient rate of 0.009 / nm to 0.018 / nm; the material of the N-type current tunneling layer is GaAs.

[0008] Furthermore, the material of the P-type tunneling transition layer is Al x7 Ga 1-x7 As, wherein the Al component x7 is gradual, starting from the initial set component of 0.02 near the side of the P-type restriction layer, and then gradually changing to 0.2, and the rate of component gradual change is 0.009 / nm~0.018 / nm; the material of the P-type current tunneling layer is GaAs. The present invention can solve the problem of insufficient power of the optocoupler LED under low current by introducing the current tunneling layer and the tunneling transition layer design between the traditional restriction layer and the current expansion layer, and at the same time, by virtue of the narrow band gap and high mobility of GaAs, help the carriers to directly pass through the restriction layer through the tunneling effect and enter the light-emitting active area, solving the problem of voltage rise and power shortage caused by the inability of the carriers to cross the barrier between the restriction layer and the current expansion layer under low current; in addition, the design can also reduce the barrier mutation between the epitaxial layer interface, improve the chip response rate under low current and the current expansion capacity under high current, and ensure the rapid injection of carriers under low current to form radiative composite luminescence, thereby improving the problem of low brightness power within the working range of low current, and avoiding the problem of high working voltage caused by interface barrier difference under high current.

[0009] Furthermore, the first active region is composed of In y1 Ga 1-y1 As / (Al y2 Ga 1-y2 ) 0.5 As 0.5P is a periodic cyclic structure in which quantum well / barrier materials are alternately grown. The number of cyclic pairs is 5 to 8 pairs, and all of them are non-doped. y1 Ga 1- y1 The thickness of As is 9nm to 11nm, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm~20nm, wherein the value ranges of y1 and y2 are 0.18~0.24 and 0.2~0.4 respectively.

[0010] Furthermore, the second active region is composed of In y3 Ga 1-y3 As / (Al y4 Ga 1-y4 ) 0.5 As 0.5 P is a periodic cyclic structure in which quantum well / barrier materials are alternately grown. The number of cyclic pairs is 5 to 8 pairs, and all of them are non-doped. y3 Ga 1- y3 The thickness of As is 4nm to 6nm, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10nm to 12nm, wherein the value ranges of y3 and y4 are 0.18 to 0.24 and 0.2 to 0.4 respectively. The present invention forms a dual current active region by designing the first and second active regions, and utilizing the characteristic that the electron mobility is much greater than the hole mobility, designs a narrower well / barrier structure on one side of the P surface as the second active region, which helps to perform radiation recombination and luminescence as close as possible to the area with a higher hole concentration, thereby improving the luminous power under low current. As the current increases, more carriers can be captured in the first active region with a wider well / barrier for recombination, thereby improving the current response characteristics of the optocoupler LED as a dual current active region.

[0011] The second purpose of the present invention is to provide a method for preparing a quaternary optical coupling infrared LED epitaxial wafer, using MOCVD (metal organic chemical vapor deposition) equipment to sequentially grow an N-type GaAs buffer layer, an N-type current expansion layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type restriction layer, an N-side space layer, a first active region, a second active region, a P-side space layer, a P-type restriction layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current expansion layer, and a P-surface contact layer on an N-type GaAs substrate. Due to the good nucleation quality characteristics of MOCVD growth, the epitaxial structure can be grown at a high rate, which greatly reduces the production cost and raw material cost and improves the production capacity. The present invention adopts MOCVD to grow a high-power quaternary optical coupling infrared LED epitaxial wafer to replace the existing liquid phase epitaxy LPE grown binary optical coupling infrared LED epitaxial material, which not only reduces the production cost, but also the obtained epitaxial structure has high crystal quality and good uniformity, and has better reliability and application prospects.

[0012] Furthermore, the growth step of the N-type tunneling transition layer is as follows: setting the temperature of the reaction chamber to 690°C ± 10°C, introducing TMAl, TMGa, and AsH3 into the N-type current spreading layer, and growing Al with a thickness of 10nm to 20nm. x2 Ga 1-x2 As material, in which the Al component x2 is set to 0.2 when the structure layer is grown, and then gradually changes to 0.02, and the rate of component gradient is 0.009 / nm~0.018 / nm. The N-type dopant used in this layer is SiH4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 The growth steps of the N-type current tunneling layer are as follows: setting the reaction chamber temperature to 690°C ± 10°C, introducing TMGa and AsH3 into the N-type tunneling transition layer, and growing GaAs material with a thickness of 40nm to 60nm. The N-type dopant used in this layer is SiH4 with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 .

[0013] Furthermore, the growth step of the P-type current tunneling layer is as follows: setting the temperature of the reaction chamber to 690°C ± 10°C, introducing TMGa and AsH3 into the P-type confinement layer, and growing a GaAs material with a thickness of 40nm to 60nm, wherein the P-type dopant used in the layer is CCl4 with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3The growth steps of the P-type tunneling transition layer are as follows: setting the reaction chamber temperature to 690°C ± 10°C, introducing TMAl, TMGa, and AsH3 into the P-type current tunneling layer, and growing Al with a thickness of 10nm to 20nm. x7 Ga 1-x7 As material, in which the Al component x7 is set to 0.02 when the structure layer is grown, and then gradually changes to 0.2, and the rate of component gradient is 0.009 / nm~0.018 / nm. The N-type dopant used in this layer is CCl4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

[0014] Furthermore, the growth step of the first active region is: setting the temperature of the reaction chamber to 680°C ± 10°C, introducing TMAl, TMGa, TMIn, AsH3, and PH3 into the N-side space layer, and growing quantum wells and quantum barriers of In y1 Ga 1-y1 As、(Al y2 Ga 1-y2 ) 0.5 As 0.5 The periodic cyclic structure of P material is non-doped, and the single-layer quantum well In y1 Ga 1-y1 The thickness of As is 9nm to 11nm, where the value of y1 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm~20nm, and the value range of y2 is 0.2~0.4.

[0015] Furthermore, the growth step of the second active region is: setting the temperature of the reaction chamber to 680°C ± 10°C, introducing TMAl, TMGa, TMIn, AsH3, and PH3 into the first active region, and growing quantum wells and quantum barriers of In y3 Ga 1-y3 As、(Al y4 Ga 1-y4 ) 0.5 As 0.5 The periodic cyclic structure of P material is non-doped, and the single-layer quantum well In y3 Ga 1-y3 The thickness of As is 4nm to 6nm, where the value of y1 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5The thickness of P is 10nm~12nm, and the value range of y2 is 0.2~0.4.

[0016] Compared with the prior art, the present invention has the following beneficial effects: 1. The present invention adopts a current tunneling layer and tunneling transition design in the epitaxial wafer structure, that is, an N-type GaAs current tunneling layer is inserted between the N-type limiting layer and the N-type current extension layer, and at the same time, an AlGaAs gradient material is used as an N-type tunneling transition layer structure on the side of the N-type GaAs current tunneling layer close to the N-type current extension layer, and a P-type GaAs current tunneling layer is inserted between the P-type limiting layer and the P-type current extension layer, and at the same time, an AlGaAs gradient material is used as an N-type tunneling transition layer on the side of the P-type GaAs current tunneling layer close to the P-type current extension layer, so that carriers under small currents can directly pass through the limiting layer through the tunneling effect and enter the light-emitting active area, thereby solving the problems of voltage rise and power shortage caused by the inability of carriers to cross the potential barrier between the limiting layer and the current extension layer under small currents.

[0017] 2. The present invention adopts a dual current active area structural design in the light-emitting area, and designs a narrower well / barrier structure on the P-side as the second active area, which helps to carry out radiative recombination and luminescence as close to the position with higher hole concentration as possible, thereby improving the luminous power under low current. As the current increases, more carriers can be captured in the first active area with a wider well / barrier for recombination, ensuring that the optically coupled infrared LED has good power response characteristics at both high and low currents.

[0018] 3. The present invention adopts MOCVD to grow high-power quaternary optically coupled infrared LED epitaxial wafers to replace the existing binary optically coupled infrared LED epitaxial materials, which not only reduces the production cost, but also the epitaxial structure of the new solution has high crystal quality and good uniformity, and has better reliability and application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a schematic diagram of the structure of a conventional binary optocoupler LED epitaxial wafer; Figure 2 This is a schematic diagram of the structure of a quaternary optical coupler infrared LED epitaxial wafer of the present invention; Figure 3 It is a comparison diagram of emission power curves of the quaternary optically coupled infrared LED of the present invention and the conventional binary optically coupled infrared LED.

[0020] Description of the numbers in the schematic diagram: 1. N-type GaAs substrate; 2. N-type GaAs electron layer; 3. P-type GaAs hole layer; 4. N-type GaAs buffer layer; 5. N-type current spreading layer; 6. N-type tunneling transition layer; 7. N-type current tunneling layer; 8. N-type confinement layer; 9. N-side space layer; 10. First active region; 11. Second active region; 12. P-side space layer; 13. P-type confinement layer; 14. P-type current tunneling layer; 15. P-type tunneling transition layer; 16. P-type current spreading layer; 17. P-side contact layer. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present application and its application or use. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] In the description of the present application, it should be understood that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present application.

[0023] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.

[0024] See also Figures 1 to 3 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the form, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0025] A four-element optical coupler infrared LED epitaxial wafer is provided in one embodiment of the present invention, and its structural schematic diagram is as follows: Figure 2As shown, from bottom to top, it includes an N-type GaAs substrate 1, an N-type GaAs buffer layer 4, an N-type current spreading layer 5, an N-type tunneling transition layer 6, an N-type current tunneling layer 7, an N-type limiting layer 8, an N-side space layer 9, a first active area 10, a second active area 11, a P-side space layer 12, a P-type limiting layer 13, a P-type current tunneling layer 14, a P-type tunneling transition layer 15, a P-type current spreading layer 16, and a P-side contact layer 17.

[0026] In some embodiments, the material of the N-type tunneling transition layer is Al x2 Ga 1-x2 As, thickness is 10nm~20nm. The Al component x2 is gradually changed, starting from the initial set component of 0.2 near the N-type current spreading layer, and then gradually changes to 0.02, and the rate of component gradual change is 0.009 / nm~0.018 / nm. N-type tunneling transition layer Al x2 Ga 1-x2 The doping concentration of As is 1×10 18 cm -3 ~2×10 18 cm -3 The N-type dopant used in this layer is SiH4.

[0027] In some embodiments, the material of the N-type current tunneling layer is GaAs, with a thickness of 40 nm to 60 nm and a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 The N-type dopant used in this layer is SiH4.

[0028] In some embodiments, the material of the P-type tunneling transition layer is Al x7 Ga 1-x7 As, thickness is 10nm~20nm. The Al component x7 is gradual, starting from the initial set component of 0.02 near the P-type restriction layer, and then gradually changes to 0.2, and the rate of component gradual change is 0.009 / nm~0.018 / nm. P-type tunneling transition layer Al x7 Ga 1-x7 The doping concentration of As is 1×10 18 cm -3 ~2×10 18 cm -3 The P-type dopant used in this layer is CCl4.

[0029] In some embodiments, the material of the P-type current tunneling layer is GaAs, with a thickness of 40 nm to 60 nm and a doping concentration of 2×10 18 cm -3 ~5×10 18 cm-3 The P-type dopant used in this layer is CCl4.

[0030] The present invention can solve the problem of insufficient power of an optocoupler LED under low current by introducing a current tunneling layer and a tunneling transition layer design between a traditional confinement layer and a current expansion layer. By utilizing the characteristics of narrow band gap and high mobility of GaAs, the present invention helps carriers to directly pass through the confinement layer and enter the light-emitting active region through the tunneling effect, thereby solving the problem of voltage rise and power shortage caused by the inability to cross the potential barrier between the confinement layer and the current expansion layer due to low carrier concentration under low current. The present invention can also reduce the potential barrier mutation between the epitaxial layer interfaces, improve the chip response rate under low current and the current expansion capability under high current, ensure the rapid injection of carriers under low current to form radiative composite luminescence, thereby improving the problem of low brightness power within the low current working range, and also avoid the problem of high working voltage caused by interface potential barrier difference under high current.

[0031] In some embodiments, the first active region is composed of In y1 Ga 1-y1 As / (Al y2 Ga 1-y2 ) 0.5 As 0.5 P is a periodic cyclic structure in which quantum well / barrier materials grow alternately, with the number of cyclic pairs being 5 to 8. y1 Ga 1-y1 The thickness of As is 9nm to 11nm, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm~20nm, the value ranges of y1 and y2 are 0.18~0.24 and 0.2~0.4 respectively, and both are non-doped.

[0032] In some embodiments, the second active region is composed of In y3 Ga 1-y3 As / (Al y4 Ga 1-y4 ) 0.5 As 0.5 P is a periodic cyclic structure in which quantum well / barrier materials grow alternately, with the number of cyclic pairs being 5 to 8. y3 Ga 1-y3 The thickness of As is 4nm to 6nm, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5The thickness of P is 10nm to 12nm, and the value ranges of y3 and y4 are 0.18 to 0.24 and 0.2 to 0.4, respectively, and both are non-doped. The present invention designs the active area into a dual-current active area, which uses the characteristics that the electron mobility is much greater than the hole mobility, and the N-type carrier concentration is higher than the P-type carrier concentration under small current. Therefore, designing a narrower well / barrier structure on one side of the P surface as the second active area helps to perform radiative recombination and luminescence as close as possible to the area with a higher hole concentration, thereby improving the luminous power under small current. As the current increases, more carriers can be captured in the first active area with a wider well / barrier for recombination, thereby improving the current response characteristics of the optocoupler LED as a dual-current active area.

[0033] In another embodiment, the present invention also provides a method for preparing a quaternary optical coupler infrared LED epitaxial wafer, using MOCVD equipment to sequentially grow an N-type GaAs buffer layer, an N-type current expansion layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type restriction layer, an N-side space layer, a first active region, a second active region, a P-side space layer, a P-type restriction layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current expansion layer, and a P-side contact layer on an N-type GaAs substrate. Specifically, the following steps are included: (1) The MOCVD was evacuated to 50 mbar in a pure H2 atmosphere, and the reaction chamber temperature was set to 400°C. The N-type GaAs substrate was then transferred to the reaction chamber through a robot transfer bin, and then the temperature was rapidly raised to 690°C and maintained at a constant temperature of 690°C for 8 min.

[0034] (2) Growth of N-type GaAs buffer layer: The reaction chamber temperature was set to 690°C ± 10°C, TMGa and AsH3 were introduced, and GaAs buffer layer material with a thickness of 150nm to 200nm was grown. SiH4 was used as the N-type dopant with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 .

[0035] (3) Growth of N-type current spreading layer: Set the reaction chamber temperature to 690℃±10℃, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 2500nm to 3500nm. x1 Ga 1-x1 As material, the value range of x1 is 0.15~0.2, SiH4 is used as N-type dopant, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

[0036] (4) Growth of N-type tunneling transition layer: Set the reaction chamber temperature to 690℃±10℃, introduce TMAl, TMGa, and AsH3, and grow Al with a thickness of 10nm to 20nm. x2 Ga 1-x2 As material. The component x2 is set to 0.2 when the structure layer is grown, and then gradually changes to 0.02, and the rate of component gradient is 0.009 / nm~0.018 / nm. The N-type dopant used in this layer is SiH4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

[0037] (5) Growth of N-type current tunneling layer: Set the temperature of the reaction chamber to 690℃±10℃, introduce TMGa and AsH3, and grow GaAs material with a thickness of 40nm~60nm. The N-type dopant used in this layer is SiH4 with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 .

[0038] (6) Growth of N-type confinement layer: Set the reaction chamber temperature to 690°C ± 10°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 300nm to 400nm. x3 Ga 1-x3 As material, where the value of x3 ranges from 0.28 to 0.32. This layer uses SiH4 as an N-type dopant with a doping concentration of 1.5×10 18 cm -3 ~2.5×10 18 cm -3 .

[0039] (7) Growth of N-side space layer: Set the reaction chamber temperature to 680℃±10℃, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 100nm~150nm. x4 Ga 1-x4 As material, where the value of x4 ranges from 0.1 to 0.15, and the layer is undoped.

[0040] (8) Growth of the first active region: Set the reaction chamber temperature to 680°C ± 10°C, introduce TMAl, TMGa, TMIn, AsH3, and PH3, and grow quantum wells and quantum barriers, respectively. y1 Ga 1-y1 As、(Al y2 Ga 1-y2 ) 0.5 As 0.5The periodic structure of P material. Single-layer quantum well In y1 Ga 1-y1 The thickness of As is 9nm to 11nm, where the value of y1 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm to 20nm, the value of y2 is in the range of 0.2 to 0.4, the number of periodic cycles is 5 to 8 pairs, and the wells / barriers are both non-doped.

[0041] (9) Growth of the second active region: Set the reaction chamber temperature to 680°C ± 10°C, introduce TMAl, TMGa, TMIn, AsH3, and PH3, and grow quantum wells and quantum barriers, respectively. y3 Ga 1-y3 As、(Al y4 Ga 1-y4 ) 0.5 As 0.5 The periodic structure of P material. Single-layer quantum well In y3 Ga 1-y3 The thickness of As is 4nm to 6nm, where the value of y3 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10nm to 12nm, and the value of y4 ranges from 0.2 to 0.4. The number of periodic cycles is 5 to 8 pairs, and both the wells and barriers are non-doped.

[0042] (10) Growth of P-side space layer: Set the reaction chamber temperature to 680℃±10℃, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 100nm~150nm. x5 Ga 1-x5 As material, where the value of x5 ranges from 0.1 to 0.15, and the layer is undoped.

[0043] (11) Growth of P-type confinement layer: Set the reaction chamber temperature to 690°C ± 10°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 300nm to 400nm. x6 Ga 1-x6 As material, where the value of x6 ranges from 0.28 to 0.32. This layer uses CCl4 as a P-type dopant with a doping concentration of 1.5×10 18 cm -3 ~2.5×10 18 cm -3 .

[0044] (12) Growth of P-type current tunneling layer: The reaction chamber temperature is set to 690℃±10℃, TMGa and AsH3 are introduced, and GaAs material with a thickness of 40nm to 60nm is grown. The P-type dopant used in this layer is CCl4, and the doping concentration is 2×10 18 cm -3 ~5×10 18 cm -3 .

[0045] (13) Growth of P-type tunneling transition layer: Set the reaction chamber temperature to 690°C ± 10°C, introduce TMAl, TMGa, and AsH3, and grow Al with a thickness of 10nm to 20nm. x7 Ga 1-x7 As material. The component x7 is set to 0.02 when the structure layer is grown, and then gradually changes to 0.2, and the rate of component gradient is 0.009 / nm~0.018 / nm. The P-type dopant used in this layer is CCl4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

[0046] (14) Growth of P-type current spreading layer: Set the reaction chamber temperature to 690°C ± 10°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 7000nm to 8000nm. x8 Ga 1-x8 As material, the value range of x8 is 0.15~0.2, CCl4 is used as P-type dopant, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

[0047] (15) Growth of P-side contact layer: The reaction chamber temperature was set to 620°C ± 10°C, TMGa and AsH3 were introduced, and GaAs contact layer material with a thickness of 50 nm to 80 nm was grown. CCl4 was used as a P-type dopant with a doping concentration of 2×10 19 cm -3 ~5×10 19 cm -3 .

[0048] (16) Wafer removal: After the growth is completed, the temperature of the MOCVD reaction chamber is lowered to 110°C, and then the pressure is adjusted to 1000 mbar. The reaction chamber is opened and the epitaxial wafer is removed.

[0049] The following is further described by means of specific examples.

[0050] Example 1 A method for preparing a quaternary optical coupler infrared LED epitaxial wafer comprises the following specific steps: (1) The MOCVD was evacuated to 50 mbar in a pure H2 atmosphere, and the reaction chamber temperature was set to 400°C. The N-type GaAs substrate was then transferred to the reaction chamber through a robot transfer bin, and then the temperature was rapidly raised to 690°C and maintained at a constant temperature of 690°C for 8 min.

[0051] (2) Growth of N-type GaAs buffer layer: The reaction chamber temperature was set to 690°C, TMGa and AsH3 were introduced, and a GaAs buffer layer material with a thickness of 200 nm was grown. SiH4 was used as the N-type dopant with a doping concentration of 3×10 18 cm -3 .

[0052] (3) Growth of N-type current spreading layer: Set the reaction chamber temperature to 690°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 3000nm. 0.16 Ga 0.84 As material, SiH4 is used as N-type dopant, and the doping concentration is 1.8×10 18 cm -3 .

[0053] (4) Growth of N-type tunneling transition layer: Set the reaction chamber temperature to 690°C, introduce TMAl, TMGa, and AsH3, and grow Al with a thickness of 10 nm. x2 Ga 1-x2 As material. The component x2 is set to 0.2 when the structure layer is grown, and then gradually changes to 0.02, and the rate of component gradient is 0.018 / nm. The N-type dopant used in this layer is SiH4, and the doping concentration is 2×10 18 cm -3 .

[0054] (5) Growth of N-type current tunneling layer: The reaction chamber temperature was set to 690°C, TMGa and AsH3 were introduced, and GaAs material with a thickness of 40nm was grown. The N-type dopant used in this layer was SiH4 with a doping concentration of 2×10 18 cm -3 .

[0055] (6) Growth of N-type confinement layer: Set the reaction chamber temperature to 690°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 320 nm. 0.28 Ga 0.72 As material, where the value of x1 is 0.28, this layer uses SiH4 as the N-type dopant with a doping concentration of 1.5×10 18 cm -3 .

[0056] (7) Growth of N-side space layer: Set the temperature of the reaction chamber to 680°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 120 nm. 0.1 Ga 0.9 As material, where the value of x4 is 0.1, and the layer is undoped.

[0057] (8) Growth of the first active region: Set the reaction chamber temperature to 680°C, introduce TMAl, TMGa, TMIn, AsH3, and PH3, and grow quantum wells and quantum barriers, respectively. 0.18 Ga 0.82 As、(Al 0.2 Ga 0.8 ) 0.5 As 0.5 The periodic structure of P material. Single-layer quantum well In 0.18 Ga 0.82 The thickness of As is 9nm, and the single-layer quantum barrier (Al 0.2 Ga 0.8 ) 0.5 As 0.5 The thickness of P is 18nm. The number of periodic pairs is 8, and both the wells and barriers are non-doped.

[0058] (9) Growth of the second active region: Set the reaction chamber temperature to 680°C, introduce TMAl, TMGa, TMIn, AsH3, and PH3, and grow quantum wells and quantum barriers, respectively. 0.18 Ga 0.82 As、(Al 0.2 Ga 0.8 ) 0.5 As 0.5 The periodic structure of P material. Single-layer quantum well In 0.18 Ga 0.82 The thickness of As is 4nm, and the single-layer quantum barrier (Al 0.2 Ga 0.8 ) 0.5 As 0.5 The thickness of P is 10 nm. The number of periodic pairs is 8, and both the wells and barriers are non-doped.

[0059] (10) Growth of P-side space layer: Set the reaction chamber temperature to 680°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 150 nm. 0.1 Ga 0.9 As material, where the value of x4 is 0.1, and the layer is undoped.

[0060] (11) Growth of P-type confinement layer: Set the reaction chamber temperature to 690°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 400 nm. 0.28 Ga 0.72 As material, where the value range of x1 is 0.28, this layer uses CCl4 as a P-type dopant with a doping concentration of 1.5×10 18 cm -3 .

[0061] (12) Growth of P-type current tunneling layer: The reaction chamber temperature was set to 690°C, TMGa and AsH3 were introduced, and GaAs material with a thickness of 40 nm was grown. The P-type dopant used in this layer was CCl4 with a doping concentration of 2×10 18 cm -3 .

[0062] (13) Growth of P-type tunneling transition layer: The reaction chamber temperature was set to 690°C, TMAl, TMGa, and AsH3 were introduced, and Al with a thickness of 10 nm was grown. x7 Ga 1-x7 As material. The component x7 is set to 0.02 when the structure layer is grown, and then gradually changes to 0.2, and the rate of component gradient is 0.018 / nm. The P-type dopant used in this layer is CCl4, and the doping concentration is 2×10 18 cm -3 .

[0063] (14) Growth of P-type current spreading layer: Set the reaction chamber temperature to 690°C, introduce TMGa, TMAl, and AsH3, and grow Al with a thickness of 7200nm. 0.15 Ga 0.85 As material, CCl4 is used as P-type dopant with a doping concentration of 2×10 18 cm -3 .

[0064] (15) Growth of P-side contact layer: The reaction chamber temperature was set to 620°C, TMGa and AsH3 were introduced, and GaAs contact layer material with a thickness of 50 nm was grown. CCl4 was used as the P-type dopant with a doping concentration of 5×10 19 cm -3 .

[0065] (16) Wafer removal: After the growth is completed, the temperature of the MOCVD reaction chamber is lowered to 110°C, and then the pressure is adjusted to 1000 mbar. The reaction chamber is opened and the epitaxial wafer is removed.

[0066] Comparative Example 1 A conventional binary optical coupler LED epitaxial wafer is prepared by conventional liquid phase epitaxy (LPE) growth method, and its structural schematic diagram is shown in FIG. Figure 1 shown.

[0067] Test example The conventional binary optical coupler infrared LED obtained in Comparative Example 1 and the quaternary optical coupler infrared LED obtained in Example 1 were tested for emission power at different currents. The results are shown in Tables 1 and Figure 3 It can be seen that the overall power of the quaternary optocoupler infrared LED prepared by the present invention is significantly better than that of the conventional binary optocoupler infrared LED, and has a significant improvement under low current, and for optocoupler devices for high-power applications, this solution has significant advantages.

[0068] Table 1 Transmitted power at different currents

[0069] In summary, the present invention adopts the design of current tunneling layer and tunneling transition layer, so that carriers under small current can directly pass through the confinement layer into the light-emitting active area through the tunneling effect, which can solve the problem of voltage rise and power shortage caused by the inability of carriers to cross the potential barrier between the confinement layer and the current expansion layer under small current; by adopting the structural design of double current active area in the light-emitting area, it can ensure that the optical coupler infrared LED has good power response characteristics at both large current and small current; the obtained four-element optical coupler infrared LED epitaxial wafer has high power and good uniformity, improves the power characteristics under small current, and can be used to replace the existing binary optical coupler infrared LED materials.

[0070] Finally, it should be emphasized that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various changes and modifications. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A quaternary optical coupler infrared LED epitaxial wafer, characterized in that: The quaternary optocoupler infrared LED epitaxial wafer includes, from bottom to top, an N-type GaAs substrate, an N-type GaAs buffer layer, an N-type current expansion layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type restriction layer, an N-side space layer, a first active area, a second active area, a P-side space layer, a P-type restriction layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current expansion layer, and a P-side contact layer; the thickness of the second active area is less than the thickness of the first active area.

2. A quaternary optical coupler infrared LED epitaxial wafer according to claim 1, characterized in that: The material of the N-type tunneling transition layer is Al x2 Ga 1-x2 As, wherein the Al composition x2 is gradual, starting from an initial set composition of 0.2 on the side close to the N-type current spreading layer, and then gradually changing to 0.02, with a composition gradient rate of 0.009 / nm to 0.018 / nm; the material of the N-type current tunneling layer is GaAs.

3. The quaternary optical coupler infrared LED epitaxial wafer according to claim 1, characterized in that: The material of the P-type tunneling transition layer is Al x7 Ga 1-x7 As, wherein the Al composition x7 is gradual, starting from an initial set composition of 0.02 on the side close to the P-type confinement layer, and then gradually changes to 0.2, and the composition gradient rate is 0.009 / nm to 0.018 / nm; the material of the P-type current tunneling layer is GaAs.

4. The quaternary optical coupler infrared LED epitaxial wafer according to claim 1, characterized in that: The first active region is composed of In y1 Ga 1-y1 As / (Al y2 Ga 1-y2 ) 0.5 As 0.5 P is a periodic cyclic structure in which quantum well / barrier materials are alternately grown. The number of cyclic pairs is 5 to 8 pairs, and all of them are non-doped. y1 Ga 1-y1 The thickness of As is 9nm to 11nm, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm~20nm, wherein the value ranges of y1 and y2 are 0.18~0.24 and 0.2~0.4 respectively.

5. The quaternary optically coupled infrared LED epitaxial wafer according to claim 1, characterized in that: The second active region is composed of In y3 Ga 1-y3 As / (Al y4 Ga 1-y4 ) 0.5 As 0.5 P is a periodic cyclic structure in which quantum well / barrier materials are alternately grown. The number of cyclic pairs is 5 to 8 pairs, and all of them are non-doped. y3 Ga 1-y3 The thickness of As is 4nm to 6nm, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10nm~12nm, and the value ranges of y3 and y4 are 0.18~0.24 and 0.2~0.4 respectively.

6. A method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to any one of claims 1 to 5, characterized in that: An N-type GaAs buffer layer, an N-type current spreading layer, an N-type tunneling transition layer, an N-type current tunneling layer, an N-type limiting layer, an N-side space layer, a first active region, a second active region, a P-side space layer, a P-type limiting layer, a P-type current tunneling layer, a P-type tunneling transition layer, a P-type current spreading layer, and a P-surface contact layer are sequentially grown on an N-type GaAs substrate using MOCVD equipment.

7. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 6, characterized in that: The growth steps of the N-type tunneling transition layer are as follows: setting the temperature of the reaction chamber to 690°C ± 10°C, introducing TMAl, TMGa, and AsH3 into the N-type current spreading layer, and growing Al with a thickness of 10nm to 20nm. x2 Ga 1-x2 As material, in which the Al component x2 is set to 0.2 when the structure layer is grown, and then gradually changes to 0.02, and the rate of component gradient is 0.009 / nm~0.018 / nm. The N-type dopant used in this layer is SiH4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 The growth steps of the N-type current tunneling layer are as follows: setting the reaction chamber temperature to 690°C ± 10°C, introducing TMGa and AsH3 into the N-type tunneling transition layer, and growing GaAs material with a thickness of 40nm to 60nm. The N-type dopant used in this layer is SiH4 with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 .

8. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 6, characterized in that: The growth steps of the P-type current tunneling layer are as follows: setting the temperature of the reaction chamber to 690°C ± 10°C, introducing TMGa and AsH3 into the P-type confinement layer, and growing GaAs material with a thickness of 40nm to 60nm. The P-type dopant used in this layer is CCl4 with a doping concentration of 2×10 18 cm -3 ~5×10 18 cm -3 The growth steps of the P-type tunneling transition layer are as follows: setting the reaction chamber temperature to 690°C ± 10°C, introducing TMAl, TMGa, and AsH3 into the P-type current tunneling layer, and growing Al with a thickness of 10nm to 20nm. x7 Ga 1-x7 As material, in which the Al component x7 is set to 0.02 when the structure layer is grown, and then gradually changes to 0.2, and the rate of component gradient is 0.009 / nm~0.018 / nm. The N-type dopant used in this layer is CCl4, and the doping concentration is 1×10 18 cm -3 ~2×10 18 cm -3 .

9. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 6, characterized in that: The growth steps of the first active region are: setting the temperature of the reaction chamber to 680°C ± 10°C, introducing TMAl, TMGa, TMIn, AsH3, and PH3 into the N-side space layer, and growing quantum wells and quantum barriers of In y1 Ga 1-y1 As、(Al y2 Ga 1-y2 ) 0.5 As 0.5 The periodic cyclic structure of P materials is non-doped, and the single-layer quantum well In y1 Ga 1-y1 The thickness of As is 9nm to 11nm, where the value of y1 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y2 Ga 1-y2 ) 0.5 As 0.5 The thickness of P is 18nm~20nm, and the value range of y2 is 0.2~0.

4.

10. The method for preparing a quaternary optically coupled infrared LED epitaxial wafer according to claim 6, characterized in that: The growth step of the second active region is: setting the temperature of the reaction chamber to 680°C ± 10°C, introducing TMAl, TMGa, TMIn, AsH3, and PH3 into the first active region, and growing quantum wells and quantum barriers of In y3 Ga 1-y3 As、(Al y4 Ga 1-y4 ) 0.5 As 0.5 The periodic cyclic structure of P materials is non-doped, and the single-layer quantum well In y3 Ga 1-y3 The thickness of As is 4nm to 6nm, where the value of y1 ranges from 0.18 to 0.24, and the single-layer quantum barrier (Al y4 Ga 1-y4 ) 0.5 As 0.5 The thickness of P is 10nm~12nm, and the value range of y2 is 0.2~0.4.

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