Patterned sapphire substrate and preparation method thereof

Abstract

The present invention relates to the field of semiconductor technology, and in particular to a patterned sapphire substrate and a preparation method thereof. The present invention includes a planar substrate, and a composite reflective layer formed on the surface of the planar substrate, wherein the composite reflective layer includes a patterned film layer, the thickness of the film layer gradually increases as it moves away from the planar substrate, and the refractive index of the film layer gradually decreases as it moves away from the planar substrate. The present invention deposits SiO2 and Na2SiF6 materials on a sapphire substrate, utilizes the reflection phenomenon between materials with different refractive indices, constructs a composite reflective layer, significantly increases the probability of light being transmitted from an LED device, and effectively improves the light extraction efficiency of the LED; the SiO2 and Na2SiF6 materials make it difficult for GaN on the side wall of the patterned substrate to adhere, thereby inhibiting the lateral growth of GaN, effectively reducing the stress generated by the lateral growth, and thereby reducing the number of defects in the LED.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a patterned sapphire substrate and a preparation method thereof. Background Art

[0002] By processing micro-scale conical protrusions on flat sapphire, the patterned sapphire substrate can optimize the crystal quality of the GaN epitaxial layer, enhance the light scattering and reflection of the LED substrate, and improve the light extraction rate. However, traditional patterned sapphire substrates have problems such as sapphire lattice mismatch, high stress, and low light extraction efficiency, which limit the LED luminous efficiency. To solve these problems, existing technologies such as CN113921662A disclose a patterned composite substrate and a preparation method thereof, which reduces lattice defects and improves the LED chip yield by combining dry and wet etching. However, this solution still has shortcomings: an effective reflection layer is not constructed, and the reflection phenomenon of materials with different refractive indices is not fully utilized, which weakens the reflection and scattering of light inside the LED and reduces the light extraction efficiency; at the same time, the silicon dioxide heterogeneous layer has limited inhibitory effect on the lateral growth of GaN. Summary of the invention

[0003] The technical problem to be solved by the present invention is to overcome the deficiencies of the prior art and provide a patterned sapphire substrate and a preparation method thereof.

[0004] The technical solution adopted by the present invention is as follows: A patterned sapphire substrate comprises a planar substrate and a composite reflective layer formed on the surface of the planar substrate. The composite reflective layer comprises a patterned film layer, the thickness of which gradually increases as it moves away from the planar substrate, and the refractive index of which gradually decreases as it moves away from the planar substrate.

[0005] This technical solution achieves the dual goals of improving the light extraction efficiency of LEDs and reducing defects. Specifically, two materials, SiO2 and Na2SiF6, are deposited on a planar substrate to form a composite reflective layer; when light enters a low refractive index medium from a high refractive index medium, reflection occurs. Due to the gradient change of the refractive index, the light will be reflected multiple times when passing through the interface of different materials, and the reflected light will be superimposed on each other to form a diffuse reflection effect; the diffuse reflection effect makes the light more evenly distributed on the surface of the pattern substrate, increasing the probability of light being emitted from the device, thereby improving the light extraction efficiency of the LED. Based on the refractive index characteristics and the influence on the growth of GaN materials, the refractive index of SiO2 and Na2SiF6 is lower than that of sapphire Al2O3, and is used to form a refractive index gradient, thereby enhancing the diffuse reflection effect; since SiO2 and Na2SiF6 are not conducive to the growth of GaN materials, especially on the side walls of the pattern substrate, the lateral growth of GaN is inhibited; the inhibition of lateral growth reduces defects caused by growth stress, and avoids defects that reduce the performance and life of the LED.

[0006] In addition, the patterned sapphire substrate proposed in the present invention also has the following additional technical features: According to an embodiment of the present invention, the planar substrate is a flat sapphire substrate.

[0007] This technical solution ensures the stability of the patterned sapphire substrate by specifying the planar substrate as a flat sapphire substrate.

[0008] According to one embodiment of the present invention, the film layer is formed on a sapphire substrate, has a specific geometric shape, has a size as small as a trace level, and is densely covered with conical protrusion structures in a matrix form.

[0009] This technical solution enhances the reflection effect and produces a unique optical effect by adjusting the specific geometric shape and conical protrusion structure formed by the film layer on the sapphire substrate.

[0010] According to one embodiment of the present invention, the film layer comprises at least the following three layers from bottom to top: The first sublayer is an Al2O3 film layer, with a refractive index n1 of 1.6~1.7 and a thickness h1 of 0.05μm~0.5μm; The second sublayer is a SiO2 film layer, with a refractive index n2 of 1.35~1.55 and a thickness h2 of 0.4μm~1μm; The third sublayer is a Na2SiF6 film layer, with a refractive index n3 of 1.28~1.35 and a thickness h3 of 0.8μm~1.5μm; In addition, the refractive index of the film layer shows a decreasing trend, that is, n1>n2>n3; The thickness of the film layer increases layer by layer, that is, h1<h2<h3.

[0011] This technical solution adjusts the three-layer structure of the film from bottom to top and the specific parameters of its material, refractive index and thickness to construct a gradient structure foundation with excellent reflective performance and unique optical properties. The three-layer structure of the film from bottom to top and the specific parameters of its material, refractive index and thickness to construct a gradient structure foundation with excellent reflective performance and unique optical properties.

[0012] According to an embodiment of the present invention, the film layer is patterned, and the first sublayer, the second sublayer and the third sublayer together form a gradient structure having the characteristics of improving LED light extraction efficiency and reducing defects.

[0013] This technical solution adjusts the gradient structure of the film layer after graphic processing. The structure is formed by the first sublayer, the second sublayer and the third sublayer, and has excellent reflective performance and unique optical properties to achieve the dual goals of improving LED light extraction efficiency and reducing defects.

[0014] To achieve the above object, the present invention also provides a method for preparing a patterned sapphire substrate.

[0015] A method for preparing a patterned sapphire substrate comprises the following steps: S1. Prepare a sapphire substrate: use a sapphire substrate as a planar substrate; S2. Constructing a composite reflective layer: S21, SiO2 film deposition: Place a clean flat substrate on a wafer carrier, transfer it to the PECVD equipment chamber through a robotic arm, introduce a process gas mixture, and control the thickness of the SiO2 film to be within the range of 0.4μm~1μm; S22, HMDS coating and Na2SiF6 embossing glue: HMDS is first coated on the SiO2 film layer by spin coating to enhance the adhesion of Na2SiF6; a layer of embossing glue containing Na2SiF6 is evenly coated, and the thickness of the embossing glue is controlled within the range of 0.8μm~1.5μm; S23, imprinting treatment: imprinting the flat substrate with Na2SiF6 imprinting glue, the pressure is controlled in the range of 10-20 kPa, the stage temperature under the piezoelectric plate is set to 80-140°C, and the pressing time is 10-60 minutes to complete the curing of the imprinting glue; S24, high temperature baking: after the embossing and demoulding, high temperature baking is performed in a vacuum, oxidizing or reducing atmosphere, the baking temperature is 600°C to 900°C, and the temperature holding time is 2 to 10 hours; S25, ICP dry etching: Place the flat substrate with the mask pattern into the ICP dry etching equipment, control the BCl3 and CHF gas input according to the preset flow rate, ICP equipment parameters: upper electrode power is 1000~1500W, lower electrode power is 450~750W, internal pressure is 0~10Torr, cooling temperature is 20~40℃, He gas pressure is 0~10Torr; CHF and BCl3 gas flow ratio is set to 10%, BCl3 gas flow is 60~140SCCM; etching depth is 0.05μm~0.5μm; S26, cleaning and finished product preparation: After etching is completed, a cleaning step is performed to remove excess materials and impurities, and finally a patterned sapphire composite substrate is formed.

[0016] This technical solution achieves precise patterning of the substrate surface and improves its optical performance and stability. Specifically, firstly, a sapphire substrate made of Al2O3 material is prepared as the base to ensure the stability and optical performance of the substrate; Through SiO2 film deposition, the thickness of the film layer is precisely controlled by PECVD equipment to provide a uniform substrate for subsequent processing; through HMDS coating with Na2SiF6 imprint glue, the adhesion of Na2SiF6 is enhanced, and a layer of imprint glue containing Na2SiF6 is evenly coated to provide the necessary material basis for imprint processing; during the imprint process, the imprint glue is solidified by controlling parameters such as pressure and temperature to form a structure with a specific pattern; high-temperature baking stabilizes the structure, removes existing residues, and improves the quality of the substrate; through ICP dry etching, specific gas flow and equipment parameters are used to control the etching depth and shape to achieve graphical processing of the substrate surface; cleaning and finished product preparation remove excess materials and impurities to ensure the purity and quality of the final product.

[0017] According to one embodiment of the present invention, in the SiO2 film deposition of step S21, the PECVD equipment parameters are adjusted as follows: the chamber pressure is set to 60~300Pa, the deposition power is 200W~500W, and the temperature is 220℃~360℃; the process gas mixture introduced is: silane SiH4, nitrous oxide N2O and nitrogen N2, with a ratio of 1~7:3~15:5~35; the thickness of the SiO2 film layer is controlled to be 0.5μm.

[0018] This technical solution precisely controls the deposition process of the SiO2 film by adjusting the parameters of the PECVD equipment, including chamber pressure, deposition power and temperature, and introducing a process gas mixture with a specific ratio, ensuring that the thickness of the SiO2 film is 0.5μm, so as to achieve the purpose of optimizing the film quality and performance.

[0019] According to an embodiment of the present invention, in the HMDS coating and Na2SiF6 embossing glue in step S22, the thickness of the embossing glue is 1.2 μm, and the particle size of Na2SiF6 is 150 nm.

[0020] This technical solution ensures the uniformity of the embossing glue and the dispersibility of the Na2SiF6 particles by adjusting the thickness of the embossing glue and the Na2SiF6 particle size in the HMDS coating and Na2SiF6 embossing glue, thereby providing a good foundation for subsequent embossing processing.

[0021] According to one embodiment of the present invention, in the imprinting process of step S23, the pressure is 18 kPa, the platform temperature below the piezoelectric plate is 120°C, and the pressurization time is 35 minutes to complete the curing of the imprinting glue; in the high-temperature baking of step S24, the atmosphere is an oxidizing atmosphere, the baking temperature is 750°C, and the temperature holding time is 4 hours.

[0022] This technical solution ensures the curing of the imprint glue and the removal of residues while ensuring the stability and quality of the substrate by adjusting specific parameters of the imprint process and high-temperature baking, including pressure, temperature, pressurization time, baking atmosphere, temperature and holding time.

[0023] According to one embodiment of the present invention, in the ICP dry etching of step S25, the upper electrode power is 1100W, the lower electrode power is 500W, the internal pressure is 3Torr, the cooling temperature is 30°C, the He gas pressure is 4Torr, the boron trichloride gas flow rate is 100SCCM, and the etching depth of the planar substrate is 0.25μm.

[0024] This technical solution controls the etching depth and shape by adjusting various parameters of ICP dry etching, including upper and lower electrode power, internal pressure, cooling temperature, He gas pressure and boron trichloride gas flow, to achieve precise graphical processing of the substrate surface.

[0025] Compared with the prior art, the present invention has the following beneficial effects: (1) Improve the light extraction efficiency of LEDs: By depositing SiO2 and Na2SiF6 materials on a sapphire substrate and utilizing the reflection phenomenon between materials with different refractive indices, a composite reflective layer is constructed. The refractive index of the reflective layer gradually decreases as it moves away from the substrate, causing light to be diffusely reflected on the surface of the patterned substrate, thereby enhancing the light scattering effect and significantly increasing the probability of light being transmitted from the LED device, effectively improving the light extraction efficiency of the LED. (2) Reducing LED defects: SiO2 and Na2SiF6 materials make it difficult for GaN to adhere to the side walls of the patterned substrate, thereby inhibiting the lateral growth of GaN and effectively reducing the stress caused by lateral growth, thereby reducing the number of defects in the LED; the reduction of defects helps to improve the overall performance of the LED and extend its service life. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a state diagram after graphical processing of the present invention.

[0027] Figure 2 It is a state diagram before the graphical processing of the present invention.

[0028] Figure 3 It is a flow diagram of the method of the present invention.

[0029] In the figure: 100, flat substrate; 200, composite reflective layer; 210, Al2O3 film layer; 220, SiO2 film layer; 230, Na2SiF6 film layer. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] Example 1 like Figure 1 to Figure 2 As shown, this embodiment provides a patterned sapphire substrate, including a planar substrate 100, and a composite reflective layer 200 formed on the surface of the planar substrate 100, wherein the composite reflective layer 200 includes a patterned film layer, the thickness of the film layer gradually increases as it moves away from the planar substrate 100, and the refractive index of the film layer gradually decreases as it moves away from the planar substrate 100.

[0032] This technical solution achieves the dual goals of improving the light extraction efficiency of LEDs and reducing defects. Specifically, two materials, SiO2 and Na2SiF6, are deposited on a planar substrate 100 to form a composite reflective layer 200; when light enters a low refractive index medium from a high refractive index medium, reflection occurs. Due to the gradient change of the refractive index, the light will be reflected multiple times when passing through the interface of different materials, and the reflected light will be superimposed on each other to form a diffuse reflection effect; the diffuse reflection effect makes the light more evenly distributed on the surface of the pattern substrate, increasing the probability of light being emitted from the device, thereby improving the light extraction efficiency of the LED. Based on the refractive index characteristics and the influence on the growth of GaN materials, the refractive index of SiO2 and Na2SiF6 is lower than that of sapphire Al2O3, and is used to form a refractive index gradient, thereby enhancing the diffuse reflection effect; since SiO2 and Na2SiF6 are not conducive to the growth of GaN materials, especially on the side walls of the pattern substrate, the lateral growth of GaN is inhibited; the inhibition of lateral growth reduces defects caused by growth stress, and avoids defects that reduce the performance and life of the LED.

[0033] In addition, the patterned sapphire substrate proposed in the present invention also has the following additional technical features: According to an embodiment of the present invention, the planar substrate is a flat sapphire substrate.

[0034] This technical solution ensures the stability of the patterned sapphire substrate by specifying the planar substrate as a flat sapphire substrate.

[0035] According to one embodiment of the present invention, the film layer is formed on a sapphire substrate, has a specific geometric shape, has a size as small as a trace level, and is densely covered with conical protrusion structures in a matrix form.

[0036] This technical solution enhances the reflection effect and produces a unique optical effect by adjusting the specific geometric shape and conical protrusion structure formed by the film layer on the sapphire substrate.

[0037] According to one embodiment of the present invention, the film layer comprises at least the following three layers from bottom to top: The first sub-layer is an Al2O3 film layer 210, whose refractive index n1 is 1.6-1.7 and thickness h1 is 0.05 μm-0.5 μm; The second sub-layer is a SiO2 film layer 220, whose refractive index n2 is 1.35-1.55 and thickness h2 is 0.4 μm-1 μm; The third sublayer is a Na2SiF6 film layer 230, whose refractive index n3 is 1.28-1.35 and thickness h3 is 0.8 μm-1.5 μm; In addition, the refractive index of the film layer shows a decreasing trend, that is, n1>n2>n3; The thickness of the film layer increases layer by layer, that is, h1<h2<h3.

[0038] This technical solution adjusts the three-layer structure of the film from bottom to top and the specific parameters of its material, refractive index and thickness to construct a gradient structure foundation with excellent reflective performance and unique optical properties. The three-layer structure of the film from bottom to top and the specific parameters of its material, refractive index and thickness to construct a gradient structure foundation with excellent reflective performance and unique optical properties.

[0039] According to an embodiment of the present invention, the film layer is patterned, and the first sublayer, the second sublayer and the third sublayer together form a gradient structure having the characteristics of improving LED light extraction efficiency and reducing defects.

[0040] This technical solution adjusts the gradient structure of the film layer after graphic processing. The structure is formed by the first sublayer, the second sublayer and the third sublayer, and has excellent reflective performance and unique optical properties to achieve the dual goals of improving LED light extraction efficiency and reducing defects.

[0041] Example 2 Based on Example 1, Figure 1 to Figure 2 As shown, this embodiment provides a patterned sapphire substrate, including a planar substrate and a composite reflective layer formed on the surface of the planar substrate, wherein the film thickness of the composite reflective layer gradually increases in a direction away from the planar substrate, and the film refractive index of the composite reflective layer gradually decreases in a direction away from the planar substrate.

[0042] The thickness of the SiO2 film layer 220 is 0.5 μm, the thickness of the Na2SiF6 film layer 230 is 1.15 μm, and the thickness of the Al2O3 film layer 210 is 0.25 μm; Example 3 Based on Example 1, Figure 1 to Figure 2 As shown, this embodiment provides a patterned sapphire substrate, including a planar substrate and a composite reflective layer formed on the surface of the planar substrate, wherein the film thickness of the composite reflective layer gradually increases in a direction away from the planar substrate, and the film refractive index of the composite reflective layer gradually decreases in a direction away from the planar substrate.

[0043] The thickness of the SiO2 film layer 220 is 0.55 μm, the thickness of the Na2SiF6 film layer 230 is 1.0 μm, and the thickness of the Al2O3 film layer 210 is 0.35 μm; Example 4 Based on Example 1, Figure 1 to Figure 2 As shown, this embodiment provides a patterned sapphire substrate, including a planar substrate and a composite reflective layer formed on the surface of the planar substrate, wherein the film thickness of the composite reflective layer gradually increases in a direction away from the planar substrate, and the film refractive index of the composite reflective layer gradually decreases in a direction away from the planar substrate.

[0044] The thickness of the SiO2 film layer 220 is 0.4 μm, the thickness of the Na2SiF6 film layer 230 is 1.2 μm, and the thickness of the Al2O3 film layer 210 is 0.3 μm; Example 5 Based on Example 1, Figure 1 to Figure 2 As shown, this embodiment provides a patterned sapphire substrate, including a planar substrate and a composite reflective layer formed on the surface of the planar substrate, wherein the film thickness of the composite reflective layer gradually increases in a direction away from the planar substrate, and the film refractive index of the composite reflective layer gradually decreases in a direction away from the planar substrate.

[0045] The thickness of the SiO2 film layer 220 is 0.45 μm, the thickness of the Na2SiF6 film layer 230 is 1.25 μm, and the thickness of the Al2O3 film layer 210 is 0.2 μm; Example 6 Based on Example 1, Figure 1 to Figure 2 As shown, this embodiment provides a patterned sapphire substrate, including a planar substrate and a composite reflective layer formed on the surface of the planar substrate, wherein the film thickness of the composite reflective layer gradually increases in a direction away from the planar substrate, and the film refractive index of the composite reflective layer gradually decreases in a direction away from the planar substrate.

[0046] The thickness of the SiO2 film layer 220 is 0.8 μm, the thickness of the Na2SiF6 film layer 230 is 1.0 μm, and the thickness of the Al2O3 film layer 210 is 0.1 μm; Comparative Example 1: This comparative example provides a patterned sapphire substrate. No composite reflective layer is added to the surface of the planar substrate. Only patterns are etched on the sapphire planar substrate. The pattern height is 1.9 μm.

[0047] Through the experimental data results of Examples 2 to 6 and the graphic sapphire substrate of Comparative Example 1, it is analyzed that: in Example 2, the thickness of the SiO2 film layer is 0.5μm, the thickness of the Na2SiF6 film layer is 1.15μm, and the thickness of the Al2O3 film layer is 0.25μm, and the luminous efficiency is improved by 2.30%; in Example 3, the thickness of the SiO2 film layer is 0.55μm, the thickness of the Na2SiF6 film layer is 1.0μm, the thickness of the flat substrate table is 0.35μm, the film thickness and the refractive index of the composite reflective layer follow the law of gradual change, and the luminous efficiency is improved by 4.33%, indicating that this structure has a certain effect in improving the luminous efficiency of LEDs; in Example 4, the thickness of the SiO2 film layer is 0.4μm, the thickness of the Na2SiF6 film layer is 1 .2μm, the thickness of the flat substrate table is 0.3μm, and it also follows the law of gradual change of film thickness and refractive index. The luminous efficiency is improved by 3.35%. Although it is lower than that in Example 3, it still shows that it has a positive effect on improving the luminous efficiency of LEDs; in Example 5, the thickness of the SiO2 film layer is 0.45μm, the thickness of the Na2SiF6 film layer is 1.25μm, the thickness of the flat substrate table is 0.2μm, and the luminous efficiency is improved by 3.35%, which also shows that it is helpful to improve the luminous efficiency of LEDs; in Example 6, the thickness of the SiO2 film layer is 0.8μm, the thickness of the Na2SiF6 film layer is 1.0μm, the thickness of the flat substrate table is 0.1μm, and the luminous efficiency is improved by 2.58%. Although it is relatively low, it still shows that it has a positive effect on improving the luminous efficiency of LEDs. In Comparative Example 1, as a control group, the patterned sapphire substrate in this comparative example only etches a pattern with a height of 1.9 μm on the sapphire plane substrate, and no composite reflective layer is added. Therefore, its luminous efficiency does not increase at all and is lower than any group in the embodiments.

[0048] Table 1 Experimental data results of patterned sapphire substrates of Examples 2-6 and Comparative Example 1

[0049] In addition, to achieve the above-mentioned purpose, the present invention also provides a method for preparing a patterned sapphire substrate.

[0050] Based on Example 1, Figure 3 As shown, this embodiment provides a method for preparing a patterned sapphire substrate, comprising the following steps: S1. Prepare a sapphire substrate: use a sapphire substrate as a planar substrate; S2. Constructing a composite reflective layer: S21, SiO2 film deposition: Place a clean flat substrate on a wafer carrier, transfer it to the PECVD equipment chamber through a robotic arm, introduce a process gas mixture, and control the thickness of the SiO2 film to be within the range of 0.4μm~1μm; S22, HMDS coating and Na2SiF6 embossing glue: HMDS is first coated on the SiO2 film layer by spin coating to enhance the adhesion of Na2SiF6; a layer of embossing glue containing Na2SiF6 is evenly coated, and the thickness of the embossing glue is controlled within the range of 0.8μm~1.5μm; S23, imprinting treatment: imprinting the flat substrate with Na2SiF6 imprinting glue, the pressure is controlled in the range of 10-20 kPa, the stage temperature under the piezoelectric plate is set to 80-140°C, and the pressing time is 10-60 minutes to complete the curing of the imprinting glue; S24, high temperature baking: after the embossing and demoulding, high temperature baking is performed in a vacuum, oxidizing or reducing atmosphere, the baking temperature is 600°C to 900°C, and the temperature holding time is 2 to 10 hours; S25, ICP dry etching: Place the flat substrate with the mask pattern into the ICP dry etching equipment, control the BCl3 and CHF gas input according to the preset flow rate, ICP equipment parameters: upper electrode power is 1000~1500W, lower electrode power is 450~750W, internal pressure is 0~10Torr, cooling temperature is 20~40℃, He gas pressure is 0~10Torr; CHF and BCl3 gas flow ratio is set to 10%, BCl3 gas flow is 60~140SCCM; etching depth is 0.05μm~0.5μm; S26, cleaning and finished product preparation: After etching is completed, a cleaning step is performed to remove excess materials and impurities, and finally a patterned sapphire composite substrate is formed.

[0051] This technical solution achieves precise patterning of the substrate surface and improves its optical performance and stability. Specifically, firstly, a sapphire substrate made of Al2O3 material is prepared as the base to ensure the stability and optical performance of the substrate; Through SiO2 film deposition, the thickness of the film layer is precisely controlled by PECVD equipment to provide a uniform substrate for subsequent processing; through HMDS coating with Na2SiF6 imprint glue, the adhesion of Na2SiF6 is enhanced, and a layer of imprint glue containing Na2SiF6 is evenly coated to provide the necessary material basis for imprint processing; during the imprint process, the imprint glue is solidified by controlling parameters such as pressure and temperature to form a structure with a specific pattern; high-temperature baking stabilizes the structure, removes existing residues, and improves the quality of the substrate; through ICP dry etching, specific gas flow and equipment parameters are used to control the etching depth and shape to achieve graphical processing of the substrate surface; cleaning and finished product preparation remove excess materials and impurities to ensure the purity and quality of the final product.

[0052] According to one embodiment of the present invention, in the SiO2 film deposition of step S21, the PECVD equipment parameters are adjusted as follows: the chamber pressure is set to 60~300Pa, the deposition power is 200W~500W, and the temperature is 220℃~360℃; the process gas mixture introduced is: silane SiH4, nitrous oxide N2O and nitrogen N2, with a ratio of 1~7:3~15:5~35; the thickness of the SiO2 film layer is controlled to be 0.5μm.

[0053] This technical solution precisely controls the deposition process of the SiO2 film by adjusting the parameters of the PECVD equipment, including chamber pressure, deposition power and temperature, and introducing a process gas mixture with a specific ratio, ensuring that the thickness of the SiO2 film is 0.5μm, so as to achieve the purpose of optimizing the film quality and performance.

[0054] According to an embodiment of the present invention, in the HMDS coating and Na2SiF6 embossing glue in step S22, the thickness of the embossing glue is 1.2 μm, and the particle size of Na2SiF6 is 150 nm.

[0055] This technical solution ensures the uniformity of the embossing glue and the dispersibility of the Na2SiF6 particles by adjusting the thickness of the embossing glue and the Na2SiF6 particle size in the HMDS coating and Na2SiF6 embossing glue, thereby providing a good foundation for subsequent embossing processing.

[0056] According to one embodiment of the present invention, in the imprinting process of step S23, the pressure is 18 kPa, the platform temperature below the piezoelectric plate is 120°C, and the pressurization time is 35 minutes to complete the curing of the imprinting glue; in the high-temperature baking of step S24, the atmosphere is an oxidizing atmosphere, the baking temperature is 750°C, and the temperature holding time is 4 hours.

[0057] This technical solution ensures the curing of the imprint glue and the removal of residues while ensuring the stability and quality of the substrate by adjusting specific parameters of the imprint process and high-temperature baking, including pressure, temperature, pressurization time, baking atmosphere, temperature and holding time.

[0058] According to one embodiment of the present invention, in the ICP dry etching of step S25, the upper electrode power is 1100W, the lower electrode power is 500W, the internal pressure is 3Torr, the cooling temperature is 30°C, the He gas pressure is 4Torr, the boron trichloride gas flow rate is 100SCCM, and the etching depth of the planar substrate is 0.25μm.

[0059] This technical solution controls the etching depth and shape by adjusting various parameters of ICP dry etching, including upper and lower electrode power, internal pressure, cooling temperature, He gas pressure and boron trichloride gas flow, to achieve precise graphical processing of the substrate surface.

[0060] Although the present invention is described in detail by referring to the accompanying drawings and in combination with the preferred embodiments, the present invention is not limited thereto. Without departing from the spirit and essence of the present invention, a person of ordinary skill in the art may make various equivalent modifications or substitutions to the embodiments of the present invention, and these modifications or substitutions shall be within the scope of the present invention. Any person of ordinary skill in the art may easily think of changes or substitutions within the technical scope disclosed by the present invention, and these shall be within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be subject to the scope of protection of the claims.

Claims

1. A patterned sapphire substrate, comprising a planar substrate (100), and a composite reflective layer (200) formed on the surface of the planar substrate (100), characterized in that: The composite reflective layer (200) comprises a patterned film layer, the thickness of which gradually increases in a direction away from the planar substrate (100), and the refractive index of which gradually decreases in a direction away from the planar substrate (100).

2. The patterned sapphire substrate according to claim 1, characterized in that: The planar substrate (100) is a flat sapphire substrate.

3. The patterned sapphire substrate according to claim 2, characterized in that: The film layer is formed on a sapphire substrate, has a specific geometric shape, is small to a trace level, and is densely covered with conical protrusion structures in a matrix form.

4. The patterned sapphire substrate according to claim 1 or 3, characterized in that: The film layer comprises at least the following three layers from bottom to top: The first sub-layer is an Al2O3 film layer (210), whose refractive index n1 is 1.6-1.7 and thickness h1 is 0.05 μm-0.5 μm; The second sub-layer is a SiO2 film layer (220) with a refractive index n2 of 1.35-1.55 and a thickness h2 of 0.4 μm-1 μm; The third sublayer is a Na2SiF6 film layer (230), with a refractive index n3 of 1.28-1.35 and a thickness h3 of 0.8 μm-1.5 μm; In addition, the refractive index of the film layer shows a decreasing trend, that is, n1>n2>n3; The thickness of the film layer increases layer by layer, that is, h1<h2<h3.

5. The patterned sapphire substrate according to claim 4, characterized in that: The film layer is processed by patterning, and the first sublayer, the second sublayer and the third sublayer together form a gradient structure with the characteristics of improving LED light extraction efficiency and reducing defects.

6. A method for preparing a patterned sapphire substrate, using the patterned sapphire substrate as claimed in any one of claims 1 to 5, characterized in that: The steps include: S1. Prepare a sapphire substrate: use a sapphire substrate as a planar substrate; S2. Constructing a composite reflective layer: S21, SiO2 film deposition: placing a clean flat substrate on a wafer carrier, transferring it to a PECVD equipment chamber via a robotic arm, introducing a process gas mixture, and controlling the thickness of the SiO2 film layer (220) to be within a range of 0.4 μm to 1 μm; S22, HMDS coating and Na2SiF6 embossing glue: HMDS is first coated on the SiO2 film layer (220) by spin coating to enhance the adhesion of Na2SiF6; a layer of embossing glue containing Na2SiF6 is evenly coated, and the thickness of the embossing glue is controlled within the range of 0.8μm to 1.5μm; S23, imprinting treatment: imprinting the flat substrate with Na2SiF6 imprinting glue, the pressure is controlled in the range of 10-20 kPa, the stage temperature under the piezoelectric plate is set to 80-140°C, and the pressing time is 10-60 minutes to complete the curing of the imprinting glue; S24, high temperature baking: after the embossing and demoulding, high temperature baking is performed in a vacuum, oxidizing or reducing atmosphere, the baking temperature is 600°C to 900°C, and the temperature holding time is 2 to 10 hours; S25, ICP dry etching: Place the flat substrate with the mask pattern into the ICP dry etching equipment, control the BCl3 and CHF gas input according to the preset flow rate, ICP equipment parameters: upper electrode power is 1000~1500W, lower electrode power is 450~750W, internal pressure is 0~10Torr, cooling temperature is 20~40℃, He gas pressure is 0~10Torr; CHF and BCl3 gas flow ratio is set to 10%, BCl3 gas flow is 60~140SCCM; etching depth is 0.05μm~0.5μm; S26, cleaning and finished product preparation: After etching is completed, a cleaning step is performed to remove excess materials and impurities, and finally a patterned sapphire composite substrate is formed.

7. The method for preparing a patterned sapphire substrate according to claim 6, characterized in that: In the SiO2 film deposition of step S21, the PECVD equipment parameters are adjusted as follows: the chamber pressure is set to 60~300Pa, the deposition power is 200W~500W, and the temperature is 220℃~360℃; the process gas mixture introduced is: silane SiH4, nitrous oxide N2O and nitrogen N2, with a ratio of 1~7:3~15:5~35; and the thickness of the SiO2 film layer (220) is controlled to be 0.5μm.

8. The method for preparing a patterned sapphire substrate according to claim 6, wherein: In the HMDS coating and Na2SiF6 embossing glue in step S22, the thickness of the embossing glue is 1.2 μm, and the particle size of Na2SiF6 is 150 nm.

9. The method for preparing a patterned sapphire substrate according to claim 6, wherein: In the imprinting process of step S23, the pressure is 18 kPa, the platform temperature below the piezoelectric plate is 120° C., and the pressurization time is 35 minutes to complete the curing of the imprint glue; in the high-temperature baking of step S24, the atmosphere is an oxidizing atmosphere, the baking temperature is 750° C., and the temperature holding time is 4 hours.

10. The method for preparing a patterned sapphire substrate according to claim 6, characterized in that: In the ICP dry etching of step S25, the upper electrode power is 1100W, the lower electrode power is 500W, the internal pressure is 3Torr, the cooling temperature is 30°C, the He gas pressure is 4Torr, the boron trichloride gas flow rate is 100SCCM, and the etching depth of the flat substrate is 0.25μm.

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