Semiconductor quantum device

Abstract

A semiconductor quantum device (1) according to the present disclosure is provided with: a transistor structure section (T) having a source (S), a drain (D), and a gate (G1); one or more quantum dot structure parts (3-1 to 3-n) capable of locally having charges; and quantum bit control current lines (5-1 to 5-n, 6-1 to 6-n) capable of changing the state of charge in the quantum dot structure portion, the quantum dot structure portion and the quantum bit control current lines being arranged in the same layer, and the transistor structure portion and the quantum dot structure portion being stacked in the stacking direction with respect to the substrate (2).

Description

Technical Field

[0001] The invention relates to a semiconductor quantum device. This application claims priority based on Japanese Patent Application No. 2022-145376 filed in Japan on September 13, 2022, and the contents are incorporated herein. Background Art

[0002] Research and development related to quantum computers and quantum annealing machines are progressing (for example, see Non-Patent Documents 1 and 2). For example, Non-Patent Document 1 describes an experimental example of a semiconductor quantum bit. Non-Patent Document 2 and Patent Document 1 describe an experimental example of a quantum annealing machine using a superconductor. The above technologies have been commercialized.

[0003] As a technology related to quantum computers, the development of related technologies using superconductors is being promoted compared to semiconductors. The reason is that the superconducting state without resistance is easier to achieve experimentally for the time required to maintain the quantum state (coherence time). However, in previous superconducting devices, it is difficult to achieve integration.

[0004] On the other hand, current computers are made of semiconductors such as silicon. Transistors used in current smartphones are already formed with a gate length of less than 15nm. In the future, transistors formed with a gate length of 2nm are also expected to be put into practical use (for example, refer to non-patent document 3).

[0005] In the existing semiconductor technology, technologies related to integration have been accumulated over the past few decades. Therefore, it is expected that quantum computer-related technologies with high reliability and versatility can be realized by applying existing semiconductor technology in the process of making quantum bits. However, it is generally more difficult to maintain the coherence of spin and charge states in semiconductors than in superconductors. Therefore, it is expected that the technology in this field will develop on this basis. Prior art literature Patent Literature

[0006] Patent Document 1: U.S. Patent Application Publication No. 2016 / 0019468 Patent Document 2: International Publication No. 2017 / 182826 Patent Document 3: Japanese Patent Application Publication No. 2021-197436 Non-patent literature

[0007] Non-patent literature 1: M.Veldhorst, CHYang, JCCHwang, W.Huang, JPDehollain, JTMuhonen, S.Simmons, A.Laucht, FEHudson, KMItoh, A.Morello & A.S.Dzurak "Atwo-qubit logic gate in silicon"-nature volume 526, pages 410-414 (2015) Non-patent document 2: MW Johnson et al. “Quantum annealing with manufactured spins” - Nature vol473, pp.194-198 (2011). Non-patent document 3: S. Mochizuki et al., "Stacked Gate-All-Around-nanosheetpFET with Highly Compressive Strained Si1-xGex Channel," 2020 IEEE International Electron Devices Meeting (IEDM), 2020, pp.2.3.1-2.3.4. Non-patent document 4: T. Tanamoto and K. Ono, "Compact spin qubits using the common gate structure of fin field-effect transistors", AIP Advances 11, 045004 (2021). Non-patent document 5: K. Takeda, J. Kamioka, T. Otsuka, J. Yoneda, T.-nakajima, M R Dellbecq, S. Amaha, G. Allison, T. Kodera, S. Oda, and S. Tarucha, "A fault-tolerantaddressable spin qubit in a-natural silicon quantum", Sci. Adv. 2, e1600694 (2016) Non-patent literature 6: J. Taylor, HA Engel, et al. "Fault-tolerant architecture for quantum computation using electrically controlled semiconductor spins." - nature Phys1, 177-183 (2005). Non-patent document 7: A.G. Fowler, A.C. Whiteside, A.L. McInnes, and A. Rabbani, Phys. Rev. X2, 041003 (2012). Non-patent document 8: A.Matsuzawa, "Low-voltage and low-power circuit design formixed analog / digital systems in portable equipment," in IEEE Journal of Solid-State Circuits, vol.29, -no.4, pp.470-480, (1994). Non-patent literature 9: N. Yoshioka, Y. Akagi, and H. Katsura, Phys. Rev. E99, 032113 (2019). Summary of the invention Technical problem to be solved by the invention

[0008] The object of the present invention is to provide a semiconductor quantum device that can be used as a basic unit of a quantum computer or quantum annealing machine that can be constructed by applying existing transistor technology. Specifically, the object of the present invention is to provide a semiconductor quantum device that can utilize the existing transistor structure as much as possible, can be manufactured in the current factory facilities, and can be easily measured. Solutions for solving technical problems

[0009] In order to achieve the above-mentioned purpose, the semiconductor quantum device of the present invention comprises: a transistor structure part having a source, a drain and a gate; one or more quantum dot structure parts capable of locally storing electric charges; and a quantum bit control current line capable of changing the state of the electric charges in the quantum dot structure part, wherein the quantum dot structure part and the quantum bit control current line are arranged in the same layer, and the transistor structure part and the quantum dot structure part are stacked in the stacking direction relative to the substrate. Effects of the Invention

[0010] According to the present invention, a semiconductor quantum device that is a basic unit of a quantum computer or quantum annealing machine that can be constructed by applying existing transistor technology can be provided. Specifically, according to the present invention, the conventional transistor structure can be used as much as possible and manufactured in a factory facility in the current state, and measurements can be performed easily. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a cross-sectional view showing the structure of the semiconductor quantum device according to the first embodiment, as viewed from the front. Figure 2 It is a perspective view showing the structure of the quantum dot structure portion according to the first embodiment. Figure 3 It is a cross-sectional view showing the structure of the semiconductor quantum device according to the second embodiment, as viewed from the front. Figure 4 It is a cross-sectional view showing the structure of a semiconductor quantum device according to the third embodiment, as viewed from a side surface. Figure 5 It is a perspective view showing the structure of a semiconductor quantum device according to the fourth embodiment. Figure 6 It is a cross-sectional view showing the structure of a semiconductor quantum device according to the fifth embodiment, as viewed from a side surface. Figure 7 It is a perspective view showing the structure of a quantum dot structure according to the fifth embodiment. Figure 8 This is a cross-sectional view showing a nanosheet structure according to a fifth embodiment, as viewed from the front. Fig. 9 : is a graph showing a function of an external magnetic field representing energy levels of two quantum bits according to the sixth embodiment. Fig.10 It is a diagram showing the RKKY interaction of the quantum dot structure according to the seventh embodiment. Fig.11 This is a diagram showing an example in which the logical quantum bit involved in the seventh embodiment is composed of four quantum dots. Fig.12 This is a diagram showing a method of performing quantum computation by changing the strength of electrostatic coupling between nanosheets according to the eighth embodiment. Fig.13 It is a diagram showing a semiconductor quantum device configured to have a layout capable of mounting a surface code according to the tenth embodiment. Fig.14 It is a diagram showing an example of sequentially performing quantum operations using the semiconductor quantum device involved in the tenth embodiment. Fig.15This is a diagram showing the structure of a semiconductor quantum device in which nanosheet-type quantum bits according to the eleventh embodiment are laterally connected. Fig.16 It is a diagram showing the lateral interaction of the RKKY interaction in the quantum dot structure according to the eleventh embodiment. Fig.17 This is a diagram showing a structure in which quantum annealing is implemented in a semiconductor quantum device according to a twelfth embodiment. Fig.18 It is a cross-sectional view showing the structure of a semiconductor quantum device according to a twelfth embodiment, as viewed from the front. Fig.19 It is a cross-sectional view showing the structure of a semiconductor quantum device according to a twelfth embodiment, as viewed from the front. Fig. 20 This is a diagram showing a structure in which the semiconductor quantum device according to the fifteenth embodiment is made to perform quantum bit operations using a three-dimensional NAND flash memory. Fig.21 It is a diagram showing the directions of magnetic domains of a magnetic substance applied to a semiconductor quantum device involved in the sixteenth embodiment. DETAILED DESCRIPTION

[0012] Before describing an embodiment of a semiconductor quantum device according to the present invention, techniques related to the structure, measurement, etc. of a conventional quantum device will be described.

[0013] (Conventional technology regarding structure) The quantum device has a quantum bit for storing quantum information. The previous quantum device is usually configured to arrange the semiconductor quantum bit in parallel with the substrate. However, in the previous quantum device, more wiring is required to control the quantum bit. Therefore, in the previous quantum device, the spacing between the wirings arranged in order to individually access the quantum bits arranged in parallel with the substrate is close, and there is a problem of crosstalk in which adjacent wirings affect each other.

[0014] Patent document 3 and non-patent document 4 propose a quantum dot structure in a FINFET (Fin Field-Effect Transistor) in a two-dimensional plane that reduces the number of wirings in a quantum device. However, in this structure, the current lines that generate the magnetic field are spatially separated from the structure of the quantum bit, so more current needs to flow. In addition, non-patent document 5 proposes a method in which a magnetic body is arranged on the same substrate as the quantum bit and a magnetic field gradient is utilized. However, in this method, it is necessary to separate the distance of more than two quantum bits, which has problems in integration.

[0015] (Conventional technology for logical qubits) In the case of a logical qubit formed by two or more charge spins, the previous method adopted a method of strictly solving the eigensolution of the Heisenberg interaction Hamiltonian operator between qubits and directly using the analytical mathematical solution. However, since the Heisenberg interaction is a complex form, there is a disadvantage that the operation between logical qubits is extremely complicated.

[0016] (Quantum Annealing Technology) Quantum annealing technology is related to artificial intelligence and is being studied as a means of solving optimization problems. First, Nishimori et al. developed physical theories and accelerated research in the development and sales of D-wave in Canada (see non-patent document 2 and patent document 1). Quantum annealing is a quantum extension of traditional annealing computing technology, and due to so-called NP-hard problems such as the traveling salesman problem, it is expected to shorten the computing time. However, the method of logically connecting quantum bits over long distances with solid quantum bits requires a new connection structure, and there are problems with reliability.

[0017] In the present invention, by stacking quantum bits in the vertical direction, the wiring can be arranged parallel to the substrate, and the crosstalk between the wirings can be reduced. In addition, since the method for forming a logical quantum bit of the present invention directly utilizes the eigenstates of multiple charge spins, there is no need to obtain an analytical solution and it is processed as an eigenstate of multi-body interaction, so the operation between logical bits can be performed through a voltage pulse corresponding to the energy difference between the eigenlevels.

[0018] Hereinafter, embodiments of the semiconductor quantum device according to the present invention will be described with reference to the drawings. [First embodiment] like Figure 1 As shown, the semiconductor quantum device 1 includes a plate-shaped substrate 2, a transistor structure T provided on the upper side of the substrate 2, and one or more quantum dot structures 3-n (n: a natural number) provided on the transistor structure T. In the quantum dot structure 3-n, it is configured so that electric charge can exist locally. The transistor structure T has a source, a drain, and a gate G1. The transistor structure T is provided with a source on the surface side of the paper in the figure, for example. The transistor structure T is provided with a drain on the back side of the paper in the figure, for example. The source and the drain can be interchangeable.

[0019] The substrate 2 is formed of, for example, a silicon material (see Figure 4 The transistor structure T has, for example, a plurality of sheet-shaped conductive portions (channel structure 8-n) for conducting charges and connected between the source and the drain. The sheet-shaped conductive portion is composed of a source electrode portion 8-nA, a drain electrode portion 8-nB, and a conductive channel portion 8-nC adjacent to the gate G1 (see Figure 4). The sheet-like conductive portion is generally referred to as a nanosheet, nanowire, nanobelt, or cross-plate transistor structure, but is hereinafter referred to as a channel structure portion 8-n for simplicity.

[0020] A plurality of channel structures 8-n are stacked in the stacking direction (Z-axis direction) relative to the substrate 2. The quantum dot structure 3-n is provided between the channel structures 8-n adjacent to each other in the stacking direction. That is, a plurality of quantum dot structure 3-n is provided between the plurality of channel structures 8-n. It is particularly effective that the quantum dot structure 3-n is provided in an adjacent position near the conductive channel portion 8-nC adjacent to the gate G1 in the channel structure 8-n. The transistor structure T and the quantum dot structure 3-n are stacked on the substrate 2 in the stacking direction. The portion where the constituent elements are not recorded in the figure (i.e., the space portion in the figure) is appropriately filled with, for example, an insulating layer 9. An insulating layer 9 is provided between the channel structure 8-n and the quantum dot structure 3-n.

[0021] The transistor structure T is a nanosheet transistor having a plurality of channel structures 8-n sandwiching a quantum dot structure 3-n. The gate G1 extends around the layer direction of the plurality of quantum dot structures 3-n. That is, the gate G1 is arranged around the transistor structure T. The gate G1 is adjacent to the conduction channel 8-nC in the channel structure 8-n of each layer. The gate G1 is adjacent to the conduction channel 8-nC in the channel structure 8-n (see Figure 4 The gate G1 generates an electric field by controlling the applied voltage, controls the density of electrons or holes generated in the conduction channel portion 8-nC, and controls the current between the drain and the source in the substrate 2.

[0022] Each channel structure 8-n is connected to a source contact wiring Sn for a source electrode and a drain contact wiring Dn for a drain electrode, which are connected to the source electrode 8-nA and the drain electrode 8-nB, respectively. On the upper side of the substrate 2, a nanosheet structure is formed by a plurality of channel structures 8-n, a gate G1, a source electrode, and a drain electrode. The quantum dot structure 3-n has at least one quantum dot 4-n and a pair of quantum bit control current lines 5-n and 6-n arranged on both sides of the quantum dot 4-n. Electrons or holes can be accumulated in the quantum dot 4-n in each quantum dot structure 3-n. The quantum dot 4-n is formed of a material capable of accumulating charge, such as polysilicon.

[0023] In addition, the quantum dot 4-n can be artificially made or naturally formed by defects. The energy level of the quantum dot 4-n can also be a trap energy level. The channel structure 8-n has two types of n-type semiconductors and p-type semiconductors. In most cases, the impurity concentration of the source / drain portion is higher than that of the portion under the gate.

[0024] Each quantum dot structure part 3-n has, for example, at least one quantum dot 4-n that functions as a quantum bit, and a pair of quantum bit control current lines 5-n and 6-n that can change the state of the charge in the quantum dot structure part 3-n. The quantum bit control current lines 5-n and 6-n of the quantum dot structure part 3-n are arranged in the same layer.

[0025] A quantum bit control current flows through the quantum bit control current lines 5-n and 6-n, and the quantum bit control current generates a magnetic field for controlling the spin state of electrons or holes in the quantum dot structure 3-n. The quantum bit control current lines 5-n and 6-n are arranged in a manner close to the quantum dot 4-n. The semiconductor quantum device 1 is provided with quantum dots 4-n that become quantum bits and quantum bit control current lines 5-n and 6-n that control the quantum bits between the nanosheet structures having a plurality of channel structures 8-n.

[0026] The substrate 2 is formed of, for example, a silicon raw material. The substrate 2 is formed into a rectangular plate-like body. In the figure, the long side direction of the substrate 2 is formed along the Y direction, and the short side direction (width direction) of the substrate 2 is formed along the X direction. The quantum dot structure 3-1 of the first layer is formed on the upper surface side of the substrate 2 via an insulating layer 9. The insulating layer 9 is formed of, for example, an insulator such as SiO2.

[0027] The quantum dot structure portion 3-1 is arranged in the central part when viewed in section along the Y direction, and is arranged with at least one quantum dot 4-1 when viewed from the side along the X direction. The number and configuration relationship of the quantum dots 4-1 will be described later. The quantum dot 4-1 is formed of a material that can store electric charge, such as polysilicon. When viewed in section along the Y direction, a pair of quantum bit control current lines 5-1 and 6-1 are arranged on both sides of the quantum dot 4-1. The pair of quantum bit control current lines 5-1 and 6-1 are formed of conductive materials such as Cu, for example. A pair of quantum bit control current lines 5-1 and 6-1 can generate a magnetic field in the surrounding area based on the current flowing therethrough, so that the state of the charge in the quantum dot 4-1 changes.

[0028] Specifically, a qubit control current for generating a magnetic field for controlling electrons or holes flows through a pair of qubit control current lines 5-1 and 6-1. In addition, it is also used to cause the charge displacement vibration in the quantum dot 4-n that becomes a qubit by flowing an alternating current through the qubit control current lines 5-1 and 6-1, thereby causing the charge to have a substantial magnetic field change effect.

[0029] The qubit control current line 5-1 is arranged on one side in the X-axis direction when viewed in section along the Y-axis. The qubit control current line 5-1 is formed of, for example, a general metal wiring such as polysilicon, copper, aluminum, tantalum, tungsten, or a composite thereof. The qubit control current line 5-1 is formed to extend in the Y-axis direction when viewed from the side along the X-axis direction.

[0030] The qubit control current line 6-1 is arranged on the other side in the X-axis direction when viewed in section along the Y-direction. The qubit control current line 6-1 is formed, for example, by metal wiring. The qubit control current line 6-1 is formed by extending along the Y-axis direction when viewed from the side along the X-axis direction. When observed along the Y-axis direction, the qubit control current line 6-1 is formed to be symmetrical with the qubit control current line 5-1 about the quantum dot 4-1. Through the above structure, a quantum dot structure part 3-1 is formed. On the upper side of the quantum dot structure part 3-1, a first layer of channel structure part 8-1 is formed through an insulating layer 9.

[0031] The channel structure 8-1 is formed of, for example, a silicon raw material. The silicon raw material may also be a composite material such as silicon germanium (SiGe). The channel structure 8-1 is formed as a rectangular plate-like body. In the figure, the long side direction of the channel structure 8-1 is formed along the Y direction, and the short side direction (width direction) of the channel structure 8-1 is formed along the X direction. On the upper surface side of the channel structure 8-1, a second layer of quantum dot structure 3-2 is formed via an insulating layer 9.

[0032] The quantum dot structure section 3-2 has the same structure as the quantum dot structure section 3-1. The quantum dot structure section 3-2 includes at least one quantum dot 4-2 and a pair of quantum bit control current lines 5-2 and 6-2 arranged on both sides of the quantum dot 4-2.

[0033] The quantum bit control current line 6-2 is formed to extend along the Y-axis direction when viewed from the side along the X-axis direction. When viewed along the Y-axis direction, the quantum bit control current line 6-2 is formed to be symmetrical with the quantum bit control current line 5-2 about the quantum dot 4-2. Through the above structure, the quantum dot structure part 3-2 is formed. On the upper side of the quantum dot structure part 3-2, a second layer of channel structure part 8-2 is formed through the insulating layer 9.

[0034] The channel structure 8-2 is formed of, for example, a silicon raw material. The channel structure 8-2 is formed into a rectangular plate-like body. The channel structure 8-2 has the same structure as the channel structure 8-1. On the upper side of the channel structure 8-2, a third layer of the quantum dot structure 3-3 is formed via an insulating layer 9, as in the above structure. On the upper side of the quantum dot structure 3-3, a third layer of the channel structure 8-3 is formed via an insulating layer 9.

[0035] The semiconductor quantum device 1 repeats the same structure as described above, and the -n formed to the quantum dot structure 3-n of the nth layer and the channel structure 8-n of the nth layer can be set by any number. In the example of the present embodiment, the semiconductor quantum device 1 is formed to the quantum dot structure 3-6 of the sixth layer and the channel structure 8-6 of the sixth layer. The gate G1 is an electrode shared by the quantum dot structure 3-n of the nth layer and the channel structure 8-n of the nth layer. The gate G1 is formed into a gate type in a manner covering the surroundings of the quantum dot structure 3-n of the nth layer and the channel structure 8-n of the nth layer. In the illustrated example, the gate G1 is formed into a gate type in a manner covering the surroundings of the quantum dot structure 3-n of the nth layer and the channel structure 8-n of the nth layer, but the gate G1 can also be configured on either side of the lateral side and the lower side of the channel structure 8-n.

[0036] According to the above structure, in the semiconductor quantum device 1, the interaction between the quantum bits (quantum dots 4-n) stacked in the stacking direction is performed via the nanosheet structure formed by the substrate 2 and each channel structure 8-n. The semiconductor quantum device 1 can generate a large magnetic field with less current by adjacently arranging the quantum bit control current lines 5-n and 6-n for controlling the quantum bits (quantum dots 4-n) at positions close to the quantum bits.

[0037] The semiconductor quantum device 1 constructs the channel for measuring the calculation result of the quantum dot 4-n as a nanosheet stacked in the layer direction. According to the above structure, the semiconductor quantum device 1 corresponds to the FINFET (Fin Field-Effect Transistor) structure of non-patent document 4. The working principle of the semiconductor quantum device 1 as a semiconductor quantum device is based on the FINFET structure of non-patent document 4, and can have a detailed structure. In the FINFET structure, when a voltage is applied to the gate G1, due to the field effect of the gate G1, the charge is gathered in the channel structure 8-n (the conduction path of the charge) between the source and the drain to form an inversion layer.

[0038] In the interaction between the quantum bits of the quantum dot structures 3-n and 3-n-1 adjacent in the stacking direction, the charge is accumulated in the portion near the gate G1 in the channel structure 8-n-1 to form an inversion layer. The interaction between the quantum bits of the quantum dot structures 3-n and 3-n-1 adjacent in the stacking direction utilizes the charge accumulated near the surface in the channel.

[0039] The insulating layer 9 between the quantum dot structure part 3-n-1 and the channel structure part 8-n-1, and the insulating layer 9 between the quantum dot structure part 3-n and the channel structure part 8-n-1 are sufficiently thin. For example, when the insulating layer 9 is a silicon oxide film, the thickness of the insulating layer 9 is set to be less than 2nm. In this case, quantum mechanical tunneling occurs between the quantum dot 4-n-1 and the channel structure part 8-n-1, and between the quantum dot 4-n and the channel structure part 8-n-1. Through the tunneling phenomenon, the charge spins in the two quantum dots 4-n and 4-n-1 located on both sides of the channel structure part 8-n-1 form an interaction. This is generally referred to as the RKKY (Ruderman KittelKasuya Yosida) interaction, which represents the interaction between the quantum bits of the charge via the channel structure part.

[0040] Tunneling through the film occurs between the spin in the quantum dot 4-n and the charge in the conduction channel (channel structure 8-n-1). In addition, tunneling through the film also occurs between the spin in the quantum dot 4-n-1 and the charge in the conduction channel (channel structure 8-n-1). The charge in the quantum dot 4-n interacts with the charge in the channel structure 8-n-1 via the tunneling, and the conduction charge can move in the channel structure 8-n-1, thus reaching the opposite side of the channel structure 8-n-1. Here, the spins in other quantum dots 4-n-1 also interact via tunneling. In this way, the interaction between the charges in the quantum dots 4-n and 4-n-1, i.e., the quantum bits, through the movement of the charges in the channel structure 8-n-1 becomes a specific description of the RKKY interaction. Table 1 shows an example of an operation corresponding to the operation mode, measurement mode, etc. of the quantum bit.

[0041] [Table 1] Table 1. Operations in QD-FINFET

[0042] In the example shown in Table 1, in the manipulation mode of the quantum bit (quantum dot 4-n), the quantum bit controls the current lines 5-n, 6-n (refer to Figure 1 ) current I ctrl is set to a non-zero value, the gate G1 (refer to Figure 1 ) voltage V G is set to a value greater than zero, the source (refer to Figure 1 ) voltage V S is set to a non-zero value, the drain (see Figure 1 ) voltage V Dis set to a non-zero value, and the transverse magnetic field generated by the qubit control current lines 5-n, 6-n, etc. is set to a non-zero value. In addition, the magnetic field generating unit other than the qubit control current lines 5-n, 6-n (see Figure 3 The magnetic field (magnetic field) generated by the magnetic body M Z is set to a non-zero value.

[0043] In the measurement mode of the quantum bit (quantum dot 4-n), the quantum bit controls the current I of the current lines 5-n and 6-n. ctrl is set to zero, the gate voltage V G is set to a value greater than zero, the source voltage V S is set to be lower than the drain voltage V D As a result, current flows between the source and drain. In addition, the state of the charge spin in the quantum dot 4-n is estimated based on the current between the source and drain. In addition, according to the symmetry of the circuit, the voltage V S Can be higher than the voltage V D In addition, the magnetic field (magnetic field) B generated by the magnetic field generating unit other than the quantum bit control current lines 5-n and 6-n Z is set to a non-zero value.

[0044] In the memory mode of the quantum bit (quantum dot 4-n), the quantum bit controls the current I of the current lines 5-n and 6-n. ctrl is set to zero, the gate voltage V G is set to a value greater than zero, the source voltage V S is set to a non-zero value, the drain voltage V D is set to a non-zero value. In addition, the magnetic field (magnetic field) B generated by the magnetic field generating unit other than the quantum bit control current lines 5-n and 6-n Z is set to a non-zero value.

[0045] The semiconductor quantum device (1) is characterized in that it has a plurality of nanosheet-shaped channel structures (8-n) through which current flows between source and drain electrodes, quantum dot structures (3-n) are respectively provided between the layers of the channel structures (8-n), and each quantum dot structure (3-n) is provided with a quantum dot (4-n) for electron or hole injection and a quantum bit control current line (5-n, 6-n) adjacent to the quantum dot (4-n).

[0046] In the example shown in the figure, the semiconductor quantum device 1 uses the spin of countable electrons or holes accumulated in the quantum dots 4-n as a basic unit, i.e., a quantum bit. In addition, the charge used in the semiconductor quantum device 1 refers to an electron or a hole. In the case of a hole, the polarity of the electrode applied is opposite to that of an electron, etc., but as an explanation, it is the same, so the following mainly describes it as a charge.

[0047] The quantum dot structure part 3-n is provided with at least two layers of first quantum dot structure parts and second quantum dot structure parts stacked adjacent to each other in the stacking direction. A first channel structure part included in a plurality of channel structure parts 8-n is arranged between the first quantum dot structure and the second quantum dot structure. By utilizing the magnetic field generated by passing the quantum bit control current through the quantum bit control current lines 5-n and 6-n, the quantum state of the charge spin in the first quantum dot structure part is changed, and the interaction between the charge spin in the first quantum dot structure part and the charge spin in the second quantum dot structure part is used as an indirect interaction via the charge in the first channel structure part.

[0048] In the semiconductor quantum device 1, the quantum dot 4-n uses the spin of the charge. The direction of the spin of the charge in the quantum dot 4-n corresponds to the quantum state (|↑> and |↓>). The quantum state of the charge spin changes based on the external magnetic field. The external magnetic field uses two types: a static magnetic field applied to the entire semiconductor quantum device 1 and a dynamic magnetic field generated by passing a current through the quantum bit control current lines 5-n and 6-n. The static magnetic field applied to the entire semiconductor quantum device 1 can also be applied using a magnetic body M (see FIG. 1 ) as shown in the second embodiment. Figure 3 ). In the case of the second embodiment, an alternating current or a pulse current flows through the quantum bit control current lines 5-n and 6-n, and the position of the charge in the quantum dot is vibrated, which can form the same situation as applying an effective magnetic field. In addition to the magnetic body M, the static magnetic field can also be generated based on the current.

[0049] When a static external magnetic field is applied, the spins of the charges in the quantum dot 4-n cause Zeeman separation depending on the orientation. For example, when an upward magnetic field is applied, the spins tend to align upward along the magnetic field. Therefore, the energy of the upward spin is lower, and the energy of the downward spin is higher. In this way, the spin state can be distinguished. Experimentally, for example, a magnetic field of 1T (Tesla) to several T is used. The size of the dynamic magnetic field can be estimated using Ampere's law. Based on the above wiring structure, the semiconductor quantum device 1 performs an operation to make the quantum dot 4-n become a state between |0> and |1>.

[0050] In the semiconductor quantum device 1, the quantum dots 4-n in the upper and lower layers of the nanosheet structure interact with each other via the interaction with the charges in the nanosheet structure. In the semiconductor quantum device 1, based on the interaction between the nanosheets, a CNOT (Controlled-n OT) gate operation is performed. A CNOT gate is a gate that has the function of maintaining the state when the control bit is |0>} and inverting the |0>} and |1>} of the target bit when the control bit is |1>}.

[0051] In addition, in the present embodiment, in the semiconductor quantum device 1, the plurality of stacked channel structures 8-n connected to the source and the drain are referred to as nanosheets, but other names may be generally used. In the semiconductor quantum device 1, one or more quantum dots 4-n are sandwiched between the nanosheets stacked in the stacking direction on the substrate 2.

[0052] like Figure 2 As shown in (A), in the semiconductor quantum device 1, when there is only one quantum dot 4-n, the quantum bit is composed of the charge in the quantum dot 4-n. Figure 2 As shown in (B), in the semiconductor quantum device 1, when there are multiple quantum dots 4-n, they can be used as logical quantum bits composed of multiple quantum dots 4-n described later. In addition, the quantum dots 4-n refer to fine structures and can also be composed of floating gates or trap levels.

[0053] [Second embodiment] Hereinafter, the semiconductor quantum device 1A involved in the second embodiment is described. In the following description, the same names and reference numerals are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device 1A of the second embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device 1A of the second embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0054] like Figure 3 As shown, the semiconductor quantum device 1A comprises: a plurality of semiconductor quantum devices 1 arranged side by side in the X-axis direction; a gate G1 formed in a manner surrounding the plurality of semiconductor quantum devices 1; and one or more magnetic bodies M arranged on the upper portion of the gate G1 corresponding to each semiconductor quantum device 1. In the example shown in the figure, three semiconductor quantum devices 1 are arranged side by side. In the semiconductor quantum device 1A, two or more semiconductor quantum devices 1 may also be arranged. Between each semiconductor quantum device 1, quantum dots 4-n are further arranged corresponding to the positions of the quantum dots 4-n of each layer in the nanosheet structure.

[0055] The magnetic body M is formed of, for example, a tiny nanomagnet that generates a magnetic field. Each magnetic body M imparts a magnetic field to the space containing each semiconductor quantum device 1. One or more magnetic bodies M disposed close to the transistor structure T generate a magnetic field for controlling the spin state of electrons or holes in the quantum dot structure 3-n. According to the semiconductor quantum device 1A, by utilizing the magnetic field generated by the magnetic body M, each quantum dot 4-n in each quantum dot structure 3-n of each layer in the nanosheet structure can be individually controlled.

[0056] In the presence of a magnetic field generated by a magnetic substance M, when an alternating current, pulse, or other electric field is applied to a quantum dot 4-n disposed between the quantum dot control current lines 5-n and 6-n of each layer in the nanosheet structure, the spin in the quantum dot 4-n moves in the quantum dot 4-n and is affected by the same effect as the change in the magnetic field. In this embodiment, by arranging the quantum dot control current lines 5-n and 6-n that impart a voltage change to the quantum dot 4-n at a position close to the quantum bit, control using a tilted magnetic field based on the magnetic substance M can be performed with less current.

[0057] In addition, Figure 3 In the example, a structure in which a magnetic body M is arranged on the upper side of the nanosheet structure in the same manner as the size of the nanosheet is illustrated, but the size of the magnetic body M does not need to match the width of the nanosheet, and can also be arranged inside the nanosheet as long as a gradient magnetic field can be generated.

[0058] As described in the first and second embodiments, the qubit control current lines 5-n and 6-n adjacent to the quantum dot 4-n can be used for both magnetic field generation and high-frequency electric field generation. The qubit control current lines 5-n and 6-n are also referred to as electric field control and magnetic field generation lines in the following embodiments.

[0059] [Third Embodiment] Hereinafter, the semiconductor quantum device 1B involved in the third embodiment will be described. In the following description, the same names and reference numerals are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device 1B of the third embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device 1B of the third embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0060] exist Figure 4 FIG. 2 shows a semiconductor quantum device 1B according to the third embodiment. Figure 4, a semiconductor quantum device 1B having a structure for controlling quantum bits sandwiched by channel structures 8-n is shown in side view. In the semiconductor quantum device 1B, source / drain are independently provided for each channel structure, and the interaction between quantum bits can be controlled by the potential of the source / drain.

[0061] The source electrode 8-nA of each channel structure 8-n is connected to a source contact wiring Sn, and the drain electrode 8-nB of each channel structure 8-n is connected to the source electrode 8-nA of each channel structure 8-n. The source contact wiring Sn and the drain contact wiring Dn are formed into a symmetrical structure and can be interchanged.

[0062] A source contact wiring S1 and a drain contact wiring D1 are formed in the channel structure 8-1. A source contact wiring S2 and a drain contact wiring D2 are formed in the channel structure 8-2. Similar to the above structure, a source contact wiring Sn and a drain contact wiring Dn are formed in the channel structure 8-n stacked in the stacking direction.

[0063] The length of the qubit control current line 5-1 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S1 and the drain contact wiring D1. The length of the qubit control current line 5-2 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S2 and the drain contact wiring D2. As with the above structure, the qubit control current line 5-n is repeatedly formed in the stacking direction.

[0064] The length of the qubit control current line 6-1 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S1 and the drain contact wiring D1. The length of the qubit control current line 6-2 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S1 and the drain contact wiring D1. As with the above structure, the qubit control current line 6-n is repeatedly formed in the stacking direction.

[0065] [Fourth Embodiment] Hereinafter, the semiconductor quantum device 1C involved in the fourth embodiment is described. In the following description, the same names and figure marks are used for the same structures as the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device 1C of the fourth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device 1 of the fourth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0066] exist Figure 5, the structure of the semiconductor quantum device 1C involved in the fourth embodiment is shown by a stereogram. In the length direction of the channel structure 8-1 of the first layer, a source contact wiring S1 is formed on the side of the source electrode 8-1A on one side of the Y-axis direction. In the length direction of the channel structure 8-1, a drain contact wiring D1 is formed on the side of the drain electrode 8-1B on one side of the Y-axis direction. The source contact wiring S1 and the drain contact wiring D1 are formed into a symmetrical structure and can also be interchanged.

[0067] In the quantum dot structure 3-1 of the first layer, a power supply wiring 5-1A is formed at the end of the qubit control current line 5-1 on one side in the Y-axis direction, and is raised toward the upper layer. The lower end of the power supply wiring 5-1A is bent in the X-axis direction and is electrically connected to the end of the qubit control current line 5-1 on one side in the Y-axis direction. The length of the qubit control current line 5-1 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S1 and the drain contact wiring D1.

[0068] In the quantum dot structure 3-1 of the first layer, a power supply wiring 6-1B (not shown) is formed at the end of the other side of the qubit control current line 6-1 in the Y-axis direction, which stands up to the upper layer side. The power supply wiring 6-1B is formed in the same shape as the power supply wiring 6-1A. The lower end of the power supply wiring 6-1B is bent in the X-axis direction and is electrically connected to the end of the other side of the qubit control current line 6-1 in the Y-axis direction. The length of the qubit control current line 6-1 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S1 and the drain contact wiring D1.

[0069] In the length direction of the channel structure 8-2 of the second layer, a source contact wiring S2 is formed on the side of the source electrode 8-2A on one side in the Y-axis direction, and is erected upward. In the length direction of the channel structure 8-2, a drain contact wiring D2 is formed on the side of the drain electrode 8-2B on one side in the Y-axis direction, and is erected upward. The source contact wiring S2 and the drain contact wiring D2 are formed into a symmetrical structure and can also be interchanged.

[0070] In the quantum dot structure 3-2 of the second layer, a power supply wiring 5-2A is formed at the end of the qubit control current line 5-2 on one side in the Y-axis direction, and is raised toward the upper layer. The lower end of the power supply wiring 5-2A is bent in the X-axis direction and is electrically connected to the end of the qubit control current line 5-2 on one side in the Y-axis direction. The length of the qubit control current line 5-2 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S1 and the drain contact wiring D1.

[0071] In the quantum dot structure 3-2 of the second layer, a power supply wiring 6-2B (not shown) is formed at the end of the other side of the qubit control current line 6-2 in the Y-axis direction, which stands up to the upper layer side. The power supply wiring 6-2B is formed in the same shape as the power supply wiring 6-2A. The lower end of the power supply wiring 6-2B is bent in the X-axis direction and is electrically connected to the end of the other side of the qubit control current line 6-2 in the Y-axis direction. The length of the qubit control current line 6-2 along the Y-axis direction is slightly shorter than the interval between the source contact wiring S1 and the drain contact wiring D1.

[0072] Similar to the above structure, in the stacking direction and in the length direction of the channel structure 8-n of the nth layer, a source contact wiring S2 is formed standing upward on the source electrode 8-nA side on one side in the Y-axis direction. In the length direction of the channel structure 8-2, a drain contact wiring Dn is formed standing upward on the drain electrode 8-nB side on one side in the Y-axis direction. The source contact wiring Sn and the drain contact wiring Dn are formed into a symmetrical structure and can also be interchanged.

[0073] In the quantum dot structure 3-n of the nth layer, a power supply wiring 5-nA is formed at the end of the qubit control current line 5-n on one side in the Y-axis direction, and is raised toward the upper layer. The lower end of the power supply wiring 5-nA is bent in the X-axis direction and is electrically connected to the end of the qubit control current line 5-n on one side in the Y-axis direction. The length of the qubit control current line 5-n along the Y-axis direction is slightly shorter than the interval between the source contact wiring Sn and the drain contact wiring Dn.

[0074] In the quantum dot structure 3-n of the nth layer, a power supply wiring 6-nB (not shown) is formed at the end of the other side of the Y-axis direction of the quantum bit control current line 6-n, which stands up to the upper layer side. The power supply wiring 6-nB is formed in the same shape as the power supply wiring 6-nA. The lower end of the power supply wiring 6-nB is bent in the X-axis direction and is electrically connected to the end of the other side of the Y-axis direction of the quantum bit control current line 6-n. The length of the quantum bit control current line 6-n along the Y-axis direction is slightly shorter than the interval between the source contact wiring Sn and the drain contact wiring Dn.

[0075] According to the above structure, in the semiconductor quantum device 1C, each power supply wiring connected to the quantum bit control current line 5-n, 6-n adjacent to the quantum dot 4-n that becomes a quantum bit is set in a space different from the source and the drain. The power supply wiring 5-nA connected to the quantum bit control current line 5-n and the power supply wiring 6-nA connected to the quantum bit control current line 6-n are arranged adjacent to the source contact wiring Sn in the X-axis direction. The power supply wiring 5-nB connected to the quantum bit control current line 5-n and the power supply wiring 6-nB connected to the quantum bit control current line 6-n are arranged adjacent to the drain contact wiring Dn in the X-axis direction.

[0076] [Fifth Embodiment] Hereinafter, a semiconductor quantum device 1D according to the fifth embodiment will be described. In the following description, the same names and reference numerals are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device 1D according to the fifth embodiment is configured in the same manner as the semiconductor quantum device 1 according to the first embodiment, except for the points described later. Therefore, according to the semiconductor quantum device 1D according to the fifth embodiment, except for the points described later, the same effects as those of the semiconductor quantum device 1 according to the first embodiment can be achieved.

[0077] Figure 6 A semiconductor quantum device 1D according to the fifth embodiment is shown. In the semiconductor quantum device 1D, a plurality of quantum dots 4-n serving as quantum bits are arranged on a channel between a source and a drain in each quantum dot structure 3-n stacked in the stacking direction.

[0078] like Figure 7 As shown, a plurality of quantum dots 4-n are arranged in a lattice in each quantum dot structure 3-n. The plurality of quantum dots 4-n in each quantum dot structure 3-n may also be dispersedly arranged in actual film formation. According to the semiconductor quantum device 1D, in particular, in the semiconductor quantum device 1A involved in the second embodiment (see Figure 3 ) When an inclined magnetic field of a magnetic body M is used, different magnetic fields can be imparted between the quantum dots 4-n stacked in the stacking direction.

[0079] exist Figure 8 It is shown in Figure 7 The quantum dots 4-n arranged in the figure are arranged between the nanosheets (channel structure 8-n) stacked in the stacking direction. Here, the same number of quantum dots 4-n is shown between all the nanosheets, but different numbers of quantum dots 4-n may be arranged in each layer.

[0080] [Sixth Embodiment] Hereinafter, the semiconductor quantum device involved in the sixth embodiment is described. In the following description, the same names and figure marks are used for the same structures as the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the sixth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device of the sixth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0081] Logical qubits are usually formed by several charge spins. As a typical logical qubit, there are two charge spin applications. When the external magnetic field is weak, the ground state of the two charge spins becomes a singlet state |S>, forming a state that is strong against noise. The excited state of the two qubits has three triplet states (|T0>, |T+>, |T->), and the energy levels of each other change by applying a magnetic field. As a formula, it is represented by the following formula (1).

[0082] [Number 1] |T + >=|↑↑> |T - >=|↓↓>

[0083] Here, the external magnetic field is defined as the magnetic field in the z-axis direction applied to the spin quantization axis, which is Bz. As the Hamiltonian operator of the transverse magnetic field, if the transverse magnetic field applied to the two quantum bits a and b is B x a , B x b , and expressed as h x a = gμ B B x a 、h x b = gμ B B x b , then the effect of the transverse magnetic field is expressed by the following equation (2).

[0084] [Number 2]

[0085] As a function of the external magnetic field, Fig. 9 The energy levels of the two quantum bits are shown in . From this formula, it can be seen that |S> and |T0> can be tunneled by the transverse magnetic field. Fig. 9The intrinsic energy states of the two quantum bits are expressed as a function of the external magnetic field Bz. When the external magnetic field is zero, the singlet state becomes the ground state. When the external magnetic field is increased, the singlet state crosses with one of the triplet states. If these two states are set as the quantum bit's |0> L and |1> L , the two states tunnel into each other in proportion to the magnitude of the transverse magnetic field, so |0> L and |1> L The larger the transverse magnetic field, the stronger the coupling between the two energy levels, which results in an increase in the tunneling speed.

[0086] Since individual qubits have variations, the actual value of the external magnetic field is set near the average value. L and |1> L The displacement is determined by the magnetic field or potential difference generated by the electrodes next to the qubit. The larger the transverse magnetic field, the greater the L and|1> L The greater the probability of migration between them. That is, in the absence of a transverse magnetic field, no migration occurs, and even in the absence of a deviation, as long as the transverse magnetic field is not applied, the logical quantum bit can maintain its original state. In more than three cases, one of the ground state and excited state of the corresponding Hamiltonian operator is used as the logical quantum state |1> and |0>.

[0087] [Seventh Embodiment] Hereinafter, the semiconductor quantum device involved in the seventh embodiment is described. In the following description, the same names and figure marks are used for the same structures as the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the seventh embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device of the seventh embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0088] As the interaction between logical qubits, for example, the RKKY interaction (Ruderman-Kittel-Kasuya-Yosida) is used. As the operation between two qubits, it is necessary to implement the CNOT gate operation. Fig.10 In principle, there are four types of Fig.10 In (A), the strength of the interaction between quantum bits 1 to 4 is represented by Jij (i, j = 1, ..., 4). Since this interaction is Heisenberg-type and takes a complex form, it is extremely complicated to consider the calculation under the state of Heisenberg interaction.

[0089] exist Fig.10 The eigenstate is shown in (B). In the present invention, the energy eigenstates of the ground state and the excited state change according to the states of the two adjacent quantum bits to perform the |0> L and |1> L That is, if |0> is applied to the object logical bit when the adjacent logical qubit is |1> L and |1> L The voltage corresponding to the energy difference between them will migrate between energy states, which corresponds to the CNOT action.

[0090] Fig.11 This shows an example where a logical qubit is composed of four quantum dots 4-n. Fig.11 (A) shows an example where four quantum bits are connected to adjacent electric field and magnetic field control lines in pairs. The configuration of the four quantum dots 4-n is not limited to the example shown in the figure. Fig.11 The corresponding eigenstate is shown in (B).

[0091] [Eighth Embodiment] Hereinafter, the semiconductor quantum device involved in the eighth embodiment is described. In the following description, the same names and figure marks are used for the same structures as the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the eighth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device of the eighth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0092] Fig.12 A method for performing quantum operations by changing the strength of electrostatic coupling between nanosheets is shown in . As a principle, the method of Taylor et al. in non-patent literature 6 is also used in the h logical quantum bit structure. In this case, the logical quantum bits need to be coupled to each other by Coulomb force. At this time, if the potential of the electric field control and magnetic field generation wire on one side is reduced, the depletion layer on the reduced side expands, so the charge coupling between the layers becomes uneven between the left and right quantum bits. This situation realizes the control of coupled quantum dots by Taylor et al.

[0093] In the present invention, by setting the potential of the interface of the channel portion to different values ​​at the two lateral quantum dots, the thickness of the depletion layer in the channel is different between quantum bits, and as a result, the electrostatic capacitance can be reduced between the upper and lower quantum dots 4-n sandwiching the channel. That is, in the portion where the depletion layer is larger, the capacitive coupling between the upper and lower quantum dots 4-n of the channel, that is, stacked in the stacking direction, becomes weak, and the upper and lower quantum dots 4-n become independent. Thus, Taylor's upper and lower quantum bits can be coupled. In addition, the RKKY interaction is effective when there are free charges in the channel, so it can be set to OFF when operating individual quantum dots 4-n.

[0094] [Ninth Embodiment] Hereinafter, the semiconductor quantum device involved in the ninth embodiment is described. In the following description, the same names and figure marks are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the second embodiment is constructed in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device of the ninth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0095] When focusing on the singlet state |S> and the triplet state |T0, the Hamiltonian operator can be separated from |T+> and |T-> as shown in the following equation (3) within a range where the deviation can be ignored.

[0096] [Number 3]

[0097] The Hamiltonian operator can also perform quantum calculations using the Hamiltonian operator within this range. The transformation of |S> and |T0> is achieved by setting the quantization axis of the magnetic field generation line to the z axis and reversing the directions of the left and right magnetic fields.

[0098] [Tenth embodiment] Hereinafter, the semiconductor quantum device 1E involved in the tenth embodiment will be described. In the following description, the same names and reference numerals are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device 1E of the tenth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device 1E of the tenth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0099] Quantum operations require quantum error correction codes. Non-patent document 7 explicitly mentions representative surface codes or topological surface codes. They are referred to as surface codes below. Surface codes require CNOT gates to be performed in four directions, up and down, left and right, in sequence. When the control quantum bit is |1>, the CNOT gate switches the target quantum bit between |0> and |1>. That is, The eigenenergy corresponding to the four states |00>, |01>, |10>, |11> needs to be different. To achieve this state, the two energy levels for the CNOT gate are changed. In order to effectively control individual quantum bits, it is best to have different Zeeman energies between quantum bits. For this state, when the Zeeman energy is set by an external magnetic field, the deviation of the g factor realizes this state. When a magnetic body is placed, the distance from the magnetic body to the quantum bit is different in each quantum bit, so this state can be achieved.

[0100] exist Fig.13 1 shows a semiconductor quantum device 1E that applies the present invention and is configured to be able to install a surface code. In this embodiment, the channel structure 8-n serves as both an electric field control and magnetic field generation line and a measurement channel for measuring the spin state. The channel structure 8-n is configured to use the quantum bit control current lines 5-n, 6-n and a measurement channel for measuring the spin state of the quantum dot 4-n. That is, Figure 1 , Figure 3 The channel structure 8-n also serves as a current magnetic field control line (qubit control current lines 5-n, 6-n) and a measurement channel. The semiconductor quantum device 1E has a plurality of data qubits 4A-n, a plurality of measurement qubits 4B-n, and a plurality of wirings (a pair of channel structures 8-n, 8-n-1, a pair of qubit control current lines 5-n, 6-n) on a substrate (not shown).

[0101] The semiconductor quantum device 1E is composed of a plurality of data quantum bits 4A-n and a plurality of measurement quantum bits 4B-n arranged on a substrate along a stacking direction and a layer direction orthogonal to the stacking direction, and constitutes a plurality of quantum dot structures. The semiconductor quantum device 1E is composed of a plurality of quantum bit control current lines arranged on a substrate and between quantum dot structures adjacent to each other along the stacking direction and the layer direction (a pair of channel structures 8-n, 8-n-1, a pair of quantum bit control current lines 5-n, 6-n). The semiconductor quantum device 1E is provided with a magnetic body M that imparts a magnetic field to the plurality of quantum dot structures.

[0102] The data qubits 4A-n are composed of quantum dots. A plurality of data qubits 4A-n are arranged in a matrix along the longitudinal direction (also referred to as the Z-axis direction, the stacking direction) and the transverse direction (also referred to as the X-axis direction, the layer direction) orthogonal to the longitudinal direction. The measurement qubits 4B-n are composed of quantum dots. A plurality of measurement qubits 4B-n are arranged in a matrix along the Z-axis direction and the X-axis direction. The data qubits 4A-n and the measurement qubits 4B-n are arranged alternately in the longitudinal and transverse directions. A plurality of wirings (a pair of channel structures 8-n, 8-n-1, a pair of qubit control current lines 5-n, 6-n) are arranged around the data qubits 4A-n and the measurement qubits 4B-n in the longitudinal and transverse directions to serve as electric field control and magnetic field generation lines.

[0103] This is because in the installation of the surface code, both horizontal and vertical CNOT gate actions are required. Therefore, when operating the vertical CNOT gate, a pair of quantum bit control current lines 5-n and 6-n are controlled by the method shown in the embodiments so far, and the CNOT gate is performed only in the vertical direction (Z-axis direction). In the horizontal direction (X-axis direction), a pair of channel structure parts 8-n and 8-n-1 that become electric field control and magnetic field generation lines are controlled, and the CNOT gate is performed only in the horizontal direction (X-axis direction). In the case of applying a magnetic body M such as a nanomagnet, a high-frequency electric field is generated, an effective change in the magnetic field is given, and a magnetic field is generated based on the current.

[0104] When a CNOT gate action is required in the horizontal direction, a CNOT gate action using the charge in the wiring is performed between two pairs of qubit control current lines 5-n and 6-n in the horizontal direction, and a magnetic field inclination or a magnetic field is generated in a pair of channel structures 8-n and 8-n-1 that are two electric field control and magnetic field generation lines sandwiching the qubit in the vertical direction. At this time, since each wiring (a pair of channel structures 8-n, 8-n-1, a pair of qubit control current lines 5-n and 6-n) also serves as a channel, it is necessary to be composed of a semiconductor. In particular, nanowire structures in materials made of silicon, synthetic silicon, and other substances are appropriate.

[0105] exist Fig.14 An example of quantum operations performed sequentially using a semiconductor quantum device 1E is shown in FIG. According to the above structure, based on the magnetic field generated by the wiring (a pair of channel structures 8-n, 8-n-1, a pair of quantum bit control current lines 5-n, 6-n) constituting the quantum bit control current line, two types of CNOT gate actions are performed on the multiple quantum dot structures in the stacking direction and the layer direction. Thus, the multiple quantum dot structures composed of the multiple data quantum bits 4A-n and the multiple measurement quantum bits 4B-n are given a surface code for quantum error correction.

[0106] Fig.14is an example of the steps to perform surface code. Fig.14 (a) is the process of determining the initial state of the quantum bit. Fig.14 (b) is the process of implementing the Hadamard gate on the measurement quantum bit. Fig.14 (c) Fig.14 (f) is the process of performing CNOT gate action in the vertical direction. Fig.14 (d) Fig.14 (e) is the process of performing CNOT gate action in the horizontal direction. When the channel structure portion is set to measure the state of the quantum bit in the horizontal direction, the upper and lower channel structures 8-n and 8-n-1 sandwiching the quantum bit become current control lines. In the process of the next surface code, the upper and lower channel structures 8-n and 8-n-1 of the quantum bit play the role of the channel structure portion for measuring the state of the quantum bit, and the quantum bit control current lines 5-n and 6-n in the horizontal direction become current magnetic field control lines.

[0107] exist Fig.15 Shown in Figure 3 to Figure 5 The semiconductor quantum device 1E is structured such that the power supply wiring 5-nA, 5-nB, 6-nA, and 6-nB to the quantum bit control current line are connected to the semiconductor quantum device 1E. Figure 3 to Figure 5 Slightly different.

[0108] Fig.15 This is a diagram showing the structure of a semiconductor quantum device 1E according to the tenth embodiment in a stereoscopic manner. The code 8-n, 5-n, and 6-n are recorded in the figure, but according to the stage of the surface code, the channel structure part also serves as the state of the quantum bit control current line and the quantum bit for reading. Figure 4 The relative positions of the contact wiring 5-n, 6-n and 8-n can also be changed. In addition, this structure can also be applied to common quantum error correction codes. Quantum error correction codes can also include topological codes, delay codes, low-density parity check codes, Shor codes and other codes that adopt majority voting in addition to surface codes.

[0109] [Eleventh Embodiment] Hereinafter, the semiconductor quantum device 1F involved in the eleventh embodiment is described. In the following description, the same names and reference numerals are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device 1F of the eleventh embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device 1F of the eleventh embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0110] Fig.16 Indicated in Figure 1 or Figure 2 The form of lateral interaction in the RKKY interaction. Depending on the position of the quantum dots sandwiched in between, various couplings can be achieved.

[0111] [Twelfth Embodiment] Hereinafter, the semiconductor quantum devices 1G and 1H involved in the twelfth embodiment are described. In the following description, the same names and reference numerals are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum devices 1G and 1H of the twelfth embodiment are configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum devices 1G and 1H of the twelfth embodiment, except for the points described later, the same effects as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0112] Regarding the structure in the case of installing quantum annealing, in the structure of the above embodiment, as in Patent Document 1, arbitrary quantum bits can be coupled by transferring the same data to multiple quantum bits. In this embodiment, as another method, an invention about a method for realizing the method of Non-Patent Document 8 is shown. This method is as follows Fig.17 As shown in (a), it is a method of coupling the spins by forming a coupling structure that adds the spins of d in the figure. The mathematical principle is based on the following formula (4), using the identity that the interaction of the two bodies on the right can constitute the interaction of the four bodies on the left.

[0113] [Number 4]

[0114] Here, M (0) and M (1) is an appropriate proportionality coefficient. In order to realize this formula, Fig.17 As shown, after making a coupling structure that couples the spins generated by the upper and lower qubits based on the configuration of the qubits, the two operations of the case where the spin of d is |↑> and the case where |↓> are performed through gate operation, and the upper and lower spins are added. By developing this formula (4), it can be Fig.17 As in (b), we can create a combination of any number (N) of spins σ1σ2…σ N On the substrate, the qubits (spins) separated in space form this coupling with each other first, and then the intermediate qubits are measured. For example, the coupling between the first and Nth qubits σ1σ N It can be formed by first generating a coupling σ2…σ N-1 , and then the coupling σ1σ2…σN The state on the right can usually be achieved by forming a cat state.

[0115] The method to achieve this state is Fig.18 The semiconductor quantum device 1G and Fig.19 The semiconductor quantum device 1H shown. First, Fig.18 , Fig.19 In the example, the interaction term coupled to the six quantum bits uses the RKKY interaction. For the other quantum bits, by forming a coupling structure that adds the left and right spins, it is possible to form them by coupling the quantum bits in the longitudinal direction. That is, the multiple quantum dot structures arranged along the stacking direction and the layer direction on the substrate 2 have a coupling structure that couples the spins generated by the quantum bits of the quantum dot structures adjacent to each other along the stacking direction or the layer direction. The coupling structure couples any number of quantum bits for quantum annealing. In Fig.18 , Fig.19 The figure below shows the case where the coupling structure of the upper figure is realized. Each black dot BL is a quantum bit of the coupling point, and corresponds to the quantum bit of the black dot BL in the lower figure.

[0116] [Thirteenth Embodiment] Hereinafter, the semiconductor quantum device involved in the thirteenth embodiment will be described. In the following description, the same names and reference numerals are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the thirteenth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment, except for the points described later. Therefore, according to the semiconductor quantum device of the thirteenth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0117] The quantum bit system of the present invention can be applied to quantum reservoir computing. In quantum reservoir computing, the vocal cord signal is converted into an electrical signal to form a learning pulse train for input. When the learning pulse train is input to the gate, an interaction is generated between the quantum bits according to the pulse train. If the RKKY interaction between the quantum bits is turned on, the current flowing between the source / drain changes nonlinearly according to the voltage input to the gate. The area where random telegraph noise (RTN) is generated can also be applied to the quantum reservoir computing. RTN is a nonlinear phenomenon in which conduction electrons are temporarily captured by defects present in the gate insulating film interface, etc. The period during which the electrons are captured is regarded as a memory effect. Based on the current value between the source / drain relative to the gate voltage, the weight in the quantum reservoir computing can be given.

[0118] The above can also be realized in a conventional CMOS, which is characterized in that the state of the electron spin in the quantum dot is used as a memory effect to enhance the operation of the above quantum reservoir computing. The electron spin in the quantum dot has a coherence time. By applying a magnetic field to make the state of the spin consistent, even if a spin-reversed pulse is applied to the above RTN pulse, a quantum reservoir computing with higher nonlinearity can be achieved.

[0119] [Fourteenth embodiment] Hereinafter, the semiconductor quantum device involved in the fourteenth embodiment is described. In the following description, the same names and figure marks are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the fourteenth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device of the fourteenth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0120] In order to determine the calculation result of the quantum bit, for example, the following method can be considered: using a latch circuit connected to the first quantum circuit and the second quantum circuit that becomes an inversion circuit, latching the state of the first quantum bit output from the first quantum circuit, amplifying the signal representing the state of the first quantum bit, latching the state of the second quantum bit output from the second quantum circuit, and amplifying the signal representing the state of the second quantum bit. The result of the quantum bit shown in the above invention is output as a voltage change between the source / drain of the nanosheet. Since the output signal is smaller than that of a conventional CMOS circuit, it needs to be amplified. The above latch circuit is capable of amplifying its initial stage. However, in an amplifier circuit such as a latch circuit, the deviation of the offset voltage of each amplifier circuit mostly becomes a problem. For this reason, by combining the interpolation method of non-patent document 8, it can be read even if the deviation of the amplifier circuit composed of CMOS is considered.

[0121] [Fifteenth embodiment] Hereinafter, the semiconductor quantum device involved in the fifteenth embodiment is described. In the following description, the same names and figure marks are used for the same structures as the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the fifteenth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device of the fifteenth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0122] Fig. 20 This embodiment shows a case where a quantum bit operation is performed using a three-dimensional NAND flash memory. That is, in a semiconductor quantum device, the quantum dot structure can be formed by a three-dimensional NAND flash memory. Fig. 20 (a) is called Charge trap. Fig. 20 The portion called floating gate (FG) in (b) is a portion that stores charge, and the technology of setting this portion as one or more logical spin qubits can be realized by applying a magnetic field to the outside. The state of the qubit's spin is measured by the current flowing through the channel.

[0123] The control gate (CG), which is the basis of the non-uniform magnetic field generated by the magnetic body, can produce a transverse magnetic field effect in the quantum bit by generating a high-frequency potential difference between the CGs sandwiching the quantum bit to be controlled. The interaction between quantum bits is realized by RKKY interaction etc. through the bit line in the figure.

[0124] [Sixteenth Embodiment] Hereinafter, the semiconductor quantum device involved in the sixteenth embodiment is described. In the following description, the same names and figure marks are used for the same structures as those in the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the sixteenth embodiment is constructed in the same manner as the semiconductor quantum device 1 of the first embodiment except for the points described later. Therefore, according to the semiconductor quantum device of the sixteenth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0125] Semiconductor quantum devices can also be realized using electrons or holes. As the magnetic body M that generates the magnetic field, in addition to cobalt, iron, nickel, and gadolinium, alloys composed of these materials are also used. In addition, the direction of the magnetic domain can be as follows Fig.21 As shown in (a) of FIG. 1 , all magnetic bodies M are parallel, or as shown in FIG. Fig.21 As shown in (b) of FIG. 1 , the substrate is horizontal or inclined. Fig.21 As shown in (c), the directions of the axes may be dispersed between the magnetic bodies M. In particular, if Fig.21 It is effective to make the magnetic domains of adjacent magnetic bodies M opposite to each other as in (c), so that the gradient of the magnetic field generated by the magnetic body becomes larger. Fig.21 As shown in (d), the same magnetic body may have a plurality of magnetic domain structures.

[0126] In the above-mentioned embodiment, an example of using a magnetic field in the direction of quantized magnetic domains and a magnetic charge direction perpendicular thereto is shown, but it is also possible to use the spin-orbit interaction between holes and conduction electrons in quantum dots.

[0127] [Seventeenth embodiment] Hereinafter, the semiconductor quantum device of the seventeenth embodiment will be described. In the following description, the same names and reference numerals are used for the same structures as those of the first embodiment, and repeated descriptions are appropriately omitted. The semiconductor quantum device of the seventeenth embodiment is configured in the same manner as the semiconductor quantum device 1 of the first embodiment, except for the points described later. Therefore, according to the semiconductor quantum device of the seventeenth embodiment, except for the points described later, the same effect as the semiconductor quantum device 1 of the first embodiment can be achieved.

[0128] The quantum dots of the semiconductor quantum device can be made of semiconductor materials such as silicon, silicon germanium (SiGe), germanium, gallium arsenide, gallium nitride, or metals such as Al, Co, and Fe. The size of the quantum dot is preferably less than 45nm. Tunneling films commonly used in silicon transistors such as silicon oxide films, TiN, SiN, and hafnium oxide High-K materials can be used between the quantum bit and the adjacent electric field and magnetic field control lines. In addition, the distance between the quantum bit and the adjacent electric field and magnetic field control lines is preferably less than 5nm.

[0129] As mentioned above, although one embodiment of the present invention has been described, the present invention is not limited to the above-mentioned one embodiment, and can be appropriately modified within the scope not departing from the gist of the present invention. Description of the attached figure

[0130] 1. 1A-1H: semiconductor quantum device; 2: substrate; 3, 3-n: quantum dot structure; 4A-n: data quantum bit; 4B-n: measurement quantum bit; 4-n: quantum dot; 5-n, 6-n: quantum bit control current line; 5-nA, 5-nB, 6-nA, 6-nB: power supply wiring; 8, 8-n: channel structure; 9: insulating layer; D: drain; D1, Dn: drain contact wiring; G1: gate; M: magnetic body; S: source; S1, Sn: source contact wiring; T: transistor structure.

Claims

1. A semiconductor quantum device, wherein: The semiconductor quantum device comprises: A transistor structure having a source, a drain and a gate; One or more quantum dot structures capable of localizing electric charge; and The quantum bit controls the current line, which can change the state of the charge in the quantum dot structure. The quantum dot structure and the quantum bit control current line are arranged in the same layer, The transistor structure portion and the quantum dot structure portion are stacked in a stacking direction with respect to the substrate.

2. The semiconductor quantum device according to claim 1, wherein: The transistor structure has a plurality of channel structures connecting the source and the drain. The plurality of channel structures are stacked in the stacking direction relative to the substrate, The quantum dot structure portion is provided between the channel structure portions adjacent to each other in the stacking direction. Electrons or holes can be accumulated in the quantum dot structure. The qubit control current line allows a qubit control current for controlling a magnetic field that controls a spin state of electrons or holes in the quantum dot structure portion to flow, and is arranged close to the quantum dot structure portion.

3. The semiconductor quantum device according to claim 2, wherein: The transistor structure is a nanosheet-type transistor having a plurality of channel structures sandwiching the quantum dot structure.

4. The semiconductor quantum device according to claim 2, wherein: The magnetic field that controls the spin state of electrons or holes in the quantum dot structure portion is one or more magnetic bodies disposed close to the transistor structure portion.

5. The semiconductor quantum device according to claim 2, wherein: The semiconductor quantum device comprises at least a first quantum dot structure portion and a second quantum dot structure portion constituting the quantum dot structure portion, The plurality of channel structures include a first channel structure disposed between the first quantum dot structure and the second quantum dot structure, By utilizing the magnetic field generated by allowing the quantum bit control current to flow through the quantum bit control current line, the quantum state of the charge spin in the first quantum dot structure part is changed, and the interaction between the charge spin in the first quantum dot structure part and the charge spin in the second quantum dot structure part is set to an indirect interaction via the charges in the first channel structure part.

6. The semiconductor quantum device according to claim 5, wherein: The semiconductor quantum device has an operation mode, In the operating mode, the current of the quantum bit control current line is set to a non-zero value, the voltage of the gate is set to a value greater than zero, the voltage of the source is set to a non-zero value, the voltage of the drain is set to a non-zero value, and at least the magnetic field generated by the quantum bit control current line is set to a non-zero value, utilizing the RKKY (Ruderman-Kittel-Kasuya-Yosida) interaction.

7. The semiconductor quantum device according to claim 1, wherein: The semiconductor quantum device comprises: A plurality of the quantum dot structures are arranged on the substrate in the stacking direction and in a layer direction orthogonal to the stacking direction; and The plurality of quantum bit control current lines are arranged between the quantum dot structures adjacent to each other in the stacking direction and the layer direction, In a state where a magnetic field is imparted to the plurality of quantum dot structures, two types of CNOT gate actions are performed on the plurality of quantum dot structures in the stacking direction and the layer direction by controlling the quantum bit control current line, and quantum error correction codes for quantum error correction are imparted to the plurality of quantum dot structures.

8. The semiconductor quantum device according to claim 2, wherein: The channel structure portion is configured as a measurement channel that uses both the quantum bit control current line and the quantum dot structure portion to measure the spin state.

9. The semiconductor quantum device according to claim 1, wherein: The semiconductor quantum device comprises a plurality of quantum dot structures arranged on the substrate along the stacking direction and a layer direction orthogonal to the stacking direction. The plurality of quantum dot structure parts have a coupling structure for coupling the spins generated by the quantum bits of the quantum dot structure parts adjacent to each other in the stacking direction or the layer direction. The coupling configuration couples an arbitrary number of quantum bits for quantum annealing.

10. The semiconductor quantum device according to claim 1, wherein: The quantum dot structure portion is formed by a three-dimensional NAND flash memory.

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