Portable electroencephalogram signal acquisition system and method

Abstract

The invention discloses a portable electroencephalogram signal acquisition system and method. The portable electroencephalogram signal acquisition system comprises an electroencephalogram acquisition electrode, a filtering and amplifying circuit, an AD conversion circuit, a main control circuit and a communication module, wherein the filtering and amplifying circuit comprises a high-pass filter circuit, an amplifying circuit and a low-pass filter circuit; the electroencephalogram collecting electrode is used for collecting electroencephalogram signals and connected with the input end of the high-pass filter circuit, the output end of the high-pass filter circuit is connected with the input end of the amplifying circuit, the output end of the amplifying circuit is connected with the input end of the low-pass filter circuit, and the output end of the low-pass filter circuit is connected with the main control circuit through the AD conversion circuit. The high-pass filter circuit is used for filtering low-frequency noise in the electroencephalogram signals, the low-pass filter circuit is used for filtering high-frequency interference signals in the electroencephalogram signals, the main control circuit is further connected with the communication module, limitation of traditional equipment is broken through, and stability of data transmission is ensured.

Description

Technical Field

[0001] The present invention relates to the field of biomedical signal technology, and in particular to a portable electroencephalogram (EEG) signal acquisition system and method. Background Art

[0002] As a key non-invasive neurophysiological detection technology, electroencephalogram (EEG) has been widely used in many disciplines such as medicine, psychology and neuroscience. By placing electrodes on the surface of the scalp and recording the electrical signals generated by the activity of brain neurons, EEG can effectively reflect the functional state of the brain and assist doctors in diagnosing various neurological diseases such as epilepsy, sleep disorders, and brain damage. In addition, EEG is also used in cutting-edge scientific research fields such as brain-computer interface, cognitive state monitoring, and emotion analysis, highlighting its importance in modern technology. However, traditional EEG acquisition equipment is usually large in size and complex in operation, and usually requires professional personnel to configure and maintain. Such equipment is convenient to use in hospital or laboratory environments, but it is bulky and difficult to carry in daily life or outdoor activities. With the increasing demand for health monitoring, the research and development of portable EEG acquisition systems has gradually attracted widespread attention. At the same time, with the popularization of smartphones and wearable devices, users' demand for real-time, convenient and data analysis capabilities of EEG monitoring is growing.

[0003] In the process of realizing the prior art, the inventor found that the existing portable EEG acquisition system has deficiencies in compatibility, data processing and diversity of application scenarios, and cannot meet user needs. The Chinese patent application publication number CN118452941A discloses an EEG signal acquisition and preprocessing device based on a field programmable gate array (FPGA), which uses the parallel processing capability of FPGA to improve the efficiency of EEG signal acquisition and preprocessing. However, the manufacturing cost of FPGA is high. The Chinese patent application publication number CN115429283A discloses a portable EEG signal real-time acquisition system, which is powered only by dry batteries and limited to eight channels. The cost is reduced to a certain extent, but the function and convenience of use may be limited. The limited power supply capacity of dry batteries may cause insufficient power of the device, affecting stability and continuous operation. The limitation of eight channels may also not meet the needs of some complex application scenarios. Therefore, there is an urgent need for a portable EEG acquisition system to surpass the limitations of traditional equipment, ensure the high quality of signal acquisition, enhance the stability of data transmission, and optimize the user experience, making it more comfortable and convenient, which has significant practical significance and broad market potential. Such systems will open up new avenues for the popularization and application of EEG monitoring and promote the development of related fields. Summary of the invention

[0004] The main purpose of the present invention is to provide a portable EEG signal acquisition system and method, so as to overcome the deficiencies in the prior art. To achieve the above-mentioned invention purpose, the technical solution adopted by the present invention includes:

[0005] The first aspect of the present invention provides a portable EEG signal acquisition system, including EEG acquisition electrodes, an EEG preprocessing module, and a communication module. The EEG preprocessing module includes a filter amplifier circuit, an AD conversion circuit, and a main control circuit. The filter amplifier circuit includes a high-pass filter circuit, an amplifier circuit, and a low-pass filter circuit.

[0006] Among them, the EEG collection electrode is used to collect EEG signals and is connected to the input end of the high-pass filter circuit, the output end of the high-pass filter circuit is connected to the input end of the amplifier circuit, the output end of the amplifier circuit is connected to the input end of the low-pass filter circuit, the output end of the low-pass filter circuit is connected to the main control circuit via the AD conversion circuit, the high-pass filter circuit is used to filter out low-frequency noise in the EEG signal, the low-pass filter circuit is used to filter out high-frequency interference signals in the EEG signal, and the main control circuit is also connected to the communication module.

[0007] In some more specific implementation schemes, the EEG preprocessing module also includes an electrostatic discharge protector, which is connected to the EEG acquisition electrode to protect the collected EEG signals and input the EEG signals into the filtering and amplifying circuit.

[0008] Preferably, the electrostatic discharge protector is a TPD4E1B06 electrostatic discharge protector including four protection channels.

[0009] In some more specific implementation schemes, the EEG preprocessing module also includes a power management module connected to the main control circuit, the power management module is used to connect to a DC power supply, and includes a first conversion circuit and a second conversion circuit, the first conversion circuit is used to convert the DC power supply into a first voltage to supply the power supply end of the AD conversion circuit, the communication module and the main control circuit, and the second conversion circuit is used to convert the DC power supply into a second voltage to supply the analog power supply end of the AD conversion circuit.

[0010] Preferably, the first voltage conversion circuit includes a low-dropout linear regulator and a MIC5319 chip, wherein the low-dropout linear regulator is used to stabilize the DC power supply to a first voltage, and the MIC5319 chip is used to stabilize the first voltage to a second voltage; the second voltage conversion circuit includes a charge pump voltage converter and a TPS72325 chip, wherein the charge pump voltage converter is used to invert the first voltage into a corresponding first negative voltage, and the TPS72325 chip is used to convert the first negative voltage into a second negative voltage.

[0011] Among them, the first voltage is connected to the power pin, communication module and main control circuit of the AD conversion circuit, the second voltage is connected to the analog power supply end of the AD conversion circuit, and the second negative voltage is connected to the negative power pin of the AD conversion circuit.

[0012] In some more specific implementation schemes, the EEG acquisition electrodes include X acquisition electrodes, where X ranges from 1 to 64, and the X acquisition electrodes are arranged according to the international standard lead 10-20 electrode system.

[0013] Preferably, the electrode is any one of a silver chloride electrode, a silver electrode, and a silver-silver chloride electrode.

[0014] In some more specific implementation schemes, the AD conversion circuit includes y AD conversion chips, y≥1, when y≥2, the AD conversion chip includes a serial clock (SCLK), a data input (DIN) and a chip select (CS) pin, the serial clock (SCLK) pin is connected to the serial clock (SCLK) pin of the master control circuit, the data input (DIN) pin is connected to the main output slave input (MOSI) pin of the master control circuit, the chip select (CS) pin is connected to the general input and output (GPIO) pin of the master control circuit, and the y AD conversion chips share a set of serial clock (SCLK), data input (DIN) and chip select (CS) pins, which are respectively connected to the corresponding serial clock (SCLK), main output slave input (MOSI) and and general input and output (GPIO) pins, the serial data output (DOUT) pin of the first AD conversion chip is connected to the master input / slave output (MISO) pin of the main control circuit, the data ready (DRDY) pin is connected to the interrupt (INT) pin of the main control circuit, the serial data output (DOUT) pin of the first AD conversion chip outputs data; the serial data output (DOUT) pin of the second AD conversion chip is connected to the DAISY_IN pin of the first AD conversion chip, … the serial data output (DOUT) pin of the mth AD conversion chip is connected to the DAISY_IN pin of the m-1th AD conversion chip, … the DAISY_IN pin of the yth AD conversion chip is short-connected to digital ground, 2≤m≤y.

[0015] Preferably, the AD conversion chip adopts an AD series chip, including 8 transmission channels.

[0016] More preferably, the AD series chip includes an ADS1299 chip.

[0017] In some more specific implementation schemes, the main control circuit obtains the digital signal output by the AD conversion circuit through the SPI interface, and encodes the digital signal to obtain a data packet.

[0018] Preferably, the main control circuit includes an STM series chip.

[0019] In some more specific implementation schemes, the communication module includes at least an HC module, which has a serial port data input terminal, a serial port data output terminal, a power input terminal and a ground terminal. The serial port data input terminal is connected to the main control circuit for acquiring data packets; the serial port data output terminal is used to transmit data packets to a host computer or other external devices.

[0020] Preferably, the HC module adopts HC-06 Bluetooth module.

[0021] In some more specific implementation schemes, the EEG preprocessing module is connected to a host computer via the communication module, and the host computer includes a display module and a data processing module. The display module includes an EEG acquisition interface, a steady-state visual interface, and an EEG analysis interface. The data processing module includes a time domain analysis module, a visual experiment module, and an EEG analysis module, and is connected to the EEG acquisition interface, the steady-state visual interface, and the EEG analysis interface in a one-to-one correspondence, wherein the EEG acquisition interface is used to display concentration, relaxation, and time domain spectra of δ, θ, α, β, and γ waveforms.

[0022] A second aspect of the present invention provides a portable EEG signal acquisition method, comprising the following steps:

[0023] Collecting EEG signals with EEG acquisition electrodes and transmitting them to the EEG preprocessing module;

[0024] The EEG preprocessing module performs low-frequency noise filtering, signal amplification, and high-frequency interference signal filtering on the received EEG signal, and then converts it into a digital signal for output;

[0025] Transmitting the digital signal to a host computer using a communication module;

[0026] The digital signal is displayed and / or analyzed by the host computer.

[0027] The filter amplifier circuit includes a high-pass filter circuit, an amplifier circuit, a low-pass filter circuit, and an AD conversion circuit. The EEG signal is input into the high-pass filter circuit to remove low-frequency noise to obtain a first analog EEG signal; the first analog EEG signal is input into the amplifier circuit for enhancement to obtain a second analog EEG signal; the second analog EEG signal is input into the low-pass filter circuit to filter out high-frequency interference to obtain an analog signal. Finally, the analog signal is input into the AD conversion circuit to output a digital signal.

[0028] In some more specific implementation schemes, the host computer displays and / or analyzes the digital signal, specifically including:

[0029] At least the host computer performs EEG acquisition and display and / or steady-state visual display based on the digital signal, wherein the EEG acquisition and display content includes EEG signal time domain display and EEG signal frequency domain display, and the steady-state visual display content includes EEG signal changes caused by steady-state visual evoked potential related experiments;

[0030] And, the digital signal is analyzed at least by the host computer.

[0031] In some more specific implementations, the portable EEG signal acquisition method further comprises:

[0032] Using the host computer to perform fast Fourier transform on the digital signal to convert the time domain signal into a frequency domain signal;

[0033] In the EEG signal frequency domain diagram, the user's current EEG signal features in the frequency domain signal are identified to achieve SSVEP feature capture, and then combined with the pre-set content to determine the current user's gaze.

[0034] Compared with the prior art, the advantages of the present invention include at least:

[0035] First, in a portable EEG signal acquisition system provided by the present invention, the EEG signal is effectively filtered and enhanced by integrating a high-pass filter circuit, an amplifier circuit, and a low-pass filter circuit. Subsequently, the signal is converted into a digital signal by an AD conversion circuit and transmitted to a host computer or other external device via wireless communication. The circuit integration design of the signal preprocessing part simplifies the structure and significantly reduces the volume of the system hardware, thereby improving portability.

[0036] Secondly, in a portable EEG signal acquisition system provided by the present invention, the EEG signal is protected by connecting the electrostatic discharge protector to the EEG acquisition electrodes, thereby reducing interference to the signal.

[0037] Third, in a portable EEG signal acquisition system provided by the present invention, the first conversion circuit is responsible for converting the DC power supply into a first voltage to supply the input end of the communication module, the main control circuit and the AD conversion circuit. The second conversion circuit converts the DC power supply into a second voltage, which is exclusively used for the output end of the AD conversion circuit. Power supply by independent circuits ensures the normal operation of each module, and does not interfere with each other, thereby providing a more solid guarantee for the stability of signal transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 It is a structural schematic diagram of a portable EEG signal acquisition system provided by an embodiment of the present invention;

[0039] Figure 2 is a circuit diagram of a filter amplifier circuit provided by an embodiment of the present invention;

[0040] Figure 3 is a circuit diagram of an AD conversion circuit provided by an embodiment of the present invention;

[0041] Figure 4 is a flow chart of digital signal acquisition provided by an embodiment of the present invention;

[0042] Figure 5 is a flow chart of digital signal transmission provided by an embodiment of the present invention;

[0043] Figure 6 This is a module display diagram of a host computer provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0044] In view of the deficiencies in the prior art, the inventor of this case has proposed the technical solution of the present invention after long-term research and extensive practice. The technical solution, its implementation process and principle will be further explained as follows.

[0045] Please refer to Figure 1 This embodiment discloses a portable EEG signal acquisition system, including EEG acquisition electrodes, an EEG preprocessing module, and a communication module. The EEG preprocessing module includes a filter amplifier circuit, an AD conversion circuit, a main control circuit, a power management module, and a power supply module.

[0046] Specifically, the EEG acquisition electrode is arranged on the cerebral cortex. The input end of the filter amplifier circuit is connected to the EEG acquisition electrode, and the output end of the filter amplifier circuit is connected to the input end of the AD conversion circuit. The output end of the AD conversion circuit is connected to the main control circuit. The filter amplifier circuit is used to filter out noise in the EEG signal and enhance the strength of the EEG signal. The communication module is used to transmit the signal on the main control circuit to the host computer or other external devices. The power management module supplies power to the AD conversion circuit, the main control circuit, and the communication module. The power supply module supplies power to the entire EEG preprocessing module. The power supply module here can be, but is not limited to, a lithium battery.

[0047] In this embodiment, the filter amplifier circuit includes a high-pass filter circuit, an amplifier circuit and a low-pass filter circuit. The input end of the high-pass filter circuit is connected to the EEG acquisition electrode, and the output end is connected to the input end of the amplifier circuit. The output end of the amplifier circuit is connected to the input end of the low-pass filter circuit, and the output end is connected to the AD conversion circuit.

[0048] Specifically, the EEG acquisition electrode is used to collect EEG signals from the cerebral cortex. The high-pass filter circuit is used to remove low-frequency noise from the collected EEG signals. The amplifier circuit enhances the EEG signals after high-pass filtering. The low-pass filter circuit is used to filter out high-frequency interference from the EEG signals. The AD conversion circuit is used to convert the preprocessed EEG signals into digital signals. The communication module transmits the digital signals to a host computer or other external devices.

[0049] Please refer to Figure 2 In this embodiment, the low-pass filter circuit and the high-pass filter circuit adopt Butterworth filter. The amplifier circuit adopts 0PA2376 amplifier. Specifically, the filter amplifier circuit includes a first node, a second node, a third node, a fourth node, a fifth node, and a sixth node. The amplifier circuit includes an 0PA2376 amplifier. The 0PA2376 amplifier includes an OUTA pin, an OUTB pin, a -INA pin, a +INA pin, a -INB pin, a +INB pin, a V+ pin, and a V- pin. The second node is connected to the -INA pin, the third node is connected to the OUTA pin, the fourth node is connected to the OUTB pin, and the fifth node is connected to the -INB pin. The fourth node is connected to the input end of the AD conversion circuit.

[0050] The high-pass filter circuit includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, a second resistor R2, and a third resistor R3, wherein one end of the first capacitor C1 is connected to the first node and the other end is connected to the third node, one end of the second capacitor C2 is connected to the first node and the other end is connected to VIOUT, and the VIOUT is used to access the EEG signal, one end of the third capacitor C3 is connected to the first node and the other end is connected to the second node, one end of the first resistor R1 is connected to the second node and the other end is connected to the third node, one end of the second resistor R2 is connected to the first node and the other end is grounded, one end of the third resistor R3 is connected to the +INA pin and the other end is grounded. The first capacitor C1 is 1uF, the second capacitor C2 is 10uF, the third capacitor C3 is 10uF, the first resistor R1 is 5.6K, the second resistor R2 is 56K, and the third resistor R3 is 56K.

[0051] The low-pass filter circuit includes a fourth capacitor C4, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7, wherein one end of the fourth capacitor C4 is connected to the fourth node, and the other end is connected to the fifth node, one end of the fifth capacitor C5 is connected to the sixth node, and the other end is grounded, one end of the fourth resistor R4 is connected to the +INB pin, and the other end is grounded, one end of the fifth resistor R5 is connected to the fourth node, and the other end is connected to the sixth node, one end of the sixth resistor R6 is connected to the fifth node, and the other end is connected to the sixth node, one end of the seventh resistor R7 is connected to the sixth node, and the other end is connected to the third node. The fourth capacitor C4 is 0.1uF, the fifth capacitor C5 is 2.2uF, the fourth resistor R4 is 1K, the fifth resistor R5 is 2.7K, the sixth resistor R6 is 2.7K, and the seventh resistor R7 is 2.7K.

[0052] In this embodiment, the power module is composed of a DC power supply, a first voltage conversion circuit and a second voltage conversion circuit. Specifically, the DC power supply can be a lithium battery, etc., but is not limited to this type. The first voltage conversion circuit includes a low voltage difference linear voltage regulator chip AP2112 and a MIC5319 chip, wherein the AP2112 chip is responsible for stabilizing the 3.7V DC power supply to 3.3V, and the MIC5319 chip further stabilizes the 3.3V to 2.5V. The second voltage conversion circuit is composed of an LM264 charge pump voltage converter and a TPS72325 chip. The LM264 charge pump voltage converter is used to invert 3.3V to 3.3V, and the TPS72325 chip converts 3.3V to -2.5V. In this solution, the 3.3V voltage is connected to the power pin of the AD conversion circuit, the Bluetooth communication module and the microcontroller unit (MCU), the 2.5V voltage is connected to the analog power supply terminal of the AD conversion circuit, and the -2.5V voltage is connected to the negative power supply pin of the AD conversion circuit.

[0053] Specifically, in this embodiment, the EEG preprocessing module further includes a TPD4E1B06 electrostatic discharge protector, including 4 protection channels. The electrostatic discharge protector is connected to the EEG acquisition electrode, performs signal protection on the collected EEG signal, and inputs the EEG signal into the filter amplifier circuit.

[0054] In some embodiments, the EEG acquisition electrodes include X acquisition electrodes, where the value range of X is 1 to 64, and the X acquisition electrodes are set according to the international standard lead 10-20 electrode system. The electrodes are any one of silver chloride electrodes, silver electrodes, and silver-silver chloride electrodes. The specific settings can be based on the specific scenario.

[0055] Please refer to Figure 3, the AD conversion circuit is composed of four analog-to-digital converter units ADS1, ADS2, ADS3 and ADS4. These analog-to-digital converter units share a set of serial clock (SCLK), data input (DIN) and chip select (CS) pins, and are respectively connected to the corresponding SCLK, master output slave input (MOSI) and general input output (GPIO) pins of the microcontroller unit (MCU). The serial data output (DOUT0) pin of ADS1 is connected to the master input slave output (MISO) pin of the MCU for outputting data, and the data ready (DRDY) pin is connected to the interrupt (INT) pin of the MCU. The DOUT1 pin of ADS2 is connected to the cascade input (DAISY_IN0) pin of ADS1, the DOUT2 pin of ADS3 is connected to the DAISY_IN1 pin of ADS2, the DOUT3 pin of ADS4 is connected to the DAISY_IN2 pin of ADS3, and the DAISY_IN3 pin is directly grounded. In addition, ADS1, ADS2, ADS3, and ADS4 share a set of start (START) and clock (CLK) pins to accommodate multi-channel data acquisition application requirements. In this configuration, ADS1, ADS2, ADS3, and ADS4 work together under the control of the same clock signal. This design ensures that all devices can perform sampling operations synchronously, significantly reducing the delay problems that may occur during data acquisition.

[0056] In this embodiment, the main control circuit includes an STM series chip, obtains the digital signal output by the AD conversion circuit through an SPI interface, and encodes the digital signal to obtain a data packet.

[0057] In this embodiment, the communication module at least includes an HC module, and the HC module has a serial port data input terminal, a serial port data output terminal, a power input terminal and a ground terminal. The serial port data input terminal is connected to the main control circuit for obtaining data packets; the serial port data output terminal is used to transmit data packets to a host computer or other external devices.

[0058] Preferably, the HC module adopts an HC-06 Bluetooth module. The EEG preprocessing module is connected to a host computer via the HC-06 Bluetooth module, and the host computer includes a display module and a data processing module, the display module includes an EEG acquisition interface, a steady-state visual interface, and an EEG analysis interface, and the data processing module includes a time domain analysis module, a visual experiment module, and an EEG analysis module, and is connected to the EEG acquisition interface, the steady-state visual interface, and the EEG analysis interface in a one-to-one correspondence, wherein the EEG acquisition interface is used to display the time domain spectra of concentration, relaxation, and δ, θ, α, β, and Y waveforms.

[0059] The present invention also provides a portable EEG signal acquisition method, which is used to implement the above-mentioned portable EEG signal acquisition system, and specifically comprises the following steps:

[0060] S100: Collecting EEG signals. Specifically, the EEG signals are collected by EEG collecting electrodes. The collecting electrodes are arranged according to the international standard lead 10-20 electrode system.

[0061] S200: Input the EEG signal to a TPD4E1B06 type electrostatic discharge protector. The TPD4E1B06 type electrostatic discharge protector includes four protection channels. The electrostatic discharge protector is connected to the EEG acquisition electrode, performs signal protection on the collected EEG signal, and inputs the EEG signal to a high-pass filter circuit.

[0062] S300: Input the EEG signal to a high-pass filter circuit to remove low-frequency noise, thereby obtaining a first simulated EEG signal.

[0063] S400: Inputting the first simulated EEG signal into an amplifier circuit for enhancement to obtain a second simulated EEG signal.

[0064] S500: Input the second analog EEG signal into a low-pass filter circuit to filter out high-frequency interference and obtain an analog signal.

[0065] Specifically, the filtering and amplifying circuit includes a first node, a second node, a third node, a fourth node, a fifth node, and a sixth node. The amplifying circuit includes an 0PA2376 amplifier. The 0PA2376 amplifier includes an OUTA pin, an OUTB pin, an INA pin, a +INA pin, an INB pin, a +INB pin, a V+ pin, and a V pin. The second node is connected to the INA pin, the third node is connected to the OUTA pin, the fourth node is connected to the OUTB pin, and the fifth node is connected to the INB pin. The fourth node is connected to the input end of the AD conversion circuit.

[0066] The high-pass filter circuit includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, a second resistor R2, and a third resistor R3, wherein one end of the first capacitor C1 is connected to the first node, and the other end is connected to the third node, one end of the second capacitor C2 is connected to the first node, and the other end is connected to VIOUT, and VIOUT is used to access the EEG signal, one end of the third capacitor C3 is connected to the first node, and the other end is connected to the second node, one end of the first resistor R1 is connected to the second node, and the other end is connected to the third node, one end of the second resistor R2 is connected to the first node, and the other end is grounded, one end of the third resistor R3 is connected to the +INA pin, and the other end is grounded,

[0067] The low-pass filter circuit includes a fourth capacitor C4, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7, wherein one end of the fourth capacitor C4 is connected to the fourth node, and the other end is connected to the fifth node, one end of the fifth capacitor C5 is connected to the sixth node, and the other end is grounded, one end of the fourth resistor R4 is connected to the +INB pin, and the other end is grounded, one end of the fifth resistor R5 is connected to the fourth node, and the other end is connected to the sixth node, one end of the sixth resistor R6 is connected to the fifth node, and the other end is connected to the sixth node, and one end of the seventh resistor R7 is connected to the sixth node, and the other end is connected to the third node.

[0068] S600: Input the analog signal to an AD conversion circuit for analog-to-digital conversion, and output a digital signal.

[0069] The AD conversion chip adopts AD series chips, including 8 transmission channels, and the AD series chips include 4 ADS1299 chips, namely ADS1, ADS2, ADS3 and ADS4. ADS1, ADS2, ADS3 and ADS4 share a group of SCLK, DIN and CS pins, and are respectively connected to the corresponding SCLK, MOSI and GPIO pins of the MCU. The DOUT0 pin of ADS1 is connected to the MISO pin of the MCU for outputting data, and the DRDY pin is connected to the INT pin of the MCU. The DOUT1 pin of ADS2 is connected to the DAISY_IN0 pin of ADS1, the DOUT2 pin of ADS3 is connected to the DAISY_IN1 pin of ADS2, the DOUT3 pin of ADS4 is connected to the DAISY_IN2 pin of ADS3, and the DAISY_IN3 pin is directly grounded. In addition, ADS1, ADS2, ADS3 and ADS4 share a group of START and CLK pins to meet the application requirements of multi-channel data acquisition. In this configuration, ADS1, ADS2, ADS3, and ADS4 work together under the control of the same clock signal. This design ensures that all devices can perform sampling operations synchronously, significantly reducing the delay problem that may occur during data acquisition.

[0070] S700: Transmit the digital signal to the host computer or other external devices. The HC module is equipped with a serial data input port, a serial data output port, a power input port and a ground port. Among them, the serial data input port is connected to the STM chip, and the serial data output port is connected to the host computer or other external devices. Specifically, the STM chip collects the digital signals output by the AD conversion circuit through the SPI interface, and encodes and processes these signals to form data packets. Then, the serial data input port of the HC module receives the data packet, and transmits the data packet to the host computer or other external devices through its serial data output port. In this solution, the HC module uses the HC-06 Bluetooth module.

[0071] Please refer to Figure 4 In this embodiment, the core process of digital signal acquisition is as follows: After the device is powered on, the system immediately starts to execute the initialization program and is in a standby state to receive the acquisition start instruction. When the serial port data input terminal does not receive the start instruction, the system enters a low power mode to wait for instructions. Once the serial port data input terminal receives the acquisition start instruction, the STM chip reads the A / D chip data through the SPI interface. Subsequently, the A / D chip data is encoded and packaged and sent through the serial port data output terminal. When the serial port data input terminal receives the acquisition stop instruction, the A / D chip will terminate data acquisition and the STM chip will stop data transmission.

[0072] Please refer to Figure 5 In this embodiment, the STM chip signal transmission process includes the following steps:

[0073] First, the system is started, and then variables and arrays are defined according to specific requirements, and the initialization program is executed. Specifically, internal resources are configured and initialized based on the requirements analysis and target functions. Then, the While dead loop judgment is executed. This step involves a continuous loop judgment process. In the signal transmission module, it mainly involves the initialization of resources such as general input and output ports (GPIO), universal serial bus (USB), universal synchronous / asynchronous receiver and transmitter (USART), reset and clock control (RCC), and interrupts. Once data reception is detected, it will enter the serial port interrupt service function.

[0074] By calling the serial port interrupt service routine, the detection of the register non-empty flag is realized. When the register is detected as a non-flag bit and a data transmission event is detected, the call of the API function will be triggered. At this time, the USB library function will automatically perform the task of transferring data to the host computer. After the data transmission is completed, the interrupt service routine will terminate, and the system will immediately enter the state of waiting for the next interrupt. When the register is detected as an empty flag, the register overflow flag is judged. When the register is detected as an overflow flag, the flag is cleared and the data is retransmitted. After the data transmission is completed, the interrupt is exited. When the register non-overflow flag is detected, the interrupt is exited.

[0075] In this embodiment, the host computer displays and / or analyzes the digital signal, specifically including: at least using the host computer to perform EEG acquisition and display and / or steady-state visual display based on the digital signal, the EEG acquisition and display content includes EEG signal time domain display and EEG signal frequency domain display, and the steady-state visual display content includes EEG signal changes caused by steady-state visual evoked potential related experiments; and, at least using the host computer to analyze the digital signal.

[0076] Specifically, the host computer includes a display module and a data processing module. The display module includes an EEG acquisition interface, a steady-state visual interface and an EEG analysis interface. The data processing module includes a time domain analysis module, a visual experiment module and an EEG analysis module, and is connected to the EEG acquisition interface, the steady-state visual interface and the EEG analysis interface in a one-to-one correspondence. The EEG acquisition interface is used to display concentration, relaxation and time domain spectra of δ, θ, α, β and γ waveforms.

[0077] Please refer to Figure 6 , the host computer interface includes three sub-interfaces: EEG acquisition, steady-state vision and EEG analysis. The EEG acquisition sub-interface displays multi-channel EEG time domain diagrams and time domain diagrams of each waveform (δ, θ, α, β, Y), and displays concentration and relaxation in real time. The EEG signal frequency domain display generates a waveform diagram with frequency as the horizontal axis and EEG signal voltage value as the vertical axis by performing a fast Fourier transform on the original EEG data. Moreover, the amplitude of each waveform in the integral frequency band can be used to obtain the energy of δ wave, θ wave, α wave, β wave and γ wave respectively. These five waveforms have different performances under different physiological and psychological states, which can reflect the activity state and function of the brain. By analyzing these waveforms, researchers and clinicians can better understand the functional state of the brain, and use them for clinical diagnosis and neuroscience research.

[0078] Steady-state visual elicitation presents visual stimuli of a specific frequency, causing the brain to produce brain waves that are synchronized with the stimulation frequency, which can be used to assess the user's concentration level. Steady-state visual elicitation can be combined with a concentration algorithm. When combined with a concentration algorithm, the system can more accurately judge the user's cognitive state. For example, if the user's concentration is lower than a set threshold (such as 90%), even if the user makes the correct choice in the task, the system will believe that the choice may be based on guesswork rather than the result of real concentration. This joint decision-making mechanism can effectively improve the accuracy of the assessment, reduce misjudgments, and provide users with a more objective attention assessment.

[0079] In this embodiment, the portable EEG signal acquisition method further includes:

[0080] The host computer performs fast Fourier transform on the collected digital signal to realize the conversion of time domain signal into frequency domain signal; the specific frequency domain signal is identified in the EEG signal frequency domain diagram to realize the extraction of steady-state visual evoked potential (SSVEP) features, and combined with the previously set standards, the target content that the user is currently looking at is judged.

[0081] Specifically, the SSVEP feature extraction process involves identifying specific EEG signal features in the EEG signal frequency domain graph and judging the target content that the user is currently looking at based on previously set criteria. The Steady-State Vision sub-interface is designed to perform experimental tasks related to Steady-State Visual Evoked Potentials. After the EEG signal acquisition is completed, the EEG analysis sub-interface is responsible for generating the corresponding analysis report. Figure 6 The real-time concentration level shown is 86 and the real-time relaxation level is 73.

[0082] It should be understood that the above embodiments are only for illustrating the technical concept and features of the present invention, and their purpose is to enable people familiar with the technology to understand the content of the present invention and implement it accordingly, and they cannot be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be included in the protection scope of the present invention.

Claims

1. A portable EEG signal acquisition system, characterized in that: It includes an EEG acquisition electrode, an EEG preprocessing module, and a communication module. The EEG preprocessing module includes a filter amplifier circuit, an AD conversion circuit, and a main control circuit. The filter amplifier circuit includes a high-pass filter circuit, an amplifier circuit, and a low-pass filter circuit. Among them, the EEG collection electrode is used to collect EEG signals and is connected to the input end of the high-pass filter circuit, the output end of the high-pass filter circuit is connected to the input end of the amplifier circuit, the output end of the amplifier circuit is connected to the input end of the low-pass filter circuit, the output end of the low-pass filter circuit is connected to the main control circuit via the AD conversion circuit, the high-pass filter circuit is used to filter out low-frequency noise in the EEG signal, the low-pass filter circuit is used to filter out high-frequency interference signals in the EEG signal, and the main control circuit is also connected to the communication module.

2. The portable EEG signal acquisition system according to claim 1, characterized in that: The filtering and amplifying circuit includes a first node, a second node, a third node, a fourth node, a fifth node, and a sixth node. The amplifying circuit includes an OPA2376 amplifier. The OPA2376 amplifier includes an OUTA pin, an OUTB pin, an INA pin, a +INA pin, an INB pin, a +INB pin, a V+ pin, and a V- pin. The second node is connected to the -INA pin, the third node is connected to the OUTA pin, the fourth node is connected to the OUTB pin, and the fifth node is connected to the -INB pin. The fourth node is connected to the input end of the AD conversion circuit. The high-pass filter circuit includes a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, a second resistor R2, and a third resistor R3, wherein one end of the first capacitor C1 is connected to the first node, and the other end is connected to the third node, one end of the second capacitor C2 is connected to the first node, and the other end is connected to VIOUT, and VI_OUT is used to access an EEG signal, one end of the third capacitor C3 is connected to the first node, and the other end is connected to the second node, one end of the first resistor R1 is connected to the second node, and the other end is connected to the third node, one end of the second resistor R2 is connected to the first node, and the other end is grounded, one end of the third resistor R3 is connected to the +INA pin, and the other end is grounded, The low-pass filter circuit includes a fourth capacitor C4, a fifth capacitor C5, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7, wherein one end of the fourth capacitor C4 is connected to the fourth node, and the other end is connected to the fifth node, one end of the fifth capacitor C5 is connected to the sixth node, and the other end is grounded, one end of the fourth resistor R4 is connected to the +INB pin, and the other end is grounded, one end of the fifth resistor R5 is connected to the fourth node, and the other end is connected to the sixth node, one end of the sixth resistor R6 is connected to the fifth node, and the other end is connected to the sixth node, and one end of the seventh resistor R7 is connected to the sixth node, and the other end is connected to the third node.

3. The portable EEG signal acquisition system according to claim 1, characterized in that: The EEG preprocessing module also includes an electrostatic discharge protector, which is connected to the EEG acquisition electrode to protect the collected EEG signal and input the EEG signal into the filter amplifier circuit; And / or, the EEG preprocessing module further includes a power management module connected to the main control circuit, the power management module is used to be connected to a DC power supply, and includes a first conversion circuit and a second conversion circuit, the first conversion circuit is used to convert the DC power supply into a first voltage to supply the power supply end of the AD conversion circuit, the communication module and the main control circuit, and the second conversion circuit is used to convert the DC power supply into a second voltage to supply the analog power supply end of the AD conversion circuit; And / or, the EEG acquisition electrodes include X acquisition electrodes, the value range of X is 1 to 64, and the X acquisition electrodes are arranged according to the international standard lead 10-20 electrode system, And / or, the electrode is any one of a silver chloride electrode, a silver electrode, and a silver-silver chloride electrode; And / or, the AD conversion circuit includes y AD conversion chips, y≥1, when y≥2, the AD conversion chip includes SCLK, DIN and CS pins, the SCLK pin is connected to the SCLK pin of the main control circuit, the DIN pin is connected to the MOSI pin of the main control circuit, the CS pin is connected to the GPIO pin of the main control circuit, the y AD conversion chips share a group of SCLK, DIN and CS pins, which are respectively connected to the corresponding SCLK, MOSI and GPIO pins of the main control circuit, the DOUT pin of the first AD conversion chip is connected to the MIS0 pin of the main control circuit, the DRDY pin is connected to the INT pin of the main control circuit, and the DOUT pin of the first AD conversion chip outputs data; the DOUT pin of the second AD conversion chip is connected to the DAISY_IN pin of the first AD conversion chip, ... the DOUT pin of the mth AD conversion chip is connected to the DAISY_IN pin of the m-1th AD conversion chip, ... the DAISY_IN pin of the yth AD conversion chip is short-connected to the digital ground, wherein 2≤m≤y.

4. The portable EEG signal acquisition system according to claim 3, characterized in that: The electrostatic discharge protector is a TPD4E1B06 electrostatic discharge protector, which includes 4 protection channels; And / or, the first voltage conversion circuit includes a low-dropout linear regulator and a MIC5319 chip, the low-dropout linear regulator is used to stabilize the DC power supply to a first voltage, and the MIC5319 chip is used to stabilize the first voltage to a second voltage; the second voltage conversion circuit includes a charge pump voltage converter and a TPS72325 chip, the charge pump voltage converter is used to invert the first voltage into a corresponding first negative voltage, and the TPS72325 chip is used to convert the first negative voltage into a second negative voltage, Wherein, the first voltage is connected to the power pin, communication module and main control circuit of the AD conversion circuit, the second voltage is connected to the analog power supply terminal of the AD conversion circuit, and the second negative voltage is connected to the negative power pin of the AD conversion circuit; And / or, the AD conversion circuit includes a first AD conversion chip and a second AD conversion chip, the first AD conversion chip and the second AD conversion chip share a group of SCLK, DIN and CS pins, which are respectively connected to the corresponding SCLK, MOSI and GPIO pins of the main control circuit, the DOUT pin of the first AD conversion chip is connected to the MISO pin of the main control circuit, the DRDY pin is connected to the INT pin of the main control circuit, and the DOUT pin outputs data; the DOUT pin of the second AD conversion chip is connected to the DAISY_IN pin of the first AD conversion chip, and the DAISY_IN pin of the second AD conversion chip is short-circuited to the digital ground.

5. The portable EEG signal acquisition system according to claim 1, characterized in that: The main control circuit obtains the digital signal output by the AD conversion circuit through the SPI interface, and encodes the digital signal to obtain a data packet; And / or, the main control circuit includes an STM series chip.

6. The portable EEG signal acquisition system according to claim 1, characterized in that: The communication module at least includes an HC module, the HC module has a serial port data input terminal, a serial port data output terminal, a power input terminal and a ground terminal, the serial port data input terminal is connected to the main control circuit for acquiring data packets; the serial port data output terminal is used to transmit data packets to a host computer or other external devices; And / or, the HC module adopts HC-06 Bluetooth module.

7. The portable EEG signal acquisition system according to claim 1, characterized in that: The EEG preprocessing module is connected to the host computer via the communication module. The host computer includes a display module and a data processing module. The display module includes an EEG acquisition interface, a steady-state visual interface and an EEG analysis interface. The data processing module includes a time domain analysis module, a visual experiment module and an EEG analysis module, and is connected to the EEG acquisition interface, the steady-state visual interface and the EEG analysis interface in a one-to-one correspondence. The EEG acquisition interface is used to display the time domain spectra of concentration, relaxation and δ, θ, α, β and γ waveforms.

8. A portable EEG signal acquisition method, characterized in that: The method is implemented based on the portable EEG signal acquisition system according to any one of claims 1 to 7, and the method comprises the following steps: Collecting EEG signals with EEG acquisition electrodes and transmitting them to the EEG preprocessing module; The EEG preprocessing module performs low-frequency noise filtering, signal amplification, and high-frequency interference signal filtering on the received EEG signal, and then converts it into a digital signal for output; Transmitting the digital signal to a host computer using a communication module; The digital signal is displayed and / or analyzed by the host computer.

9. The portable EEG signal acquisition method according to claim 8, characterized in that: The displaying and / or analyzing the digital signal by the host computer specifically includes: At least the host computer performs EEG acquisition and display and / or steady-state visual display based on the digital signal, wherein the EEG acquisition and display content includes EEG signal time domain display and EEG signal frequency domain display, and the steady-state visual display content includes EEG signal changes caused by steady-state visual evoked potential related experiments; And, the digital signal is analyzed at least by the host computer.

10. The portable EEG signal acquisition method according to claim 9, characterized in that: Also includes: Using the host computer to perform fast Fourier transform on the digital signal to convert the time domain signal into a frequency domain signal; In the EEG signal frequency domain diagram, the user's current EEG signal features in the frequency domain signal are identified to achieve SSVEP feature capture, and then combined with the pre-set content to determine the current user's gaze.

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