A synchronous control method and device for a magnetic levitation molecular pump equipped with FPGA
By introducing FPGA chips into the magnetic levitation molecular pump control system for clock synchronization and buffer processing, the problem of unstable communication signals of the controller is solved, and more efficient and reliable data transmission is achieved, ensuring the safety of industrial production.
Patent Information
- Application Number
- CN202411938318.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2044-12-26
AI Technical Summary
The communication output signal of the existing magnetic levitation molecular pump controller is unstable, resulting in data packet loss and packet loss, and may even cause abnormal equipment shutdown, affecting industrial production safety.
The FPGA chip is used for clock synchronization and buffer processing, the UART signal is received through the FPGA and stored in the txd-FIFO buffer, packet analysis and system configuration are performed, the clock synchronization mechanism is used to ensure the stability of data transmission, and specific checksum handshake is performed when necessary to adjust the baud rate.
It improves the stability of the controller communication output signal, reduces the accumulation of clock errors, enhances the reliability and efficiency of data transmission, and adapts to the needs of high-speed Internet of Things communication.
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Figure CN119778293B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of molecular pump control, and in particular to a method and device for synchronously controlling a magnetically suspended molecular pump equipped with an FPGA. Background Art
[0002] A levitation molecular pump is a mechanical vacuum pump that can achieve high vacuum and ultra-high vacuum. It pumps air through a combination of high-speed rotating multi-stage turbine rotor blades and stationary blades, producing a very high compression ratio for the pumped gas in the molecular flow area, thereby achieving the required vacuum performance. Magnetic levitation molecular pumps can only be used to achieve high and ultra-high vacuum, and must be equipped with a reasonable fore-stage pump and a matching molecular pump controller. Magnetic levitation molecular pumps are widely used in: vacuum acquisition for physical surface analysis instruments, vacuum acquisition for accelerator technology, vacuum acquisition for plasma technology, vacuum acquisition for simulated environments in aerospace, vacuum acquisition for the manufacture of electronic and electrical components, and vacuum acquisition for various surface coatings. The KYKY integrated magnetic levitation molecular pump is a type of compound turbomolecular pump and is widely used in semiconductors, industrial coatings, scientific research, surface analysis, vacuum electronic devices and other fields.
[0003] As the core component of molecular pumps, controllers are responsible for numerous functions, including molecular pump operation control, operational data monitoring, inter-board communication, and external communication. As industrial demands for molecular pump control speed and accuracy continue to increase, higher requirements are placed on the stability of the communication signal transmission of molecular pump controllers. On industrial production lines, unstable communication transmission can lead to problems such as data packet loss and message loss. In severe cases, this can cause unstable control signals, communication interruptions, and even unexpected equipment shutdowns. Therefore, improving the stability of controller communication output signals is crucial for industrial safety production. Summary of the Invention
[0004] In view of this, the present invention provides a method and device for synchronous control of a magnetic levitation molecular pump equipped with FPGA to solve the problem of how to improve the stability of the controller communication output signal.
[0005] In a first aspect, the present invention provides a synchronous control method for a magnetic levitation molecular pump equipped with an FPGA, which is applied to a synchronous control system of a magnetic levitation molecular pump equipped with an FPGA. The method comprises:
[0006] In response to the UART signal output by the magnetic levitation molecular pump controller, receive the message and store the message in the txd-FIFO buffer;
[0007] Configure the system according to the analysis results of the message, send transmission instructions to the lower computer, and output TXD signal;
[0008] The clock synchronization mechanism is used to control the system to operate under the condition of synchronous clock CLK;
[0009] In response to the message read instruction of the magnetic levitation molecular pump controller, the message read through the RXD signal is stored in the rxd-FIFO buffer, and the message is returned to the magnetic levitation molecular pump controller.
[0010] The present invention introduces an FPGA chip, adds a buffer, stores received messages in the txd-FIFO buffer to improve data transmission reliability, parses messages to configure the system to improve communication efficiency, uses a clock synchronization mechanism to synchronize clocks, reduces the accumulation of clock errors caused by serial data transmission, stores the read messages in the rxd-FIFO buffer, and returns them to the magnetic levitation molecular pump controller to meet the needs of the development of high-speed Internet of Things communications and improve the stability of the controller's communication output signal.
[0011] In an optional implementation, before performing system configuration according to the parsing result of the message, the method further includes:
[0012] Perform specific verification on the message;
[0013] If the message specificity check passes, the message is parsed to obtain the parsing result of the message.
[0014] The present invention performs specific verification on the message to effectively detect errors in the message transmission process, ensure that the received data is consistent with the sent data, and thus ensure the correctness of the message transmission.
[0015] In an optional implementation, the message parsing result includes transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information. System configuration is performed based on the message parsing result, including:
[0016] Configure the system based on the parsed transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information.
[0017] The present invention performs system configuration according to the parsed transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information to configure key parameters, improve communication efficiency, and enhance overall performance.
[0018] In an optional embodiment, after storing the message read through the RXD signal in the rxd-FIFO buffer, the method further includes:
[0019] Perform specificity verification on the message;
[0020] If the message specificity check passes, the step of returning the message to the magnetic levitation molecular pump controller is executed.
[0021] The present invention performs specific verification on the read message to detect errors in the message transmission process and ensure the correctness of the data.
[0022] In an optional embodiment, the method further includes:
[0023] Configure the initial baud rate, respond to the handshake request sent by the host computer, and adjust the baud rate according to the handshake request so that both the FPGA and the host computer are adjusted to the new baud rate.
[0024] The present invention adjusts the baud rates of both the FPGA and the host computer to new baud rates by handshaking with the host computer, thereby establishing a basis for reliable communication and avoiding data transmission errors caused by baud rate mismatch.
[0025] In an optional embodiment, the method further includes:
[0026] Transmit handshake message to the lower computer, determine the working mode of the lower computer, and set the working mode to be consistent with the working mode of the lower computer.
[0027] The present invention transmits a handshake message to the lower computer to identify the working mode of the lower computer, and adjusts the working mode of the FPGA to match the working mode of the lower computer, thereby ensuring communication between the two.
[0028] In a second aspect, the present invention provides a synchronous control device for a magnetic levitation molecular pump equipped with an FPGA, the device comprising:
[0029] A receiving module, configured to receive a message in response to a UART signal output by the magnetic levitation molecular pump controller, and store the message in a txd-FIFO buffer;
[0030] The signal output module is used to configure the system according to the analysis results of the message, send transmission instructions to the lower computer, and output TXD signals;
[0031] An operation module is used to control the system to operate under the condition of a synchronous clock CLK using a clock synchronization mechanism;
[0032] The return module is used to respond to the message reading instruction of the magnetic levitation molecular pump controller, store the message read through the RXD signal into the rxd-FIFO buffer, and return the message to the magnetic levitation molecular pump controller.
[0033] In a third aspect, the present invention provides a computer device comprising: a memory and a processor, the memory and the processor being communicatively connected to each other, the memory storing computer instructions, and the processor executing the computer instructions to thereby execute the method for synchronous control of a magnetically levitated molecular pump equipped with an FPGA according to the first aspect or any corresponding embodiment thereof.
[0034] In a fourth aspect, the present invention provides a computer-readable storage medium having computer instructions stored thereon, the computer instructions being used to enable a computer to execute the method for synchronous control of a magnetically levitated molecular pump equipped with an FPGA according to the first aspect or any corresponding embodiment thereof.
[0035] In a fifth aspect, the present invention provides a computer program product, comprising computer instructions for causing a computer to execute the method for synchronously controlling a magnetically levitated molecular pump equipped with an FPGA according to the first aspect or any corresponding embodiment thereof. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0037] Figure 1 1 is a flow chart of a synchronous control method of a magnetic levitation molecular pump equipped with FPGA according to an embodiment of the present invention;
[0038] Figure 2 2 is a schematic diagram of an application of a synchronous control method of a magnetic levitation molecular pump equipped with FPGA according to an embodiment of the present invention;
[0039] Figure 3 This is a structural block diagram of a synchronous control device for a magnetic levitation molecular pump equipped with FPGA according to an embodiment of the present invention;
[0040] Figure 4 Schematic diagram of the hardware structure of a computer device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0041] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.
[0042] As the core component of the molecular pump, the controller is responsible for many functions, including molecular pump operation control, operation data monitoring, inter-board communication, and external communication. In order to meet the different needs of different customers, its external communication has the following methods:
[0043] (1) Serial communication via RS232;
[0044] (2) Serial communication via RS485;
[0045] (3) Signal transmission and control through GPIO;
[0046] (4) Industrial Internet control through EtherCAT;
[0047] (5) Signal transmission and control through touch screen display;
[0048] (6) Signal transmission and control through Profibus;
[0049] (7) Signal transmission and control are achieved through Profinet.
[0050] The current communication solution used by the magnetic levitation molecular pump control board primarily relies on UART (Universal Asynchronous Receiver / Transmitter) to implement serial data transmission and reception. Although this solution is relatively simple in hardware design, the clock sources of different devices may have slight frequency differences. Over time, these frequency differences can cause errors to accumulate in data transmission. During the data transmission process between the sender and receiver, mismatches may occur. If the sender sends data too quickly, the receiver may not be able to process it in time, resulting in data loss or buffer overflow. UART error detection and handling typically relies on software. If the software is not handled properly, data transmission errors may not be detected and corrected in a timely manner, thereby affecting system reliability.
[0051] The solution to the clock error accumulation problem in UART data transmission is as follows:
[0052] (1) Select a high-precision clock source:
[0053] Use a high-quality crystal oscillator for the UART module to provide a more stable and accurate clock signal. For example, a temperature-compensated crystal oscillator (TCXO) or oven-controlled crystal oscillator (OCXO) offers higher precision and stability, reducing the accumulation of clock errors. Ensure that the crystal frequency matches the baud rate required by the UART, and choose a crystal with minimal frequency deviation.
[0054] (2) Optimize hardware layout:
[0055] Properly layout the clock lines and UART signal lines on the PCB to reduce signal interference and clock jitter. Keep the clock lines short and straight, and avoid crossing or running close to other high-speed signal lines to reduce the impact of electromagnetic interference on the clock signal.
[0056] Use good grounding and power filtering techniques to ensure clock signal stability.
[0057] (3) Data verification and error correction:
[0058] Data checking and error correction mechanisms, such as parity check and cyclic redundancy check (CRC), are used in UART communication. These mechanisms can detect and correct errors in data transmission and reduce data errors caused by clock errors. When the receiving end detects a data error, it can request the sending end to resend the data to ensure data accuracy.
[0059] (4) Timeout and retransmission mechanism:
[0060] Set a reasonable timeout. If the receiver does not receive data within a certain period of time or receives incomplete data, the timeout mechanism is triggered and the sender is requested to resend the data. The retransmission mechanism ensures that data transmission can be resumed in a timely manner when clock errors cause data loss or errors.
[0061] (5) Software filtering:
[0062] Perform software filtering on the received data to remove noise and interference caused by clock errors. You can use digital filters, mean filters, or other filtering algorithms to smooth the received data and improve data accuracy.
[0063] (6) Reduce the communication rate:
[0064] If the clock error accumulation problem is serious, you can consider reducing the UART communication rate. A lower communication rate can reduce the impact of clock errors on data transmission, but it will reduce data transmission efficiency.
[0065] When selecting the communication rate, it is necessary to comprehensively consider the system performance requirements and the impact of clock errors.
[0066] (7) Use clock synchronization technology:
[0067] Introducing a clock synchronization mechanism into the system, such as using an external clock source or a synchronous bus to synchronize the clocks of the transmitter and receiver, ensures that the clocks of both parties remain consistent and reduces the accumulation of clock errors.
[0068] Among them, selecting a high-precision clock source, performing data verification and error correction, and adopting a timeout and retransmission mechanism can effectively improve the problem of clock error accumulation in data transmission, but it cannot fundamentally avoid the occurrence of error accumulation problems; optimizing hardware layout can reduce the impact of electromagnetic interference, but with the continuous development of molecular pumps, the demand for miniaturized controllers has increased significantly, and the structures of different types of molecular pump controllers are different, which requires optimizing the circuits of each model one by one, which is not conducive to the rapid promotion of new models. Software filtering can reduce the impact of clock errors on data to a certain extent, but filtering often leads to increased data delays. The use of clock synchronization technology can effectively solve the problem of clock error accumulation from the root, improve the stability of signal transmission, reduce the complexity of hardware development, and be compatible with more types of molecular pump controllers.
[0069] This embodiment of the present invention enhances existing serial communication by adding an FPGA chip to the output port, enabling clock synchronization between multiple control chips. This allows for clock synchronization in communications with EtherCAT, Profinet, and Profibus boards, while also providing an optional synchronous clock output on the DB9 pins used for RS232 / RS485 data transmission. All optional controls can be controlled from the master controller.
[0070] Specifically, an FPGA (Field Programmable Gate Array) is an integrated circuit that can be programmed to implement specific logic functions. It contains modules such as programmable input / output blocks (IOBs) and a digital clock manager (DCM). The DCM manages and processes clock signals, eliminating clock delays, performing frequency synthesis, adjusting clock phases, and reducing clock jitter, providing accurate and stable clock signals for various modules within the FPGA.
[0071] According to an embodiment of the present invention, an embodiment of a method for synchronously controlling a magnetic levitation molecular pump equipped with an FPGA is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0072] In this embodiment, a synchronous control method of a magnetic levitation molecular pump equipped with an FPGA is provided, which is applied to a synchronous control system of a magnetic levitation molecular pump equipped with an FPGA. The system includes a host computer, an FPGA, and a slave computer. The method uses the FPGA as the execution body. Figure 1FIG. 1 is a flow chart of a synchronous control method of a magnetic levitation molecular pump equipped with FPGA according to an embodiment of the present invention. Figure 1 As shown, the process includes the following steps:
[0073] Step S101 : receiving a message in response to a UART signal output by a magnetic levitation molecular pump controller, and storing the message in a txd-FIFO buffer.
[0074] In an embodiment of the present invention, the magnetic levitation molecular pump controller uses UART to realize serial data transmission and reception. The UART signal output by the magnetic levitation molecular pump controller transmits the message to be sent to the FPGA for processing through serial transmission, sets a buffer area, and stores the transmitted message in the txd-FIFO buffer.
[0075] Step S102: Perform system configuration according to the parsing result of the message, send a transmission instruction to the lower computer, and output a TXD signal.
[0076] In the embodiment of the present invention, the FPGA parses the message content to obtain the TXD signal to be sent, then performs system configuration, sends a transmission instruction to the lower computer, enables the output, and outputs the TXD signal.
[0077] Step S103: utilizing a clock synchronization mechanism to control the system to operate under the condition of a synchronous clock CLK.
[0078] In the embodiment of the present invention, during the data transmission process, the FPGA, the magnetic levitation molecular pump controller and the lower computer all use the same clock signal CLK for synchronization to ensure that the operations between the components are coordinated and consistent, thereby ensuring the stability and reliability of data transmission.
[0079] Step S104 , in response to the message read instruction of the magnetic levitation molecular pump controller, storing the message read through the RXD signal into the rxd-FIFO buffer, and returning the message to the magnetic levitation molecular pump controller.
[0080] In an embodiment of the present invention, when the magnetic levitation molecular pump controller reads a message from the lower computer, it reads the message through the RXD signal, sets a buffer area, stores the message in the rxd-FIFO buffer, and then returns the message to the magnetic levitation molecular pump controller through serial transmission.
[0081] The synchronous control method for a magnetic levitation molecular pump equipped with an FPGA provided in this embodiment introduces an FPGA chip, adds a buffer, stores received messages in a txd-FIFO buffer to improve data transmission reliability, parses messages to configure the system to improve communication efficiency, utilizes a clock synchronization mechanism for clock synchronization to reduce the accumulation of clock errors caused by serial data transmission, stores read messages in an rxd-FIFO buffer, and returns them to the magnetic levitation molecular pump controller to meet the needs of the development of high-speed Internet of Things communications and improve the stability of the controller's communication output signal.
[0082] In this embodiment, a synchronous control method of a magnetic levitation molecular pump equipped with an FPGA is provided, and the process includes the following steps:
[0083] Step S201 , configuring an initialization baud rate, responding to a handshake request sent by a host computer, and adjusting the baud rate according to the handshake request, so that both the FPGA and the host computer are adjusted to the new baud rate.
[0084] In this embodiment of the present invention, the FPGA is configured with an initial baud rate. At this initial baud rate, the host computer sends a handshake request to the FPGA, which contains information about the new baud rate. The FPGA responds to the handshake request from the host computer, parses the new baud rate information in the request, and then adjusts both the FPGA and the host computer to the new baud rate based on the handshake information in the request.
[0085] By handshaking with the host computer, the baud rates of both the FPGA and the host computer are adjusted to the new baud rate, establishing the basis for reliable communication and avoiding data transmission errors caused by baud rate mismatch.
[0086] Step S202 : receiving a message in response to the UART signal output by the magnetic levitation molecular pump controller, and storing the message in a txd-FIFO buffer.
[0087] For details, please see Figure 1 Step S101 of the illustrated embodiment will not be described in detail here.
[0088] Step S203: perform specificity verification on the message.
[0089] Step S204: If the message specificity check passes, the message is parsed to obtain a parsing result of the message.
[0090] In the embodiment of the present invention, the FPGA performs specific verification on the message header, check code and other information. If the message specific verification passes, the message is parsed to obtain a parsing result of the message.
[0091] Specifically, data checking and error correction mechanisms are used in UART communication, including parity check, cyclic redundancy check (CRC), etc. These mechanisms can detect and correct errors in data transmission and reduce data errors caused by clock errors. When data errors are detected, the sender can be requested to resend the data to ensure data accuracy.
[0092] By performing specific verification on the message, errors in the message transmission process can be effectively detected to ensure that the received data is consistent with the sent data, thereby ensuring the correctness of the message transmission.
[0093] Step S205 , transmitting a handshake message to the lower computer, determining the working mode of the lower computer, and setting the working mode to be consistent with the working mode of the lower computer.
[0094] In this embodiment of the present invention, to ensure compatibility with slave computers that don't support synchronous clocks, communication between the FPGA and the slave computer requires the transmission of handshake messages to determine the slave computer's operating mode. The FPGA sends a handshake request message to the slave computer. Upon receiving the handshake request, the slave computer parses and responds with a handshake response message, informing the slave computer of its current operating mode. After the handshake is complete, the FPGA and slave computer proceed with subsequent data transmission based on the confirmed operating mode.
[0095] By transmitting a handshake message to the lower computer, the working mode of the lower computer is identified, and the working mode of the FPGA is adjusted to match the working mode of the lower computer to ensure communication between the two.
[0096] Step S206: Perform system configuration according to the parsing result of the message, send a transmission instruction to the lower computer, and output a TXD signal.
[0097] Specifically, the above step S206 includes:
[0098] Step S2061 , performing system configuration according to the parsed transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information.
[0099] In the embodiment of the present invention, the message parsing result includes the transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information. After parsing the message, the transmission clock frequency, baud rate, etc. are set accordingly to complete the system configuration.
[0100] By configuring the system based on the parsed transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information, key parameters can be configured to improve communication efficiency and overall performance.
[0101] Step S207: Using the clock synchronization mechanism, the system is controlled to run under the condition of the synchronous clock CLK.
[0102] For details, please see Figure 1 Step S103 of the illustrated embodiment will not be described in detail here.
[0103] Step S208 , in response to the message read instruction of the magnetic levitation molecular pump controller, storing the message read through the RXD signal into the rxd-FIFO buffer, and returning the message to the magnetic levitation molecular pump controller.
[0104] In some optional embodiments, the method further comprises:
[0105] Step S2081: perform specificity verification on the message.
[0106] Step S2082: If the message specificity check passes, the step of returning the message to the magnetic levitation molecular pump controller is executed.
[0107] In an embodiment of the present invention, a message is read through the RXD signal, stored in the rxd-FIFO buffer, and a message specificity check is performed. If the message specificity check passes, the message is returned to the magnetic levitation molecular pump controller.
[0108] The synchronous control method of a magnetic levitation molecular pump equipped with an FPGA provided in this embodiment performs specific verification on the read message to detect errors in the message transmission process and ensure the correctness of the data.
[0109] like Figure 2 As shown, the embodiment of the present invention introduces an FPGA chip, implements a clock synchronization solution, and adds a buffer function, a message verification function, etc., to further reduce the clock error accumulation problem caused by serial data transmission and improve the stability of communication transmission.
[0110] FPGA chips are used to implement clock synchronization technology. FPGAs offer the following advantages: They possess parallel processing capabilities. FPGAs possess a large number of logic units and hardware resources, enabling them to execute multiple tasks simultaneously. This parallel processing capability gives FPGAs a significant advantage when processing high-speed data and complex algorithms. Their high-speed processing capabilities allow them to achieve very high clock frequencies, enabling them to rapidly process large amounts of data. Compared to traditional microprocessors, FPGAs offer higher performance for certain tasks and possess low latency. Because FPGAs are hardware-based, their processing latency is very low.
[0111] This embodiment also provides a magnetic levitation molecular pump synchronization control device equipped with an FPGA, which is used to implement the above-mentioned embodiments and preferred embodiments. Details that have already been described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that implements a predetermined function. Although the devices described in the following embodiments are preferably implemented in software, implementation using hardware, or a combination of software and hardware, is also possible and contemplated.
[0112] This embodiment provides a synchronous control device for a magnetic levitation molecular pump equipped with an FPGA. Figure 3 Shown, including:
[0113] The receiving module 301 is configured to receive a message in response to a UART signal output by the magnetic levitation molecular pump controller, and store the message in a txd-FIFO buffer.
[0114] The signal output module 302 is used to perform system configuration according to the parsing result of the message, send a transmission instruction to the lower computer, and output a TXD signal.
[0115] The operation module 303 is used to control the system to operate under the condition of the synchronous clock CLK by using the clock synchronization mechanism.
[0116] The return module 304 is configured to store the message read through the RXD signal into the rxd-FIFO buffer in response to the message read instruction of the magnetic levitation molecular pump controller, and return the message to the magnetic levitation molecular pump controller.
[0117] In some optional embodiments, the device further comprises:
[0118] The first verification module is used to perform specific verification on the message.
[0119] The parsing module is used to parse the message and obtain the parsing result of the message if the message specificity verification passes.
[0120] In some optional implementations, the signal output module 302 includes:
[0121] The configuration unit is used to configure the system according to the parsed transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information.
[0122] In some optional embodiments, the device further comprises:
[0123] The second verification module is used to perform specific verification on the message.
[0124] The execution module is configured to return the message to the magnetic levitation molecular pump controller if the message specificity check passes.
[0125] In some optional embodiments, the device further comprises:
[0126] The adjustment module is used to configure the initialization baud rate, respond to the handshake request sent by the host computer, and adjust the baud rate according to the handshake request so that both the FPGA and the host computer are adjusted to the new baud rate.
[0127] In some optional embodiments, the device further comprises:
[0128] The setting module is used to transmit handshake messages to the lower computer, determine the working mode of the lower computer, and set the working mode to be consistent with the working mode of the lower computer.
[0129] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.
[0130] The synchronous control device of the magnetic levitation molecular pump equipped with FPGA in this embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.
[0131] The embodiment of the present invention also provides a computer device having the above Figure 3 The magnetic levitation molecular pump synchronization control device equipped with FPGA is shown.
[0132] See also Figure 4 , Figure 4 is a structural diagram of a computer device provided by an optional embodiment of the present invention, such as Figure 4 As shown, the computer device includes: one or more processors 10, memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components utilize different buses to communicate with each other and can be installed on a common mainboard or installed in other ways as needed. The processor can process the instructions executed in the computer device, including instructions stored in the memory or on the memory to display the graphical information of the GUI on an external input / output device (such as, a display device coupled to the interface). In some optional embodiments, if necessary, multiple processors and / or multiple buses can be used together with multiple memories and multiple memories. Equally, multiple computer devices can be connected, and each device provides part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 4 A processor 10 is taken as an example.
[0133] The processor 10 may be a central processing unit, a network processor, or a combination thereof. The processor 10 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device may be a complex programmable logic device, a field programmable gate array, a general purpose array logic, or any combination thereof.
[0134] The memory 20 stores instructions that can be executed by at least one processor 10, so as to enable at least one processor 10 to execute the method shown in the above embodiment.
[0135] The memory 20 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and application programs required for at least one function; the data storage area may store data created based on the use of the computer device, etc. In addition, the memory 20 may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage device. In some optional embodiments, the memory 20 may optionally include a memory remotely located relative to the processor 10, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0136] The memory 20 may include a volatile memory, such as a random access memory; the memory may also include a non-volatile memory, such as a flash memory, a hard disk or a solid-state drive; the memory 20 may also include a combination of the above types of memory.
[0137] The computer device further includes an input device 30 and an output device 40. The processor 10, the memory 20, the input device 30 and the output device 40 may be connected via a bus or other means. Figure 4 The bus connection is taken as an example.
[0138] The input device 30 can receive input digital or character information and generate key signal input related to user settings and function control of the computer device, such as a touch screen, etc. The output device 40 can include a display device, etc.
[0139] The embodiment of the present invention also provides a computer-readable storage medium. The above-mentioned method according to the embodiment of the present invention can be implemented in hardware, firmware, or implemented as a computer code that can be recorded in a storage medium, or implemented as a computer code that is originally stored in a remote storage medium or a non-temporary machine-readable storage medium and downloaded through a network and will be stored in a local storage medium, so that the method described herein can be stored in such software processing on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only storage memory, a random access memory, a flash memory, a hard disk or a solid-state drive, etc.; further, the storage medium can also include a combination of the above-mentioned types of memory. It can be understood that a computer, a processor, a microprocessor controller or programmable hardware includes a storage component that can store or receive software or computer code. When the software or computer code is accessed and executed by a computer, a processor or hardware, the method shown in the above embodiment is implemented.
[0140] A portion of the present invention may be applied as a computer program product, such as a computer program instruction, which, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer. Those skilled in the art should understand that the form in which the computer program instruction exists in a computer-readable medium includes, but is not limited to, a source file, an executable file, an installation package file, etc. Accordingly, the way in which the computer program instruction is executed by the computer includes, but is not limited to: the computer directly executes the instruction, or the computer compiles the instruction and then executes the corresponding compiled program, or the computer reads and executes the instruction, or the computer reads and installs the instruction and then executes the corresponding installed program. Here, the computer-readable medium may be any available computer-readable storage medium or communication medium that can be accessed by the computer.
[0141] Although the embodiments of the present invention have been described with reference to the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are intended to fall within the scope of this application.
Claims
1. A synchronous control method of a magnetic levitation molecular pump equipped with FPGA, characterized in that: Applied to a synchronous control system of a magnetic levitation molecular pump equipped with an FPGA, the method includes: In response to the UART signal output by the magnetic levitation molecular pump controller, receive the message and store the message in the txd-FIFO buffer; Configure the system according to the analysis results of the message, send transmission instructions to the lower computer, and output TXD signal; The clock synchronization mechanism is used to control the system to operate under the condition of synchronous clock CLK; In response to the message read instruction of the magnetic levitation molecular pump controller, the message read through the RXD signal is stored in the rxd-FIFO buffer, and the message is returned to the magnetic levitation molecular pump controller; Before performing system configuration according to the parsing result of the message, the method further includes: Perform specificity verification on the message; If the message specificity check passes, the message is parsed to obtain the parsing result of the message, which includes the transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information; The system configuration according to the parsing result of the message includes: Configure the system based on the parsed transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information.
2. The method according to claim 1, characterized in that After storing the message read through the RXD signal in the rxd-FIFO buffer, the method further includes: Perform specificity verification on the message; If the message specificity check passes, the step of returning the message to the magnetic levitation molecular pump controller is performed.
3. The method according to claim 1, characterized in that The method further comprises: Configure the initialization baud rate, respond to the handshake request sent by the host computer, and adjust the baud rate according to the handshake request so that both the FPGA and the host computer are adjusted to the new baud rate.
4. The method according to claim 1, wherein The method further comprises: Transmit handshake message to the lower computer, determine the working mode of the lower computer, and set the working mode to be consistent with the working mode of the lower computer.
5. A synchronous control device for a magnetic levitation molecular pump equipped with FPGA, characterized in that: The device comprises: A receiving module, configured to receive a message in response to a UART signal output by the magnetic levitation molecular pump controller, and store the message in a txd-FIFO buffer; The signal output module is used to configure the system according to the analysis results of the message, send transmission instructions to the lower computer, and output TXD signals; An operation module is used to control the system to operate under the condition of a synchronous clock CLK using a clock synchronization mechanism; A return module, configured to respond to a message read instruction from the magnetic levitation molecular pump controller, store the message read through the RXD signal into the rxd-FIFO buffer, and return the message to the magnetic levitation molecular pump controller; The device further comprises: A message verification module is used to perform specific verification on messages; A message parsing module is used to parse the message if the message specificity check passes, and obtain the message parsing result, wherein the message parsing result includes the transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information; The signal output module is specifically used to configure the system according to the analyzed transmission clock frequency, baud rate, UART pin information, and GPIO enable pin information.
6. A computer device, characterized in that: include: A memory and a processor, wherein the memory and the processor are communicatively connected to each other, the memory stores computer instructions, and the processor executes the synchronous control method of a magnetic levitation molecular pump equipped with an FPGA according to any one of claims 1 to 4 by executing the computer instructions.
7. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a computer to execute the synchronous control method of a magnetic levitation molecular pump equipped with an FPGA according to any one of claims 1 to 4.
8. A computer program product, characterized in that The method comprises computer instructions, wherein the computer instructions are used to enable a computer to execute the synchronous control method of a magnetic levitation molecular pump equipped with an FPGA according to any one of claims 1 to 4.
Citation Information
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