Hyper-spectrum atmospheric detection load electronics system for commercial aerospace application

Abstract

The invention relates to a hyperspectral atmospheric detection load electronics system for commercial aerospace application. The system is carried on a satellite platform and comprises a power supply, a refrigeration driving board and an imaging circuit board, the imaging circuit board comprises a detector focal panel and a communication control board, and the detector focal panel is connected with the communication control board through a flexible board; the detector focal panel comprises a detector integrated with a temperature sensor and a refrigeration unit; the communication control panel is in communication connection with a data transmission subsystem of a satellite platform through an image output interface, and the communication control panel is in communication connection with a data management subsystem of the satellite platform through a communication transmission interface; and the power supply and the refrigeration driving board are electrically connected with the communication control board, the detector focal panel and the detector through an inter-board connector in the imaging circuit board. By adopting the system, different functions can be realized without adopting various main control chips, and the cost increase caused by high circuit power consumption, high chip price and system complexity is avoided, so that the detection cost of atmospheric detection is reduced.

Description

Technical Field

[0001] The present application relates to the field of optoelectronic detection technology, and in particular to a hyperspectral atmospheric detection payload electronics system for commercial aerospace applications. Background Art

[0002] Hyperspectral atmospheric detection can collect and process electromagnetic radiation information from the Earth's atmosphere by carrying a remote sensing satellite platform, thereby conducting remote sensing detection of the atmosphere, including monitoring of atmospheric composition, temperature, density and other parameters.

[0003] In traditional technologies, when remote sensing is performed on atmospheric components, the detection system needs to integrate multiple main control chips, which increases the detection cost and is not conducive to reducing the detection cost of atmospheric detection. Summary of the invention

[0004] Based on this, it is necessary to provide a hyperspectral atmospheric detection payload electronics system for commercial aerospace applications that can reduce the detection cost of atmospheric detection in response to the above technical problems.

[0005] A hyperspectral atmospheric detection payload electronics system for commercial aerospace applications, the system is carried on a satellite platform, and the system includes: a power supply and cooling drive board, an imaging circuit board, wherein:

[0006] The imaging circuit board includes a detector focus panel and a communication control board, and the detector focus panel and the communication control board are connected via a flexible board;

[0007] The detector focal plane includes a detector integrated with a temperature sensor and a refrigeration unit;

[0008] The communication control board is connected to the data transmission subsystem of the satellite platform through the image output interface, and the communication control board is connected to the data management subsystem of the satellite platform through the communication transmission interface;

[0009] The power supply and cooling drive board are electrically connected to the communication control board, the detector focus panel and the detector through the inter-board connector in the imaging circuit board.

[0010] In one embodiment, the communication control board further includes: an FPGA, a secondary power supply circuit and a temperature feedback circuit, wherein:

[0011] The FPGA is communicatively connected to the inter-board connector to modulate voltage;

[0012] The secondary power supply circuit is respectively connected to the detector focus panel, the FPGA and the inter-board connector for power supply;

[0013] The temperature feedback circuit is connected to the FPGA through an analog-to-digital converter, and the temperature feedback circuit is connected to the detector focus panel.

[0014] In one embodiment, the communication control board further includes an LVDS interface circuit, the LVDS interface circuit is communicatively connected to the FPGA, and the LVDS interface circuit is communicatively connected to a data transmission subsystem of the satellite platform via an image output interface.

[0015] In one embodiment, the communication control board also includes a CAN interface circuit, and the CAN interface circuit is communicatively connected to the FPGA and is communicatively connected to the digital control subsystem of the satellite platform through a communication transmission interface.

[0016] In one embodiment, the detector focal plane includes an analog front-end circuit, the analog front-end circuit is communicatively connected to the detector, and the analog front-end circuit is communicatively connected to the FPGA via an analog-to-digital converter.

[0017] In one of the embodiments, the model of the FPGA is XQ4VSX55-10FF1148M.

[0018] In one of the embodiments, the communication control board further includes a refresh chip, a FLASH memory and a PROM chip, and the refresh chip is electrically connected to the FLASH memory, the PROM chip and the FPGA respectively.

[0019] In one of the embodiments, the refresh chip has a model number of JMRS01RH.

[0020] In one of the embodiments, the model of the FLASH memory is JFM29LV641RH.

[0021] In one of the embodiments, the model of the PROM chip is XQ17V16.

[0022] The above-mentioned hyperspectral atmospheric detection payload electronics system for commercial aerospace applications, when the power supply and refrigeration drive board are electrically connected to the communication control board in the imaging circuit board, the detector focal panel, and the detector with a temperature sensor and a refrigeration unit integrated in the detector focal panel through the inter-board connector in the imaging circuit board, uses the communication control board to communicate with the data transmission subsystem of the satellite platform through the image output interface and communicate with the data control subsystem of the satellite platform through the communication transmission interface. The communication control board can be used as the main control chip of the electronics system to realize the detector drive imaging, image output and communication transmission at the same time, without using multiple main control chips to realize different functions respectively, avoiding the cost increase caused by high circuit power consumption, expensive chip price and complex system, thereby reducing the detection cost of atmospheric detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0024] Figure 1 A schematic diagram of a hyperspectral atmospheric detection payload electronics system for commercial aerospace applications in one embodiment;

[0025] Figure 2 A schematic diagram of a hyperspectral atmospheric detection payload electronics system for commercial aerospace applications in another embodiment;

[0026] Figure 3 is a schematic diagram of a communication control and image processing board in one embodiment;

[0027] Figure 4 is a circuit diagram of an FPGA in one embodiment;

[0028] Figure 5 A schematic diagram of a flow chart of an atmosphere detection method in an embodiment;

[0029] Figure 6 The figure is a diagram of the internal structure of a computer device in one embodiment.

[0030] The reference numerals and their meanings are as follows:

[0031] 100. Hyperspectral atmospheric detection payload electronics system for commercial aerospace applications; 101. Power supply and cooling driver board; 102. Imaging circuit board; 103. Detector focus panel; 104. Communication control board. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0033] In the description of the present application, it should be understood that when an element is considered to be “connected to” another element, it can be directly connected to the other element or intervening elements may exist at the same time.

[0034] In an exemplary embodiment, Figure 1 As shown, a hyperspectral atmospheric detection payload electronics system for commercial aerospace applications is provided. The hyperspectral atmospheric detection payload electronics system 100 for commercial aerospace applications is carried on a satellite platform. The hyperspectral atmospheric detection payload electronics system 100 for commercial aerospace applications includes: a power supply and cooling drive board 101, an imaging circuit board 102, wherein:

[0035] The imaging circuit board 102 includes a detector focus panel 103 and a communication control panel 104 , and the detector focus panel 103 and the communication control panel 104 are connected via a flexible board.

[0036] Among them, a satellite platform can refer to a combination of a satellite body and a service (guarantee) system that can support one or several payloads.

[0037] The detector focus panel 103 may refer to a circuit board used to capture photons from a target object and convert them into electrical signals.

[0038] The communication control board 104 can be used as a communication control and image processing board. The communication control board 104 can be used as a circuit board for realizing functions such as detector control, detector image acquisition and processing, etc.

[0039] The flexible board may refer to a printed circuit board made of a flexible substrate.

[0040] In practical applications, the detector focus panel 103 and the communication control board 104 can be connected via a flexible board, and in this case, the detector focus panel 103 and the communication control board 104 can be used as a whole circuit board.

[0041] The detector focal plane 103 includes a detector integrated with a temperature sensor and a cooling unit.

[0042] The temperature sensor may refer to a sensor that can sense temperature and convert it into a usable output signal.

[0043] The refrigeration unit may refer to a device for lowering temperature and removing heat. In practical applications, the refrigeration unit may include but is not limited to a cooler.

[0044] The detector may include but is not limited to a short-wave infrared detector.

[0045] In practical applications, the detector focus panel 103 can obtain the spectrum of the atmosphere collected by the detector and convert it into an electrical signal, so that the communication control board can determine the detector image data based on the electrical signal and process the detector image data accordingly. The detector is also integrated with a temperature sensor and a refrigeration unit. The temperature detected by the temperature sensor can be used by the communication control board to determine whether the detector needs to be cooled by the refrigeration unit to ensure the normal operation of the detector.

[0046] The communication control board 104 is connected to the data transmission subsystem of the satellite platform through the image output interface, and the communication control board is connected to the data management subsystem of the satellite platform through the communication transmission interface.

[0047] The image output interface may refer to an interface for serial communication transmission based on LVDS (Low-Voltage Differential Signaling).

[0048] Among them, the data transmission subsystem may refer to a data transmission system in a satellite platform used to transmit detector image data to the ground and other locations.

[0049] The communication transmission interface may refer to an interface for data transmission using a CAN bus.

[0050] The data management subsystem may refer to a data management system in a satellite platform used for transmitting instructions to a communication control board.

[0051] In practical applications, the communication control board 104 can transmit detector image data to the data transmission subsystem of the satellite platform based on the LVDS serial communication protocol, and the communication control board 104 can transmit control instructions and instruction responses to the satellite platform through the CAN bus.

[0052] The power supply and cooling driving board 101 is electrically connected to the communication control board 104 , the detector focus board 103 and the detector through the inter-board connector in the imaging circuit board 102 .

[0053] The power supply and refrigeration driving board 101 may refer to a circuit board used to realize functions such as power supply and refrigeration unit driving.

[0054] Among them, inter-board connectors may refer to components used to establish electrical and mechanical connections between printed circuit boards (PCBs).

[0055] In actual applications, the power supply and refrigeration drive board 101 can convert the 42V input of the satellite platform's primary power supply into a secondary power supply, and respectively supply power to the communication control board 104, the detector focus panel 103 and the detector through the inter-board connector in the imaging circuit board 102. When supplying power to the detector, the power supply and refrigeration drive board 101 can simultaneously supply power to the temperature sensor and the refrigeration unit integrated in the detector, thereby ensuring the normal operation of the communication control board 104, the detector focus panel 103, the detector, the temperature sensor and the refrigeration unit.

[0056] In the above-mentioned hyperspectral atmospheric detection payload electronics system for commercial aerospace applications, when the power supply and refrigeration drive board are electrically connected to the communication control board in the imaging circuit board, the detector focal panel, and the detector with a temperature sensor and a refrigeration unit integrated in the detector focal panel through the inter-board connector in the imaging circuit board, the communication control board is used to communicate with the data transmission subsystem of the satellite platform through the image output interface and communicate with the data control subsystem of the satellite platform through the communication transmission interface. The communication control board can be used as the main control chip of the electronics system to realize detector drive imaging, image output and communication transmission at the same time. There is no need to use multiple main control chips to realize different functions respectively, avoiding the cost increase caused by high circuit power consumption, expensive chip prices and complex systems, thereby reducing the detection cost of atmospheric detection.

[0057] In an exemplary embodiment, the communication control board also includes: an FPGA, a secondary power supply circuit and a temperature feedback circuit, wherein: the FPGA is communicatively connected to the inter-board connector to modulate the voltage; the secondary power supply circuit is respectively connected to the detector focus panel, the FPGA and the inter-board connector for power supply; the temperature feedback circuit is communicatively connected to the FPGA via an analog-to-digital converter, and the temperature feedback circuit is communicatively connected to the detector focus panel.

[0058] Here, FPGA may refer to Field Programmable Gate Array.

[0059] The secondary power supply circuit may refer to a device for regulating and converting electric energy. In practical applications, the secondary power supply circuit may include but is not limited to a DC-DC converter.

[0060] The temperature feedback circuit may refer to a circuit for monitoring temperature. In practical applications, the temperature feedback circuit may obtain a signal representing the temperature monitored by a temperature sensor integrated in the detector and send the signal to the FPGA to feed back the temperature of the detector to the FPGA.

[0061] In practical applications, the communication control board includes an FPGA, a secondary power supply circuit, and a temperature feedback circuit. The FPGA can send a PWM signal to the inter-board connector based on the PWM (Pulse Width Modulation) technology to modulate the voltage of the secondary power supply transmitted by the power supply and the refrigeration drive board. The inter-board connector transmits the modulated secondary power supply to the secondary power supply circuit. The secondary power supply circuit can convert the secondary power supply to obtain a tertiary power supply. The tertiary power supply is used to power the detector focal panel and the FPGA. It can be understood that the tertiary power supply can simultaneously power the detector, the temperature sensor integrated in the detector, and the refrigeration unit when supplying power to the detector focal panel. The temperature sensor can monitor the temperature of the detector and transmit an electrical signal representing the temperature to the temperature feedback circuit. After the temperature feedback circuit inputs the electrical signal representing the temperature into the analog-to-digital converter for analog-to-digital conversion, the FPGA can control the working state of the refrigeration unit based on the electrical signal after the analog-to-digital conversion, thereby realizing refrigeration drive / refrigeration control.

[0062] In this embodiment, the FPGA is communicated with the inter-board connector to modulate the voltage; the secondary power supply circuit is respectively connected to the detector focus panel, FPGA and the inter-board connector for power supply; the temperature feedback circuit is communicated with the FPGA through an analog-to-digital converter, and the temperature feedback circuit is communicated with the detector focus panel. It can power the detector focus panel and FPGA based on the secondary power supply circuit, and perform cooling control based on the temperature feedback circuit, thereby ensuring the normal operation of the detector.

[0063] In some embodiments, the communication control board further includes an LVDS interface circuit, the LVDS interface circuit is communicatively connected to the FPGA, and the LVDS interface circuit is communicatively connected to the data transmission subsystem of the satellite platform via an image output interface.

[0064] The LVDS interface circuit may refer to a circuit that implements high-speed, low-power data transmission based on LVDS (Low-Voltage Differential Signaling).

[0065] In actual applications, the communication control board is also provided with an LVDS interface circuit, which is connected to the FPGA for communication. After acquiring the detector image data, the FPGA can transmit the detector image data to the satellite platform's data transmission subsystem through the LVDS interface circuit and the image output interface, so that the data transmission subsystem can transmit the detector image data to the ground in time, and then perform atmospheric composition analysis based on the detector image data.

[0066] In this embodiment, the LVDS interface circuit is connected to the FPGA for communication, and the LVDS interface circuit is connected to the data transmission subsystem of the satellite platform through the image output interface. The LVDS interface circuit can be used to ensure data transmission between the hyperspectral atmospheric detection payload electronics system for commercial aerospace applications and the data transmission subsystem of the satellite platform, thereby realizing the detector image transmission function.

[0067] In some embodiments, the communication control board also includes a CAN interface circuit, which is communicatively connected to the FPGA and is communicatively connected to the digital control subsystem of the satellite platform through a communication transmission interface.

[0068] The CAN interface circuit may refer to a circuit for implementing the CAN bus protocol.

[0069] In actual applications, the communication control board is also provided with a CAN interface circuit, which is connected to the FPGA for communication. When it is necessary to collect detector image data, the satellite system can transmit control instructions and engineering auxiliary parameters to the FPGA through the CAN interface circuit and the CAN bus. The FPGA controls the detector focus panel in response to the control instruction to control the working state of the detector, and obtains the detector image data through the detector focus panel. After that, the FPGA can return telemetry parameters such as the detector temperature, the voltage of each component of the electronic system, and the current operating state of the electronic system to the digital control subsystem of the satellite system.

[0070] In this embodiment, it is connected to the FPGA through the CAN interface circuit and connected to the digital control subsystem of the satellite platform through the communication transmission interface. It can respond to the control instructions of the satellite platform in a timely manner based on the CAN interface circuit and return telemetry parameters to the digital control subsystem of the satellite platform, thereby realizing the detector image acquisition function.

[0071] In some embodiments, the detector focal plane includes an analog front-end circuit, which is communicatively connected to the detector, and the analog front-end circuit is communicatively connected to the FPGA via an analog-to-digital converter.

[0072] The analog front-end circuit may refer to a circuit located between the detector and the FPGA. In practical applications, the analog front-end circuit may be used to perform preliminary processing and conditioning on the original analog signal for subsequent digitization and further analysis.

[0073] Among them, Analog-to-Digital Converter (ADC) can refer to a device used to convert a continuously changing analog signal into a discrete digital signal.

[0074] In practical applications, the detector focus panel includes an analog front-end circuit, which is connected to the detector for communication. The analog signal output by the detector can be input into the analog front-end circuit, which can perform preliminary processing and conditioning on the analog signal and transmit the processed analog signal to the FPGA after analog-to-digital conversion by an analog-to-digital converter.

[0075] In a specific implementation, a temperature feedback circuit is communicatively connected to a detector focal panel, and the detector focal panel includes a detector with an integrated temperature sensor. Therefore, a signal representing the temperature monitored by the temperature sensor can be transmitted to a 16-bit analog-to-digital converter in the detector focal panel through an analog front-end circuit. The output of the 16-bit analog-to-digital converter can be transmitted to a 12-bit analog-to-digital converter of a communication control board through a temperature feedback circuit. The output of the 12-bit analog-to-digital converter is transmitted to the FPGA so that the FPGA can perform cooling control based on the temperature monitored by the temperature sensor.

[0076] In this embodiment, the analog front-end circuit is connected to the detector through communication, and the analog front-end circuit is connected to the FPGA through communication via an analog-to-digital converter. The analog signal output by the detector can be transmitted to the FPGA after preliminary processing and analog-to-digital conversion based on the analog front-end circuit, so that the communication control board can digitize and further analyze the analog signal.

[0077] In some embodiments, the FPGA model is XQ4VSX55-10FF1148M.

[0078] In actual applications, FPGA models may include Xilinx's military-grade product XQ4VSX55-10FF1148M. This model of FPGA has multiple in-orbit experiences in space flight, and military-grade products have lower costs.

[0079] In this embodiment, by selecting the XQ4VSX55-10FF1148M model FPGA, the detection cost can be reduced while achieving reliable atmospheric detection for aerospace applications.

[0080] In some embodiments, the communication control board further includes a refresh chip, a FLASH memory and a PROM chip, and the refresh chip is electrically connected to the FLASH memory, the PROM chip and the FPGA respectively.

[0081] The refresh chip may refer to a chip used to refresh an FPGA.

[0082] Herein, FLASH memory may refer to a non-volatile memory.

[0083] Among them, the PROM chip may refer to a non-volatile memory different from the FLASH memory.

[0084] In actual applications, in order to enhance the adaptability of FPGA to space environment, refresh chips and FLASH memory are selected for on-orbit reconstruction. Among them, the refresh chip can regularly detect the SEFI state of FPGA and refresh FPGA, reducing the cumulative effect of single particles. It is an important solution to improve the single particle performance of SRAM-type FPGA, thereby improving the aerospace reliability of the entire electronics system.

[0085] In this embodiment, by refreshing the chip, FLASH memory and PROM chip, the refresh chip is electrically connected to the FLASH memory, PROM chip and FPGA respectively, which can enhance the space environment adaptability of FPGA and improve the aerospace reliability of the electronic system.

[0086] In some embodiments, the model of the refresh chip is JMRS01RH, the model of the FLASH memory is JFM29LV641RH, and the model of the PROM chip is XQ17V16.

[0087] In actual applications, the refresh chip can be the domestic Fudan Micro's radiation-resistant refresh chip JMRS01RH, the FLASH memory can be the Reset Micro 64M radiation-resistant FLASH memory JFM29LV641RH, and the signal of the PROM storage chip can be XQ17V16.

[0088] In this embodiment, based on the refresh chip of model JMRS01RH, the FLASH memory of model JFM29LV641RH and the PROM chip of model XQ17V16, the space environment adaptability of FPGA can be enhanced and the aerospace reliability of the electronic system can be improved.

[0089] In some embodiments, Figure 2 As shown, a schematic diagram of a hyperspectral atmospheric detection payload electronics system for commercial aerospace applications is provided. The hyperspectral atmospheric detection payload electronics system for commercial aerospace applications consists of two circuit boards, namely the power supply and refrigeration drive board and the imaging circuit board. The power supply and refrigeration drive board mainly realizes the conversion of the 42V input of the primary power supply of the satellite platform into the secondary power supply required by the payload and the power drive output for realizing the refrigeration drive. The imaging circuit board includes the detector focus panel and the communication control and image processing board, which are connected in the middle by a flexible board, and are actually a whole circuit board.

[0090] The power supply and refrigeration drive board can receive direct commands sent by the satellite platform, and perform signal transfer inside the power supply and refrigeration drive board in response to the direct commands, thereby controlling the load startup, load shutdown and load reset; the power supply and refrigeration drive board can also power the refrigeration unit set in the detector, thereby realizing refrigeration drive. Satellite commands include direct commands and indirect commands;

[0091] The communication control and image processing board is the main functional unit of the electronics system. Its main functions include: realizing the generation of 8 bias voltages of the detector; realizing the generation of 10 driving pulses of the detector; completing the secondary power supply voltage conversion of the circuit; completing the SRAM cache of the detector image data; realizing high-precision temperature control of the detector; realizing LVDS image transmission with the data transmission subsystem; and realizing CAN bus interface communication with the digital tube subsystem. In the process of completing the secondary power supply voltage conversion of the circuit, the power supply and refrigeration driver board can convert the 42V primary power input to the system from the satellite platform into 3 secondary power supplies through DCDC. The communication control and image processing board also needs to use a variety of LDO chips to convert the 3 secondary power supplies into 3 secondary power supplies. The 3rd power supply can be used to power the FPGA and the detector focus panel. In the process of high-precision temperature control of the detector, the detector has a TEC semiconductor cooling function, and the PID condition control of the TEC can be realized through the MOS circuit. For example, the temperature of the detector in normal operation will drop to -40℃, while the ambient temperature is generally only about 0℃. It is necessary to reduce the temperature of the detector and make the detector work stably under the temperature condition of -40℃. The temperature control accuracy at this time can include 0.1℃.

[0092] The detector focal plane panel may include a focal plane circuit, which may include a short-wave infrared detector, an analog front-end circuit and an analog-to-digital converter. A temperature sensor and a refrigeration unit (such as a cooler, etc.) are provided in the short-wave infrared detector. The detector image data collected by the short-wave infrared detector may be transmitted to the communication control and image processing board. The detector collects interference spectrum images, which are transmitted to the ground. After a series of data processing such as Fourier transform is performed by ground personnel, the atmospheric composition is finally obtained after a series of model processing by inversion technicians.

[0093] like Figure 3As shown, a schematic diagram of a communication control and image processing board is provided. The communication control and image processing board includes an FPGA (Field Programmable Gate Array), an LVDS interface circuit, a CAN interface circuit, a temperature feedback circuit, an analog-to-digital converter ADC, a secondary power supply circuit, and an inter-board connector. The FPGA is provided with a corresponding master control software configuration item MicreBlaze. The FPGA can control the detector according to a preset cycle by transmitting signals with the focal plane circuit, and receive the detector image data transmitted by the focal plane circuit, thereby realizing timing drive. The focal plane circuit can also transmit the temperature information detected by the temperature sensor in the detector to the FPGA through the temperature feedback circuit through analog-to-digital conversion. The FPGA can also perform SRAM cache on the detector image data collected by the short-wave infrared detector. The FPGA can transmit the detector image data to the data transmission subsystem of the satellite platform based on LVDS (Low-Voltage Differential Signaling) through the LVDS interface circuit and the interface corresponding to the LVDS interface circuit. FPGA can also communicate with the satellite platform's digital control subsystem based on the CAN bus through the CAN interface circuit and several interfaces corresponding to the CAN interface circuit. The MicroBlaze soft-core processor inside the FPGA realizes the CAN interface communication, and the FPGA hardware Verilog language is used to realize the detector timing drive and LVDS image data transmission.

[0094] like Figure 4 As shown, a circuit diagram of an FPGA is provided. The FPGA can use Xilinx's military-grade product XQ4VSX55-10FF1148M. This type of FPGA has multiple aerospace on-orbit experiences, and the cost of military-grade products is relatively low. In order to enhance the FPGA's ability to adapt to the space environment, the domestic Fudan Micro's radiation-resistant refresh chip JMRS01RH and the Reset Micro 64-megahertz radiation-resistant FLASH memory JFM29LV641RH are selected for on-orbit reconstruction. Among them, JMRS01RH can regularly detect the SEFI state of the FPGA and refresh the FPGA, reducing the cumulative effect of single particles. It is an important solution to improve the single-particle performance of SRAM-type FPGAs, thereby improving the aerospace reliability of the hyperspectral atmospheric detection payload electronics system for commercial aerospace applications.

[0095] In specific implementation, the functions that can be realized by the hyperspectral atmospheric detection payload electronics system for commercial aerospace applications include: 1) receiving satellite commands, completing the control and working mode adjustment functions required for on-orbit detection; 2) executing various remote control commands, and outputting telemetry parameters such as temperature, voltage and system status; 3) transmitting image data (such as interferometric spectral image data) to the satellite platform via LVDS serial data; 4) communicating with the satellite integrated electronic system via the CAN bus, receiving remote control commands and engineering auxiliary data, and returning telemetry parameters; 5) completing the detector photoelectric signal conversion, processing and packaging functions; 6) having the detector precision temperature control function.

[0096] Satellite commands include direct commands and indirect commands. Direct commands can be Figure 2 The X2 connector transmission shown in the figure mainly includes three instructions: load power on, load power off and load reset. These instructions are implemented in an object-oriented programming language. Indirect instructions can be implemented through Figure 2 The X4 connector and CAN bus in the satellite can be used to implement the on-orbit detection and working mode adjustment functions. Functions such as starting and stopping taking photos are all implemented through CAN bus commands according to the agreed protocol.

[0097] The electronic system of the hyperspectral atmospheric detection payload for commercial aerospace applications needs to cooperate with on-orbit detection to adjust the system gain, exposure time, and detector cooling temperature control. In actual applications, when the detected atmospheric component signal is weak or strong, the system needs to adjust the gain and integration time on-orbit to achieve target detection. For example, when the signal is weak, the integration time needs to be increased, and when the signal is strong, the integration time needs to be reduced. In addition, the detector cooling temperature is closely related to the noise of the entire system. When the noise is too large, it will drown out the effective signal and fail to detect the atmospheric components.

[0098] The hyperspectral atmospheric detection payload electronics system for commercial aerospace applications has a total of three working modes: 1. Standby mode; 2. Imaging mode; 3. Emergency mode. After the system is powered on, it first enters the standby state. The satellite will turn on the system's detector cooling function to keep the detector at a low temperature. This is the standby mode. The system can be used as an imaging camera. When the satellite enters the illuminated area, the platform can inject instructions through the CAN bus to start the camera's imaging function. This is the imaging mode. When the satellite enters the shadow area, the imaging function is stopped, and the system enters the standby mode again. When the satellite is short of energy or encounters other emergencies, the system will enter the emergency mode. At this time, the system's detector cooling function will be turned off to reduce power consumption. That is, the difference between the standby mode and the emergency mode is only whether the detector cooling function is turned off or not. In actual applications, in standby mode, the system has no image data output, that is Figure 2The X5 connector LVDS bus in the system has no valid data output. The system power consumption will be slightly lower than the imaging mode, the standby mode power consumption is 8w, and the imaging mode power consumption is 10w.

[0099] The system status can monitor whether the payload system is working normally based on information such as whether the communication count between the CAN bus and the satellite platform is +1, whether the image frame count is +1, etc.

[0100] Engineering auxiliary data can refer to data used to help ground inversion technicians process image data to obtain atmospheric composition data. Each image contains auxiliary engineering data at the corresponding time. The data includes the satellite's orbit information, attitude information, time information, satellite status, and parameter setting information of the system (such as gain, exposure time, and detector cooling temperature, etc.). Engineering auxiliary data can be used to help inversion technicians confirm the corresponding time and area when each image was taken, so as to obtain the atmospheric composition data of the corresponding area at the corresponding time, because the images taken by the satellite are not transmitted to the ground in real time. Therefore, each image must include engineering auxiliary data.

[0101] like Figure 5 As shown, a flow chart of an atmospheric detection method applied to a hyperspectral atmospheric detection payload electronic system for commercial aerospace applications is provided. The hyperspectral atmospheric detection payload electronic system for commercial aerospace applications responds to a control instruction transmitted by a satellite platform through a CAN bus. When the temperature of the detector is within a preset temperature range, the hyperspectral atmospheric detection payload electronic system for commercial aerospace applications obtains detector image data corresponding to the detector, and the hyperspectral atmospheric detection payload electronic system for commercial aerospace applications transmits the detector image data to a data transmission subsystem of the satellite platform through an LVDS interface circuit. If the temperature of the detector is not within the preset temperature range, the hyperspectral atmospheric detection payload electronic system for commercial aerospace applications adjusts the working state of the refrigeration unit and obtains the temperature of the detector through a temperature sensor until the temperature of the detector is within the preset temperature range.

[0102] In this embodiment, by selecting only one FPGA chip as the main control chip of the electronics system, the detector drive imaging, LVDS image transmission and CAN bus communication functions are realized at the same time. The power consumption of the entire electronics system is only 10w and the weight is 2 kilograms. The cost is saved by more than half compared with the traditional technical solutions, and the aerospace reliability is guaranteed. It can reduce the cost, power consumption and weight while ensuring reliability, reducing the system power consumption, system cost and system weight, and improving the system integration.

[0103] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0104] In an exemplary embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as shown in FIG. Figure 6 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and the external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be realized through WIFI, a mobile cellular network, near field communication (NFC) or other technologies. When the computer program is executed by the processor, an atmospheric detection method for an ultra-spectral atmospheric detection payload electronics system for commercial aerospace applications is realized. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0105] Those skilled in the art will understand that Figure 6The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0106] In one embodiment, a computer device is further provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiments when executing the computer program.

[0107] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.

[0108] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.

[0109] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0110] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0111] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0112] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A hyperspectral atmospheric detection payload electronics system for commercial aerospace applications, characterized in that: The system is mounted on a satellite platform and includes: a power supply and cooling drive board, and an imaging circuit board, wherein: The imaging circuit board includes a detector focus panel and a communication control board, and the detector focus panel and the communication control board are connected via a flexible board; The detector focal plane includes a detector integrated with a temperature sensor and a refrigeration unit; The communication control board is connected to the data transmission subsystem of the satellite platform through the image output interface, and the communication control board is connected to the data management subsystem of the satellite platform through the communication transmission interface; The power supply and cooling drive board are electrically connected to the communication control board, the detector focus panel and the detector through the inter-board connector in the imaging circuit board.

2. The system according to claim 1, characterized in that The communication control board also includes: FPGA, secondary power supply circuit and temperature feedback circuit, wherein: The FPGA is communicatively connected to the inter-board connector to modulate voltage; The secondary power supply circuit is respectively connected to the detector focus panel, the FPGA and the inter-board connector for power supply; The temperature feedback circuit is connected to the FPGA through an analog-to-digital converter, and the temperature feedback circuit is connected to the detector focus panel.

3. The system according to claim 2, characterized in that The communication control board also includes an LVDS interface circuit, which is communicatively connected to the FPGA, and the LVDS interface circuit is communicatively connected to the data transmission subsystem of the satellite platform via an image output interface.

4. The system according to claim 2, characterized in that The communication control board also includes a CAN interface circuit, which is communicatively connected to the FPGA and is communicatively connected to the digital control subsystem of the satellite platform via a communication transmission interface.

5. The system according to claim 2, characterized in that The detector focal plane includes an analog front-end circuit, which is communicatively connected to the detector, and the analog front-end circuit is communicatively connected to the FPGA via an analog-to-digital converter.

6. The system according to claim 2, characterized in that The model of the FPGA is XQ4VSX55-10FF1148M.

7. The system according to claim 2, characterized in that The communication control board also includes a refresh chip, a FLASH memory and a PROM chip, and the refresh chip is electrically connected to the FLASH memory, the PROM chip and the FPGA respectively.

8. The system according to claim 7, characterized in that The model of the refresh chip is JMRS01RH.

9. The system according to claim 7, characterized in that The model of the FLASH memory is JFM29LV641RH.

10. The system according to claim 7, characterized in that The model of the PROM chip is XQ17V16.

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