Crack detection method for wafer-level chip packaging body

Abstract

The invention relates to the technical field of semiconductor manufacturing, and discloses a crack detection method for a wafer-level chip packaging body, and the detection method comprises the steps: providing a to-be-detected chip packaging body; providing an acidic solution; directly putting the chip packaging body to be detected into an acid solution, and soaking at normal temperature; taking out the to-be-detected chip packaging body, and cleaning with pure water; wiping the surface of the to-be-detected chip packaging body, and observing the to-be-detected chip packaging body under a microscope; if in the to-be-detected chip packaging body, the metal wires in the first area are in a first color, and the metal wires in the other areas are in a second color, the detection result is that the transparent protection layer in the first area comprises cracks; and if the metal wires in all the areas in the to-be-detected chip packaging body are in the second color, the detection result is that the transparent protection layer does not comprise cracks. According to the invention, the labor and detection cost can be reduced, the detection efficiency is improved, and the production aging of batch detection is ensured.

Description

Technical Field

[0001] The present disclosure relates to the field of semiconductor manufacturing technology, and in particular to a crack detection method for a wafer-level chip package. Background Art

[0002] As the size of chip packages gets smaller and smaller, WLCSP (Wafer Level Chip Scale Packaging) is widely used. Different from traditional chip packaging, this packaging form lacks the traditional sealed plastic or ceramic package for protection. Instead, it uses a substance called polyimide to cover the surface of the circuit as a protective layer to protect the circuit. In the wafer-level chip packaging method, polyimide is designed to cover the surface of the chip. Its main function is to prevent the metal circuit from directly contacting with corrosive substances such as oxygen and moisture in the air, protecting the metal circuit from corrosion and becoming fragile, avoiding loss of connection function, and ultimately causing chip failure. Therefore, the airtightness and integrity of the polyimide protective layer are particularly important for the strength of the chip itself.

[0003] However, generally, protective layers such as polyimide are exposed to the outside world, and are vulnerable to external physical attacks and thermal stress attacks during the subsequent process or use, which can easily cause damage or cracks to the protective layer. In addition, since the polyimide protective layer is relatively thin and transparent, if there are slight defects or cracks in the protective layer, it is difficult to find them with the naked eye or optical microscope. It is necessary to use FIB (Focused Ion Beam, a micro-cutting instrument that uses an electric lens to focus the ion beam into a very small size) or SEM (Scanning Electron Microscope, a large precision instrument for high-resolution micro-area morphology analysis) to take pictures and observe. These two types of equipment take a long time to take pictures and are expensive. They are not the best choice for the timeliness of batch testing, rapid identification of results, and economic cost. Summary of the invention

[0004] In order to solve the above technical problems, the present disclosure provides a crack detection method for a wafer-level chip package to solve the problem that the crack detection means for wafer packages in the prior art are high in cost and low in detection efficiency, which affects production timeliness.

[0005] The present disclosure provides a crack detection method for a wafer-level chip package, the detection method comprising:

[0006] Providing a chip package to be tested, the chip package to be tested comprising a chip packaging structure, a metal wiring and a transparent protective layer, the metal wiring is located on one side of the chip packaging structure, and the transparent protective layer covers the metal wiring;

[0007] providing an acidic solution;

[0008] Place the chip package to be tested directly into the acid solution and soak it at room temperature for 8-10 minutes;

[0009] Take out the chip package to be tested, clean it with pure water, and soak it for 3-5 minutes;

[0010] After wiping the surface of the chip package to be tested clean, place it under a microscope for observation;

[0011] If, in the chip package to be inspected, the metal traces in the first area are of the first color and the metal traces in the remaining areas are of the second color, then the inspection result is that the transparent protective layer in the first area includes cracks;

[0012] If the metal traces in all areas of the chip package to be inspected are the second color, the inspection result is that the transparent protective layer does not include cracks.

[0013] Optionally, the transparent protective layer includes a polyimide layer, and the polyimide layer covers all metal traces in the chip package to be tested.

[0014] Further optionally, the chip packaging structure includes a substrate, a metal pad and a passivation layer located on one side of the substrate, and the passivation layer is located on a side of the metal pad away from the substrate;

[0015] The first opening of the passivation layer exposes a portion of the metal pad, and the metal wiring is connected to the metal pad in the first opening.

[0016] Optionally, the acidic solution includes any one of concentrated hydrochloric acid or dilute sulfuric acid.

[0017] Optionally, placing the chip package to be tested directly into an acidic solution includes: placing the chip package to be tested directly into a 30-50 ml hydrochloric acid solution;

[0018] The concentration of the hydrochloric acid solution is 36%-38%.

[0019] Optionally, the chip package to be inspected is manually picked up using tweezers and placed in an acidic solution.

[0020] Optionally, after wiping clean the surface of the chip package to be inspected, the package is placed under a microscope for observation, including: wiping clean the surface of the chip package to be inspected with a dust-free cloth.

[0021] Optionally, the second color is the color of the metal trace.

[0022] Optionally, the microscope is an ordinary optical microscope.

[0023] Optionally, if the metal wiring in the first area of ​​the chip package to be inspected is of the first color, the acidic solution enters the metal wiring through the cracks in the transparent protective layer, and the metal wiring in the first area is corroded by the acidic solution to produce metal missing.

[0024] Compared with the prior art, the technical solution provided by the embodiments of the present disclosure has the following advantages:

[0025] The crack detection method for the wafer-level chip package provided by the present disclosure is suitable for detecting the packaging performance of the wafer-level chip package, such as detecting whether there are cracks or fine cracks on the surface protective layer of the wafer-level chip package. The chip package to be detected is soaked in an acidic solution such as concentrated hydrochloric acid. If there are cracks or damage on the transparent protective layer on the outer surface of the chip package to be detected, the acidic solution enters the crack of the transparent protective layer and directly contacts the metal traces below it. The metal traces react with the acidic solution and change color, and then it can be directly judged whether the transparent protective layer is damaged. The crack detection method disclosed in the present disclosure is implemented in a room temperature environment. The operator does not need professional training. Through low-cost detection means, it no longer needs expensive advanced detection equipment such as FIB and SEM. Through visual observation with an ordinary optical microscope, it can quickly identify whether the wafer-level chip package is damaged, which is conducive to reducing labor and detection costs, improving detection efficiency, and ensuring the production timeliness of batch detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0028] Figure 1 is a flowchart of a detection method provided by an embodiment of the present disclosure;

[0029] Figure 2 yes Figure 1 A schematic diagram of the structure of the chip package to be tested;

[0030] Figure 3 yes Figure 1 Schematic diagram of the structure of the acid solution invading through cracks when cracks exist in the transparent protective layer;

[0031] Figure 4 yes Figure 3 Schematic diagram of the structure of a neutral acid solution invading and corroding a metal trace through a crack;

[0032] Figure 5 yes Figure 1 Schematic diagram of the structure in which the acidic solution does not penetrate through the cracks when there are no cracks in the transparent protective layer;

[0033] Figure 6 It is a schematic diagram of cracks in the transparent protective layer of the chip package to be inspected observed under a microscope when the inspection method is implemented in an embodiment of the present disclosure;

[0034] Figure 7 It is a schematic diagram showing that there are no cracks in the transparent protective layer of the chip package to be inspected observed under a microscope when the inspection method is implemented in the embodiment of the present disclosure;

[0035] Figure 8 It is another flowchart of the detection method provided in the embodiment of the present disclosure. DETAILED DESCRIPTION

[0036] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0037] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0038] Please refer to Figure 1 and Figure 2 , Figure 1 is a flowchart of a detection method provided by an embodiment of the present disclosure, Figure 2 yes Figure 1 The present embodiment provides a method for detecting cracks in a wafer-level chip package, the method comprising:

[0039] S11: providing a chip package 10 to be tested, wherein the chip package 10 to be tested comprises a chip packaging structure 101, a metal wiring 102 and a transparent protective layer 103, wherein the metal wiring 102 is located on one side of the chip packaging structure 101, and the transparent protective layer 103 covers the metal wiring 102;

[0040] S12: providing an acidic solution;

[0041] S13: directly placing the chip package 10 to be tested into the acidic solution and soaking it at room temperature for 8-10 minutes;

[0042] S14: Take out the chip package 10 to be tested, wash it with pure water, and soak it for 3-5 minutes;

[0043] S15: After wiping the surface of the chip package 10 to be inspected clean, place it under a microscope for observation;

[0044] S151: If, in the chip package 10 to be inspected, the metal traces in the first area are of the first color and the metal traces in the remaining areas are of the second color, then the inspection result is that the transparent protective layer in the first area includes cracks;

[0045] S152: If the metal traces in all regions of the chip package 10 to be inspected are of the second color, the inspection result is that the transparent protective layer does not include cracks.

[0046] Specifically, the detection method provided in this embodiment is suitable for detecting the packaging performance of a wafer-level chip package, such as detecting whether there are cracks or microcracks on the surface protection layer of the wafer-level chip package. Figure 2 As shown, the chip package 10 to be detected required in this embodiment can be a wafer-level chip package, and the chip package 10 to be detected includes a chip packaging structure 101, a metal trace 102 and a transparent protective layer 103, the metal trace 102 is located on one side of the chip packaging structure 101, and the transparent protective layer 103 covers the metal trace 102; optionally, the chip packaging structure 101 includes a substrate 1011 and a metal pad 1012 and a passivation layer 1013 located on one side of the substrate 1011, the passivation layer 1013 is located on the side of the metal pad 1012 away from the substrate 1011, and the passivation layer 1013 can be provided with a plurality of first openings 1013K for exposing part of the metal pad 1012, and part of the metal pad 1012 is exposed through the first opening 1013K, so that the metal trace 102 is connected to the metal pad 1012 in the first opening 1013K, thereby achieving an electrical connection effect between the metal trace 102 and the chip packaging structure 101. The transparent protective layer 103 is located on the side of the metal trace 102 away from the chip packaging structure 101, and the transparent protective layer 103 covers the metal trace 102. Optionally, the transparent protective layer 103 includes a polyimide layer, and the transparent polyimide layer covers all the metal traces 102 in the chip package 10 to be tested, thereby blocking the direct contact between the metal trace 102 and corrosive substances such as oxygen and moisture in the air, protecting the metal trace 102 from corrosion, and preventing the metal trace 102 from becoming fragile and losing electrical connection function, thereby protecting the entire wafer-level chip package and effectively avoiding chip function failure.

[0047] Generally, in order to reduce the overall volume of the wafer-level chip package as much as possible, the transparent protective layer 103 covering all the metal traces 102 is relatively thin and made of transparent material. Once the transparent protective layer 103 has slight defects or cracks, it is difficult to detect them with the naked eye or ordinary optical microscope. The existing technology generally detects the damage or cracks of the transparent protective layer 103 by high-cost FIB or SEM high-magnification electron microscope photography, resulting in high detection costs and low detection efficiency, and the problem of being unable to ensure the timeliness of batch detection.

[0048] In order to solve the above problems, the present embodiment provides a crack detection method for a wafer-level chip package, which not only has no impact on the production cost of the current process, that is, it can reduce the reliability detection cost of the wafer-level chip package, but also can quickly detect damage or cracks. The detection process is simple and fast, and does not require high-cost high-magnification electron microscope photography investment, and the operating and testing personnel do not need professional training.

[0049] Specifically, the detection method provided in this embodiment includes first providing a chip package 10 to be detected, wherein the structure of the chip package 10 to be detected can be as described above. Figure 2 As shown. Then, an acidic solution is provided. The acidic solution may include any one of concentrated hydrochloric acid or dilute sulfuric acid. This embodiment takes the acidic solution as a concentrated hydrochloric acid solution as an example for illustration. In specific implementation, other acidic solutions that are harmless to the human body may also be used, as long as the metal can be corroded by the acidic solution. Then, the chip package 10 to be tested is directly placed in the acidic solution. Optionally, 30-50 ml of a hydrochloric acid solution with a concentration of 36%-38% may be prepared. The concentration of commercially available concentrated hydrochloric acid is 36%-38%, and the concentrated hydrochloric acid used in experiments is generally 36%-38%. Therefore, any third-party laboratory or packaging factory can implement the test. The chip package 10 to be tested is directly placed in a 30-50ml hydrochloric acid solution with a concentration of 36%-38%, and soaked at room temperature for 8-10 minutes. Preferably, the chip package to be tested is directly placed in a 50ml concentrated hydrochloric acid solution with a concentration of 36%-37%, and soaked at room temperature for 10 minutes, so that if there are cracks or damages in the transparent protective layer 103, the concentrated hydrochloric acid will enter from the cracks and react fully with the metal wiring 102. At the location where the cracks exist, the metal wiring 102 is likely to be corroded to produce cavities. Then take out the chip package 10 to be tested, use pure water (water without impurities, or water that professionally wipes the chip structure) to clean it, and soak it for 3-5 minutes to ensure that the surface of the chip package 10 to be tested is clean, which is convenient for subsequent microscopic observation. After wiping the surface of the chip package 10 to be tested clean, place it under a microscope for observation. Optionally, the microscope used at this time can be an ordinary optical microscope, without the need for a high-cost, high-magnification electron microscope.

[0050] In this embodiment, the chip package 10 to be inspected is observed under a common optical microscope. If the metal traces 102 in the first area of ​​the chip package 10 to be inspected are observed to be the first color and the metal traces 102 in the remaining areas are the second color, it is proved that there are cracks or damages in the transparent protective layer 103 in the first area, and the concentrated hydrochloric acid solution has contacted the metal traces 102 through the cracks or damages to cause a corrosive chemical reaction (such as Figure 3 and Figure 4 As shown, Figure 3 yes Figure 1 Schematic diagram of the structure of the acid solution invading through cracks when there are cracks in the transparent protective layer. Figure 4 yes Figure 3 Schematic diagram of the structure of the neutral acid solution invading and corroding the metal wiring through the crack), the detection result is that the transparent protective layer 103 in the first area includes cracks. If the metal wiring 102 in all areas of the chip package 10 to be detected is observed to be the second color, it proves that there are no cracks or damages in the transparent protective layer 103, and the concentrated hydrochloric acid solution has not intruded into the metal wiring 102 (such as Figure 5 As shown, Figure 5 yes Figure 1 The test result shows that the transparent protective layer 103 does not include cracks, and the packaging reliability of the wafer-level chip package is intact.

[0051] Optional, such as Figure 1-Figure 5 and Figure 6 , Figure 7 As shown, Figure 6 is a schematic diagram showing cracks in the transparent protective layer of the chip package to be inspected observed under a microscope when the inspection method is implemented in an embodiment of the present disclosure. Figure 7 is a schematic diagram showing that there are no cracks in the transparent protective layer of the chip package to be inspected observed under a microscope when the inspection method is implemented in an embodiment of the present disclosure, such as Figure 6 As shown, the chip package 10 to be tested is directly placed in 30-50 ml of a concentrated hydrochloric acid solution with a concentration of 36%-38%, and is immersed at room temperature for 10 minutes. When the transparent protective layer 103 is not damaged, the metal traces 102 of the chip package 10 to be tested are completely wrapped by the transparent protective layer 103, and the metal traces 102 are isolated from the outside world, so the acidic solution such as the concentrated hydrochloric acid solution is blocked from the outside world, and the acidic solution does not react with the metal traces 102 (such as Figure 5 , Figure 7As shown), the metal traces 102 of all regions J0 are the second color, such as the metal traces 102 of all regions are the color of the metal traces 102, that is, golden yellow. The chip package 10 to be tested is directly placed in 30-50 ml of a 36%-38% concentrated hydrochloric acid solution and soaked at room temperature for 10 minutes. If the transparent protective layer is damaged or cracked, and the crack 20 has extended to the metal trace 102 to form a path (such as Figure 3 As shown in FIG. 2 ), the acidic solution 30 such as concentrated hydrochloric acid solution will penetrate into the crack 20 and react with the metal wiring 102 to produce a corrosive chemical reaction. As a result, the metal wiring 102 at the crack will be corroded after the metal wiring 102 reacts with the acidic solution 30 (as shown in FIG. 2 ). Figure 4 As shown in FIG. 1 , metal missing and metal void 102K are generated. The metal trace 102 below the crack of the transparent protective layer 103 lacks metal, causing the color of this area to be significantly different from that of the normal area. Figure 6 As shown, the metal traces 102 in the first area J1 are the first color, which becomes the first color of dark green, and the metal traces 102 in the remaining areas J2 are still the second color, such as the metal traces 102 in the remaining areas are still the color of the metal traces 102, that is, golden yellow. Thus, by observing the appearance of the chip package 10 to be inspected through an ordinary optical microscope, it is possible to quickly identify whether the transparent protective layer 103 has been damaged or cracked.

[0052] The crack detection method for the wafer-level chip package provided in this embodiment is that the chip package 10 to be detected is soaked in an acidic solution such as concentrated hydrochloric acid. If the transparent protective layer 103 on the outer surface of the chip package 10 to be detected has cracks or is damaged, the acidic solution enters the crack of the transparent protective layer 103 and directly contacts the metal trace 102 below it. The metal trace 102 reacts with the acidic solution and changes color, and then it can be directly determined whether the transparent protective layer 103 is damaged. The crack detection method of this embodiment is implemented in a room temperature environment, and the operator does not need professional training. Through low-cost detection means, it is no longer necessary to support expensive advanced detection equipment such as FIB and SEM. Through visual observation with an ordinary optical microscope, it can quickly identify whether the wafer-level chip package is damaged, which is conducive to reducing labor and detection costs, improving detection efficiency, and ensuring the production timeliness of batch detection.

[0053] Optionally, the metal trace 102 of the chip package 10 to be detected in this embodiment includes but is not limited to metals such as copper and aluminum, and can also be one or more of other metals such as cobalt, silver, gold, nickel, tungsten, etc. This embodiment does not limit the material of the metal trace 102, and it is only required that the material of the metal trace 102 is metal, can produce a corrosive chemical reaction with an acidic solution, and change color after contact with the acidic solution.

[0054] Optional, such as Figure 2 As shown, the chip package 10 to be tested provided in this embodiment is a chip package structure that has completed wafer-level chip packaging, and a transparent protective layer 103 is provided with a solder ball 105 on the side away from the chip packaging structure 101 through a UBM (under bump metallization) base 104. When crack detection is implemented, the entire packaged chip package 10 to be tested can be placed in an acidic solution. Since the chip package 10 to be tested is placed in 30-50 ml of a hydrochloric acid solution with a concentration of 36%-38% and soaked at room temperature for 8-10 minutes, the soaking time is short, so the impact on the solder ball 105 is small. If the test result shows that the transparent protective layer 103 is not damaged or cracked, the chip package 10 to be tested can continue to be used.

[0055] In some optional embodiments, please refer to Figure 2-Figure 7 , Figure 8 , Figure 8 is another flow chart of the detection method provided by the embodiment of the present disclosure. The present embodiment provides a crack detection method for a wafer-level chip package, the detection method comprising:

[0056] S21: Provide a chip package 10 to be tested, wherein the chip package 10 to be tested includes a chip packaging structure 101, a metal trace 102 and a transparent protective layer 103, the metal trace 102 is located on one side of the chip packaging structure 101, and the transparent protective layer 103 covers the metal trace 102; the chip packaging structure 101 includes a substrate 1011 and a metal pad 1012 and a passivation layer 1013 located on one side of the substrate 1011, the passivation layer 1013 is located on a side of the metal pad 1012 away from the substrate 1011, and the passivation layer 1013 can be provided with a plurality of first openings 1013K for exposing a portion of the metal pad 1012, and a portion of the metal pad 1012 is exposed through the first openings 1013K, so that the metal trace 102 is connected to the metal pad 1012 in the first openings 1013K, thereby achieving an electrical connection effect between the metal trace 102 and the chip packaging structure 101. The transparent protective layer 103 is located on the side of the metal trace 102 away from the chip packaging structure 101, and the transparent protective layer 103 covers the metal trace 102. Optionally, the transparent protective layer 103 includes a polyimide layer, and the transparent polyimide layer covers all the metal traces 102 in the chip package 10 to be tested, so as to prevent the metal trace 102 from direct contact with corrosive substances such as oxygen and moisture in the air, protect the metal trace 102 from corrosion, and prevent the metal trace 102 from becoming fragile and losing the electrical connection function, thereby protecting the entire wafer-level chip package and effectively preventing chip function failure.

[0057] S22: providing 50 ml of a concentrated hydrochloric acid solution having a concentration of 36% to 37%;

[0058] S23: The chip package 10 to be tested is manually picked up using tweezers, and directly placed in the above-mentioned concentrated hydrochloric acid solution, and soaked at room temperature for 10 minutes;

[0059] S24: Take out the chip package 10 to be tested, wash it with pure water, and soak it for 5 minutes;

[0060] S25: Wipe the surface of the chip package 10 to be tested clean with a dust-free cloth and observe it under a common optical microscope;

[0061] S251: If, in the chip package 10 to be inspected, the metal traces in the first area are the first color, i.e., dark green, and the metal traces in the remaining areas are the second color, i.e., golden yellow, the concentrated hydrochloric acid solution has entered the metal traces 102 through the cracks in the transparent protective layer 103, and the metal traces 102 in the first area are corroded by the concentrated hydrochloric acid solution to produce metal missing, showing a dark green color. The inspection result is that the transparent protective layer 103 in the first area includes cracks;

[0062] S252: If the metal traces 102 in all regions of the chip package 10 to be inspected are the second color, ie, the original golden color of the metal traces 102, the inspection result is that the transparent protection layer 103 does not include cracks.

[0063] In the detection method provided in this embodiment, the chip package 10 to be detected is manually picked up using tweezers, directly placed in the above-mentioned concentrated hydrochloric acid solution, and soaked at room temperature for 10 minutes. It is implemented in a room temperature environment, and the operator does not need professional training, which can save labor costs. Use a dust-free cloth to wipe the surface of the chip package 10 to be detected. The dust-free cloth is made of 100% polyester fiber double weave, with a soft surface, easy to wipe sensitive surfaces, and does not lose fibers by friction. It has good water absorption and cleaning efficiency, and can effectively wipe the pure water on the surface of the chip package 10 to be detected, ensuring the accuracy of subsequent optical microscope observation. The crack detection method for the wafer-level chip package provided in this embodiment, through low-cost detection means, no longer requires expensive advanced detection equipment such as FIB and SEM. Through visual observation with an ordinary optical microscope, it can quickly identify whether the wafer-level chip package is damaged, which is conducive to reducing labor and detection costs, improving detection efficiency, and ensuring the production timeliness of batch detection.

[0064] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0065] The above description is only a specific embodiment of the present disclosure, so that those skilled in the art can understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to the embodiments described herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A crack detection method for a wafer-level chip package, characterized in that: Providing a chip package to be tested, the chip package to be tested comprising a chip packaging structure, a metal wiring and a transparent protective layer, the metal wiring is located on one side of the chip packaging structure, and the transparent protective layer covers the metal wiring; providing an acidic solution; Place the chip package to be tested directly into the acidic solution and soak it at room temperature for 8-10 minutes; Take out the chip package to be tested, wash it with pure water, and soak it for 3-5 minutes; After wiping the surface of the chip package to be tested clean, place it under a microscope for observation; If, in the chip package to be inspected, the metal traces in the first area are of the first color, and the metal traces in the remaining areas are of the second color, then the inspection result is that the transparent protective layer in the first area includes cracks; If the metal traces in all regions of the chip package to be inspected are of the second color, the inspection result is that the transparent protective layer does not include cracks.

2. The crack detection method of the wafer-level chip package according to claim 1, characterized in that: The transparent protection layer includes a polyimide layer, and the polyimide layer covers all the metal traces in the chip package to be tested.

3. The crack detection method of the wafer-level chip package according to claim 2, characterized in that: The chip packaging structure comprises a substrate, a metal pad and a passivation layer located on one side of the substrate, wherein the passivation layer is located on a side of the metal pad away from the substrate; The first opening of the passivation layer exposes a portion of the metal pad, and the metal trace is connected to the metal pad in the first opening.

4. The crack detection method of wafer-level chip package according to claim 1, characterized in that: The acidic solution includes any one of concentrated hydrochloric acid or dilute sulfuric acid.

5. The crack detection method of wafer-level chip package according to claim 1, characterized in that: Placing the chip package to be tested directly into the acidic solution, comprising: placing the chip package to be tested directly into 30-50 ml of hydrochloric acid solution; The concentration of the hydrochloric acid solution is 36%-38%.

6. The crack detection method of wafer-level chip package according to claim 1, characterized in that: The chip package to be tested is manually picked up with tweezers and placed in the acidic solution.

7. The crack detection method of wafer-level chip package according to claim 1, characterized in that: After wiping the surface of the chip package to be tested clean, place it under a microscope for observation, including: Use a dust-free cloth to clean the surface of the chip package to be tested.

8. The crack detection method of wafer-level chip package according to claim 1, characterized in that: The second color is the color of the metal trace.

9. The crack detection method of wafer-level chip package according to claim 1, characterized in that: The microscope is a common optical microscope.

10. The crack detection method of wafer-level chip package according to claim 1, characterized in that: If the metal wiring in the first area of ​​the chip package to be inspected is of the first color, the acidic solution enters the metal wiring through the cracks in the transparent protective layer, and the metal wiring in the first area is corroded by the acidic solution to produce metal missing.

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