Control circuit and method and electronic equipment

Abstract

The invention discloses a control circuit and method of a mobile industry processor interface and electronic equipment, and belongs to the technical field of radio frequency front ends. The control circuit comprises a plurality of register groups which are in one-to-one correspondence with a plurality of slave devices of the MIPI, and the output end of each register group is connected with the corresponding slave device; one end of the extension unit is connected with main equipment of the MIPI, the other end of the extension unit is connected with the input end of each register block in the multiple register blocks, and the extension unit is used for receiving a write instruction sent by the main equipment, storing a target instruction contained in the write instruction into a target register block, receiving a read instruction sent by the main equipment, reading the target instruction from the target register block and sending the read instruction to the MIPI; the target instruction is sent to the target slave device through the output end of the target register set; wherein the target instruction is an instruction sent to the target slave device by the master device, and the target register block is a register block connected with the target slave device.

Description

Technical Field

[0001] The present application belongs to the field of radio frequency front-end technology, and specifically relates to a control circuit, method and electronic device for a mobile industry processor interface. Background Art

[0002] At present, RFFE (Radio Frequency Front-End) MIPI (Mobile Industry Processor Interface) is widely used in communication terminals due to its high performance, low power consumption, and low cost. As the size of terminal equipment becomes larger and larger, especially with the emergence of foldable terminals, RF devices may be distributed in various corners, and the corresponding RFFE MIPI control signal lines will also be lengthened. Due to the parasitic effects of the routing, the signal will not meet the quality requirements at the far end, so there will be problems with the inability to control the device. Summary of the invention

[0003] The purpose of the embodiments of the present application is to provide a control circuit, method and electronic device for a mobile industry processor interface, which can solve the problems in the related art.

[0004] In a first aspect, an embodiment of the present application provides a control circuit of a mobile industry processor interface, including: Multiple register groups correspond one-to-one to multiple slave devices of the mobile industry processor interface MIPI, and the output end of each register group is connected to the corresponding slave device; An extension unit, one end of which is connected to the MIPI master device, and the other end of which is respectively connected to the input end of each register group of the multiple register groups, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction into the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group; The target instruction is an instruction sent by the master device to the target slave device, and the target register group is a register group connected to the target slave device.

[0005] In a second aspect, an embodiment of the present application provides an electronic device, comprising the control circuit as described in the first aspect above.

[0006] In a third aspect, an embodiment of the present application provides a method for controlling a mobile industry processor interface, including: Receiving an instruction for a target slave device sent by a MIPI master device, wherein the target slave device is one of a plurality of slave devices of MIPI, and the plurality of slave devices are numbered based on a line with the master device; Comparing the serial number of the target slave device with a preset serial number; In the case where the number of the target slave device is greater than the preset number, sending the instruction to the intermediate slave device, and reading the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device; The intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices.

[0007] In a fourth aspect, an embodiment of the present application provides an electronic device, comprising a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the computer program, when executed by the processor, implements the steps of the method described in the third aspect above.

[0008] In a fifth aspect, an embodiment of the present application provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the method described in the third aspect are implemented.

[0009] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium and is executed by at least one processor to implement the method described in the third aspect.

[0010] In an embodiment of the present application, multiple register groups correspond one-to-one to multiple slave devices of MIPI, and the output end of each register group is connected to the corresponding slave device. One end of the extension unit is connected to the MIPI master device, and the other end is respectively connected to the input end of each register group in the multiple register groups, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction in the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group. Since the target instruction is pre-stored in the target register group, the target instruction received by the target slave device is issued by the target register group. This method greatly shortens the response time of the slave device, improves the quality of the signal received by the slave device, and especially enhances the communication effect with the remote slave device. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 This is a schematic diagram of a MIPI control circuit structure provided in an embodiment of the present application; Figure 2 This is another schematic diagram of the structure of a MIPI control circuit provided in an embodiment of the present application; Figure 3 This is a flow chart of a MIPI control method provided by an embodiment of the present application; Figure 4It is a structural schematic diagram of a MIPI control device provided in an embodiment of the present application; Figure 5 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application; Figure 6 It is a schematic diagram of the structure of another electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0012] The following will be combined with the drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0013] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0014] The electronic device and display control method provided by the embodiments of the present application are described in detail below through specific embodiments and their application scenarios in conjunction with the accompanying drawings.

[0015] Figure 1 A control circuit of a mobile industry processor interface provided by an embodiment of the present application is shown. Figure 1 As shown, the control circuit 10 includes: a plurality of register groups 11 and an extension unit 12 .

[0016] The multiple register groups 11 correspond one-to-one to the multiple slave devices of the mobile industry processor interface MIPI, and the output end of each register group is connected to the corresponding slave device.

[0017] The extension unit 12 has one end connected to the MIPI master device and the other end connected to the input end of each register group 11 in the multiple register groups 11, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction into the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group.

[0018] The target instruction is an instruction sent by the master device to the target slave device, and the target register group 11 is a register group 11 connected to the target slave device.

[0019] The embodiments of the present application relate to a MIPI master device and a slave device. The master device refers to a master device, and the slave device refers to a slave device. The master device has the function of sending and receiving signals, and can control the slave device to complete read and write operations through instructions. After receiving the instruction of the master device, the slave device can respond to the instruction to complete the operation of reading and writing registers.

[0020] In the embodiments of the present application, the slave device may be of various types, including but not limited to: LNA (Low Noise Amplifier), PA (Power Amplifier), antenna switch, antenna tuner, DC / DC converter, filter or sensor, etc.

[0021] In the embodiment of the present application, a register group may be composed of one or more registers, usually including multiple registers. One or more instructions may be stored in the register group. The multiple instructions may be multiple instructions of a slave device, or may be multiple instructions corresponding to multiple slave devices, without specific limitation.

[0022] For example, three instructions from slave device 1 are stored in register group 1. For another example, one instruction from slave device 4 is stored in register group 4, and one instruction from slave device 5 is stored in register group 5.

[0023] In the embodiment of the present application, the instructions sent by the master device include two types: read instructions and write instructions. The instructions sent by the master device generally include an instruction frame and an information frame. Among them, the type of instruction can be specified in the instruction form field of the instruction frame. The instructions sent by the master device can be as shown in Table 1.

[0024] Table 1

[0025] The slave device identifier included in the instruction frame is used to specify the slave device that responds to the instruction. The register address is the storage location of the data to be read, or the location where the data is to be stored. The register operation data represents the data to be written into the register, or the data to be read from the register.

[0026] For example, the master device sends an instruction, in which the instruction format in the instruction frame is write, USID=5, the register address is add, and the register operation data in the information frame is xxx. Then the instruction requires the slave device 5 to write the data xxx into the register with the address add.

[0027] In the embodiment of the present application, when the master device sends a read instruction, the instruction only includes an instruction frame, wherein the instruction form is read, the slave device identifier is the identifier of the target slave device that needs to execute the read instruction, and the register address is the register address where the data to be read is located. After the read instruction is issued, the target slave device receives the read instruction and responds to the instruction, reads data from the corresponding register and sends it to the master device, that is, sends an information frame to the master device, thereby completing the read operation.

[0028] In the embodiment of the present application, the extension unit 12 can be specifically used for: Receive the write instruction sent by the master device, obtain the address of the target register group from the instruction frame of the write instruction, and obtain the target instruction from the information frame of the write instruction; store the target instruction in the target register group according to the address of the target register group. The target instruction includes the identifier of the target slave device, and the target slave device is the slave device connected to the target register group.

[0029] The following is an example with reference to Table 2 and Table 3. Table 2 is a command 1 sent by the master device. The command format in the command frame is write, the device identifier is the identifier a of the extension unit 12, the register group address is the address of the register group 2, and the content of the information frame is the target command 1.

[0030] Table 2

[0031] The master device sends the above instruction 1 to specifically request the extension unit 12 to perform a write operation. After receiving the instruction 1, the extension unit 12 obtains the address of the register group 2 from the instruction frame, obtains the target instruction 1 from the information frame, and writes the target instruction 1 to the register group 2 according to the address. The target instruction 1 is shown in Table 3.

[0032] Table 3

[0033] The target instruction 1 is an instruction requiring a response from the slave device 2. The instruction frame includes: the instruction form is write, the slave device identifier is USID=2, and the register address. The information frame includes register operation data. The instruction requires the slave device 2 to write the register operation data to the corresponding register according to the register address.

[0034] In an embodiment of the present application, if the master device needs to save multiple instructions in a register group, multiple write instructions can be sent. Each time the extension unit 12 receives a write instruction, it stores the corresponding target instruction in the corresponding register group, thereby enabling the register group to store multiple target instructions.

[0035] For example, after completing writing the target instruction 1 into the register group 2 according to Table 2 and Table 3, the master device may send another write instruction to complete writing the target instruction 2 into the register group 3.

[0036] The following is a detailed description in conjunction with Table 4 and Table 5. Table 4 is instruction 2 sent by the master device. The instruction format in the instruction frame is write, the device identifier is identifier a of the extension unit 12, the register group address is the address of register group 3, and the content of the information frame is target instruction 2.

[0037] Table 4

[0038] The master device sends the above instruction 2, specifically requiring the extension unit 12 to perform a write operation. After receiving the instruction 2, the extension unit 12 obtains the address of the register group 3 from the instruction frame, obtains the target instruction 2 from the information frame, and writes the target instruction 2 to the register group 3 according to the address. The target instruction 2 is shown in Table 5.

[0039] Table 5

[0040] The target instruction 2 is an instruction requiring a response from the slave device 3. The instruction frame includes: the instruction form is write, the slave device identifier is USID=3, and the register address. The information frame includes register operation data. The instruction requires the slave device 3 to write the register operation data to the corresponding register according to the register address.

[0041] In combination with Tables 2 to 5 above, the master device can store target instruction 1 in register group 2 and target instruction 2 in register group 3 by sending instruction 1 and instruction 2, thereby completing the pre-storage of multiple instructions.

[0042] In the embodiment of the present application, the extension unit 12 can be specifically used for: Receive a read instruction sent by the master device, obtain the identifier of the target register group from the instruction frame of the read instruction, and read the target instruction from the target register group according to the identifier, so that the target register group sends the target instruction to the connected target slave device through the output end.

[0043] In an embodiment of the present application, the response of the slave device to the instruction of the master device is usually completed within a response time window. Among them, the response time window includes two types: a long response time window and a short response time window. The long response time window refers to a response window whose response time is longer than a preset threshold, and the short response time window refers to a response window whose response time is less than or equal to the preset threshold. That is, the length of the long response time window is greater than the length of the short response time window. In the long response time window, the slave device can have more time to respond to the instruction, and in the short response time window, the slave device is required to have a higher response speed. Specifically, the length of the time window corresponding to these two types is specified by the protocol, or the preset threshold is specified by the protocol, and no further explanation is given here.

[0044] In the embodiment of the present application, the master device sends a write instruction whose device identifier is the identifier of the extension unit, and a read instruction whose device identifier is the identifier of the extension unit, both of which are sent in the scenario of a short response time window. In this way, the master device can pre-store the target instruction in the register group, and when the target slave device needs to respond to the target instruction, the register group sends the pre-stored target instruction. Since the register group is directly connected to the slave device, it is closer to the slave device than the master device. Therefore, the target slave device can receive the target instruction faster, which greatly shortens the response time of the target slave device and improves the communication quality and effect in the short response time window scenario.

[0045] In one implementation, in a short response time window scenario, the master device sends a write instruction at a first moment and sends a read instruction at a second moment, wherein the second moment is the moment when the target slave device needs to respond to the target instruction, and the first moment is earlier than the second moment.

[0046] The short response time window is a response window whose response time is less than or equal to a preset threshold. The specific value of the time interval between the first moment and the second moment is not limited. For example, the first moment is 2ms or 5ms earlier than the second moment.

[0047] In the embodiment of the present application, the extension unit 12 can be specifically used for: If the instruction frame of the read instruction includes identifiers of multiple target register groups, the target instructions stored in each of the multiple target register groups are synchronously read from the multiple target register groups according to the identifiers of the multiple target register groups, so that each target register group sends the read target instructions to the target slave device connected to it through its own output end.

[0048] The following further describes the examples in Tables 2 to 5. The master device sends instructions 1 and 2 in sequence at the first moment, and then sends instruction 3 at the second moment when responses from slave devices 2 and 3 are required. Instruction 3 may be as shown in Table 6.

[0049] Table 6

[0050] Table 6 is the instruction 3 sent by the master device. The instruction frame includes: the instruction form is read, the device identifier is the identifier a of the extension unit 12, and the register group identifier is the identifier of the register groups 2 and 3. The master device sends the above instruction 3 and requires the extension unit 12 to perform the read operation. After receiving the instruction 3, the extension unit 12 obtains the register group identifier from the instruction frame, that is, the identifier of the register group 2 and the identifier of the register group 3. Then, the extension unit 12 reads the target instruction 2 from the register group 2 and the target instruction 3 from the register group 3 respectively. The target instruction 2 is sent to the slave device 2 through the output end of the register group 2. After receiving the target instruction 2, the slave device 2 responds and performs the corresponding operation. The target instruction 3 is sent to the slave device 3 through the output end of the register group 3. After receiving the target instruction 3, the slave device 3 responds and performs the corresponding operation. The above process can ensure that the target instructions 2 and 3 are sent at the same time, without the need for the instructions to be sent in serial queue, and the slave devices 2 and 3 can respond at the same time. This parallel processing method greatly shortens the response time of the slave device, can meet the requirements of the system response time window, and improves the communication efficiency and quality.

[0051] In the embodiment of the present application, the control circuit may further include: A replication unit, one end of which is connected to a master device, and the other end of which is respectively connected to each of a plurality of slave devices, is used to receive a first instruction sent by the master device. If the identifier in the first instruction is the identifier of the extension unit, the replication unit is in a closed state; if the identifier in the first instruction is the identifier of the first slave device, the replication unit is in an open state, and the first instruction is synchronously sent to the plurality of slave devices so that the first slave device responds to the first instruction.

[0052] The first slave device is any one of the above-mentioned multiple slave devices, without specific limitation.

[0053] In one implementation, in a scenario with a long response time window, the master device sends a first instruction including an identifier of the first slave device. In this way, there is no need for the extension unit to pre-store instructions in the register group. The instructions sent by the master device can be sent to multiple slave devices synchronously through the replication unit. The target slave device does not need to wait serially to receive instructions, and can receive instructions and respond in time, which greatly shortens the response time and improves communication efficiency and quality.

[0054] For example, referring to Table 7, the master device sends an instruction in a long response time window scenario, wherein the instruction frame includes: the instruction form is read or write, the slave device identifier is USID=6, and the register address. The information frame includes register operation data. In the write scenario, the register operation data is the data to be written to the register, and the master device sends the information frame to the slave device. In the read scenario, the register operation data is the data to be read from the register, and the slave device sends the information frame to the master device.

[0055] Table 7

[0056] After the master device sends the instruction shown in Table 7, the replication unit is in an open state and sends the instruction to multiple slave devices synchronously. The multiple slave devices can all receive the instruction in time, but only slave device 6 responds to the instruction and performs the corresponding read or write operation.

[0057] Figure 2 FIG. 2 shows another MIPI control circuit structure diagram provided in an embodiment of the present application. Figure 2 As shown, the input end (input) of the control circuit 10 is connected to the master device 20, and the output end (output) is connected to multiple slave devices 30. Among them, there are n slave devices, including slave device 1 to slave device n, and the corresponding IDs are USID 1 to USID n. The control circuit 10 includes: multiple register groups 11, extension units 12 and replication units 13. There are also n register groups 11, including register group 1 to register group n. Each register group 11 is connected to the corresponding slave device 30 through the output end. The extension unit 12 and the replication unit 13 are both connected to the master device through the input end. The other end of the replication unit 13 is respectively connected to the slave device 1 to the slave device n. The other end of the extension unit 12 is respectively connected to the register group 1 to the register group n. Through the above circuit structure, the master device can first save the target instruction in the target register group, and then read the target instruction through the target register group, so that the target slave device receives the target instruction and performs the corresponding operation, which can shorten the response time of the slave device and enhance the communication effect between the master device and the slave device.

[0058] In the above-mentioned control circuit provided in the embodiment of the present application, multiple register groups correspond one-to-one to multiple slave devices of MIPI, and the output end of each register group is connected to the corresponding slave device. One end of the extension unit is connected to the MIPI master device, and the other end is respectively connected to the input end of each register group in the multiple register groups, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction in the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group. Since the target instruction is pre-stored in the target register group, the target instruction received by the target slave device is issued by the target register group. This method greatly shortens the response time of the slave device, improves the quality of the signal received by the slave device, and especially enhances the communication effect with the remote slave device, which can overcome the parasitic effects of the routing.

[0059] An embodiment of the present application also provides an electronic device, including a control circuit of the mobile industry processor interface as described in the above embodiment. The functions of the control circuit are detailed in the description of the above embodiment and have the same beneficial effects, which will not be repeated here.

[0060] Figure 3 A control method for a mobile industry processor interface provided by an embodiment of the present application is shown. Figure 3 As shown, the method includes the following steps.

[0061] S302: Receive an instruction sent by a MIPI master device for a target slave device, where the target slave device is one of a plurality of MIPI slave devices, and the plurality of slave devices are numbered based on a line with the master device.

[0062] S304: Compare the number of the target slave device with the preset number.

[0063] S306: When the number of the target slave device is greater than the preset number, send an instruction to the intermediate slave device, and read the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device.

[0064] The intermediate slave device is a slave device corresponding to a preset number among the multiple slave devices.

[0065] In the embodiment of the present application, when the number of the target slave device is greater than the preset number, it means that the distance from the target slave device to the master device has exceeded the threshold and can be regarded as a remote device. Directly sending instructions will be affected by the parasitic effects of the wiring itself, so forwarding is required. Storing and reading instructions through the intermediate slave device is equivalent to the intermediate slave device repeating the instructions, which can enable the target slave device to receive instructions faster and respond in time, shorten the response time, and improve the communication efficiency and quality between the master device and the target slave device.

[0066] In an embodiment of the present application, when the number of the target slave device is less than or equal to the preset number, it means that the distance from the target slave device to the master device does not exceed the threshold and can be regarded as a proximal device. Therefore, there is no need to consider the parasitic effects of the wiring itself, and instructions can be sent directly to the target slave device, and the target slave device can respond in a timely manner.

[0067] In the embodiment of the present application, in the above step S306, sending the instruction to the intermediate slave device and reading the instruction from the intermediate slave device may include: Send instructions to the redundant register of the intermediate slave device and read instructions from the redundant register.

[0068] Among them, some or all of the multiple slave devices of MIPI can be configured with redundant registers, and one slave device can be configured with at least one redundant register, and the number of redundant registers is not specifically limited.

[0069] In one implementation manner, before step S302, the following may also be included: A plurality of slave devices are numbered in advance from small to large according to their distance from the master device from near to far; a slave device whose distance from the master device is greater than a first threshold and is closest to the master device is defined as an intermediate slave device, and the number of the intermediate slave device is defined as a preset number.

[0070] In an embodiment of the present application, multiple slave devices can be numbered according to the layout and routing of the slave devices on the mainboard, from near to far from the main device: #1, #2...#m...#n. Among them, the slave device numbered #m is a slave device that is closer to the main device than the first threshold and is the closest, and is defined as an intermediate slave device, and the number #m is a preset number. The first threshold can be set as needed, and the specific value is not limited. For example, the first threshold can be set to 100mm or 150mm, and the first slave device that exceeds 100mm or 150mm from the main device from near to far is defined as an intermediate slave device, and its number is #m.

[0071] In another implementation manner, the above step S302 may further include: A plurality of slave devices are numbered in advance from small to large according to the parasitic capacitance of the line between them and the master device; a slave device whose parasitic capacitance of the line between them and the master device is greater than a second threshold and whose parasitic capacitance is the smallest is defined as an intermediate slave device, and the number of the intermediate slave device is defined as a preset number.

[0072] In an embodiment of the present application, multiple slave devices can be numbered from small to large according to the parasitic capacitance of the line between the slave device and the master device: #1, #2...#m...#n. Among them, the slave device numbered #m is a slave device whose parasitic capacitance of the line between the slave device and the master device is greater than the second threshold and has the smallest parasitic capacitance, and is defined as an intermediate slave device, and the number #m is a preset number. The second threshold can be set as needed, and the specific value is not limited. For example, the second threshold can be set to 15pF, and the slave device whose parasitic capacitance of the line between the slave device and the master device first exceeds 15pF is defined as an intermediate slave device, and its number is #m.

[0073] The above method provided in the embodiment of the present application receives an instruction sent by the MIPI master device to the target slave device, the target slave device is one of the multiple slave devices of MIPI, the multiple slave devices are numbered based on the wiring with the master device, the number of the target slave device is compared with the preset number, and when the number of the target slave device is greater than the preset number, the instruction is sent to the intermediate slave device, and the instruction is read from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device, the intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices, the above process can ensure that the target slave device receives the instruction faster and responds in time, shortens the response time, improves the communication efficiency and quality between the master device and the target slave device, especially strengthens the communication effect with the remote slave device, and can overcome the parasitic effects of the wiring.

[0074] Figure 4 A control device for a mobile industry processor interface provided by an embodiment of the present application is shown. Figure 4 As shown, the device 400 includes the following modules: a generating module 401 , a comparing module 402 and a controlling module 403 .

[0075] The receiving module 401 is used to receive an instruction sent by a MIPI master device for a target slave device, where the target slave device is one of multiple slave devices of MIPI, and the multiple slave devices are numbered based on the wiring with the master device.

[0076] The comparison module 402 is used to compare the serial number of the target slave device with a preset serial number.

[0077] The control module 403 is used to send the instruction to the intermediate slave device and read the instruction from the intermediate slave device when the number of the target slave device is greater than the preset number, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device.

[0078] The intermediate slave device is a slave device corresponding to a preset number among multiple slave devices.

[0079] In the embodiment of the present application, the control module 403 is used to: send instructions to the redundant register of the intermediate slave device, and read instructions from the redundant register.

[0080] In one implementation, the above device may further include: The first preprocessing module is used to pre-number multiple slave devices from small to large according to the distance between them and the master device from near to far, and define the slave device whose distance to the master device is greater than a first threshold and is closest to the master device as an intermediate slave device, and define the number of the intermediate slave device as a preset number.

[0081] In another embodiment, the above device may further include: The second preprocessing module is used to pre-number multiple slave devices from small to large according to the parasitic capacitance of the line between them and the main device, and define the slave device with the parasitic capacitance of the line between them and the main device greater than the second threshold and the smallest parasitic capacitance as an intermediate slave device, and define the number of the intermediate slave device as a preset number.

[0082] The above-mentioned device provided by the embodiment of the present application receives the instruction for the target slave device sent by the MIPI master device through the receiving module, the target slave device is one of the multiple slave devices of MIPI, the multiple slave devices are numbered based on the wiring with the master device, the comparison module compares the number of the target slave device with the preset number, and the control module sends the instruction to the intermediate slave device when the number of the target slave device is greater than the preset number, and reads the instruction from the intermediate slave device so that the target slave device performs the corresponding operation after receiving the instruction read from the intermediate slave device. The intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices, which can ensure that the target slave device receives the instruction faster and responds in time, shortens the response time, improves the communication efficiency and quality between the master device and the target slave device, and especially enhances the communication effect with the remote slave device, and can overcome the parasitic effects of the wiring.

[0083] The control device of the mobile industry processor interface in the embodiment of the present application can be an electronic device or a component in the electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices other than a terminal. Exemplarily, the electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted electronic device, a mobile Internet device (Mobile Internet Device, MID), an augmented reality (augmented reality, AR) / virtual reality (virtual reality, VR) device, a robot, a wearable device, an ultra-mobile personal computer (ultra-mobile personal computer, UMPC), a netbook or a personal digital assistant (personal digital assistant, PDA), etc. It can also be a server, a network attached storage (Network Attached Storage, NAS), a personal computer (personal computer, PC), a television (television, TV), a teller machine or a self-service machine, etc., which is not specifically limited in the embodiment of the present application.

[0084] The control device of the mobile industry processor interface in the embodiment of the present application may be a device having an operating system. The operating system may be an Android operating system, an iOS operating system, or other possible operating systems, which are not specifically limited in the embodiment of the present application.

[0085] The control device of the mobile industry processor interface provided in the embodiment of the present application can achieve Figure 3 To avoid repetition, the various processes implemented by the method embodiment are not described here.

[0086] Alternatively, if Figure 5 As shown, an embodiment of the present application also provides an electronic device 500, including a processor 501 and a memory 502, wherein the memory 502 stores programs or instructions that can be executed on the processor 501, and when the program or instructions are executed by the processor 501, the various steps of the above-mentioned method embodiments are implemented, and the same technical effect can be achieved. To avoid repetition, they are not described here.

[0087] It should be noted that the electronic devices in the embodiments of the present application include the mobile electronic devices and non-mobile electronic devices mentioned above.

[0088] Figure 6 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of the present application. The electronic device 600 includes but is not limited to: a radio frequency unit 601, a network module 602, an audio output unit 603, an input unit 604, a sensor 605, a display unit 606, a user input unit 607, an interface unit 608, a memory 609, and a processor 610.

[0089] Those skilled in the art will appreciate that the electronic device 600 may also include a power source (such as a battery) for supplying power to various components, and the power source may be logically connected to the processor 610 through a power management system, thereby implementing functions such as managing charging, discharging, and power consumption management through the power management system. Figure 6 The electronic device structure shown in the figure does not constitute a limitation on the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently, which will not be described in detail here. Among them, the processor 610 is used to receive an instruction sent by the MIPI master device to a target slave device, where the target slave device is one of multiple slave devices of MIPI, and the multiple slave devices are numbered based on the routing with the master device; compare the number of the target slave device with a preset number; when the number of the target slave device is greater than the preset number, send the instruction to an intermediate slave device, and read the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device; wherein the intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices.

[0090] The above-mentioned electronic device provided in the embodiment of the present application receives an instruction for a target slave device sent by a MIPI master device, where the target slave device is one of multiple slave devices of MIPI, and multiple slave devices are numbered based on the wiring with the master device, and the number of the target slave device is compared with a preset number. When the number of the target slave device is greater than the preset number, an instruction is sent to an intermediate slave device, and an instruction is read from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device. The intermediate slave device is a slave device corresponding to the preset number among multiple slave devices. The above process can ensure that the target slave device receives the instruction faster and responds in time, shortens the response time, improves the communication efficiency and quality between the master device and the target slave device, and especially enhances the communication effect with the remote slave device, and can overcome the parasitic effects of the wiring.

[0091] It should be understood that in the embodiment of the present application, the input unit 604 may include a graphics processor (GPU) 6041 and a microphone 6042, and the graphics processor 6041 processes the image data of the static picture or video obtained by the image capture device (such as a camera) in the video capture mode or the image capture mode. The display unit 606 may include a display panel 6061, and the display panel 6061 may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. The user input unit 607 includes a touch panel 6071 and at least one of other input devices 6072. The touch panel 6071 is also called a touch screen. The touch panel 6071 may include two parts: a touch detection device and a touch controller. Other input devices 6072 may include, but are not limited to, a physical keyboard, function keys (such as a volume control key, a switch key, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.

[0092] The memory 609 can be used to store software programs and various data. The memory 609 may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, an application program or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc. In addition, the memory 609 may include a volatile memory or a non-volatile memory, or the memory 609 may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), a static random access memory (SRAM), a dynamic random access memory (DRAM), a synchronous dynamic random access memory (SDRAM), a double data rate synchronous dynamic random access memory (DDRSDRAM), an enhanced synchronous dynamic random access memory (ESDRAM), a synchronous link dynamic random access memory (SLDRAM) and a direct memory bus random access memory (DRRAM). The memory 609 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0093] The processor 610 may include one or more processing units; optionally, the processor 610 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It is understandable that the modem processor may not be integrated into the processor 610.

[0094] An embodiment of the present application also provides a readable storage medium, on which a program or instruction is stored. When the program or instruction is executed by a processor, each process of the above-mentioned method embodiments is implemented and the same technical effect can be achieved. To avoid repetition, it will not be repeated here.

[0095] The processor is the processor in the electronic device described in the above embodiment. The readable storage medium includes a computer readable storage medium, such as a computer read-only memory ROM, a random access memory RAM, a magnetic disk or an optical disk.

[0096] An embodiment of the present application further provides a chip, which includes a processor and a communication interface, wherein the communication interface is coupled to the processor, and the processor is used to run programs or instructions to implement the various processes of the above-mentioned method embodiments, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0097] It should be understood that the chip mentioned in the embodiments of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.

[0098] An embodiment of the present application provides a computer program product, which is stored in a storage medium. The program product is executed by at least one processor to implement the various processes of the above-mentioned method embodiments and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0099] It should be noted that, in this article, the terms "comprise", "include" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0100] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a computer software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0101] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A control circuit for a mobile industry processor interface MIPI, characterized in that: include: Multiple register groups correspond one-to-one to multiple slave devices of the mobile industry processor interface MIPI, and the output end of each register group is connected to the corresponding slave device; An extension unit, one end of which is connected to the MIPI master device, and the other end of which is respectively connected to the input end of each register group of the multiple register groups, and is used to receive a write instruction sent by the master device, store the target instruction contained in the write instruction into the target register group, and receive a read instruction sent by the master device, read the target instruction from the target register group, and send the target instruction to the target slave device through the output end of the target register group; The target instruction is an instruction sent by the master device to the target slave device, and the target register group is a register group connected to the target slave device.

2. The control circuit according to claim 1, characterized in that: The extension unit is used for: Receive a write instruction sent by the master device, obtain an address of a target register group from an instruction frame of the write instruction, and obtain a target instruction from an information frame of the write instruction; According to the address of the target register group, storing the target instruction in the target register group; The target instruction includes an identifier of a target slave device, and the target slave device is a slave device connected to the target register group.

3. The control circuit according to claim 1, characterized in that: The extension unit is used for: receiving a read instruction sent by the master device, and acquiring an identifier of a target register group from an instruction frame of the read instruction; The target instruction is read from the target register group according to the identifier, so that the target register group sends the target instruction to the connected target slave device through the output terminal.

4. The control circuit according to claim 3, characterized in that: The extension unit is used for: If the instruction frame of the read instruction includes identifiers of multiple target register groups, the target instructions stored in each of the multiple target register groups are synchronously read from the multiple target register groups according to the identifiers of the multiple target register groups, so that each target register group sends the read target instructions to the target slave device connected to it through its own output end.

5. The control circuit according to any one of claims 1 to 4, characterized in that: In a scenario with a short response time window, the master device sends the write instruction at a first moment and sends the read instruction at a second moment, the second moment being the moment when the target slave device is required to respond to the target instruction, and the first moment is earlier than the second moment; The short response time window is a response window whose response time is less than or equal to a preset threshold.

6. The control circuit according to claim 1, characterized in that: Also includes: A replication unit, one end of which is connected to the master device, and the other end of which is respectively connected to each of the multiple slave devices, and is used to receive a first instruction sent by the master device. If the identifier in the first instruction is the identifier of the extension unit, the replication unit is in a closed state; if the identifier in the first instruction is the identifier of the first slave device, the replication unit is in an open state, and the first instruction is synchronously sent to the multiple slave devices so that the first slave device responds to the first instruction.

7. An electronic device, characterized in that: The method comprises a control circuit as claimed in any one of claims 1 to 6.

8. A control method for a mobile industry processor interface MIPI, characterized in that: include: Receiving an instruction for a target slave device sent by a MIPI master device, wherein the target slave device is one of a plurality of slave devices of MIPI, and the plurality of slave devices are numbered based on a line with the master device; Comparing the serial number of the target slave device with a preset serial number; In the case where the number of the target slave device is greater than the preset number, sending the instruction to the intermediate slave device, and reading the instruction from the intermediate slave device, so that the target slave device performs a corresponding operation after receiving the instruction read from the intermediate slave device; The intermediate slave device is a slave device corresponding to the preset number among the multiple slave devices.

9. The method according to claim 8, characterized in that The sending the instruction to the intermediate slave device and reading the instruction from the intermediate slave device comprises: The instruction is sent to a redundant register of an intermediate slave device, and the instruction is read from the redundant register.

10. An electronic device, characterized in that: It comprises a processor, a memory and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the method for controlling the mobile industry processor interface as claimed in claim 8 or 9 are implemented.

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