Software multi-source autonomous loading method based on SPAC-V8 embedded processor

Abstract

The invention provides a software multi-source autonomous loading method based on an SPARC-V8 embedded processor, and the method comprises the steps: achieving an application mode of autonomous loading from any source address of an external FLASH during three-time loading through the insertion of a secondary loading control program and the design distribution of a memory space based on a secondary guide mode of the SPARC-V8 embedded processor; meanwhile, space single particle protection means such as three-mode loading and multi-region autonomous selection loading are designed; and after the third loading is successful, the secondary loading control program is automatically eliminated, and the memory space is not occupied any more. Under the condition of not depending on assistance of an external special loading device, the SPARC-V8 embedded processor is independently and independently selected and loaded from any address and multiple regions of the FLASH, the reliability and the flexibility of space software loading are improved, meanwhile, the overhead of memory resources is not increased, and the space software loading efficiency is improved. The problem that the SPARC-V8 embedded processor software cannot be loaded autonomously during on-orbit multi-region reconstruction is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic digital data processing, and in particular to a software multi-source autonomous loading method based on a SPAC-V8 embedded processor. Background Art

[0002] With the rapid development of microelectronics technology, the computing power of embedded chip processors has been continuously improved, which has promoted the development of software-defined satellite technology. The proportion of software in the onboard field is increasing. The functions of satellite payloads mainly rely on software implementation, and the flexibility of software on-orbit updates is becoming more and more important. At present, the ability to reconfigure onboard software has become an indispensable function in satellite development requirements.

[0003] Limited by the current technical status that embedded CPU chips only support a single loading source, if software reconstruction is to be achieved, the first thing to be solved is the problem of multi-source loading. In order to solve this problem, the usual practice is to configure a programmable logic device for the CPU chip to implement external loading, and by programming the programmable logic device, external multi-source selection and program transmission can be implemented to support the CPU chip to achieve product-level reconstruction.

[0004] In recent years, with the development trend of satellite commercialization and miniaturization, low-cost, miniaturized and highly reliable design requirements have been put forward for satellite-borne products. The original multi-source loading implementation solution can no longer meet the current application requirements due to its high cost, large weight and volume, and high power consumption.

[0005] Therefore, a method for autonomous loading of a CPU chip is needed, which can realize multi-source autonomous selection loading without relying on external chip support. Summary of the invention

[0006] The present invention is to solve the problem that a single embedded CPU chip cannot support multi-source selection loading during autonomous loading, and provides a software multi-source autonomous loading method based on the SPARC-V8 embedded processor. Under the premise of not increasing additional memory consumption, a secondary loading control program is designed to cooperate with the formal program to realize functions such as autonomous selection of loading sources and three-mode loading. This method improves the reliability and flexibility of onboard software loading, provides a solution for on-orbit reconstruction of SPARC-V8 embedded processor software, and can be widely used in various types of onboard embedded software based on SPARC-V8.

[0007] The present invention provides a software multi-source autonomous loading method based on a SPAC-V8 embedded processor, comprising the following steps:

[0008] S1, allocate the execution position of each program segment of the secondary loading control program code0 in RAM through the link script file, and record the execution position start address StartAddr1 and the execution position end address EndAddr1;

[0009] S2, allocate the execution positions of the .text segment, .data segment, .bss segment and .stack segment of the to-be-loaded program code1 to codeN in the RAM through the link script file, record the start address StartAddr2 of the .bss segment and the end address EndAddr2 of the .bss segment, where N is a positive integer greater than or equal to 2;

[0010] S3, respectively designing program loading state parameters para1-paraN as a basis for selecting a loading source for the programs code1-codeN to be loaded, and storing the program loading state parameters para1-paraN in FLASH;

[0011] S4. The secondary loading control program code0 includes a boot program and an application program. The boot program and the application program are designed to include the following contents:

[0012] Configure the read and write timing information of FLASH;

[0013] Read the program loading state parameter paraX, X∈[1~N], and judge whether the program codeX to be loaded has a program and whether it can be loaded according to the program loading state parameter paraX; if there is a program and the program can be loaded, read the program codeX to be loaded and move the boot program of the program codeX to be loaded to the RAM area; if there is no program in the codeX area of ​​the program to be loaded or it cannot be loaded, then X=X-1 or X=X+1, and continue to judge whether other programs to be loaded have programs and whether they can be loaded according to other program loading state parameters;

[0014] The source address offset address stored in FLASH, the destination address to be moved to RAM, and the segment byte length of the .text segment and the .data segment are read out from the boot program area of ​​the program to be loaded codeX respectively; the source address offset address stored in FLASH of the .text segment and the .data segment are added to the base address stored in FLASH of the program to be loaded codeX to obtain the absolute source address stored in FLASH of the .text segment and the absolute source address stored in FLASH of the .data segment; the entire segment data is moved from the absolute source address stored in FLASH of the .text segment and the absolute source address stored in FLASH of the .data segment to RAM according to the segment length;

[0015] Obtain the program entry address of the program codeX to be loaded from the boot program area of ​​the program codeX to be loaded; make the program PC pointer jump to the program entry address of the program codeX to be loaded, and start executing the program codeX;

[0016] S5, allocating FLASH storage area for the secondary loading control program code0 and the programs to be loaded code1~codeN, wherein the starting position of the secondary loading control program code0 is allocated to address 0 of the FLASH, and the storage starting addresses of the programs to be loaded code1~codeN in the FLASH are CodeAddr1~CodeAddrN;

[0017] S6, allocating FLASH storage area for program loading status parameters para1-paraN;

[0018] S7, burning the secondary loading control program code0, the programs to be loaded code1~codeN and the program loading state parameters para1~paraN into the corresponding area of ​​the FLASH of the SPARC-V8 embedded processor chip plug-in;

[0019] S8. After the application product is powered on, the SPARC-V8 embedded processor chip autonomously guides the secondary loading control program code0 to the SRAM area and executes the application program. It selectively loads one of the programs code1 to codeN to be loaded through the program loading status parameters para1 to paraN. After the program to be loaded is moved from FLASH to SRAM, the PC pointer is controlled to jump to the program entry and the program to be loaded begins to be executed. A software multi-source autonomous loading method based on the SPARC-V8 embedded processor is completed.

[0020] The present invention discloses a method for autonomously loading software from multiple sources based on a SPARC-V8 embedded processor. As a preferred method, the SPARC-V8 embedded processor chip is externally connected to FLASH as a program storage device and supports a loading method of three-mode storage.

[0021] The software multi-source autonomous loading method based on the SPARC-V8 embedded processor described in the present invention is, as a preferred method, the first boot process after the SPARC-V8 embedded processor is powered on is: loading 16K bytes of data starting from address 0 of FLASH to the RAM boot area.

[0022] The software multi-source autonomous loading method based on the SPAC-V8 embedded processor described in the present invention is, as a preferred method, in step S1, the address area recording the execution location start address StartAddr1 and the execution location end address EndAddr1 is included in the address area range of the .bss segment start address StartAddr2 and the .bss segment end address EndAddr2.

[0023] The software multi-source autonomous loading method based on the SPAC-V8 embedded processor described in the present invention is, as a preferred method, in step S2, the output information of the programs code1 to codeN to be loaded can be distinguished to test the serial number of the program to be loaded selected for loading this time.

[0024] The software multi-source autonomous loading method based on the SPAC-V8 embedded processor described in the present invention is, as a preferred mode, in step S3, the program loading state parameters para1~paraN are synchronously updated with the programs code1~codeN to be loaded.

[0025] The software multi-source autonomous loading method based on the SPAC-V8 embedded processor described in the present invention is, as a preferred method, in step S4, the program loading state parameter paraX is stored in three modes in FLASH, and the three modes are read and voted before use.

[0026] The software multi-source autonomous loading method based on the SPAC-V8 embedded processor described in the present invention is, as a preferred embodiment, in step S4, the length of the boot program is 16K bytes.

[0027] The software multi-source autonomous loading method based on the SPAC-V8 embedded processor described in the present invention is, as a preferred method, when loading the program codeX to be loaded, reading the program codeX to be loaded and moving the boot program of the program codeX to be loaded to the 0-16K byte address space of the RAM area;

[0028] The software multi-source autonomous loading method based on the SPAC-V8 embedded processor described in the present invention is, as a preferred mode, in step S8, firstly judging the state of the program code2 to be loaded by the program loading state parameter para2, and then selecting whether to load the program code2 to be loaded first;

[0029] If the program loading status parameter para2 indicates that the program code2 to be loaded is invalid, the program loading status parameter para1 is read to determine the validity of the program code1 to be loaded, and the program code1 is loaded preferentially.

[0030] Without increasing the extra memory overhead, the present invention is based on the secondary boot mode of the SPARC-V8 embedded processor, inserts a secondary loading control program, and designs and allocates memory space to achieve the function of selecting a loading program from any source address of the external FLASH during the tertiary loading. At the same time, space single particle protection measures such as three-mode loading and multi-zone autonomous selection loading are designed to improve the reliability and flexibility of onboard software loading.

[0031] The present invention has the following advantages:

[0032] (1) The present invention is based on the original secondary boot mode of the SPARC-V8 embedded processor and is compatible with the original external FLASH connection mode, thus ensuring the compatibility of software and hardware designs under different hardware design schemes;

[0033] (2) The secondary loading control program designed by the present invention can realize software three-mode verification loading, thereby improving the reliability of software loading;

[0034] (3) The secondary loading control program designed in the present invention can realize multi-source autonomous selection and loading of software, thereby improving the flexibility of software loading;

[0035] (4) The secondary loading control program designed by the present invention is automatically deleted from the memory after the formal program selection loading is completed, which not only realizes multi-source autonomous selection loading, but also saves memory overhead. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a flow chart of a software multi-source autonomous loading method based on SPAC-V8 embedded processor;

[0037] Figure 2 A schematic diagram of the RAM allocation of code0 for a software multi-source autonomous loading method based on the SPAC-V8 embedded processor;

[0038] Figure 3 A schematic diagram of RAM allocation of code1~N for a software multi-source autonomous loading method based on SPAC-V8 embedded processor;

[0039] Figure 4 A schematic diagram of FLASH storage allocation for a software multi-source autonomous loading method based on SPAC-V8 embedded processor;

[0040] Figure 5 This is a FLASH storage allocation example diagram of Example 1 of a software multi-source autonomous loading method based on a SPAC-V8 embedded processor. DETAILED DESCRIPTION

[0041] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0042] Example 1

[0043] like Figure 1 As shown, a software multi-source autonomous loading method based on SPAC-V8 embedded processor is implemented by the following steps:

[0044] S1. Design the secondary loading control program code0, and allocate the storage location of each program segment of code0 in RAM through the link script file. Figure 2 As shown, the offset address range is StartAddr1 to EndAddr1;

[0045] S2, design the programs code1 and code2 to be loaded, and allocate the storage locations of .text, .data, .bss, and .stack segments in RAM through the link script file. Figure 3 As shown, the address of the .bss segment in RAM is StartAddr2~EndAddr2;

[0046] S3, the program loading status parameters are designed to be 32 bits, para1 and para2 are stored in three modes in FLASH, each stored in an independent sector.

[0047] S4. The application program for the secondary loading control program code0 is designed according to the following steps:

[0048] Configure the read and write timings of FLASH and other peripherals: setup, strobe and hold;

[0049] After reading para1 from FLASH and voting in three modes, it is determined whether there is a program in code1 area and whether it can be loaded according to para1. If there is a loadable program, the program in code1 area is read and voted in three modes, and the boot program of code1 (the first 16K bytes) is moved to the 0~16K byte address space of RAM area;

[0050] Read out the source address offset address stored in FLASH, the destination address stored in RAM, and the segment byte length of the .text and .data segments from the code1 boot program area in RAM;

[0051] Add the source address offset address of the .text and .data segments stored in FLASH to the storage start address CodeAddr1 of code1 in FLASH to get the absolute source address of the .text and .data segments stored in FLASH;

[0052] Move the entire segment data from the absolute source address of the .text and .data segments to RAM according to the segment length;

[0053] Get the program entry address from the code1 boot program area;

[0054] Select SPARC-V8's global control register .g1 and local register .l1 to coordinate the PC pointer to jump to the code1 program entry address;

[0055] S5, allocate FLASH storage area for the secondary loading control program code0 and the programs to be loaded code1 and code2, such as Figure 4 As shown, the starting address of code0 is 0, and the starting addresses of code1 and code2 stored in FLAHS are CodeAddr1 and CodeAddr2 respectively;

[0056] S6, allocating FLASH storage area for program loading status parameters para1-paraN;

[0057] S7, burn code0, code1, code2 to the corresponding area of ​​FLASH.

[0058] The following is a multi-source autonomous loading design scheme of a navigation baseband chip program based on the SPRAC-V8 architecture of a satellite-borne navigation receiver as an example to further explain the present invention. In this embodiment, the size of the executable program file (.text, .data) of the secondary loading control program code0 is 73728 bytes, and the sizes of the executable program files of the programs to be loaded code1 and code2 are 219216 bytes and 219728 bytes respectively; FLASH uses 8-bit mode, with a total size of 8M bytes; the total size of the navigation baseband chip SRAM is 512K bytes, and the base address is 40000000H; the base address of the navigation baseband chip to access FLASH is 00000000H, and the receiver software requires that code2 be loaded by default upon power-on.

[0059] The specific steps of the software multi-source autonomous loading method based on the SPRAC-V8 embedded processor in this embodiment are as follows:

[0060] S1. Design the execution location of the secondary loading control program code0 in SRAM, with the starting address at 40060000H and the ending address at 40073FFFH. The bottom of the .stack segment is allocated at 4007EFF0H.

[0061] S2, design the programs code1 and code2 to be loaded, allocate the .text segment and .data segment addresses 40004000H~4003FFFFH, the .bss segment address 40040000H~40077FFFH, and the .stack stack bottom address 4007FFF0H;

[0062] S3, the program loading status parameters are designed to be 32 bits, and para1 and para2 are stored in three modes in FLASH.

[0063] S4. Application design of secondary loading control program code0 (taking 60MHz working clock as an example):

[0064] Configure the read and write timing of FLASH to be setup=7, strobe=64, hold=7;

[0065] After reading para2 from FLASH and voting by three modes, it is determined whether there is a program in code2 area and whether it can be loaded according to para2. If there is a loadable program, the program in code2 area is read and voted by three modes, and the boot program of code2 (the first 16K bytes) is moved to the 40000000H~40003FFFH area of ​​SRAM area;

[0066] Read out the source address offset address (4000H), destination address (40004000H), and segment byte length (33850H) of the .text segment, and the source address offset address (37850H), destination address (40037850H), and segment byte length (1170H) of the .data segment from the area 40000000H to 40003FFFH.

[0067] The absolute source addresses of .text are calculated as 00104000H (first copy), 00144000H (second copy), and 00184000H (third copy). The absolute source addresses of .data segment are calculated as 00137850H (first copy), 00177850H (second copy), and 001B7850H (third copy).

[0068] Move each segment from FLASH to SRAM according to the above absolute source address, destination address and segment length;

[0069] Get the program entry address from the 40000000H~40003FFFH area;

[0070] Select SPARC-V8's global control register .g1 and local register .l1 to coordinate and implement the PC pointer jump to the code2 program entry address;

[0071] S5, allocate FLASH storage area for the secondary loading control program code0 and the programs to be loaded code1 and code2, such as Figure 5 As shown, the storage location of code0 in FLASH is 00000000H~0001FFFFH, the storage location of code1 in FLASH is 00040000H~0007FFFFH (first copy), 00080000H~000BFFFFH (second copy), 000C0000H~000FFFFFH (third copy), and the storage location of code2 in FLAHS is 00100000H~0013FFFFH (first copy), 00140000H~0017FFFFH (second copy), 00180000H~001BFFFFH (third copy);

[0072] S6. The storage location of para1 in FLASH is allocated to 00020000H~0002000CH (three-mode storage), and the storage location of para2 in FLASH is allocated to 00030000H~0003000CH (three-mode storage). ;

[0073] S7. Burn code0 to the address 00000000H to 0001FFFFH of FLASH, burn code1 to the address 00040000H to 000FFFFFH of FLASH, and burn code2 to the address 00100000H to 001BFFFFH of FLASH.

[0074] After the receiver is powered on, the navigation baseband chip autonomously guides code0 to the SRAM area and executes its application program. First, it judges the status of code2 through para2 and then chooses to load the program of code2 first; if para2 indicates that code2 is invalid, it reads para1 to judge the validity of code1 and loads it preferentially; after completing the move of the program from FLASH to SRAM, it controls the PC pointer to jump to the program entry and starts to execute code2 (or code1), and the entire autonomous selection and loading process is completed.

[0075] This example completes the entire autonomous selection loading process without the need for external special loading chips to assist, and independently completes the multi-source selection and three-mode loading process of the CPU chip, improving the flexibility and reliability of software loading; at the same time, after the PC pointer completes the jump from code0 to code2 (or code1) program entry, the original execution area of ​​code0 is used normally as part of the code2 (or code1).bss segment. At this point, code0 disappears in the SRAM, and no additional SRAM storage overhead is added, saving resources.

[0076] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A software multi-source autonomous loading method based on SPAC-V8 embedded processor, characterized by: The following steps are involved: S1, allocate the execution position of each program segment of the secondary loading control program code0 in RAM through the link script file, and record the execution position start address StartAddr1 and the execution position end address EndAddr1; S2, allocating the execution positions of the .text segment, .data segment, .bss segment and .stack segment of the to-be-loaded program code1 to codeN in the RAM through the link script file, recording the starting address StartAddr2 of the .bss segment and the ending address EndAddr2 of the .bss segment, where N is a positive integer greater than or equal to 2; S3, respectively designing program loading state parameters para1-paraN as a basis for selecting a loading source for the programs code1-codeN to be loaded, wherein the program loading state parameters para1-paraN are stored in FLASH; S4, the secondary loading control program code0 includes a boot program and an application program, and the boot program and the application program are designed to include the following contents: Configure the read and write timing information of FLASH; Read the program loading state parameter paraX, X∈[1~N], and judge whether there is a program in the storage area of ​​the program codeX to be loaded and whether it can be loaded according to the program loading state parameter paraX; if there is a program and the program can be loaded, read the program codeX to be loaded and move the boot program of the program codeX to be loaded to the RAM area; if there is no program in the codeX area of ​​the program to be loaded or it cannot be loaded, then X=X-1 or X=X+1, and continue to judge whether there are programs in other programs to be loaded and whether they can be loaded according to other program loading state parameters; The source address offset address stored in FLASH, the destination address to be moved to RAM, and the segment byte length of the .text segment and the .data segment are read out from the boot program area of ​​the program to be loaded codeX respectively; the source address offset address stored in FLASH of the .text segment and the .data segment is added to the base address stored in FLASH of the program to be loaded codeX to obtain the absolute source address stored in FLASH of the .text segment and the absolute source address stored in FLASH of the .data segment; the entire segment data is moved to RAM according to the segment length from the absolute source address stored in FLASH of the .text segment and the absolute source address stored in FLASH of the .data segment; Obtain the program entry address of the program codeX to be loaded from the boot program area of ​​the program codeX to be loaded; jump the program PC pointer to the program entry address of the program codeX to be loaded, and start executing the program codeX; S5, allocating FLASH storage area for the secondary loading control program code0 and the programs to be loaded code1~codeN, wherein the starting position of the secondary loading control program code0 is allocated to address 0 of FLASH, and the storage starting addresses of the programs to be loaded code1~codeN in FLASH are CodeAddr1~CodeAddrN; S6, allocating FLASH storage area for the program loading state parameters para1-paraN; S7, burning the secondary loading control program code0, the programs to be loaded code1-codeN and the program loading state parameters para1-paraN into the corresponding FLASH area of ​​the SPARC-V8 embedded processor chip plug-in; S8. After the application product is powered on, the SPARC-V8 embedded processor chip autonomously guides the secondary loading control program code0 to the SRAM area and executes the application program, and preferentially loads one of the programs code1 to codeN to be loaded through the program loading status parameters para1 to paraN. After the program to be loaded is moved from FLASH to SRAM, the PC pointer is controlled to jump to the program entry, and the program to be loaded begins to be executed. A method for autonomous multi-source loading of software based on the SPARC-V8 embedded processor is completed.

2. According to claim 1, a software multi-source autonomous loading method based on SPAC-V8 embedded processor is characterized in that: The SPARC-V8 embedded processor chip is externally connected to FLASH as a program storage device and supports a three-mode storage loading method.

3. According to claim 1, a software multi-source autonomous loading method based on SPAC-V8 embedded processor is characterized in that: The first boot process of the SPARC-V8 embedded processor after power-on is: load 16K bytes of data starting from address 0 of FLASH into the RAM boot area.

4. According to claim 1, a software multi-source autonomous loading method based on SPAC-V8 embedded processor is characterized in that: In step S1, the address area of ​​the record execution position start address StartAddr1 and the execution position end address EndAddr1 is included in the address area range of the .bss segment start address StartAddr2 and the .bss segment end address EndAddr2.

5. The method for multi-source autonomous loading of software based on SPAC-V8 embedded processor according to claim 1, characterized in that: In step S2, the output information of the programs code1 to codeN to be loaded can be distinguished to test the sequence number of the program to be loaded selected for loading this time.

6. The method for multi-source autonomous loading of software based on SPAC-V8 embedded processor according to claim 1, characterized in that: In step S3, the program loading state parameters para1-paraN are updated synchronously with the programs code1-codeN to be loaded.

7. The method for multi-source autonomous loading of software based on SPAC-V8 embedded processor according to claim 1, characterized in that: In step S4, the program loading state parameter paraX is stored in three modes in FLASH, and is used after being read and voted in three modes.

8. The method for multi-source autonomous loading of software based on SPAC-V8 embedded processor according to claim 1, characterized in that: In step S4, the length of the boot program is 16K bytes.

9. The method for multi-source autonomous loading of software based on SPAC-V8 embedded processor according to claim 8, characterized in that: When loading the program codeX to be loaded, the program codeX to be loaded is read and the boot program of the program codeX to be loaded is moved to the 0-16K byte address space of the RAM area.

10. The method for multi-source autonomous loading of software based on SPAC-V8 embedded processor according to claim 1, characterized in that: In step S8, firstly, the state of the program code2 to be loaded is judged by the program loading state parameter para2, and then it is selected whether to load the program code2 to be loaded first; If the program loading status parameter para2 indicates that the program code2 to be loaded is invalid, the program loading status parameter para1 is read to determine the validity of the program code1 to be loaded, and the program code1 is loaded preferentially.

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