Laminated ceramic electronic component and method for manufacturing same

Abstract

The present invention provides a laminated ceramic electronic component having good DC bias characteristics while maintaining a high dielectric constant, and a method for manufacturing the same. The laminated ceramic electronic component includes a main body in which internal electrode layers and dielectric layers are alternately laminated. In the particles forming the dielectric layer sandwiched between the internal electrode layers, the present proportion of cubic crystals is 25-75 mass%, inclusive, and the average particle diameter of the particles forming the dielectric layer sandwiched between the internal electrode layers is 30-70 nm, inclusive.

Description

Technical Field

[0001] The present invention relates to a laminated ceramic electronic component and a method for manufacturing the same. Background Art

[0002] Recently, there is known a laminated ceramic electronic component having a capacitor portion formed by alternately laminating internal electrodes and dielectric layers. In a laminated ceramic electronic component, there is a situation where the electrostatic capacitance is reduced by a direct current voltage applied to the dielectric layer (DC bias characteristic). In the past, various schemes for improving this DC bias characteristic have been proposed (for example, refer to Patent Document 1).

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2006-56765 Summary of the invention

[0006] Technical problem to be solved by the invention

[0007] With the development of miniaturization of electronic devices using laminated ceramic electronic components, there is a demand for further miniaturization and increased capacitance of laminated ceramic electronic components. Therefore, from the perspective of maintaining a high dielectric constant and having good DC bias characteristics, further improvements in laminated ceramic electronic components are required.

[0008] An object of the present invention is to provide a multilayer ceramic electronic component which maintains a high dielectric constant and has good DC bias characteristics.

[0009] Means for solving technical problems

[0010] The above-mentioned purpose can be achieved by a stacked ceramic electronic component, which includes a main body formed by alternately stacking internal electrode layers and dielectric layers, in which the proportion of cubic crystals in the particles forming the dielectric layer sandwiched by the internal electrode layers is greater than 25 mass% and less than 75 mass%, and the average particle size of the particles forming the dielectric layer sandwiched by the internal electrode layers is greater than 30 nm and less than 70 nm.

[0011] In the multilayer ceramic electronic component having the above structure, the presence ratio of the cubic crystals in the particles may be 35 mass % or more and less than 65 mass %.

[0012] In the multilayer ceramic electronic component having the above structure, the particles forming the dielectric layer may include a core portion mainly composed of tetragonal crystals and a shell portion mainly composed of cubic crystals surrounding the core portion.

[0013] In the stacked ceramic electronic component of the above-mentioned structure, the existence ratio (%) of the cubic crystals may be: after crushing the capacitor part composed of the internal electrode and the dielectric layer existing between the stacked internal electrodes, the powdered measurement sample obtained by crushing is analyzed by X-ray analysis, and the obtained X-ray diffraction pattern is fitted by Rietveld analysis using a multiphase model composed of the cubic crystals and the tetragonal crystals. When the total of the cubic crystals and the tetragonal crystals is set to 100%, the value obtained by calculating the respective ratios (mass %) of the cubic crystals and the tetragonal crystals is obtained.

[0014] In the multilayer ceramic electronic component having the above structure, the dielectric layer may contain at least one element of Mg, Ho, Yb, Er, and Mn.

[0015] In the above-mentioned stacked ceramic electronic component, the particles constituting the dielectric layer may contain: at least one element among Ba, Sr and Ca; and at least one element among Ti, Zr and Hf, and the combined atomic ratio (at%) of Ba, Sr and Ca is greater than 1.020 times or less than 0.96 times the combined atomic ratio (at%) of Ti, Zr and Hf.

[0016] In addition, the above-mentioned purpose can be achieved by a method for manufacturing a stacked ceramic electronic component, which comprises: a process for obtaining a ceramic slurry, wherein the ceramic slurry comprises a ceramic powder synthesized by a hydrothermal synthesis method, wherein the ceramic powder comprises a core portion mainly composed of tetragonal crystals, and a shell portion mainly composed of cubic crystals surrounding the core portion; a process for making a raw sheet using the ceramic slurry; a process for forming a stacked body in which the raw sheets and metal conductive layers are alternately stacked; and a process for forming a dielectric layer from the ceramic powder by firing the stacked body, wherein the hydrothermal synthesis method is carried out in a synthesis environment at a pressure of not less than 600 hPa and not more than 2000 hPa and a temperature of not less than 60°C and not more than 120°C.

[0017] In the method for manufacturing a laminated ceramic electronic component having the above structure, the ceramic powder may have an average particle size of 20 nm or more and 50 nm or less, and the ceramic powder may contain BaTiO 3 .

[0018] In the method for producing a multilayer ceramic electronic component having the above configuration, the ceramic powder may be synthesized in the synthesis environment within 30 minutes to 100 hours.

[0019] In the method for producing a laminated ceramic electronic component having the above configuration, the step of obtaining the ceramic slurry may include the step of adding a particle growth inhibiting additive to the ceramic powder for inhibiting growth of particles contained in the ceramic powder.

[0020] In the method for producing a multilayer ceramic electronic component having the above structure, the particle growth inhibiting additive may be at least one element selected from the group consisting of Mg, Ho, Yb, Er, and Mn.

[0021] In the manufacturing method of the above-mentioned stacked ceramic electronic component, the ceramic powder may contain: at least one element of Ba, Sr and Ca; and at least one element of Ti, Zr and Hf, and the total atomic ratio (at%) of Ba, Sr and Ca is greater than 1.020 times or less than 0.96 times the total atomic ratio (at%) of Ti, Zr and Hf.

[0022] In addition, in the manufacturing method of the above-mentioned stacked ceramic electronic components, when the total atomic ratio (at%) of Ba, Sr and Ca is more than 1.020 times the total atomic ratio (at%) of Ti, Zr and Hf, the total atomic ratio (at%) of Ba, Sr and Ca may be less than 1.100 times the total atomic ratio (at%) of Ti, Zr and Hf.

[0023] In addition, in the manufacturing method of the above-mentioned stacked ceramic electronic components, when the total atomic ratio (at%) of Ba, Sr and Ca is less than 0.96 times the total atomic ratio (at%) of Ti, Zr and Hf, the total atomic ratio (at%) of Ba, Sr and Ca may be more than 0.900 times the total atomic ratio (at%) of Ti, Zr and Hf.

[0024] Effects of the Invention

[0025] According to the present invention, it is possible to provide a multilayer ceramic electronic component which maintains a high dielectric constant and has good DC bias characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a perspective view of a multilayer ceramic capacitor according to one embodiment of the present invention.

[0027] Figure 2 yes Figure 1 sectional view of the multilayer ceramic capacitor along line AA′ in FIG.

[0028] Figure 3 yes Figure 1 BB′ line cross-sectional view of the multilayer ceramic capacitor in FIG.

[0029] Figure 4 It is a diagram schematically showing the state of particles forming a dielectric layer.

[0030] Figure 5 (A) is a diagram schematically showing cubic crystals contained in particles forming a dielectric layer. Figure 5 (B) is a diagram schematically showing tetragonal crystals contained in particles forming the dielectric layer.

[0031] Figure 6 This is a flowchart showing an example of a method for manufacturing a multilayer ceramic capacitor according to an embodiment.

[0032] Figure 7 It is a graph showing DC bias characteristics of some examples and some comparative examples.

[0033] Description of Reference Numerals

[0034] 10 ... a multilayer ceramic capacitor, 11 ... a ceramic body, 12, 13 ... internal electrodes, 14a, 14b ... external electrodes, 21 ... a base film, 22 ... a plating film, 151 ... a particle, 151a ... a core portion, and 151b ... a shell portion. DETAILED DESCRIPTION

[0035] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0036] In the drawings, the X-axis, Y-axis, and Z-axis that are orthogonal to each other are appropriately indicated. The X-axis, Y-axis, and Z-axis are the same in all the drawings. The X-axis direction is equivalent to the third axis direction, the Y-axis direction is equivalent to the second axis direction, and the Z-axis direction is equivalent to the first axis direction.

[0037] [Overall Structure of Multilayer Ceramic Capacitor 10]

[0038] The multilayer ceramic capacitor 10 includes a main body 11 having a substantially rectangular parallelepiped shape. In the main body 11, four surfaces other than the upper surface and the lower surface in the stacking direction are referred to as side surfaces. Figure 1 to Figure 3 In the case shown in the example, in the body 11, the first external electrode 14a and the second external electrode 14b are respectively provided on two opposite side surfaces (the first side surface and the second side surface). The first external electrode 14a extends from the first side surface to four adjacent surfaces. The second external electrode 14b extends from the second side surface to four adjacent surfaces. However, the first external electrode 14a and the second external electrode 14b are spaced apart from each other.

[0039] In addition, Figure 1 to Figure 3, the Z-axis direction (first direction) is the stacking direction, and is the direction in which each internal electrode layer is opposite to each other. The X-axis direction (second direction) is the length direction of the body 11, is the direction in which the first side surface and the second side surface of the body 11 are opposite to each other, and is the direction in which the first external electrode 14a and the second external electrode 14b are opposite to each other. The Y-axis direction (third direction) is the width direction of the internal electrode layer, and is the direction in which two side surfaces (third side surface and fourth side surface) other than the first side surface and the second side surface of the four side surfaces of the body 11 are opposite to each other. The X-axis direction, the Y-axis direction, and the Z-axis direction are orthogonal to each other.

[0040] The main body 11 has a structure in which a dielectric layer 15 including a ceramic material that functions as a dielectric and an internal electrode layer are alternately stacked. The internal electrode layer includes a plurality of first internal electrode layers 12 and a plurality of second internal electrode layers 13. The first internal electrode layer 12 and the second internal electrode layer 13 are alternately stacked. The edge of the first internal electrode layer 12 is led out to the first side surface of the main body 11 where the first external electrode 14a is provided. The edge of the second internal electrode layer 13 is led out to the second side surface of the main body 11 where the second external electrode 14b is provided. Thus, the first internal electrode layer 12 and the second internal electrode layer 13 are alternately conducted with the first external electrode 14a and the second external electrode 14b. As a result, the laminated ceramic capacitor 10 has a structure in which capacitor units are stacked. In addition, in the laminate of the dielectric layer 15 and the internal electrode layer, the internal electrode layer is arranged at the outermost layer in the stacking direction, and the upper and lower surfaces of the laminate are covered by the cover 18. The cover 18 is mainly composed of a ceramic material. In addition, the first internal electrode layer 12 and the second internal electrode layer 13 are not limited to the first internal electrode layer 12 and the second internal electrode layer 13 as long as they are exposed in different regions on the surface of the laminate and are electrically connected to different external electrodes. Figure 1 to Figure 3 The different regions on the surface of the laminate may be surface regions of the respective opposite surfaces of the laminate, surface regions of the respective adjacent surfaces of the laminate, or different surface regions of the same surface of the laminate. As long as different external electrodes are spaced apart from each other, the first internal electrode layer 12 and the second internal electrode layer 13 may extend from the surfaces exposed in the surface region of the laminate to the other surfaces, respectively.

[0041] The size of the multilayer ceramic capacitor 10 is, for example, 0.25 mm in length, 0.125 mm in width, and 0.125 mm in height, or 0.4 mm in length, 0.2 mm in width, and 0.2 mm in height, or 0.6 mm in length, 0.3 mm in width, and 0.3 mm in height, or 1.0 mm in length, 0.5 mm in width, and 0.5 mm in height, or 3.2 mm in length, 1.6 mm in width, and 1.6 mm in height, or 4.5 mm in length, 3.2 mm in width, and 2.5 mm in height, but is not limited to these sizes. The size of the multilayer ceramic capacitor 10 may be, for example, length>width≥height, width>length≥height, height>length≥width, or height>width≥length.

[0042] The main body 11 includes a capacitor portion 16 and a protection portion 17 . The protection portion 17 constitutes a peripheral portion of the ceramic main body 11 .

[0043] Specifically, the protection portion 17 includes a covering portion 18 located outside the capacitor portion 16 in the stacking direction, that is, Figure 1 to Figure 3 side edge portion 19, which is located outside in a direction perpendicular to the stacking direction of the capacitor portion 16, that is, in Figure 1 to Figure 3 In the case of being located outside in the Y-axis direction and having no internal electrode region; and an end edge portion 20, which is located outside in a direction perpendicular to the stacking direction, that is, in Figure 1 to Figure 3 In the case of , the region is located outside the capacitor portion 16 in the X-axis direction and has a lead portion of the internal electrode.

[0044] The capacitor section 16 is disposed inside the protection section 17 and constitutes a functional section. In the capacitor section 16, a plurality of first internal electrode layers 12 and a plurality of second internal electrode layers 13 are sandwiched by a dielectric layer 15 (see Figure 2 ) are stacked in the Z-axis direction. The internal electrode layers 12 and 13 are arranged along a plane perpendicular to the stacking direction, i.e., Figure 1 to Figure 3 In all cases, the sheets extend along the XY plane, and along the stacking direction, that is, in Figure 1 to Figure 3 The structure of the dielectric layer 15 sandwiched between the first internal electrode layer 12 and the second internal electrode layer 13 will be described in detail later.

[0045] The first internal electrode layer 12 and the second internal electrode layer 13 have base metals such as nickel (Ni), copper (Cu), tin (Sn), or alloys containing these as main components. Precious metals such as platinum (Pt), palladium (Pd), silver (Ag), gold (Au), or alloys containing these may be used as main components of the first internal electrode layer 12 and the second internal electrode layer 13. The main component of the first internal electrode layer 12 and the main component of the second internal electrode layer 13 may be the same, or different.

[0046] The dielectric layer 15 is formed of dielectric ceramic. In order to increase the capacitance of each dielectric layer 15 between the internal electrode layers 12 and 13 in the laminated ceramic capacitor 10, a dielectric ceramic with a high dielectric constant may be used. The dielectric layer 15 has a dielectric constant having a general formula ABO. 3 The perovskite structure of the ceramic material is the main component. In addition, the perovskite structure contains ABO deviating from the stoichiometric composition. 3-α Specifically, the dielectric layer 15 is composed of (Ba, Sr, Ca)(Zr, Ti, Hf)O 3 As the main components. (Ba, Sr, Ca)(Zr, Ti, Hf)O 3 Barium (Ba) may be contained at the A site, and strontium (Sr) and calcium (Ca) may also be contained at the A site. At least one of zirconium (Zr) and titanium (Ti) may be contained at the B site, and hafnium (Hf) may also be contained at the B site. In this specification, Ba is sometimes described as a representative component for the A site. In this case, in expressions such as the atomic ratio (at%) of Ba, Sr and Ca are also included in the expression. Ti is described as a representative component for the B site, and Zr and Hf are also included in expressions such as the atomic ratio (at%) of Ti. The A site and the B site are sometimes described as individual components.

[0047] The dielectric layer 15 contains at least one element selected from magnesium (Mg), manganese (Mn), holmium (Ho), ytterbium (Yb) and erbium (Er) in addition to the above-mentioned main components. In addition, the dielectric layer 15 contains at least one element selected from rare earth elements, first transition metal elements or second transition metal elements in addition to the above-mentioned main components. When selected from rare earth elements, it can be selected from scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy) and thulium (Tm). Here, although the enumeration is omitted, it can also be selected from the first transition metal element or the second transition metal element.

[0048] The protection portion 17 is also formed of dielectric ceramic. From the viewpoint of suppressing internal stress, etc., it is preferable that the main component of the cover portion 18 and the edge portion 20 in the protection portion 17 is the same composition as that of the dielectric layer 15 .

[0049] The main component of the side edge portion 19 of the protection portion 17 is the same as that of the dielectric layer 15 .

[0050] The external electrodes 14a and 14b respectively include: a conductive base film 21 formed in a manner electrically connected to the lead-out portion of the internal electrode led out to the surface of the ceramic body; and a plated film 22 formed on the base film 21. The base film 21 is composed of, for example, a sintered film obtained by firing a conductive paste, a conductive sputtered film of a metal or the like, a conductive resin film containing a metal filler, and the like. The base film 21 may also be a layer formed of a plurality of films such as a layer with good adhesion or a layer that is not easily corroded by solder. The plated film 22 is a film formed by electroplating. Each film of the external electrodes 14a and 14b is formed of, for example, a metal or alloy having nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), etc. as a main component.

[0051] [Detailed Structure of Dielectric Layer 15]

[0052] Figure 4 1 is a diagram schematically showing a particle 151 forming a dielectric layer 15. The particle 151 includes a core 151a and a shell 151b surrounding the core 151a. Figure 5 The shell 151b is mainly composed of a cubic crystal as shown in (A). Figure 5 The main component is a tetragonal crystal shown in (B).

[0053] When the dielectric properties of cubic crystals and tetragonal crystals are compared, cubic crystals tend to show paraelectricity, and tetragonal crystals tend to show ferroelectricity. By forming the dielectric layer 15 with ferroelectric particles, it is easy to ensure electrostatic capacitance, on the other hand, the DC bias characteristics tend to deteriorate. Therefore, in the present embodiment, the existence ratio of cubic crystals in a particle 151 (hereinafter referred to as "cubic crystal ratio") is set to be greater than 25% by mass and less than 75% by mass. Thereby, it is achieved that both electrostatic capacitance and good DC bias characteristics can be maintained. It can be considered that by making the cubic crystal ratio greater than 35% by mass and less than 65% by mass, electrostatic capacitance can be ensured, and good DC bias characteristics can be easily maintained. In addition, the cubic crystal ratio is the existence ratio of cubic crystals in a particle 151. In the measurement using XRD (X-ray diffraction; X-ray analysis method), it can be an average value obtained by measuring multiple particles.

[0054] In addition, the average particle size of the particles 151 is preferably 30 nm to 70 nm. In addition, the average particle size of the particles 151 is more preferably 30 nm to 60 nm, and further preferably 30 nm to 50 nm. The smaller the average particle size of the particles 151, the better the DC bias characteristics when current is applied, which is preferred.

[0055] Here, the average particle size of the particles 151 is obtained, for example, according to the following essentials. First, the laminated ceramic capacitor 10 is cross-sectioned and ground in a manner that the surface of the axis of the stacking direction containing the first internal electrode layer 12, the second internal electrode layer 13 and the dielectric layer 15 can be observed. Use SEM (scanning electron microscope) to shoot secondary electron images of the dielectric layer 15 between the internal electrode layers 12 and 13 of the capacitor portion 16 of the cross section. Then, use image processing measurement software to measure the area of ​​each particle in the field of view, calculate the diameter (Haywood diameter) of a circle of equal area, and then calculate the average value based on these diameters. The shooting position of SEM is 9 positions of 1 / 4, 1 / 2, 3 / 4 of the upper and lower lengths of the capacitor portion 16, and 1 / 4, 1 / 2, 3 / 4 of the left and right lengths of the capacitor portion 16, and their average value is used as the average particle size of the sample. When the 9 positions are located in the internal electrode portion, the dielectric layer near the upper and lower central sides can be observed.

[0056] [Method of Manufacturing Multilayer Ceramic Capacitor 10]

[0057] Next, a method for manufacturing the multilayer ceramic capacitor 10 will be described. Figure 6 1 is a diagram illustrating the flow of a method for manufacturing the multilayer ceramic capacitor 10 .

[0058] (Step S01: Raw material powder production process)

[0059] A dielectric material for forming the dielectric layer 15 is prepared. First, (Ba, Sr, Ca)(Zr, Ti, Hf)O 3 Ceramic powder. As (Ba, Sr, Ca)(Zr, Ti, Hf)O 3 Various methods are known in the art for synthesizing ceramic powders, such as a solid phase method, a sol-gel method, a hydrothermal method, etc. In this embodiment, a hydrothermal method is used.

[0060] Here, hydrothermal synthesis based on the hydrothermal method is described in detail. In the present embodiment, it is characterized in that hydrothermal synthesis is performed at a lower temperature and a lower pressure than the previous hydrothermal method. The hydrothermal synthesis that was previously performed under the conditions of temperature and pressure of about 200°C to 300°C, several MPa to several 10MPa, etc., is performed in a synthesis environment with a temperature of 120°C or less and 60°C or more and a pressure of 600hPa to 2000hPa in the present embodiment. The pressure is preferably as low as possible, but when the synthesis is performed at a boiling temperature of water of 100°C or more, a pressure condition slightly higher than atmospheric pressure is required. By performing hydrothermal synthesis under such conditions, a hydrothermally synthesized ceramic powder with a large proportion of cubic crystals can be obtained. The hydrothermal synthesis in the present embodiment is performed in a synthesis environment such as the above for a period of time of more than 30 minutes and less than 100 hours. The implementation time can be appropriately set within this range.

[0061] At least one element of magnesium (Mg), manganese (Mn), holmium (Ho), ytterbium (Yb) and erbium (Er) is added to the obtained ceramic powder. This is to suppress the growth of particles 151. As a result, the average particle size of the particles in the unfired ceramic powder can be made to be greater than 20nm and less than 50nm. The average particle size of the particles in the ceramic powder can be measured using a laser transmission type particle size distribution meter or the like.

[0062] In addition, the ceramic powder can be BaTiO 3 . Regarding the perovskite structure A site, it is also possible to combine Sr and / or Ca instead of Ba alone. Regarding the perovskite structure B site, it is also possible to combine Zr and / or Hf instead of Ti alone. In the case of containing at least one element among Ba, Sr and Ca, and at least one element among Ti, Zr and Hf, the atomic ratio (at%) of Ba, Sr and Ca in total may be greater than 1.020 times or less than 0.96 times the atomic ratio (at%) of Ti, Zr and Hf in total. Thus, the average particle size of the particles in the unfired raw material ceramic powder can be made greater than 20nm and less than 50nm. That is, the growth of the particles contained in the ceramic powder can be adjusted by adjusting the ratio of Ba, Sr and Ca to Ti, Zr and Hf. It can be considered that by adjusting to such a ratio, Ba, Sr and Ca, or Ti, Zr and Hf become more on the surface of the particles, and the atoms will hinder the reaction between the particles, thereby suppressing the growth of the particles.

[0063] In addition, when the total atomic ratio (at%) of Ba, Sr and Ca is more than 1.020 times the total atomic ratio (at%) of Ti, Zr and Hf, the total atomic ratio (at%) of Ba, Sr and Ca may be less than 1.100 times the total atomic ratio (at%) of Ti, Zr and Hf. In addition, when the total atomic ratio (at%) of Ba, Sr and Ca is less than 0.96 times the total atomic ratio (at%) of Ti, Zr and Hf, the atomic ratio (at%) of Ba may be more than 0.900 times the total atomic ratio (at%) of Ti, Zr and Hf. In addition, as described above, in this specification, Ba is sometimes described as a representative component for the A site. In the expression of the atomic ratio (at%) of Ba, Sr and Ca are also included in the expression. In addition, Ti is sometimes described as a representative component for the B site. In the expression of the atomic ratio (at%) of Ti, Zr and Hf are also included in the expression. The A site and the B site are sometimes expressed as individual components.

[0064] In addition, in addition to the above-mentioned components, a predetermined additive compound may be added to the obtained ceramic powder according to the purpose. Examples of the additive compound include oxides of molybdenum (Mo), niobium (Nb), tantalum (Ta), tungsten (W), magnesium (Mg), manganese (Mn), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), and thulium (Tm), and oxides of cobalt (Co), Ni, lithium (Li), boron (B), sodium (Na), potassium (K), silicon (Si), Si, or glass.

[0065] The compound is mixed and added to the ceramic powder and the ceramic powder is temporarily fired at 820-1150°C. Next, the ceramic powder is wet mixed, dried and crushed. The average particle size of the crushed ceramic powder after temporary firing is 20 nm to 70 nm, preferably 20 nm to 50 nm. For example, the ceramic powder obtained as described above can be crushed as needed to adjust the particle size, or the particle size can be adjusted by combining with a classification process.

[0066] (Step S02: Lamination process)

[0067] Next, a binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol and toluene, and a plasticizer are added to the obtained dielectric material and wet mixed. Using the obtained slurry, a dielectric green sheet is applied to a substrate by, for example, a die coating method or a doctor blade method and dried.

[0068] Next, a metal conductive paste for forming an internal electrode containing an organic binder is printed on the surface of the dielectric green sheet by screen printing, gravure printing, etc., to configure a pattern for the internal electrode layer. Ceramic particles may be added as a common material to the metal conductive paste, or ceramic particles may not be added. When ceramic particles are added as a common material, the main component of the ceramic particles is not particularly limited, but is preferably the same as the main component ceramic of the dielectric layer 15.

[0069] Then, in a state of being peeled off from the substrate, the dielectric green sheets are alternately stacked in such a manner that the internal electrode layers 12 and 13 are staggered with the dielectric layer 15, and the end edges of the internal electrode layers 12 and 13 are alternately exposed at both end surfaces in the longitudinal direction of the dielectric layer 15 and alternately led to a pair of external electrodes 14a and 14b with different polarities. For example, the total number of stacked layers is 100 to 500 layers. Then, a plurality of green sheets that will become the cover 18 are respectively pressed on the upper and lower parts of the stacked dielectric green sheets to obtain a ceramic stack. Then, the obtained ceramic stack is cut into a predetermined chip size (for example, a chip size that takes into account the shrinkage caused by firing when the size of the stacked ceramic capacitor 10 is 0.6 mm×0.3 mm×0.3 mm).

[0070] (Step S03: Firing process)

[0071] The molded body obtained as above was heated to N 2 After the binder is removed in the atmosphere, a metal paste to be the base of the external electrodes 20a and 20b is applied by dipping. -5 ~10 -8 The sintering process is carried out in a reducing atmosphere of 100 to 1300° C. for 10 minutes to 2 hours.

[0072] (Step S04: Reoxidation Process)

[0073] Then, you can 2 The reoxidation treatment is performed at 600°C to 1000°C in a gas atmosphere.

[0074] (Step S05: External Electrode Forming Step)

[0075] Then, a base film 21 is formed. In the base film 21, the unfired electrode material is coated on the end faces, side faces and main faces of the ceramic laminate. The coating method is, for example, an immersion method, but it can also be other methods known in the past, a printing method, a sputtering method, etc., or a method of combining them. Next, the unfired electrode material is sintered. The sintering process can be performed, for example, in a reducing atmosphere or in an atmosphere with a low oxygen partial pressure. After the base film 21 is formed, the ceramic laminate is immersed in a plating solution for forming a plated film 22 for electroplating. Thus, a plated film 22 is formed, thereby forming external electrodes 14a, 14b.

[0076] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the gist of the present invention.

[0077] [Example]

[0078] Next, the relative dielectric constant and DC bias characteristics, that is, the capacitance change rate (%) when a direct current is applied, of the multilayer ceramic capacitor of the example will be described together with these numerical values ​​in the comparative example.

[0079] The examples correspond to the laminated ceramic capacitor 10 of the embodiment. As for the examples, five examples 1 to 5 are prepared according to the combination of the average particle size and the cubic crystal ratio. As for the comparative examples, four examples 1 to 4 are prepared according to the combination of the average particle size and the cubic crystal ratio. In addition, as examples using conventional ceramic powders, three conventional examples 1 to 3 are prepared. The dimensions of the examples, comparative examples, and conventional examples are length × width × height = 0.6 mm × 0.3 mm × 0.3 mm.

[0080] Average particle size is obtained according to the following essentials. First, in a manner that the surface of the axis of the stacking direction including the first internal electrode, the second internal electrode and the dielectric layer can be observed, the stacked capacitor is cross-sectioned and ground. Use SEM (scanning electron microscope) to shoot secondary electron images of the dielectric layer between the internal electrodes of the capacitor portion of the cross section. Then, use image processing measurement software to measure the area of ​​each particle in the field of view, calculate the diameter (Haywood diameter) of a circle of equal area, and then calculate the average value according to these diameters. The shooting position of SEM is 9 positions of 1 / 4, 1 / 2, 3 / 4 of the upper and lower length of the capacitor portion 16 and 1 / 4, 1 / 2, 3 / 4 of the left and right length of the capacitor portion 16, and their average value is used as the average particle size of the sample. When 9 positions are located at the internal electrode portion, the dielectric layer near the upper and lower central sides can be observed.

[0081] The cubic crystal ratio (%) is calculated by analyzing the powder obtained by crushing each sample using XRD, and measuring the ratio of tetragonal crystal and cubic crystal. Here, the calculation of the cubic crystal ratio is further described. First, the stacked ceramic capacitor as a sample is cut and ground, and the external electrode and the protective portion are removed to form a state in which only the capacitor portion (laminated body) is composed of the internal electrode and the dielectric layer present between the internal electrodes. Then, the capacitor portion is crushed to obtain a powdered measurement sample. The powdered measurement sample is analyzed using XRD. The obtained X-ray diffraction pattern is fitted by Rietveld analysis using a multiphase model composed of cubic crystal and tetragonal crystal, and when the total of cubic crystal and tetragonal crystal is set to 100%, the ratio (mass %) of cubic crystal and tetragonal crystal is calculated. In addition, the powdered measurement sample also contains Ni as an internal electrode component, but for the measurement of XRD, because it does not have a peak in the same region, it can be considered that it will not affect it.

[0082] The relative dielectric constant was determined by measuring the electrostatic capacitance using an LCR meter under the conditions of 25° C., 1 kHz, and 1 Vrms, and calculating from the cross-sectional area, dielectric thickness, and number of layers of the sample multilayer ceramic capacitor.

[0083] The capacitance change rate (%) is the capacitance reduction rate when the capacitance when a DC current of 4 V is applied is compared with the capacitance when no load is applied.

[0084] When the relative dielectric constant is 400 or more and the capacitance change rate is within -20%, it is evaluated as a qualified product. Figure 7 , showing the relationship between the DC bias voltage and the capacitance change rate of the embodiment and the comparative example. Regarding the embodiment, the representative examples 1 to 5 show the capacitance change rate of the embodiment 1. Regarding the comparative example, the representative examples 1 to 4 show the capacitance change rate of the comparative example 1.

[0085]

Table 1

[0086]

[0087] Referring to Table 1, in Example 1, the average particle size is 66 nm, the cubic crystal ratio is 40%, the relative dielectric constant is 553, and the capacitance change rate is -18.3%. Therefore, Example 1 is a qualified product.

[0088] In Example 2, the average particle size was 69 nm, and the cubic crystal ratio was 32%. In Example 2, the relative dielectric constant was 588, and the capacitance change rate was -17.1%. Therefore, Example 2 was a qualified product.

[0089] In Example 3, the average particle size was 59 nm, and the cubic crystal ratio was 47%. In Example 3, the relative dielectric constant was 510, and the capacitance change rate was -15.9%. Therefore, Example 3 was a qualified product.

[0090] In Example 4, the average particle size was 48 nm, and the cubic crystal ratio was 62%. In Example 4, the relative dielectric constant was 413, and the capacitance change rate was -12.9%. Therefore, Example 4 was a qualified product.

[0091] In Example 5, the average particle size was 32 nm, and the cubic crystal ratio was 73%. In Example 5, the relative dielectric constant was 408, and the capacitance change rate was -11.2%. Therefore, Example 5 was a qualified product.

[0092] In Comparative Example 1, the average particle size is 77nm and the cubic crystal ratio is 36%. In Comparative Example 1, the relative dielectric constant is 605 and the capacitance change rate is -22.8%. Therefore, Comparative Example 1 is a defective product. Here, the value of the cubic crystal ratio of Comparative Example 1 is a value roughly in the middle of the cubic crystal ratio of Example 1 and the cubic crystal ratio of Example 2. Nevertheless, Comparative Example 1 is a defective product, which can be considered to be because the value of the average particle size is large. In addition, the average particle size of Example 2 is 69nm, but Example 2 is a qualified product. Therefore, it can be said that it is desirable that the average particle size is less than 70nm.

[0093] In Comparative Example 2, the average particle size was 28 nm, and the cubic crystal ratio was 43%. In Comparative Example 2, the relative dielectric constant was 363, and the capacitance change rate was -8.6%. Therefore, Comparative Example 2 was a defective product.

[0094] In Comparative Example 3, the average particle size is 51 nm and the cubic crystal ratio is 76%. In Comparative Example 3, the relative dielectric constant is 389 and the capacitance change rate is -8.4%. Therefore, Comparative Example 3 is a defective product. The cubic crystal exhibits paraelectricity, while the tetragonal crystal exhibits ferroelectricity. In Comparative Example 3, the cubic crystal ratio is high. Therefore, good DC bias characteristics can be obtained, but on the other hand, the relative dielectric constant is small, and sufficient capacitance cannot be obtained compared with the embodiment as a qualified product.

[0095] In Comparative Example 4, the average particle size was 46 nm, and the cubic crystal ratio was 23%. In Comparative Example 4, the relative dielectric constant was 501, and the capacitance change rate was -21.9%. Therefore, Comparative Example 4 was a defective product.

[0096] Conventional Examples 1 to 3 are examples of conventional general laminated ceramic capacitors, using hydrothermal synthesized powder at 250°C and 25 MPa. In these conventional examples, the average particle size is larger than the range set in the present invention, and the proportion of cubic crystals is smaller than the range set in the present invention. Therefore, although a high relative dielectric constant can be obtained, the capacitance change rate is greatly reduced compared to -20%, and therefore, it is evaluated as unqualified.

[0097] In the above embodiment, the multilayer ceramic capacitor 10 is described as an example of a multilayer ceramic electronic component, but the present invention can be applied to all multilayer ceramic electronic components formed by stacking dielectric layers and internal electrodes. Examples of such multilayer ceramic electronic components include chip varistors and chip thermistors.

Claims

1. A laminated ceramic electronic component, characterized in that: A main body including internal electrode layers and dielectric layers alternately stacked, In the particles forming the dielectric layer sandwiched by the internal electrode layers, the proportion of cubic crystals is 25 mass % or more and 75 mass % or less, The average particle diameter of the particles forming the dielectric layer sandwiched by the internal electrode layers is 30 nm or more and 70 nm or less.

2. The multilayer ceramic electronic component according to claim 1, wherein: The presence ratio of cubic crystals in the particles is 35 mass % or more and less than 65 mass %.

3. The multilayer ceramic electronic component according to claim 1, wherein: The particles forming the dielectric layer include a core portion mainly composed of tetragonal crystals and a shell portion mainly composed of cubic crystals surrounding the core portion.

4. The multilayer ceramic electronic component according to claim 1, wherein: The existence ratio (%) of the cubic crystals is: after crushing the capacitor part composed of the internal electrode and the dielectric layer existing between the stacked internal electrodes, the powdered measurement sample obtained by crushing is analyzed by X-ray analysis, and the obtained X-ray diffraction pattern is fitted by Rietveld analysis using a multiphase model composed of the cubic crystals and the tetragonal crystals. When the total of the cubic crystals and the tetragonal crystals is set to 100%, the value obtained by calculating the respective ratios (mass %) of the cubic crystals and the tetragonal crystals is obtained.

5. The multilayer ceramic electronic component according to claim 1, wherein: The dielectric layer contains at least one element of Mg, Ho, Yb, Er and Mn.

6. The multilayer ceramic electronic component according to claim 1, wherein: The particles constituting the dielectric layer contain: at least one element of Ba, Sr and Ca; and at least one element of Ti, Zr and Hf, and the combined atomic ratio (at%) of Ba, Sr and Ca is greater than 1.020 times or less than 0.96 times the combined atomic ratio (at%) of Ti, Zr and Hf.

7. A method for manufacturing a laminated ceramic electronic component, characterized in that: include: A step of obtaining a ceramic slurry, wherein the ceramic slurry comprises a ceramic powder synthesized by a hydrothermal synthesis method, wherein the ceramic powder comprises a core portion mainly composed of tetragonal crystals and a shell portion mainly composed of cubic crystals surrounding the core portion; A step of making a green sheet using the ceramic slurry; a step of forming a laminated body in which the green sheets and the metal conductive layers are alternately laminated; and The step of forming a dielectric layer from the ceramic powder by firing the laminated body, The hydrothermal synthesis method is carried out in a synthesis environment with a pressure of 600 hPa to 2000 hPa and a temperature of 60° C. to 120° C.

8. The method for manufacturing a laminated ceramic electronic component according to claim 7, wherein: The ceramic powder has an average particle size of 20 nm to 50 nm, and contains BaTiO3.

9. The method for manufacturing a laminated ceramic electronic component according to claim 7, wherein: The ceramic powder is synthesized in the synthesis environment within more than 30 minutes and less than 100 hours.

10. The method for manufacturing a multilayer ceramic electronic component according to claim 7, wherein: The step of obtaining the ceramic slurry includes the step of adding a particle growth inhibiting additive to the ceramic powder for inhibiting the growth of particles contained in the ceramic powder.

11. The method for manufacturing a laminated ceramic electronic component according to claim 10, wherein: The particle growth inhibiting additive is at least one element selected from the group consisting of Mg, Ho, Yb, Er and Mn.

12. The method for manufacturing a laminated ceramic electronic component according to claim 7, wherein: The ceramic powder contains: at least one element of Ba, Sr and Ca; and at least one element of Ti, Zr and Hf, and the combined atomic ratio (at%) of Ba, Sr and Ca is greater than 1.020 times or less than 0.96 times the combined atomic ratio (at%) of Ti, Zr and Hf.

13. The method for manufacturing a multilayer ceramic electronic component according to claim 12, wherein: When the combined atomic ratio (at%) of Ba, Sr and Ca is greater than 1.020 times the combined atomic ratio (at%) of Ti, Zr and Hf, the combined atomic ratio (at%) of Ba, Sr and Ca is less than 1.100 times the combined atomic ratio (at%) of Ti, Zr and Hf.

14. The method for manufacturing a laminated ceramic electronic component according to claim 12, wherein: When the combined atomic ratio (at%) of Ba, Sr and Ca is less than 0.96 times the combined atomic ratio (at%) of Ti, Zr and Hf, the combined atomic ratio (at%) of Ba, Sr and Ca is more than 0.900 times the combined atomic ratio (at%) of Ti, Zr and Hf.

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