Resistance-type attenuator structure capable of being accurately regulated and controlled and preparation method thereof

Abstract

The invention relates to a resistance-type attenuator structure capable of being accurately regulated and controlled and a preparation method of the resistance-type attenuator structure. The attenuator comprises a substrate, a microstrip layer and a resistive layer, wherein the microstrip layer and the resistive layer are arranged on the substrate; the base adopts a ceramic substrate; the resistance layer is arranged at the middle position of the front surface of the substrate; the micro-strip layer comprises a first micro-strip pattern, a second micro-strip pattern, a third micro-strip pattern and a fourth micro-strip pattern which are arranged on the front face of the substrate. The resistance layer is arranged at the middle position of the front surface of the substrate; the resistance layer comprises a first resistance pattern, a second resistance pattern, a third resistance pattern and a fourth resistance pattern which are arranged on the front face of the substrate. According to the resistance-type attenuator structure capable of being accurately regulated and controlled, the resistance value of the resistor can be accurately controlled through a method of controlling the thickness of the resistance layer, so that accurate regulation and control of input / output impedance and an attenuation value can be realized in a limited space, the impedance matching requirement of the attenuator is met, the standing-wave ratio of the attenuator is reduced, and the performance of the attenuator is improved. And the attenuation precision is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of precisely adjustable resistive attenuator structures, and in particular to a precisely adjustable resistive attenuator structure and a preparation method thereof. Background Art

[0002] In microwave transmission and reception systems, there is a safety or normal requirement for the signal level. Too high a level will cause overload, causing intolerable nonlinear distortion or even burning of the amplifying components, thus making the entire system inoperable. The attenuator can adjust the signal level to the required level. The attenuator plays an irreplaceable role in adjusting the gain of the microwave transmission and reception system and is widely used in microwave transmission and reception systems.

[0003] According to the different components that make up the attenuator, the attenuator can be divided into active attenuators and passive attenuators. As a kind of passive attenuator, the precisely adjustable resistive attenuator structure has been more and more widely used due to its advantages such as high reliability, high precision, and high frequency response. According to different assembly and use methods, the precisely adjustable resistive attenuator structure can be divided into SMD attenuators and gold wire bonding attenuators. Compared with gold wire bonding attenuators, SMD attenuators have smaller high-frequency parasitic effects and simpler assembly methods, so their application range is wider. However, with the increase in the frequency of use, users have put forward higher and higher requirements on the performance of attenuators.

[0004] Therefore, how to meet the impedance matching requirements of the attenuator, reduce the standing wave ratio of the attenuator, and improve the attenuation accuracy has become a problem that needs to be solved urgently in the industry. Summary of the invention

[0005] In order to solve the deficiencies in the prior art, an object of the present invention is to provide a precisely controllable resistive attenuator structure and a preparation method thereof.

[0006] To achieve the above object, the present invention adopts the following technical solutions:

[0007] In a first aspect of the present invention, a precisely controllable resistive attenuator structure is disclosed. The attenuator comprises a substrate and a microstrip layer and a resistive layer arranged on the substrate; the substrate is a ceramic substrate.

[0008] The microstrip layer includes a first microstrip pattern, a second microstrip pattern, a third microstrip pattern, a fourth microstrip pattern and a fifth microstrip pattern arranged on the front surface of the substrate; the resistance layer is arranged at the middle position of the front surface of the substrate.

[0009] The resistance layer includes a first resistance pattern, a second resistance pattern, a third resistance pattern, and a fourth resistance pattern disposed on the front surface of the substrate.

[0010] The fifth microstrip pattern is located in the middle of the front side of the substrate; the first resistor pattern is arranged on the rear side of the fifth microstrip pattern, the second resistor pattern and the third resistor pattern are arranged on the left and right sides of the fifth microstrip pattern respectively, and the fourth resistor pattern is arranged on the front side of the fifth microstrip pattern; the first microstrip pattern is arranged on the left side of the second resistor pattern, and the second microstrip pattern is arranged on the right side of the third resistor pattern; the third microstrip pattern is arranged on the rear side of the first resistor pattern, and the fourth microstrip pattern is arranged on the front side of the fourth resistor pattern.

[0011] As a further improvement of the above technical solution, the widths of the first microstrip pattern, the second microstrip pattern, the fifth microstrip pattern, the second resistor pattern and the third resistor pattern are equal, and the sum of their lengths is equal to the length of the substrate.

[0012] As a further improvement of the above technical solution, the widths of the first resistor pattern, the fourth resistor pattern and the fifth microstrip pattern are equal.

[0013] As a further improvement of the above technical solution, the sum of the widths of the first resistor pattern, the fourth resistor pattern, the third microstrip pattern, the fourth microstrip pattern and the fifth microstrip pattern is equal to the width of the substrate.

[0014] As a further improvement of the above technical solution, the lengths of the third microstrip pattern and the fourth microstrip pattern are both equal to the length of the substrate.

[0015] As a further improvement of the above technical solution, the substrate adopts an alumina ceramic substrate with a thickness of 0.38 mm and a purity of 99.6%.

[0016] As a further improvement of the above technical solution, the microstrip layer has a symmetrical structure of input / output ports.

[0017] As a further improvement of the above technical solution, the microstrip layer is a titanium / copper / nickel / gold microstrip layer, wherein the thickness of the titanium layer is 0.2-0.3 μm, the thickness of the copper layer is 3-5 μm, the thickness of the nickel layer is 0.2-0.3 μm, and the thickness of the gold layer is 0.3-0.5 μm.

[0018] As a further improvement of the above technical solution, the resistance layer is made of TaN material, and its thickness can be adjusted according to product requirements. By controlling the thickness of the resistance layer, the resistance value of each resistor in the resistance layer is accurately controlled so that the input / output impedance meets the requirement of 50±1Ω.

[0019] In a second aspect of the present invention, a method for preparing the above-mentioned precisely controllable resistive attenuator structure is disclosed. The method comprises the following steps:

[0020] S1. Preparation of the substrate of the attenuator unit

[0021] A ceramic substrate is selected as the base of the attenuator unit, and an electronic cleaning agent is used to clean the ceramic substrate;

[0022] S2. Preparation of microstrip patterns

[0023] A layer of titanium is sputtered on the front side of the ceramic substrate by using a vacuum coating process, and a corresponding microstrip pattern is produced on the front side of the ceramic substrate by using a photolithography process;

[0024] S3, electroplating thickened microstrip pattern

[0025] The surface of the titanium layer of the ceramic substrate is electroplated with copper / nickel / gold by an electroplating process to thicken the microstrip pattern;

[0026] S4. Preparation of resistance layer for the first time

[0027] A second resistor pattern and a third resistor pattern are formed on the front side of the ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front side of the ceramic substrate by using a vacuum coating process; a photoresist on the front side of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the second resistor pattern and the third resistor pattern are located are removed by using a stripping process, and the tantalum nitride TaN at the position where the second resistor pattern and the third resistor pattern are located is retained, and the resistor layer in the area where the second resistor pattern and the third resistor pattern are located is completed;

[0028] S5. Second preparation of resistance layer

[0029] A first resistor pattern is formed on the front of the ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front of the ceramic substrate by using a vacuum coating process as a resistor layer; a stripping process is used to remove the photoresist on the front of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the first resistor pattern is located, and the tantalum nitride TaN at the position where the first resistor pattern is located is retained, and the resistor layer in the area where the first resistor pattern is located is completed;

[0030] S6. Preparation of the resistance layer for the third time

[0031] A fourth resistor pattern is formed on the front side of the ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front side of the ceramic substrate by using a vacuum coating process as a resistor layer; a photoresist on the front side of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the fourth resistor pattern is located are removed by using a stripping process, and the tantalum nitride TaN at the location of the fourth resistor pattern is retained, and the resistor layer in the area where the fourth resistor pattern is located is completed;

[0032] S7, attenuator unit cutting

[0033] The attenuator units obtained through the processing of steps S1 to S6 are cut by a dicing process to obtain a plurality of attenuators, and the preparation of the attenuator is completed.

[0034] Compared with the prior art, the advantages of the present invention are:

[0035] The present invention proposes a precisely controllable resistive attenuator structure and a preparation method thereof. By controlling the thickness of the resistor layer, the resistance value of each resistor in the resistor layer is precisely controlled, thereby achieving precise control of the input / output impedance and attenuation value in a limited space, meeting the impedance matching requirements of the attenuator, reducing the standing wave ratio of the attenuator, and improving the attenuation accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a front view of the precisely adjustable resistive attenuator structure of the present invention;

[0037] Figure 2 It is a cross-sectional view of the precisely adjustable resistive attenuator structure of the present invention.

[0038] in:

[0039] 1. first microstrip pattern, 2. second microstrip pattern, 3. third microstrip pattern, 4. fourth microstrip pattern, 5. fifth microstrip pattern, 6. first resistor pattern, 7. second resistor pattern, 8. third resistor pattern, 9. fourth resistor pattern, 10. substrate. DETAILED DESCRIPTION

[0040] The present invention will be further described below in conjunction with the accompanying drawings:

[0041] like Figure 1 and Figure 2 A precisely controllable resistive attenuator structure is shown, the attenuator comprises a substrate 10, a microstrip layer arranged on the substrate 10 and a resistor layer arranged on the substrate 10. The substrate 10 adopts a 99.6% alumina ceramic substrate. The ceramic substrate of this material can provide extremely high thermal stability and electrical insulation, which is particularly important for high-frequency circuits, thereby effectively reducing parasitic capacitance and signal loss. The microstrip layer is a titanium / copper / nickel / gold (Ti / Cu / Ni / Au) microstrip layer, adopting a Ti / Cu / Ni / Au multilayer structure, titanium as an adhesion layer, nickel as an anti-diffusion layer, copper providing the main conductive path, and gold ensuring good contact resistance and corrosion resistance. The resistor layer is a tantalum nitride (TaN) resistor layer. Tantalum nitride (TaN) is a high-temperature stable material with good chemical stability, suitable as a precision resistor material, and its resistance value can be adjusted by thickness to meet specific design requirements.

[0042] like Figure 1 and Figure 2 As shown, the microstrip layer includes a first microstrip pattern 1, a second microstrip pattern 2, a third microstrip pattern 3, a fourth microstrip pattern 4 and a fifth microstrip pattern 5 arranged on the front side of the substrate 10; the resistor layer is arranged at the middle position of the front side of the substrate 10; the resistor layer includes a first resistor pattern 6, a second resistor pattern 7, a third resistor pattern 8 and a fourth resistor pattern 9 arranged on the front side of the substrate 10; the fifth microstrip pattern 5 is located in the middle of the front side of the substrate 10; the first resistor pattern 6 is arranged on the rear side of the fifth microstrip pattern 5, the second resistor pattern 7 and the third resistor pattern 8 are respectively arranged on the left and right sides of the fifth microstrip pattern 5, and the fourth resistor pattern 9 is arranged on the front side of the fifth microstrip pattern 5; the first microstrip pattern 1 is arranged on the left side of the second resistor pattern 7, and the second microstrip pattern 2 is arranged on the right side of the third resistor pattern 8; the third microstrip pattern 3 is arranged on the rear side of the first resistor pattern 6, and the fourth microstrip pattern 4 is arranged on the front side of the fourth resistor pattern 9.

[0043] As a further improvement of the above technical solution, the widths of the first microstrip pattern 1, the second microstrip pattern 2, the fifth microstrip pattern 5, the second resistor pattern 7 and the third resistor pattern 8 are equal, and the sum of their lengths is equal to the length of the substrate 10. The widths of the first resistor pattern 6, the fourth resistor pattern 9 and the fifth microstrip pattern 5 are equal. The sum of the widths of the first resistor pattern 6, the fourth resistor pattern 9, the third microstrip pattern 3, the fourth microstrip pattern 4 and the fifth microstrip pattern 5 is equal to the width of the substrate 10. The lengths of the third microstrip pattern 3 and the fourth microstrip pattern 4 are both equal to the length of the substrate 10. There are clear regulations on the width, length and thickness of each component in the microstrip layer and the resistor layer, which is not only to meet the requirements of physical space, but more importantly to accurately control the electrical performance of the attenuator and ensure that the input / output impedance meets the standard of 50±1Ω.

[0044] The layout of the microstrip pattern and the resistor pattern of the attenuator described in the present invention on the substrate is carefully designed to achieve specific electrical characteristics. For example, the fifth microstrip pattern is located in the center of the substrate and is surrounded by four resistor patterns. This arrangement is to optimize the signal path and impedance matching. In addition, the first, second, and fifth microstrip patterns and the second and third resistor patterns have equal widths, which helps to ensure the symmetry and consistency of the input / output ports. The special arrangement of the microstrip pattern and the resistor pattern helps to minimize parasitic effects and ensure that the signal path is as short and straight as possible, thereby reducing phase delay and insertion loss. The symmetrical structure not only improves mechanical stability, but also enhances electrical symmetry, which is essential for maintaining balanced signal transmission.

[0045] As a further improvement of the above technical solution, the substrate 10 adopts an alumina ceramic substrate with a thickness of 0.38 mm and a purity of 99.6%.

[0046] As a further improvement of the above technical solution, the microstrip layer has a symmetrical structure of input / output ports.

[0047] As a further improvement of the above technical solution, the microstrip layer is a titanium / copper / nickel / gold microstrip layer, wherein the thickness of the titanium layer is 0.2-0.3 μm, the thickness of the copper layer is 3-5 μm, the thickness of the nickel layer is 0.2-0.3 μm, and the thickness of the gold layer is 0.3-0.5 μm.

[0048] As a further improvement of the above technical solution, the resistance layer is made of TaN material, and its thickness can be adjusted according to product requirements. By controlling the thickness of the resistance layer, the resistance value of each resistor in the resistance layer is accurately controlled so that the input / output impedance meets the requirement of 50±1Ω.

[0049] The method for preparing the above-mentioned precisely controllable resistive attenuator structure comprises the following steps:

[0050] S1. Preparation of the substrate of the attenuator unit

[0051] A ceramic substrate is selected as the substrate of the attenuator unit, and an electronic cleaning agent is used to clean the ceramic substrate. Specifically, a 99.6% alumina ceramic substrate is selected as the substrate material, which has excellent electrical insulation and thermal stability. The electronic cleaning agent is used to deeply clean the ceramic substrate to remove surface contaminants and impurities to ensure the quality of the subsequent coating process.

[0052] S2. Preparation of microstrip patterns

[0053] A layer of titanium is sputtered on the front of the ceramic substrate using a vacuum coating process, and the corresponding microstrip pattern is produced on the front of the ceramic substrate using a photolithography process. A layer of titanium is deposited on the front of the ceramic substrate using a magnetron sputtering process in vacuum coating as the bottom metal to enhance the adhesion between the subsequent metal layer and the ceramic substrate. The desired microstrip pattern position is defined by a photolithography process, i.e., applying a photosensitive material (photoresist), and then using a mask for exposure and development.

[0054] S3, electroplating thickened microstrip pattern

[0055] The electroplating process is used to electroplate copper / nickel / gold on the surface of the titanium layer of the ceramic substrate to thicken the microstrip pattern. Copper provides the main conductive path, nickel is used to prevent copper from diffusing into other layers, and gold ensures good contact resistance and corrosion resistance.

[0056] S4. Preparation of resistance layer for the first time

[0057] A second resistor pattern and a third resistor pattern are formed on the front side of a ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front side of the ceramic substrate by using a vacuum coating process; a stripping process is used to remove the photoresist on the front side of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the second resistor pattern and the third resistor pattern are located, and the tantalum nitride TaN at the position where the second resistor pattern and the third resistor pattern are located is retained, and the resistor layer in the area where the second resistor pattern and the third resistor pattern are located is completed.

[0058] S5. Second preparation of resistance layer

[0059] A first resistor pattern is produced on the front side of a ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front side of the ceramic substrate by using a vacuum coating process as a resistor layer; a stripping process is used to remove the photoresist on the front side of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the first resistor pattern is located, and the tantalum nitride TaN at the location of the first resistor pattern is retained, and the resistor layer in the area where the first resistor pattern is located is completed.

[0060] S6. Preparation of the resistance layer for the third time

[0061] A fourth resistor pattern is produced on the front side of the ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front side of the ceramic substrate by using a vacuum coating process as a resistor layer; a stripping process is used to remove the photoresist on the front side of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the fourth resistor pattern is located, and the tantalum nitride TaN at the location of the fourth resistor pattern is retained, and the resistor layer in the area where the fourth resistor pattern is located is completed.

[0062] Only one or two specific resistor patterns are made each time, and the position of the tantalum nitride (TaN) resistor layer is precisely determined using photolithography. Tantalum nitride thin films are deposited in selected areas as resistor materials using vacuum coating techniques such as magnetron sputtering. Unnecessary photoresist and the corresponding TaN layer are removed using a lift-off process, leaving only the designed resistor pattern. This process needs to be repeated three times to complete the preparation of the first, second, third, and fourth resistor patterns, respectively.

[0063] S7, attenuator unit cutting

[0064] The attenuator units obtained by steps S1 to S6 are cut by a dicing process to obtain a plurality of attenuators, and the attenuator preparation is completed. The large-area composite material is divided into separate attenuator units by a precise dicing machine, and each unit includes a complete microstrip line and a resistor layer structure.

[0065] The above preparation method demonstrates a complete chain from substrate preparation to final product cutting, reflecting high-precision microelectronics manufacturing technology. Each step requires strict control of environmental conditions and technical parameters to ensure that the electrical characteristics and reliability of the final product meet the design requirements. In particular, the two key steps of photolithography and vacuum coating directly determine the dimensional accuracy and flatness of the device, thereby affecting its high-frequency performance. In addition, the entire process also involves the compatibility and interface quality between multiple different material layers, which are key factors to ensure the high performance of the product.

[0066] The following is a specific example of the preparation process of the precisely controllable resistive attenuator structure of the present invention:

[0067] (1) Using electronic cleaning agents DZ-1 and DZ-2 produced by Shandong Changcheng Electronic Cleaning Agent Co., Ltd., the ceramic substrate is cleaned. This step is to remove impurities on the surface of the substrate.

[0068] (2) A layer of titanium (Ti) is sputtered on the front side of the ceramic substrate by magnetron sputtering process, and the thickness of titanium (Ti) is 0.2-0.3 μm. The function of this step is to achieve metallization of the front side.

[0069] (3) Using positive photoresist model RZJ-280 produced by Suzhou Ruihong Electronic Materials Factory, a microstrip pattern is photoetched on the titanium (Ti) layer on the front side of the ceramic substrate. The function of this step is to photoetch and etch the microstrip pattern.

[0070] (4) A copper sulfate / nickel sulfamate / gold sulfite plating solution system is used to electroplate a layer of copper (Cu) / nickel (Ni) / gold (Au) on the microstrip pattern, and the thickness of copper (Cu) / nickel (Ni) / gold (Au) is 3-5 μm / 0.2-0.3 μm / 0.3-0.5 μm respectively. The purpose of this step is to electroplate copper (Cu) / nickel (Ni) / gold (Au) to thicken the microstrip pattern to meet the use requirements.

[0071] (5) Using negative photoresist model RFJ-210 produced by Suzhou Ruihong Electronic Materials Factory, photoetch the resistor pattern (region II, region III) on the front side of the ceramic substrate. The purpose of this step is to cover the area outside the resistor pattern (region II, region III) with photoresist.

[0072] (6) A layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate by magnetron sputtering process, and the square resistance of tantalum nitride (TaN) is controlled to be 50±1Ω / □. The function of this step is to make a resistance layer.

[0073] (7) Use RBL-2203 stripping solution produced by Suzhou Ruihong Electronic Materials Factory to strip the photoresist on the front side of the ceramic substrate. This step removes the photoresist and the tantalum nitride TaN on its surface, leaving the tantalum nitride TaN in the area II and area III.

[0074] (8) Using negative photoresist model RFJ-210 produced by Suzhou Ruihong Electronic Materials Factory, photoetch a resistor pattern (region I) on the front side of the ceramic substrate. The purpose of this step is to cover the area outside the resistor pattern (region I) with photoresist.

[0075] (9) A layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate by magnetron sputtering process, and the square resistance of tantalum nitride (TaN) is controlled to be 100±2Ω / □. The function of this step is to make a resistance layer.

[0076] (10) Use RBL-2203 stripping solution produced by Suzhou Ruihong Electronic Materials Factory to strip the photoresist on the front side of the ceramic substrate. This step removes the photoresist and the tantalum nitride TaN on its surface, leaving the tantalum nitride TaN in the region I.

[0077] (11) Using negative photoresist model RFJ-210 produced by Suzhou Ruihong Electronic Materials Factory, photoetch a resistor pattern (region IV) on the front side of the ceramic substrate. The purpose of this step is to cover the area outside the resistor pattern (region IV) with photoresist.

[0078] (12) A layer of tantalum nitride (TaN) is sputtered on the front side of the ceramic substrate by magnetron sputtering process, and the square resistance of tantalum nitride (TaN) is controlled at 200±4Ω / □. The function of this step is to make a resistance layer.

[0079] (13) Use RBL-2203 stripping solution produced by Suzhou Ruihong Electronic Materials Factory to strip the photoresist on the front side of the ceramic substrate. This step removes the photoresist and the tantalum nitride TaN on its surface, leaving the tantalum nitride TaN in the region IV.

[0080] (14) Cut the attenuator unit with a grinding wheel to form a final attenuator product. The purpose of this step is to separate the attenuator unit.

[0081] The above-described embodiments are merely descriptions of preferred implementations of the present invention and are not intended to limit the scope of the present invention. Without departing from the design spirit of the present invention, various modifications and improvements made to the technical solutions of the present invention by ordinary technicians in this field should all fall within the scope of protection determined by the claims of the present invention.

Claims

1. A precisely controllable resistive attenuator structure, characterized in that: The attenuator comprises a substrate (10) and a microstrip layer and a resistance layer arranged on the substrate (10); The substrate (10) is a ceramic substrate; The microstrip layer comprises a first microstrip pattern (1), a second microstrip pattern (2), a third microstrip pattern (3), a fourth microstrip pattern (4) and a fifth microstrip pattern (5) arranged on the front side of the substrate (10); The resistance layer is arranged at the middle position of the front side of the substrate (10); the resistance layer comprises a first resistance pattern (6), a second resistance pattern (7), a third resistance pattern (8) and a fourth resistance pattern (9) arranged on the front side of the substrate (10); The fifth microstrip pattern (5) is located in the middle of the front side of the substrate (10); the first resistor pattern (6) is arranged on the rear side of the fifth microstrip pattern (5); the second resistor pattern (7) and the third resistor pattern (8) are arranged on the left and right sides of the fifth microstrip pattern (5), respectively; and the fourth resistor pattern (9) is arranged on the front side of the fifth microstrip pattern (5); The first microstrip pattern (1) is arranged on the left side of the second resistor pattern (7), and the second microstrip pattern (2) is arranged on the right side of the third resistor pattern (8); the third microstrip pattern (3) is arranged on the rear side of the first resistor pattern (6), and the fourth microstrip pattern (4) is arranged on the front side of the fourth resistor pattern (9).

2. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The widths of the first microstrip pattern (1), the second microstrip pattern (2), the fifth microstrip pattern (5), the second resistor pattern (7) and the third resistor pattern (8) are equal, and the sum of their lengths is equal to the length of the substrate (10).

3. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The first resistor pattern (6), the fourth resistor pattern (9) and the fifth microstrip pattern (5) have the same width.

4. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The sum of the widths of the first resistor pattern (6), the fourth resistor pattern (9), the third microstrip pattern (3), the fourth microstrip pattern (4) and the fifth microstrip pattern (5) is equal to the width of the substrate (10).

5. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The lengths of the third microstrip pattern (3) and the fourth microstrip pattern (4) are both equal to the length of the substrate (10).

6. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The substrate (10) is an aluminum oxide ceramic substrate with a thickness of 0.38 mm and a purity of 99.6%.

7. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The microstrip layer has a symmetrical structure of input / output ports.

8. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The microstrip layer is a titanium / copper / nickel / gold microstrip layer, wherein the thickness of the titanium layer is 0.2-0.3 μm, the thickness of the copper layer is 3-5 μm, the thickness of the nickel layer is 0.2-0.3 μm, and the thickness of the gold layer is 0.3-0.5 μm.

9. The precisely controllable resistive attenuator structure according to claim 1, characterized in that: The resistor layer is made of TaN material, and its thickness can be adjusted according to product requirements. By controlling the thickness of the resistor layer, the resistance value of each resistor in the resistor layer is accurately controlled so that the input / output impedance meets the requirement of 50±1Ω.

10. A method for preparing a precisely controllable resistive attenuator structure according to any one of claims 1 to 9, characterized in that: The method comprises the following steps: S1. Preparation of the substrate of the attenuator unit A ceramic substrate is selected as the base of the attenuator unit, and an electronic cleaning agent is used to clean the ceramic substrate; S2. Preparation of microstrip patterns A layer of titanium is sputtered on the front side of the ceramic substrate by using a vacuum coating process, and a corresponding microstrip pattern is produced on the front side of the ceramic substrate by using a photolithography process; S3, electroplating thickened microstrip pattern The surface of the titanium layer of the ceramic substrate is electroplated with copper / nickel / gold by an electroplating process to thicken the microstrip pattern; S4. Preparation of resistance layer for the first time A second resistor pattern and a third resistor pattern are formed on the front side of the ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front side of the ceramic substrate by using a vacuum coating process; a photoresist on the front side of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the second resistor pattern and the third resistor pattern are located are removed by using a stripping process, and the tantalum nitride TaN at the position where the second resistor pattern and the third resistor pattern are located is retained, and the resistor layer in the area where the second resistor pattern and the third resistor pattern are located is completed; S5. Second preparation of resistance layer A first resistor pattern is formed on the front of the ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front of the ceramic substrate by using a vacuum coating process as a resistor layer; a stripping process is used to remove the photoresist on the front of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the first resistor pattern is located, and the tantalum nitride TaN at the position where the first resistor pattern is located is retained, and the resistor layer in the area where the first resistor pattern is located is completed; S6. Preparation of the resistance layer for the third time A fourth resistor pattern is formed on the front side of the ceramic substrate by using a photolithography process, and a layer of tantalum nitride TaN is sputtered on the front side of the ceramic substrate by using a vacuum coating process as a resistor layer; a photoresist on the front side of the ceramic substrate and the tantalum nitride TaN on the surface of the ceramic substrate except for the area where the fourth resistor pattern is located are removed by using a stripping process, and the tantalum nitride TaN at the location of the fourth resistor pattern is retained, and the resistor layer in the area where the fourth resistor pattern is located is completed; S7, attenuator unit cutting The attenuator units obtained through steps S1 to S6 are cut by a dicing process to obtain a plurality of attenuators, and the preparation of the attenuator is completed.

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