Voltage control circuitry enabling high voltage compatible rectifier for wireless charging

Abstract

The invention relates to voltage control circuitry enabling a high voltage compatible rectifier for wireless charging. The present disclosure provides a bridge rectifier circuit and a wireless power receiver configured to receive a high voltage AC input and generate a stable DC voltage without exposing bridge rectifier circuitry components to destructive high voltages. An example bridge rectifier includes a plurality of rectification transistors positioned to generate a DC voltage upon receiving an AC current. The example bridge rectifier circuitry also includes voltage control circuitry designed to output an intermediate voltage to terminals of one or all of the rectification transistors of the bridge rectifier. The output intermediate voltage prevents a voltage difference across terminals of the rectifier transistor from exceeding a maximum voltage rating of the rectifier transistor.

Description

Technical Field

[0001] Embodiments of the present disclosure relate generally to bridge rectifier circuitry, and more particularly, to bridge rectifier circuitry configured to receive a high alternating current (AC) input voltage. Background Art

[0002] In general, a wireless power receiver is configured to receive AC power from a wireless power transmission coil. The wireless power receiver includes a bridge rectifier circuit system that is configured to receive the transmitted AC power and generate a direct current (DC) voltage that can be used by an electronic device. The bridge rectifier circuit system may include one or more transistor components. The transistor component may be manufactured according to a maximum voltage rating. The maximum voltage rating establishes the maximum potential difference that can exist at each terminal on the transistor component. A potential difference or voltage at or near the maximum voltage rating may damage the transistor component, particularly when the transistor component is exposed to a voltage difference at or near the maximum voltage rating for a long time.

[0003] Applicants have identified a number of technical challenges and difficulties associated with receiving high AC input voltages at a bridge rectifier. Through effort, ingenuity and innovation, Applicants have solved the problems associated with protecting transistor components of a bridge rectifier from AC input voltages that exceed the maximum voltage rating of one or more of the transistor components by developing the solutions embodied in the present disclosure, which are described in detail below. Summary of the invention

[0004] Various embodiments relate to an example bridge rectifier circuit and a wireless power receiver including the bridge rectifier circuit, which is compatible with receiving a high voltage AC input and generating a stable DC voltage without exposing the bridge rectifier circuit system components to damaging high voltages. An example bridge rectifier circuit is provided. In some embodiments, the example bridge rectifier includes: a plurality of rectifier transistors; and a voltage control circuit system configured to output an intermediate voltage to the terminals of the rectifier transistors. In some embodiments, the intermediate voltage prevents the voltage difference across the terminals from exceeding the maximum voltage rating of the rectifier transistors.

[0005] In some embodiments, an alternating current is received across a first AC input and a second AC input, the bridge rectifier circuit further comprising a high-side portion comprising a first high-side transistor and a second high-side transistor, wherein the high-side portion is configured to generate a DC voltage. In some embodiments, the bridge rectifier circuit further comprises a low-side portion comprising a first low-side transistor and a second low-side transistor, wherein the low-side portion is configured to be connected to an electrical ground reference.

[0006] In some embodiments, the first high-side voltage control circuitry is electrically connected to a terminal of the first high-side transistor, and the second high-side voltage control circuitry is electrically connected to a terminal of the second high-side transistor.

[0007] In some embodiments, the first high-side transistor is configured in a diode configuration, wherein a drain terminal of the first high-side transistor is electrically connected to a gate terminal of the first high-side transistor.

[0008] In some embodiments, the first high-side voltage control circuit system is electrically connected to the source terminal of the first high-side transistor, wherein the first high-side voltage control circuit system generates a first high-side intermediate voltage at the source terminal of the first high-side transistor based at least in part on the first AC input and the DC voltage.

[0009] In some embodiments, when the first AC input is lower than a minimum input voltage, the first high-side voltage control circuit system generates a first high-side intermediate voltage at a source terminal of the first high-side transistor, wherein a difference between the first AC input and the first high-side intermediate voltage is less than a first high-side maximum voltage rating of the first high-side transistor.

[0010] In some embodiments, the first high-side voltage control circuitry exhibits a negligible voltage drop across the first high-side voltage control circuitry when the first AC input is above the maximum output voltage.

[0011] In some embodiments, the first high side voltage control circuit system includes a first high side voltage control transistor, wherein a drain terminal of the first high side voltage control transistor is electrically connected to a drain terminal of the first high side transistor; wherein a source terminal of the first high side voltage control transistor is electrically connected to a DC voltage; and wherein a gate terminal of the first high side voltage control transistor is configured to receive a first modified AC component voltage based at least in part on a first AC input and a DC voltage.

[0012] In some embodiments, the first modified AC component voltage remains above a minimum high-side voltage control transistor voltage.

[0013] In some embodiments, the gate minimum voltage generator circuitry generates the gate minimum voltage based at least in part on a voltage difference between a DC voltage and electrical ground.

[0014] In some embodiments, the minimum high side voltage control transistor voltage is based at least in part on a gate minimum voltage that is generated at least in part based on a DC voltage.

[0015] In some embodiments, the first high side voltage control circuitry further includes an intermediate voltage discharge circuitry configured to discharge the first high side intermediate voltage based at least in part on the first AC input.

[0016] In some embodiments, the first modified AC component voltage is generated by modified AC component generator circuitry.

[0017] In some embodiments, the first modified AC component generator circuitry generates a first modified AC component voltage based at least in part on a gate minimum voltage generated by the gate minimum voltage generator circuitry, a first AC input, and a first bulk voltage generated by the bulk voltage generator circuitry.

[0018] In some embodiments, the first drain low side voltage control circuit system is electrically connected to the drain terminal of the second low side transistor and the first AC input, wherein the first gate low side voltage control circuit system is electrically connected to the gate terminal of the second low side transistor and the second AC input, wherein the second drain low side voltage control circuit system is electrically connected to the drain terminal of the first low side transistor and is electrically connected to the second AC input, and wherein the second gate low side voltage control circuit system is electrically connected to the gate terminal of the first low side transistor and is electrically connected to the first AC input.

[0019] In some embodiments, the first drain low side voltage control circuitry is configured to generate a first drain low side intermediate voltage at a drain of the second low side transistor based at least in part on the first AC input and the DC voltage.

[0020] In some embodiments, the first drain low side voltage control circuit system generates a first drain low side intermediate voltage such that a voltage difference between a drain terminal of the second low side transistor and a gate terminal of the second low side transistor is less than a maximum voltage rating of the second low side transistor.

[0021] In some embodiments, the first drain low side voltage control circuitry exhibits a negligible voltage drop across the first drain low side voltage control circuitry when the second AC input is greater than the first AC input.

[0022] In some embodiments, the first drain low side voltage control circuit system generates a first drain low side intermediate voltage based at least in part on a gate maximum voltage generated by a gate maximum voltage generator circuit system and a first AC input, wherein the first gate low side voltage control circuit system generates the first gate low side intermediate voltage based at least in part on the gate maximum voltage generated by the gate maximum voltage generator circuit system and a second AC input.

[0023] A wireless power receiver is also provided, including a bridge rectifier circuit configured to receive a high voltage AC input and generate a stable DC voltage without exposing the bridge rectifier circuit system components to damaging high voltages. In some embodiments, the wireless power receiver includes a wireless power receiver coil and a bridge rectifier circuit configured to receive an alternating current (AC) voltage and generate a direct current (DC) voltage. In some embodiments, the bridge rectifier circuit includes a plurality of rectifier transistors and a voltage control circuit system configured to output an intermediate voltage to terminals of the rectifier transistors, wherein the intermediate voltage prevents a voltage difference across the terminals from exceeding a maximum voltage rating of the rectifier transistors. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Reference is now made to the drawings. The components shown in the drawings may or may not be present in certain embodiments described herein. According to example embodiments of the present disclosure, some embodiments may include fewer (or more) components than shown in the drawings.

[0025] Figure 1 An example bridge rectifier circuitry having a high-side portion and a low-side portion is illustrated.

[0026] Figure 2 Illustrated are example stresses on a bridge rectifier circuitry in the event of receiving an AC voltage that exceeds the maximum voltage rating of one or more transistor components of the bridge rectifier circuit.

[0027] Figure 3 An example bridge rectifier circuit system including an example voltage control circuit system configured to relieve stress on transistor components of the example bridge rectifier circuit system is illustrated in accordance with an example embodiment of the present disclosure.

[0028] Figure 4 Illustrated is a block diagram of an example first segment of a high-side portion of an example bridge rectifier including an example first high-side voltage control circuitry in accordance with an example embodiment of the present disclosure.

[0029] Figure 5 An example circuit level diagram of an embodiment of a first high-side voltage control circuit system according to an example embodiment of the present disclosure is illustrated.

[0030] Figure 6 Illustrated is a block diagram of an example second segment of a high-side portion of an example bridge rectifier including example second high-side voltage control circuitry in accordance with example embodiments of the present disclosure.

[0031] Figure 7 An example circuit level diagram of an embodiment of a second high-side voltage control circuit system according to an example embodiment of the present disclosure is illustrated.

[0032] Figure 8 Illustrated is a block diagram of an example second segment of a low-side portion of an example bridge rectifier including example second drain low-side voltage control circuitry and example second gate low-side voltage control circuitry in accordance with example embodiments of the present disclosure.

[0033] Fig. 9 An example circuit level diagram of an embodiment of a second drain low side voltage control circuit system according to an example embodiment of the present disclosure is illustrated.

[0034] Fig.10 An example circuit level diagram of an embodiment of a second gate low side voltage control circuit system according to an example embodiment of the present disclosure is illustrated.

[0035] Fig.11 Illustrated is a block diagram of an example first segment of a low-side portion of an example bridge rectifier including example first drain low-side voltage control circuitry and example first gate low-side voltage control circuitry in accordance with example embodiments of the present disclosure.

[0036] Fig.12 An example circuit level diagram of an embodiment of a first drain low side voltage control circuit system is illustrated in accordance with an example embodiment of the present disclosure.

[0037] Fig.13 An example circuit level diagram of an embodiment of a first gate low side voltage control circuit system according to an example embodiment of the present disclosure is illustrated.

[0038] Fig.14 An example circuit level diagram of an embodiment of an intermediate voltage discharge circuit system according to an example embodiment of the present disclosure is illustrated.

[0039] Fig.15 An example graph of gate maximum voltage versus DC voltage is illustrated in accordance with an example embodiment of the present disclosure.

[0040] Fig.16 An example graph of gate minimum voltage versus DC voltage is illustrated in accordance with an example embodiment of the present disclosure.

[0041] Fig.17 A series of example modified AC component voltages are illustrated in accordance with example embodiments of the present disclosure. DETAILED DESCRIPTION

[0042] Example embodiments will be described more fully below with reference to the accompanying drawings, which show some, but not all, embodiments of the invention of the present disclosure. Indeed, embodiments of the present disclosure may be implemented in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present disclosure will satisfy applicable legal requirements. Like numbers refer to like elements throughout the text.

[0043] In general, a wireless power transmitter transmits alternating current (AC) power to a wireless power receiver using a wireless power transmission coil. The transmitted AC power is received by the wireless power receiver at the coupled wireless power receiver coil. The transmitted AC power received at the wireless power receiver coil can then be converted into DC power using a bridge rectifier and passed through a voltage regulator to produce a stable output DC voltage for the electronic device.

[0044] Many devices that receive wirelessly transmitted AC power require a compact design for the wireless power receiver. For example, a wireless power receiver may be included in a smart watch, smart phone, headset, earbuds, and similar devices. In many cases, the space requirements of the electronic device require a compact design for the wireless power receiver. The compact space requirements often limit the size of the wireless power receiver coil. To this end, many compact electronic devices are utilizing low-power wireless charging options, such as near field communication (NFC) wireless charging (WLC), to receive wireless power.

[0045] Unlike the QI wireless charging standard that requires a large coil to transfer power between devices, NFC WLC utilizes a single antenna to manage communication with the NFC receiver and transfer wireless power. In NFC WLC, the waves are modulated by the NFC reader to transfer both energy and data. In some embodiments, the transmitted AC power received at the wireless power receiver may be greater than the rated processing capacity of the wireless power receiver.

[0046] The wireless power receiver can utilize a bridge rectifier to convert the received AC power into a usable DC power. The bridge rectifier may include multiple transistor components (e.g., metal oxide semiconductor field effect transistors (MOSFETs)) to facilitate the rectification of the received AC power. In general, the transistor component includes three terminals, i.e., a source terminal, a gate terminal, and a drain terminal. The source terminal is a terminal into which current generally flows into the transistor component when enabled. The drain terminal is a point where current generally flows out of the transistor component. The gate terminal of the transistor component is used to control the flow of current between the source terminal and the drain terminal. In some embodiments, a gate terminal voltage at or near the voltage of the source terminal may be applied to turn off the transistor component and stop the flow of current from the source terminal to the drain terminal. Conversely, a gate terminal voltage that creates a voltage difference between the gate terminal and the source terminal may turn on the transistor component and allow the flow of current from the source terminal to the gate terminal.

[0047] The transistor assembly may also have a maximum voltage rating. The maximum voltage rating establishes the maximum potential difference that can exist at any set of adjacent terminals of the transistor assembly. A potential difference or voltage greater than the maximum voltage rating of the transistor assembly may damage the transistor assembly, particularly when the terminals are exposed to a voltage difference at or near the maximum voltage rating for a long period of time. The voltage range that the terminals of the transistor assembly are rated to safely withstand is often referred to as a safe operating area (SOA). For example, in some embodiments, the transistor assembly may have a maximum voltage rating of 12 volts. Therefore, the safe operating area is in the range from -12 volts to +12 volts.

[0048] Reference now Figure 1 , an example bridge rectifier circuit system 100 is provided. Figure 1 As depicted in , the example bridge rectifier circuit system 100 includes a high side portion 102 and a low side portion 104. The example high side portion 102 is configured to receive a first AC input 106 and a second AC input 108 and generate a DC voltage 110. The example high side portion 102 includes a first high side transistor 114 and a second high side transistor 116. Figure 1 As depicted in FIG. 1 , both the first high-side transistor 114 and the second high-side transistor 116 are configured in a diode configuration, which means that the drain terminals 114a, 116a of the high-side transistors 114, 116 are electrically connected to the gate terminals 114b, 116b. Figure 1 As further depicted in FIG. 1 , a source terminal 114 c of the first high-side transistor 114 and a source terminal 116 c of the second high-side transistor 116 are electrically connected to generate the DC voltage 110 .

[0049] like Figure 1As further depicted in , the low-side portion 104 of the example bridge rectifier circuit system 100 includes a first low-side transistor 118 and a second low-side transistor 120. Generally speaking, an AC input is transmitted across two conductive inputs (e.g., a first AC input 106 and a second AC input 108). For example, the potential difference between the first AC input 106 and the second AC input 108 can be sinusoidal in nature, with a maximum peak-to-peak voltage represented by the difference between the maximum positive voltage on the sinusoidal waveform and the maximum negative voltage on the sinusoidal waveform. The drain terminal 118a of the first low-side transistor 118 is electrically connected to the second AC input 108, such as Figure 1 . In addition, a gate terminal 118b of the first low-side transistor 118 is electrically connected to the first AC input 106. A source terminal 118c of the first low-side transistor 118 is electrically connected to the electrical ground 112. In contrast, a drain terminal 120a of the second low-side transistor 120 is electrically connected to the first AC input 106, and a gate terminal 120b of the second low-side transistor 120 is electrically connected to the second AC input 108. A source terminal 120c of the second low-side transistor 120 is electrically connected to the electrical ground 112.

[0050] like Figure 1 As depicted in , the example high-side portion 102 of the example bridge rectifier circuit system 100 includes two rectifier transistor components (e.g., a first high-side transistor 114, a second high-side transistor 116). The rectifier transistor component is any semiconductor device configured to control the flow of an electronic signal through the rectifier transistor component by applying or removing a voltage. In general, the rectifier transistor component includes three terminals, i.e., a source terminal, a gate terminal, and a drain terminal. The source terminal is the terminal where current generally flows into the rectifier transistor component when enabled. The drain terminal is the point where current generally flows out of the rectifier transistor component. The gate terminal of the rectifier transistor component is used to control the flow of current between the source terminal and the drain terminal.

[0051] In some embodiments, the rectifier transistor assembly can be a field effect transistor (FET) or a metal oxide semiconductor FET (MOSFET). The rectifier transistor assembly can include a p-channel or n-channel transistor. When the voltage applied to the gate of the transistor is lower than a certain generally negative threshold voltage, the p-channel transistor is configured to transmit current. Conversely, when a voltage exceeding a certain threshold voltage is applied to the gate terminal, the n-type transistor is configured to transmit current.

[0052] As depicted, both the first high-side transistor 114 and the second high-side transistor 116 are configured as a diode configuration. The rectifier transistor component is configured to act as a diode by electrically connecting a drain terminal (e.g., drain terminals 114a, 116a) with a gate terminal (e.g., gate terminals 114b, 116b). A transistor configured in a diode configuration causes the transistor to act as a two-terminal diode.

[0053] Although depicted as n-channel transistors, in situations where the peak-to-peak voltage of the AC input is constant (eg, non-RF use), one or both of the first high-side transistor 114 and the second high-side transistor 116 may be configured as p-channel transistors in a cross-coupled configuration.

[0054] like Figure 1 As further depicted in , the example low-side portion 104 of the example bridge rectifier circuit system 100 includes two rectifier transistor components (eg, a first low-side transistor 118 , a second low-side transistor 120 , and the first low-side transistor 118 ).

[0055] In some examples, an AC voltage having a peak-to-peak voltage greater than the maximum voltage rating of a rectifier transistor assembly within a bridge rectifier circuit system may be received. An AC input having a peak-to-peak AC voltage greater than the maximum voltage rating of one or more rectifier transistor assemblies (e.g., a first high-side transistor 114, a second high-side transistor 116, a first low-side transistor 118, a second low-side transistor 120) may cause a voltage difference at one or more terminals of the rectifier transistor assembly to be greater than the maximum voltage rating of the rectifier transistor assembly. A voltage difference exceeding or approaching the maximum voltage rating of the rectifier transistor assembly may have a destructive effect on the rectifier transistor assembly, thereby causing a malfunction of the rectifier transistor assembly and / or shortening the overall life of the rectifier transistor assembly.

[0056] In some embodiments, one or more rectifying transistor components (e.g., first high-side transistor 114, second high-side transistor 116, first low-side transistor 118, second low-side transistor 120) may include native transistors where the transistors do not receive threshold implants during fabrication. Figure 5 The lack of threshold injection in the intrinsic transistor may reduce the threshold voltage in the transistor compared to the transistors 568, 574, 576, 578 depicted in FIG. 1 . A transistor with an additional bar drawn in the channel may represent an intrinsic transistor. However, such transistors are not limited to intrinsic transistors. Similarly, a transistor without an additional bar drawn in the channel may represent an enhancement transistor, however, such transistors are not limited to enhancement transistors.

[0057] Reference now Figure 2, an example bridge rectifier circuit system 200 is provided, which does not have the voltage control circuit system described in the present disclosure. Figure 2 As depicted in , various terminals of a plurality of rectifying transistor components (e.g., first high-side transistor 114, second high-side transistor 116, first low-side transistor 118, second low-side transistor 120) are depicted as experiencing stress at one or more terminals of the rectifying transistor components. Figure 2 In the example depicted in , each rectifier transistor component is manufactured with a maximum voltage rating of 12 V. Therefore, any voltage difference across any terminal of the rectifier transistor component may cause stress across the terminals and may damage the rectifier transistor component.

[0058] like Figure 2 , the first AC input 106 is at 16 volts and the second AC input 108 is at 0 volts. Therefore, the first high-side transistor 114 is enabled (e.g., driving current), and the first AC input 106 is transmitted to the source terminal 114c of the first high-side transistor 114 after experiencing a voltage drop equal to the threshold voltage of the first high-side transistor 114 (e.g., 2 volts). Therefore, the voltage at the source terminal 116c of the second high-side transistor 116 is at 14 volts, while the gate terminal is at 0 volts. The 14 volt potential difference between the source terminal 116c and the gate terminal 116b of the second high-side transistor 116 exceeds the maximum voltage rating of the second high-side transistor 116, thereby causing destructive stress to the second high-side transistor 116. Without the voltage control circuit system as described herein, the second high-side transistor 116 may fail, or the life of the second high-side transistor may be shortened.

[0059] like Figure 2 As further depicted in the low-side portion 104 of the example bridge rectifier circuit system 100 depicted in FIG. 1 , in the case where the first AC input 106 is 0 volts and the second AC input 108 is 16 volts, without the voltage control circuit system as described in the present disclosure, stress may be induced on the low-side transistors (e.g., the first low-side transistor 118, the second low-side transistor 120). Figure 2, in the case where the first AC input 106 is 0 volts and the second AC input 108 is 16 volts, the drain terminal 118a of the first low-side transistor 118 is at 16 volts, and the gate terminal 118b of the first low-side transistor 118 is at 0 volts, so the potential difference between the gate terminal 118b and the drain terminal 118a is 16 volts, which is greater than the maximum voltage rating of the first low-side transistor 118 and may cause damage to the first low-side transistor 118. Similarly, the drain terminal 120a and the source terminal 120c of the second low-side transistor 120 are both at 0 volts, while the gate terminal 120b is at 16 volts, thereby generating destructive stresses between the gate terminal 120b and both the drain terminal 120a and the source terminal 120c of the second low-side transistor 120.

[0060] Various example embodiments described herein provide voltage control circuitry to prevent a transistor-based rectifier bridge from operating outside of the safe operating area (SOA) of the underlying rectifier transistor components.

[0061] In some embodiments, one or more voltage control circuit systems are electrically connected to the terminals of the rectifier transistor of the bridge rectifier circuit system to protect the terminals that are susceptible to destructive voltage differences from an AC input received with a peak-to-peak voltage greater than the voltage rating of the rectifier transistor. For example, a high-side voltage control circuit system block can be positioned between the source terminal of the high-side rectifier transistor and the associated AC input terminal. The high-side voltage control circuit system can be configured to reduce the maximum potential difference between the source terminal of the high-side rectifier transistor and the rectified DC voltage.

[0062] Additionally, in some embodiments, a drain low-side voltage control circuitry block may be positioned between a drain terminal of a low-side transistor of the bridge rectifier circuit and an associated AC input. The drain low-side voltage control circuitry may be configured to generate an intermediate voltage based on the associated AC input, thereby limiting the voltage at the drain terminal of the low-side transistor such that a voltage difference between the drain terminal and the gate terminal of the low-side transistor does not exceed a maximum voltage rating of the low-side transistor.

[0063] Similarly, in some embodiments, a gate low-side voltage control circuit system block can be positioned between a gate terminal of a low-side transistor of the bridge rectifier circuit and an associated AC input. The gate low-side voltage control circuit system can be configured to generate an intermediate voltage based on the associated AC input, thereby limiting the voltage at the gate terminal of the low-side transistor so that the voltage difference between the gate terminal and the source / drain terminal of the low-side transistor does not exceed the maximum voltage rating of the low-side transistor.

[0064] As a result of the example embodiments described herein and in some examples, the effectiveness and durability of a bridge rectifier circuit can be greatly improved. In addition, the bridge rectifier circuit can be protected from high AC voltages received from a wireless power transmitter.

[0065] Reference now Figure 3 , an example bridge rectifier circuit system 300 according to the present disclosure is provided. Figure 3 As depicted in FIG. 1 , the example bridge rectifier circuit system 300 includes a high side portion 302 and a low side portion 304. The example high side portion 302 is configured to receive the first AC input 106 and the second AC input 108 and generate a DC voltage 110. The example high side portion 302 includes a first high side transistor 114 and a second high side transistor 116. Figure 1 As depicted in FIG. 1 , both the first high-side transistor 114 and the second high-side transistor 116 are configured in a diode configuration, which means that the drain terminals 114a, 116a of the high-side transistors 114, 116 are electrically connected to the gate terminals 114b, 116b. Figure 1 As further depicted in FIG. 1 , the first high-side voltage control circuit system 330 is electrically connected to the source terminal 114 c of the first high-side transistor 114 and is configured to generate a first high-side intermediate voltage 334 based at least in part on the DC voltage 110. In addition, the second high-side voltage control circuit system 332 is electrically connected to the source terminal 116 c of the second high-side transistor 116 and is configured to generate a second high-side intermediate voltage 336 based at least in part on the DC voltage 110.

[0066] like Figure 3 As further depicted in , the low-side portion 304 of the example bridge rectifier circuit system 300 includes a first low-side transistor 118 and a second low-side transistor 120. The first drain low-side voltage control circuit system 340 is electrically connected to the drain terminal 120a of the second low-side transistor 120. The first drain low-side voltage control circuit system 340 is configured to generate a first drain low-side intermediate voltage 348 at the drain terminal 120a of the second low-side transistor 120 based at least in part on the first AC input 106. In addition, the second drain low-side voltage control circuit system 338 is electrically connected to the drain terminal 118a of the first low-side transistor 118. The second drain low-side voltage control circuit system 338 is configured to generate a second drain low-side intermediate voltage 346 at the drain terminal 118a of the first low-side transistor 118 based at least in part on the second AC input 108. Figure 3As further depicted in FIG. 1 , the first gate low side voltage control circuit system 344 is electrically connected to the gate terminal 120 b of the second low side transistor 120 and is configured to generate a first gate low side intermediate voltage 352 based at least in part on the second AC input. In addition, the second gate low side voltage control circuit system 342 is electrically connected to the gate terminal 118 b of the first low side transistor 118 and is configured to generate a second gate low side intermediate voltage 350 based at least in part on the first AC input 106. The source terminals (118 c, 120 c) of both the first low side transistor 118 and the second low side transistor 120 are electrically connected to the electrical ground 112.

[0067] like Figure 3 As depicted in FIG. 1 , the high-side portion 302 of the example bridge rectifier circuit system 300 includes a first high-side voltage control circuit system 330 and a second high-side voltage control circuit system 332. The first high-side voltage control circuit system 330 and the second high-side voltage control circuit system 332 are configured to output a first high-side intermediate voltage 334 and a second high-side intermediate voltage 336, respectively, to avoid source-gate stress on the first high-side transistor 114 and the second high-side transistor 116. Source-gate stress can be avoided by adjusting the value of the first high-side intermediate voltage 334 to ensure that the absolute value of the difference between the voltage at the source terminal of the transistor and the gate terminal of the transistor does not exceed the maximum voltage rating of the transistor.

[0068] For example, in the case where the voltage of the first AC input 106 becomes lower so that the voltage difference between the DC voltage 110 and the first AC input 106 is greater than the maximum voltage rating of the first high-side transistor 114, the first high-side intermediate voltage 334 can be reduced so that the voltage difference between the gate terminal 114b and the source terminal 114c is less than the maximum voltage rating of the first high-side transistor 114. Similarly, in the case where the voltage of the second AC input 108 becomes lower so that the voltage difference between the DC voltage 110 and the second AC input 108 is greater than the maximum voltage rating of the second high-side transistor 116, the second high-side intermediate voltage 336 can be reduced so that the voltage difference between the gate terminal 116b and the source terminal 116c is less than the maximum voltage rating of the second high-side transistor 116.

[0069] Additionally, the first high-side voltage control circuitry 330 and the second high-side voltage control circuitry 332 may also be configured to operate with a negligible voltage drop when the corresponding AC input is high.

[0070] For example, in the case where the first AC input 106 is high, the first high-side voltage control circuit system 330 can be configured so that the internal circuit system does not cause a significant voltage drop. Figure 4-Figure 5 and Fig.14Example embodiments of the internal circuitry of the first high-side voltage control circuitry 330 are described.

[0071] Similarly, in the case where the second AC input 108 is high, the second high-side voltage control circuit system 332 can be configured so that the internal circuit system does not cause a significant voltage drop. Figure 6-Figure 7 and Fig.14 Example embodiments of the internal circuitry of the second high-side voltage control circuitry 332 are described.

[0072] like Figure 3 As further depicted in FIG. 1 , the example low side portion 304 of the example bridge rectifier circuit system 300 includes a first drain low side voltage control circuit system 340 and a second drain low side voltage control circuit system 338. The first drain low side voltage control circuit system 340 is configured to receive the first AC input 106 and generate a first drain low side intermediate voltage 348 at the drain terminal 120a of the second low side transistor 120. The first drain low side intermediate voltage 348 is configured to reduce the voltage difference between the drain terminal 120a and the gate terminal 120b of the second low side transistor 120 to a value less than the maximum voltage rating of the second low side transistor 120.

[0073] Furthermore, the first drain low side intermediate voltage 348 may be configured such that the internal circuitry of the first drain low side voltage control circuitry 340 does not introduce a significant voltage drop if the second AC input 108 is higher than the first AC input 106. Figure 11-Figure 12 An example embodiment of the internal circuitry of the first drain low side voltage control circuitry 340 is provided.

[0074] like Figure 3 As further depicted in FIG. 1 , the second drain low side voltage control circuit system 338 is configured to receive the second AC input 108 and generate a second drain low side intermediate voltage 346 at the drain terminal 118 a of the first low side transistor 118. The second drain low side intermediate voltage 346 is configured to reduce the voltage difference between the drain terminal 118 a and the gate terminal 118 b of the first low side transistor 118 to a value less than the maximum voltage rating of the first low side transistor 118.

[0075] Furthermore, the second drain low side intermediate voltage 346 may be configured such that the internal circuitry of the second drain low side voltage control circuitry 338 does not introduce a significant voltage drop if the first AC input 106 is higher than the second AC input 108. Figure 8-Figure 9 An example embodiment of the internal circuitry of the second drain low side voltage control circuitry 338 is provided.

[0076] The circuitry associated with the first drain low side voltage control circuitry 340 and the second drain low side voltage control circuitry 338 acts as a voltage follower and limiter for the first AC input 106 and the second AC input 108, respectively. For example, the first drain low side voltage control circuitry 340 and the second drain low side voltage control circuitry 338 can utilize a gate maximum voltage (e.g., about Figure 8-Figure 10 Further description of the gate maximum voltage 802, Figure 11-13 The gate maximum voltage 1102 and the Fig.15 The first drain low side intermediate voltage 348 and the second drain low side intermediate voltage 346 may respectively follow the first AC input 106 and the second AC input 108 which are lower than the gate maximum voltage. Once the gate maximum voltage (minus the threshold voltage of the internal component) is reached, the first drain low side voltage control circuit system 340 and the second drain low side voltage control circuit system 338 may respectively limit the first drain low side intermediate voltage 348 and the second drain low side intermediate voltage 346 to the gate maximum voltage (minus the threshold voltage of the internal component).

[0077] like Figure 3 As further depicted in the example low side portion 304 of the example bridge rectifier circuit system 300, includes a first gate low side voltage control circuit system 344 and a second gate low side voltage control circuit system 342. The first gate low side voltage control circuit system 344 is configured to receive the second AC input 108 and generate a first gate low side intermediate voltage 352 at the gate terminal 120b of the second low side transistor 120. The first gate low side intermediate voltage 352 is configured to reduce the voltage difference between the gate terminal 120b and the drain terminal 120a and / or the source terminal 120c of the second low side transistor 120 to a value less than the maximum voltage rating of the second low side transistor 120.

[0078] The first gate low side intermediate voltage 352 may be configured such that the electrical ground 112 is generated from the first AC input 106 through the second low side transistor 120 in the event that the second AC input 108 is higher than the first AC input 106. The ground potential path is the first AC input 106, the first drain low side voltage control circuitry 340, the first drain low side intermediate voltage 348 equal to the voltage at the drain terminal 120 a of the second low side transistor 120, and then the source terminal 120 c of the second low side transistor 120 electrically connected to the electrical ground 112.

[0079] In this case, the first drain low-side voltage control circuit system 340 should have a negligible voltage drop because it is in the path of ground potential transmission. In addition, the voltage drop across the first gate low-side voltage control circuit system 344 may vary, as long as the voltage at the gate terminal 120b is sufficient to activate the second low-side transistor 120 (e.g., drive current).

[0080] For example, if the second AC input 108 is equal to 16 volts and the first AC input 106 is equal to 0 volts, the voltage at the gate terminal 120b can be maintained below 12 volts so that the voltage drop from the second AC input 108 through the low-side voltage control circuit 344 to the gate terminal 120b remains at least at 4 volts.

[0081] In summary, in the case where the second AC input 108 is greater than the first AC input 106, the second low-side transistor 120 is activated and the first low-side transistor 118 is deactivated (e.g., not driving current). In this case, the second low-side transistor 120 transfers the electrical ground potential from the first AC input 106 to the electrical ground 112. A negligible voltage drop should occur in the first drain low-side voltage control circuit system 340, while a voltage drop of several volts may occur in the first gate low-side voltage control circuit system 344. Fig.11 and Fig.13 An example embodiment of the internal circuitry of the first gate low side voltage control circuitry 344 is provided.

[0082] like Figure 3 As further depicted in FIG. 1 , the second gate low side voltage control circuit system 342 is configured to receive the first AC input 106 and generate a second gate low side intermediate voltage 350 at the gate terminal 118 b of the first low side transistor 118. The second gate low side intermediate voltage 350 is configured to reduce the voltage difference between the gate terminal 118 b and the drain terminal 118 a and / or the source terminal 118 c of the first low side transistor 118 to a value less than the maximum voltage rating of the first low side transistor 118.

[0083] In addition, the second gate low side intermediate voltage 350 can be configured such that the first low side transistor 118 is activated and the second low side transistor 120 is deactivated when the first AC input 106 is greater than the second AC input 108. In this case, the first low side transistor 118 transfers the ground potential from the second AC input 108 to the electrical ground 112. In this case, a negligible voltage drop should occur in the second drain low side voltage control circuit system 338, while a voltage drop of several volts may occur in the second gate low side voltage control circuit system 342. Figure 8 and Fig.10 An example embodiment of the internal circuitry of the second gate low side voltage control circuitry 342 is provided.

[0084] The circuitry associated with the first gate low side voltage control circuitry 344 and the second gate low side voltage control circuitry 342 acts as a voltage follower and limiter for the second AC input 108 and the first AC input 106, respectively. For example, the first gate low side voltage control circuitry 344 and the second gate low side voltage control circuitry 342 may utilize a gate maximum voltage (e.g., about Figure 8-Figure 10 Further description of the gate maximum voltage 802, Figure 11-13 The gate maximum voltage 1102 and the Fig.15 The gate maximum voltage described further above is used to limit the voltage at the gate terminals 118b, 120b of the associated low-side transistors. In some embodiments, the first gate low-side intermediate voltage 352 and the second gate low-side intermediate voltage 350 can follow the second AC input 108 and the first AC input 106, respectively, which are lower than the gate maximum voltage. Once the gate maximum voltage (minus the threshold voltage of the internal component) is reached, the first gate low-side voltage control circuit system 344 and the second gate low-side voltage control circuit system 342 can limit the first gate low-side intermediate voltage 352 and the second gate low-side intermediate voltage 350, respectively, to the gate maximum voltage (minus the threshold voltage of the internal component).

[0085] Reference now Figure 4 , a first segment 400 of the high side portion 302 of the example bridge rectifier circuit system 300 is provided. Figure 4 , the first segment 400 includes a first high-side transistor 114 configured to receive a first AC input 106 at a drain terminal 114a and a gate terminal 114b of the first high-side transistor 114. A first high-side intermediate voltage 334 is generated at a source terminal 114c of the first high-side transistor 114. The first segment 400 also includes a first high-side voltage control circuitry 330 configured to receive the first AC input 106 and the DC voltage 110 generated by the high-side portion 302 of the bridge rectifier circuitry 300 and generate the first high-side intermediate voltage 334.

[0086] like Figure 4 As further depicted in FIG. 1 , the first high-side voltage control circuit system 330 also includes a first high-side voltage control transistor 462 configured to receive the first modified AC component voltage 401 at a gate terminal 462b, receive the DC voltage 110 at a source terminal 462c, and generate a first high-side intermediate voltage 334 at a drain terminal 462a. Figure 4, the modified AC component generator circuitry 460 is also included in the first high-side voltage control circuitry 330 and is configured to generate the first modified AC component voltage 401 based on the first AC input 106, the gate minimum voltage 466, and the first bulk voltage 464. The gate minimum voltage 466 is generated by the gate minimum voltage generator circuitry 458 based on the DC voltage 110. The first bulk voltage 464 is generated by the bulk voltage generator circuitry 454 based on the first AC input 106 and the first high-side intermediate voltage 334.

[0087] like Figure 4 As further depicted in FIG. 1 , the first high side voltage control circuitry 330 includes an intermediate voltage discharge circuitry 456. The intermediate voltage discharge circuitry 456 is configured to discharge the first high side intermediate voltage 334 based at least in part on the first AC input 106 and the first high side intermediate voltage 334 if the first AC input 106 returns to 0 volts.

[0088] like Figure 4 As depicted in FIG. 1 , the first high-side voltage control circuit system 330 includes a first high-side voltage control transistor 462. Although depicted as an n-channel metal oxide semiconductor (nMOS) transistor, the first high-side voltage control transistor 462 may be any electrical component or system of electrical components configured to generate the first high-side intermediate voltage 334 at the source terminal of the first high-side transistor 114 such that the voltage difference between the source terminal 114c and the gate terminal 114b of the first high-side transistor 114 does not exceed the maximum voltage rating of the first high-side transistor 114. For example, Figure 4 , the first high-side voltage control transistor 462 is configured to receive the DC voltage 110 at a source terminal 462c, receive the first modified AC component voltage 401 at a gate terminal 462b, and generate a voltage at a drain terminal 462a such that the first high-side intermediate voltage 334 is lower than the DC voltage 110 in the event that the first AC input 106 drops below a minimum input voltage. The minimum input voltage may be any voltage that results in a difference between the first AC input 106 and the DC voltage 110 greater than the maximum voltage rating of the first high-side transistor 114.

[0089] like Figure 4As further depicted in , the first high-side voltage control circuit system 330 includes a modified AC component generator circuit system 460. The modified AC component generator circuit system 460 is any electrical component or system of electrical components configured to output a first modified AC component voltage 401 at a gate terminal 462b of a first high-side voltage control transistor 462. The first modified AC component voltage 401 is generated by the modified AC component generator circuit system 460 such that the first modified AC component voltage 401 is controlled to remain at or above the minimum high-side voltage in the event that the first AC input 106 drops below the minimum high-side voltage. Figure 5 A specific embodiment of the modified AC component generator circuit system 460 is shown. Fig.17 The first modified AC component voltage 401 is further described.

[0090] like Figure 4 As further depicted in FIG. 1 , the first high-side voltage control circuit system 330 includes a gate minimum voltage generator circuit system 458. The gate minimum voltage generator circuit system 458 is any electrical component or system of electrical components configured to output a gate minimum voltage 466 based at least in part on the DC voltage 110 generated by the bridge rectifier circuit system 300. The gate minimum voltage 466 at least in part determines the minimum voltage of the first modified AC component voltage 401. For example, the first modified AC component voltage 401 can closely approximate the first AC input 106 until the first AC input 106 drops below the gate minimum voltage 466. In the event that the first AC input 106 drops below the gate minimum voltage 466 (plus the absolute value of the threshold of the internal components (e.g., pMOS transistor 574) described herein), the first modified AC component voltage 401 remains substantially equal to the gate minimum voltage 466 (plus the absolute value of the threshold of the internal components described herein). The gate minimum voltage 466 further varies based on the amplitude of the AC input and, therefore, based on the DC voltage 110. For example, gate minimum voltage 466 may be substantially equal to DC voltage 110 minus a constant, such as 7 volts. Figure 5 A specific embodiment of the gate minimum voltage generator circuit system 458 is shown. Fig.16 The gate minimum voltage 466 is further described.

[0091] like Figure 4 As further depicted in FIG. 1 , the first high-side voltage control circuit system 330 includes a bulk voltage generator circuit system 454. The first high-side voltage control circuit system 330 is configured to generate a voltage that is utilized by one or more connected electrical components to ensure that the connected electrical components (e.g., Figure 5The first bulk voltage 464 reduces the parasitic effects of the connected electrical components. In some embodiments, the first bulk voltage is the greater of the first AC input 106 and the first high-side intermediate voltage 334. Figure 4 As depicted in FIG. 4 , the first bulk voltage 464 is received by one or more electrical components in the modified AC component generator circuitry 460 and the intermediate voltage discharge circuitry 456 . Figure 5 A specific embodiment of the bulk voltage generator circuitry 454 is shown.

[0092] like Figure 4 , the first high-side voltage control circuit system 330 includes an intermediate voltage discharge circuit system 456. The intermediate voltage discharge circuit system 456 is any electrical component or system of electrical components configured to discharge the first high-side intermediate voltage 334. For example, in the case where the first AC input 106 returns to a low voltage, the intermediate voltage discharge circuit system 456 can enable the first high-side intermediate voltage 334 to be discharged, thereby preventing a high floating voltage at the source terminal 114c of the first high-side transistor 114. For example, when the first AC input 106 is high and reaches, for example, 15 volts, the diode-mounted first high-side transistor 114 will then experience a potential of approximately 13 volts at its source terminal 114c. This voltage is equal to the first high-side intermediate voltage 334. In the case where the first AC input 106 transitions to a low voltage, the first high-side transistor 114 will be disabled (e.g., not driving current) and the first high-side intermediate voltage 334 can remain floating at or near 13 volts. When the first AC input 106 reaches 0 volts and the source terminal 114c remains near 13 volts, a potential exceeding the maximum voltage rating may exist between the gate terminal 114b and the source terminal 114c. Therefore, when the first AC input 106 transitions to a low voltage, the intermediate voltage discharge circuit system 456 reduces the first high side intermediate voltage 334 to a value lower than that reached when the first AC input 106 is at its peak. Figure 5 and Fig.14 An example embodiment of intermediate voltage discharge circuitry 456 is depicted.

[0093] Reference now Figure 5 , depicts an example embodiment of the first high-side voltage control circuit system 330. Figure 5As depicted in the drawings, an example embodiment of the first high-side voltage control circuit system 330 includes an example embodiment of a gate minimum voltage generator circuit system 458, an example embodiment of a modified AC component generator circuit system 460, an example embodiment of a body voltage generator circuit system 454, an example embodiment of an intermediate voltage discharge circuit system 456, and an example first high-side voltage control transistor 462.

[0094] like Figure 5 As depicted in , the example gate minimum voltage generator circuit system 458 of the example embodiment of the first high-side voltage control circuit system 330 includes a resistive element 572, a Zener diode 570, and a diode-configured transistor 568, which are connected in series between an electrical ground 112 and a DC voltage 110, wherein the anode of the Zener diode 570 is electrically connected to the resistive element 572, and the cathode of the Zener diode 570 is electrically connected to the source terminal 568a of the transistor 568. Figure 5 The example gate minimum voltage generator circuit system 458 is configured to output a gate minimum voltage 466 based on the threshold voltages of the Zener diode 570 and the transistor 568. For example, in the case where the DC voltage 110 is below the threshold voltage of the Zener diode 570, the gate minimum voltage 466 is 0. However, when the DC voltage 110 increases to above the threshold of the Zener diode 570 plus the threshold of the transistor 568, the gate minimum voltage 466 can increase with the DC voltage 110. Therefore, in the case where the threshold voltage of the transistor 568 is 1 volt and the threshold voltage of the Zener diode 570 is 6 volts, the gate minimum voltage can be 0 volts for any DC voltage 110 below 7 volts. However, once the DC voltage 110 increases above 7 volts, the gate minimum voltage 466 can be the DC voltage 110 minus the threshold of the transistor 568 (1 volt) minus the threshold of the Zener diode 570 (6 volts), or the DC voltage 110 minus 7 volts.

[0095] like Figure 5 As further depicted in FIG. 1 , the example modified AC component generator circuitry 460 of the example embodiment of the first high-side voltage control circuitry 330 includes a p-channel MOS (pMOS) transistor 574 configured to receive the first AC input 106 at a source terminal 574c of the transistor 574, receive the gate minimum voltage 466 at a gate terminal 574b, receive the first bulk voltage 464 at a bulk terminal 574d, and generate the first modified AC component voltage 401. Figure 5, in the case where the first AC input 106 and the first modified AC component voltage 401 are higher than the gate minimum voltage 466 by at least the absolute value of the threshold voltage of the pMOS transistor 574 (e.g., 1 volt), the first AC input 106 can be transmitted as the first modified AC component voltage 401. For example, in the case where the DC voltage 110 is 10 volts, since the voltage drop across the transistor 568 is 1.5, the source terminal 568a of the transistor 568 can be approximately 8.5 volts, and the gate minimum voltage 466 can be equal to 3 volts, for example, in the case where the threshold of the Zener diode 570 is 5.5 volts. In this case, the transistor 574 can transmit the first AC input 106 as the first modified AC component voltage 401 as long as the first AC input 106 is greater than 4 volts (e.g., the gate minimum voltage 466 of 3 volts plus the threshold voltage of the transistor 574).

[0096] like Figure 5 As further depicted in FIG. 1 , the example bulk voltage generator circuitry 454 of the example embodiment of the first high-side voltage control circuitry 330 includes a first pMOS transistor 576 and a second pMOS transistor 578 configured to output a first bulk voltage 464 substantially equal to the maximum voltage between the first high-side intermediate voltage 334 and the first AC input 106. Figure 5 , a source terminal 576c of the first pMOS transistor 576 is electrically connected to the first AC input 106, a gate terminal 576b is electrically connected to the first high-side intermediate voltage 334, a drain terminal 576a is electrically connected to a drain terminal 578a of a second pMOS transistor 578, and a body terminal 576d is electrically connected to the first body voltage 464. Additionally, a source terminal 578c of the second pMOS transistor 578 is electrically connected to the first high-side intermediate voltage 334, a gate terminal 578b is electrically connected to the first AC input 106, a drain terminal 578a is electrically connected to the drain terminal 576a of the first pMOS transistor 576, and a body terminal 578d is electrically connected to the first body voltage 464. The first body voltage 464 is generated by the electrical connection between the drain terminal 576a of the first pMOS transistor 576 and the drain terminal 578a of the second pMOS transistor 578.

[0097] like Figure 5As further depicted in FIG. 4 , the example intermediate voltage discharge circuit system 456 of the example embodiment of the first high-side voltage control circuit system 330 includes an nMOS transistor 580, a first Zener diode 582, and a second Zener diode 584, which are electrically connected in series between the first AC input 106 and the first high-side intermediate voltage 334, wherein an anode of the first Zener diode 582 is electrically connected to a source terminal 580c of the nMOS transistor 580, a cathode of the first Zener diode 582 is electrically connected to an anode of the second Zener diode 584, and a cathode of the second Zener diode 584 generates the first high-side intermediate voltage 334. As further depicted, the transistor 580 is configured in a diode configuration, wherein a source terminal 580c is electrically connected to a gate terminal 580b, and is simultaneously connected to the first Zener diode 582. As further depicted, a drain terminal 580a is electrically connected to the first AC input 106.

[0098] Reference now Figure 6 , a second segment 600 of the high side portion 302 of the bridge rectifier circuit system 300 is provided. Figure 6 , the second segment 600 includes a second high-side transistor 116 configured to receive the second AC input 108 at a drain terminal 116a and a gate terminal 116b of the second high-side transistor 116. A second high-side intermediate voltage 336 is generated at a source terminal 116c of the second high-side transistor 116. The second segment 600 also includes a second high-side voltage control circuitry 332 configured to receive the second AC input 108 and the DC voltage 110 generated by the high-side portion 302 of the bridge rectifier circuitry 300 and generate the second high-side intermediate voltage 336.

[0099] like Figure 6 As further depicted in FIG. 1 , the second high-side voltage control circuit system 332 also includes a second high-side voltage control transistor 662 configured to receive the second modified AC component voltage 601 at a gate terminal 662b, receive the DC voltage 110 at a source terminal 662c, and generate a second high-side intermediate voltage 336 at a drain terminal 662a. Figure 6 , a modified AC component generator circuitry 660 is also included in the second high-side voltage control circuitry 332 and is configured to generate a second modified AC component voltage 601 based on the second AC input 108, a gate minimum voltage 666, and a second bulk voltage 664. The gate minimum voltage 666 is generated by the gate minimum voltage generator circuitry 658 based on the DC voltage 110. The second bulk voltage 664 is generated by the bulk voltage generator circuitry 654 based on the second AC input 108 and the second high-side intermediate voltage 336.

[0100] like Figure 6 As further depicted in FIG. 1 , the second high side voltage control circuitry 332 includes an intermediate voltage discharge circuitry 656. The intermediate voltage discharge circuitry 656 is configured to discharge the second high side intermediate voltage 336 based at least in part on the second AC input 108 and the second high side intermediate voltage 336 if the second AC input 108 returns to 0 volts.

[0101] like Figure 6 , the second segment 600 of the high-side portion 302 of the bridge rectifier circuit system 300 includes a second high-side voltage control circuit system 332 configured to generate a second high-side intermediate voltage 336 based on the second AC input 108. The second high-side voltage control circuit system 332 is substantially identical to the first high-side voltage control circuit system 330, however, the second high-side voltage control circuit system 332 receives the second AC input and generates the second high-side intermediate voltage 336. Therefore, the second high-side voltage control circuit system 332 can be described as with respect to Figure 4-Figure 5 The high side voltage control transistor 662, modified AC component generator circuitry 660, gate minimum voltage generator circuitry 658, intermediate voltage discharge circuitry 656 and bulk voltage generator circuitry 654 are configured as described in .

[0102] In some embodiments, gate minimum voltage generator circuitry 458 and gate minimum voltage generator circuitry 658 may include a common shared circuitry block. In this case, Figure 4 and Figure 5 The minimum gate voltage 466 depicted in FIG. Figure 6 and Figure 7 The gate minimum voltage 666 depicted in FIG. 4 may be the same unique node. Both gate minimum voltage 466 and gate minimum voltage 666 may be generated by the same circuit system based on electrical ground 112 and DC voltage 110 and transmitted to gate minimum voltage generator circuit system 458 and gate minimum voltage generator circuit system 658, respectively. Using a shared circuit system to generate gate minimum voltage 466 and gate minimum voltage 666 may reduce the overall area and power consumption of electrical components.

[0103] Reference now Figure 7 , depicts an example embodiment of the second high-side voltage control circuit system 332. Figure 7 As depicted in the drawings, an example embodiment of the second high side voltage control circuit system 332 includes an example embodiment of a gate minimum voltage generator circuit system 658, an example embodiment of a modified AC component generator circuit system 660, an example embodiment of a body voltage generator circuit system 654, an example embodiment of an intermediate voltage discharge circuit system 656, and an example second high side voltage control transistor 662.

[0104] like Figure 7 As depicted in , the example gate minimum voltage generator circuit system 658 of an example embodiment of the second high-side voltage control circuit system 332 includes a resistive element 772, a Zener diode 770, and a diode-configured transistor 768, which are connected in series between an electrical ground 112 and a DC voltage 110, wherein the anode of the Zener diode 770 is electrically connected to the resistive element 772 and the cathode of the Zener diode 770 is electrically connected to the source terminal 768a of the transistor 768. Figure 7 The example gate minimum voltage generator circuit system 658 is configured to output a gate minimum voltage 666 based on the threshold voltages of the Zener diode 770 and the transistor 768. For example, in the case where the DC voltage 110 is below the threshold voltage of the Zener diode 770, the gate minimum voltage 666 is 0. However, when the DC voltage 110 increases to above the threshold of the Zener diode 770 plus the threshold of the transistor 768, the gate minimum voltage 666 can increase with the DC voltage 110. Therefore, in the case where the threshold voltage of the transistor 768 is 1 volt and the threshold voltage of the Zener diode 770 is 6 volts, the gate minimum voltage can be 0 volts for any DC voltage 110 below 7 volts. However, once the DC voltage 110 increases to greater than 7 volts, the gate minimum voltage 666 can be the DC voltage 110 minus the threshold of the transistor 768 (1 volt) minus the threshold of the Zener diode 770 (6 volts), or the DC voltage 110 minus 7 volts.

[0105] like Figure 7 As further depicted in FIG. 1 , the example modified AC component generator circuitry 660 of the example embodiment of the second high-side voltage control circuitry 332 includes a p-channel MOS (pMOS) transistor 774 configured to receive the second AC input 108 at a source terminal 774c of the transistor 774, receive a gate minimum voltage 666 at a gate terminal 774b, receive the second bulk voltage 664 at a bulk terminal 774d, and generate a second modified AC component voltage 601 at a drain terminal 774a of the transistor 774. Figure 7, in the case where the second AC input 108 and the second modified AC component voltage 601 are higher than the gate minimum voltage 666 by at least the absolute value of the threshold voltage of the pMOS transistor 774 (e.g., 1 volt), the second AC input 108 can be transmitted as the second modified AC component voltage 601. For example, in the case where the DC voltage 110 is 10 volts, since the voltage drop across the transistor 768 is 1.5, the source terminal 768a of the transistor 768 can be approximately 8.5 volts, and the gate minimum voltage 666 can be equal to 3 volts, for example, in the case where the threshold of the Zener diode 770 is 5.5 volts. In this case, the transistor 774 can transmit the second AC input 108 as the second modified AC component voltage 601 as long as the second AC input 108 is greater than 4 volts (e.g., the gate minimum voltage 666 of 3 volts plus the threshold voltage of the transistor 774).

[0106] like Figure 7 As further depicted in FIG. 1 , the example bulk voltage generator circuitry 654 of the example embodiment of the second high-side voltage control circuitry 332 includes a first pMOS transistor 776 and a second pMOS transistor 778 configured to output a second bulk voltage 664 that is substantially equal to the maximum voltage between the second high-side intermediate voltage 336 and the second AC input 108. Figure 7 , a source terminal 776c of the first pMOS transistor 776 is electrically connected to the second AC input 108, a gate terminal 776b is electrically connected to the second high side intermediate voltage 336, a drain terminal 776a is electrically connected to a drain terminal 778a of a second pMOS transistor 778, and a body terminal 776d is electrically connected to the second body voltage 664. Additionally, a source terminal 778c of the second pMOS transistor 778 is electrically connected to the second high side intermediate voltage 336, a gate terminal 778b is electrically connected to the second AC input 108, a drain terminal 778a is electrically connected to the drain terminal 776a of the first pMOS transistor 776, and a body terminal 778d is electrically connected to the second body voltage 664. The second body voltage 664 is generated from the electrical connection between the drain terminal 776a of the first pMOS transistor 776 and the drain terminal 778a of the second pMOS transistor 778.

[0107] like Figure 7As further depicted in FIG. 6 , the example intermediate voltage discharge circuit system 656 of the example embodiment of the second high side voltage control circuit system 332 includes an nMOS transistor 780, a first Zener diode 782, and a second Zener diode 784, which are electrically connected in series between the second AC input 108 and the second high side intermediate voltage 336, wherein the anode of the first Zener diode 782 is electrically connected to the source terminal 780c of the nMOS transistor 780, the cathode of the first Zener diode 782 is electrically connected to the anode of the second Zener diode 784, and the cathode of the second Zener diode 784 generates the second high side intermediate voltage 336. As further depicted, the transistor 780 is configured in a diode configuration, wherein the source terminal 780c is electrically connected to the gate terminal 780b, and is also connected to the first Zener diode 782. As further depicted, the drain terminal 780a is electrically connected to the second AC input 108.

[0108] Reference now Figure 8 , an example first segment 800 of the low side portion 304 of the example bridge rectifier circuit system 300 is provided. Figure 8 As depicted in FIG. 8 , the example first segment 800 of the low-side portion 304 of the example bridge rectifier circuit system 300 includes a second drain low-side voltage control circuit system 338 configured to generate a second drain low-side intermediate voltage 346 at the drain terminal 118a of the first low-side transistor 118. Figure 8 As further depicted in FIG. 1 , the example first segment 800 of the low side portion 304 of the example bridge rectifier circuit system 300 includes a second gate low side voltage control circuit system 342 configured to generate a second gate low side intermediate voltage 350 at the gate terminal 118b of the first low side transistor 118. Both the second drain low side voltage control circuit system 338 and the second gate low side voltage control circuit system 342 utilize a gate maximum voltage generator circuit system 888 configured to receive the DC voltage 110 and generate a gate maximum voltage 802. The second drain low side voltage control circuit system 338 also includes a low side modified AC component generator circuit system 886a configured to receive the gate maximum voltage 802 and the second AC input 108 to generate the second drain low side intermediate voltage 346. However, the second gate low side voltage control circuit system 342 also includes a low side modified AC component generator circuit system 886b configured to receive the gate maximum voltage 802 and the first AC input 106 to generate the second gate low side intermediate voltage 350.

[0109] like Figure 8, a first segment 800 of the low side portion 304 of the example bridge rectifier circuit system 300 includes a gate maximum voltage generator circuit system 888. The gate maximum voltage generator circuit system 888 is any electrical component or system of electrical components configured to output a gate maximum voltage 802 that defines a maximum voltage of each AC component (e.g., the first AC input 106, the second AC input 108) based at least in part on the DC voltage 110 generated by the bridge rectifier circuit system 300. The gate maximum voltage 802 at least partially indicates the maximum voltage of the intermediate voltage (e.g., the second drain low side intermediate voltage 346, the second gate low side intermediate voltage 350 supplied to the drain terminal 118a and the gate terminal 118b of the first low side transistor 118, respectively).

[0110] In some embodiments, the gate maximum voltage 802 varies based on the amplitude of the DC voltage 110. For example, the gate maximum voltage 802 may be substantially equal to the DC voltage 110 until a maximum voltage is reached, after which the gate maximum voltage 802 may remain at the maximum voltage while the DC voltage 110 continues to increase. Figure 9-10 A specific embodiment of the gate maximum voltage generator circuit system 888 is shown. Fig.15 The gate maximum voltage 802 is further described.

[0111] like Figure 8 As further depicted in FIG. 1 , the second drain low-side voltage control circuitry 338 and the second gate low-side voltage control circuitry 342 of the first segment 800 of the low-side portion 304 of the example bridge rectifier circuitry 300 include low-side modified AC component generator circuitry 886a, 886b. Figure 8 , a first instance of the low side modified AC component generator circuitry 886a receives the gate maximum voltage 802 and generates the second drain low side intermediate voltage 346 based on the second AC input 108. Similarly, a second instance of the low side modified AC component generator circuitry 886b receives the gate maximum voltage 802, but generates the second gate low side intermediate voltage 350 based on the first AC input 106. The low side modified AC component generator circuitry 886a, 886b is any electrical component or system of electrical components configured to generate an intermediate voltage (e.g., the second drain low side intermediate voltage 346, the second gate low side intermediate voltage 350) based on an input voltage (e.g., the second AC input 108, the first AC input 106) and clamp based on a maximum voltage (e.g., the gate maximum voltage 802).

[0112] In some embodiments, the intermediate voltage (e.g., the second drain low side intermediate voltage 346, the second gate low side intermediate voltage 350) can substantially follow the AC input (e.g., the second AC input 108, the first AC input 106) when the AC input is lower than the supplied gate maximum voltage 802. Once the AC input exceeds the supplied gate maximum voltage 802, the intermediate voltage can stabilize and remain at the gate maximum voltage 802. Fig. 9 A specific embodiment of the low-side modified AC component generator circuitry 886a is shown. Fig.10 A specific embodiment of low-side modified AC component generator circuitry 886b is shown.

[0113] Reference now Fig. 9 , a specific embodiment of the second drain low-side voltage control circuit system 338 is provided. Fig. 9 As depicted in FIG. 1 , the second drain low side voltage control circuit system 338 includes an example gate maximum voltage generator circuit system 888 configured to receive the DC voltage 110 and generate the gate maximum voltage 802. Fig. 9 As further depicted in , the example low side modified AC component generator circuitry 886 a is configured to receive the gate maximum voltage 802 and the second AC input 108 and generate the second drain low side intermediate voltage 346 .

[0114] like Fig. 9, the gate maximum voltage generator circuit system 888 includes a Zener diode 994, a first resistive element 992, and a second resistive element 990, which are electrically connected in series between the electrical ground 112 and the DC voltage 110, wherein the anode of the Zener diode 994 is electrically connected to the electrical ground 112, and the cathode of the Zener diode 994 is electrically connected to the first resistive element 992. A tap point 991 between the first resistive element 992 and the second resistive element 990 is electrically connected to the drain terminal 996a and the body terminal 996d of the pMOS transistor 996. In addition, a tap point 993 between the Zener diode 994 and the first resistive element 992 is electrically connected to the gate terminal 996b of the pMOS transistor 996. The source terminal 996c of the pMOS transistor 996 is electrically connected to the electrical ground 112. Therefore, the gate maximum voltage 802 generated by the gate maximum voltage generator circuit system 888 is at least partially based on the threshold voltage of the Zener diode 994 and the threshold voltage of the pMOS transistor 996. For example, in the case where the DC voltage 110 is below the threshold voltage of the Zener diode 994, the Zener diode 994 is turned off and the gate maximum voltage 802 is substantially equal to the DC voltage 110. However, in the case where the DC voltage is greater than the Zener diode 994 plus the threshold voltage of the pMOS transistor 996, the pMOS transistor 996 is enabled (e.g., drives current) and the gate maximum voltage 802 is clamped.

[0115] like Fig. 9 As further depicted in FIG. 8 , the low-side modified AC component generator circuitry 886 a includes an nMOS transistor 998 a. Fig. 9 , the source terminal 998a-c of the nMOS transistor 998a is electrically connected to the second AC input 108, and the gate terminal 998a-b is electrically connected to the gate maximum voltage 802. Therefore, the second drain low side intermediate voltage 346 generated at the drain terminal 998a-a of the nMOS transistor 998a prevents the voltage difference between the drain terminal 118a and the gate terminal 118b of the first low side transistor 118 from exceeding the maximum voltage rating of the first low side transistor 118.

[0116] Reference now Fig.10 , a specific embodiment of the second gate low-side voltage control circuit system 342 is provided. Fig.10 As depicted in FIG. 1 , the second gate low side voltage control circuit system 342 includes an example gate maximum voltage generator circuit system 888 configured to receive the DC voltage 110 and generate a gate maximum voltage 802. Fig.10 As further depicted in , the example low side modified AC component generator circuitry 886 b is configured to receive the gate maximum voltage 802 and the first AC input 106 and generate a second gate low side intermediate voltage 350 .

[0117] like Fig.10 As depicted in , the second gate low side voltage control circuit system 342 includes a gate maximum voltage generator circuit system 888. Fig.10 The example embodiment of the gate maximum voltage generator circuit system 888 depicted in FIG. 8 is equivalent to Fig. 9 The gate maximum voltage generator circuit system 888 is depicted in FIG. Figure 8 As depicted in FIG. 1 , in some embodiments, a first segment 800 of a low side portion 304 of a bridge rectifier circuit system 300 may include a shared gate maximum voltage generator circuit system 888 configured to generate a gate maximum voltage 802 that is supplied to both a low side modified AC component generator circuit system 886 a and a low side modified AC component generator circuit system 886 b.

[0118] like Fig.10 As further depicted in FIG. 8 , the low-side modified AC component generator circuit system 886 b includes an nMOS transistor 998 b. Fig.10 , the source terminal 998b_c of the nMOS transistor 998b is electrically connected to the first AC input 106, and the gate terminal 998b_b is electrically connected to the gate maximum voltage 802. Therefore, the second gate low side intermediate voltage 350 generated at the drain terminal 998b_a of the nMOS transistor 998b prevents the voltage difference between the gate terminal 118b and the drain terminal 118a (and / or the source terminal 118c) of the first low side transistor 118 from exceeding the maximum voltage rating of the first low side transistor 118.

[0119] Reference now Fig.11 , an example first segment 1100 of the low side portion 304 of the example bridge rectifier circuit system 300 is provided. Fig.11 As depicted in FIG. 1 , the example first segment 1100 of the low-side portion 304 of the example bridge rectifier circuit system 300 includes a first drain low-side voltage control circuit system 340 configured to generate a first drain low-side intermediate voltage 348 at the drain terminal 120a of the second low-side transistor 120. Fig.11As further depicted in FIG. 1 , the example first segment 1100 of the low side portion 304 of the example bridge rectifier circuit system 300 includes a first gate low side voltage control circuit system 344 configured to generate a first gate low side intermediate voltage 352 at a gate terminal of the second low side transistor 120. Both the first drain low side voltage control circuit system 340 and the first gate low side voltage control circuit system 344 utilize a gate maximum voltage generator circuit system 1188 configured to receive the DC voltage 110 and generate a gate maximum voltage 1102. The first drain low side voltage control circuit system 340 also includes a low side modified AC component generator circuit system 1186a configured to receive the gate maximum voltage 1102 and the first AC input 106 to generate the first drain low side intermediate voltage 348. However, the first gate low side voltage control circuitry 344 also includes low side modified AC component generator circuitry 1186 b configured to receive the gate maximum voltage 1102 and the second AC input 108 to generate the first gate low side intermediate voltage 352 .

[0120] like Fig.11 , a first segment 1100 of the low side portion 304 of the example bridge rectifier circuit system 300 includes a gate maximum voltage generator circuit system 1188. The gate maximum voltage generator circuit system 1188 is any electrical component or system of electrical components configured to output a gate maximum voltage 1102 based at least in part on the DC voltage 110 generated by the bridge rectifier circuit system 300, the gate maximum voltage 1102 defining a maximum voltage of each AC component (e.g., the first AC input 106, the second AC input 108). The gate maximum voltage 1102 at least in part indicates a maximum voltage of the intermediate voltage (e.g., the first drain low side intermediate voltage 348, the first gate low side intermediate voltage 352 supplied to the source terminal 120c and the gate terminal 120b of the second low side transistor 120, respectively).

[0121] In some embodiments, the gate maximum voltage 1102 varies based on the amplitude of the DC voltage 110. For example, the gate maximum voltage 1102 may be substantially equal to the DC voltage 110 until a maximum voltage is reached, after which the gate maximum voltage 1102 may remain at the maximum voltage while the DC voltage 110 continues to increase. In some embodiments, the gate maximum voltage generator circuit system 1188 may include one or more electrical components in common with the gate maximum voltage generator circuit system 888. Figure 12-13 A specific embodiment of the gate maximum voltage generator circuit system 1188 is shown. Fig.15 The gate maximum voltage 1102 is further described.

[0122] In some embodiments, gate maximum voltage generator circuitry 888 and gate maximum voltage generator circuitry 1188 may include a common shared circuitry block. In this case, Figure 8 and Fig. 9 The maximum gate voltage 802 depicted in FIG. Fig.11 and Fig.12 The gate maximum voltage 1102 depicted in the figure can be the same unique node. Both the gate maximum voltage generator circuit system 888 and the gate maximum voltage generator circuit system 1188 can be generated by the same circuit system based on the electrical ground 112 and the DC voltage 110, and transmitted to the low-side modified AC component generator circuit system 886a, 886b and the low-side modified AC component generator circuit system 1186a, 1186b respectively. Using a common circuit system to generate the gate maximum voltage 802 and the gate maximum voltage 1102 can reduce the total area and power consumption of the electrical components.

[0123] like Fig.11 As further depicted in FIG. 1 , the first drain low-side voltage control circuitry 340 and the first gate low-side voltage control circuitry 344 of the first segment 1100 of the low-side portion 304 of the example bridge rectifier circuitry 300 include low-side modified AC component generator circuitry 1186a, 1186b. Fig.11 , a first instance of the low side modified AC component generator circuitry 1186a receives the gate maximum voltage 1102 and generates a first drain low side intermediate voltage 348 based on the first AC input 106. Similarly, a second instance of the low side modified AC component generator circuitry 1186b receives the gate maximum voltage 1102 but generates a first gate low side intermediate voltage 352 based on the second AC input 108. The low side modified AC component generator circuitry 1186a, 1186b is any electrical component or system of electrical components configured to generate an intermediate voltage (e.g., first drain low side intermediate voltage 348, first gate low side intermediate voltage 352) based on an input voltage (e.g., first AC input 106, second AC input 108) and clamp based on a maximum voltage (e.g., gate maximum voltage 1102).

[0124] In some embodiments, the intermediate voltage (e.g., first drain low side intermediate voltage 348, first gate low side intermediate voltage 352) can substantially follow the AC input (e.g., second AC input 108, first AC input 106) when the AC input is lower than the supplied gate maximum voltage 1102. Once the AC input exceeds the supplied gate maximum voltage 1102, the intermediate voltage can stabilize and remain at the gate maximum voltage 1102. Fig.12A specific embodiment of the low-side modified AC component generator circuitry 1186a is shown. Fig.13 A specific embodiment of the low-side modified AC component generator circuitry 1186b is shown.

[0125] Reference now Fig.12 , provides a specific embodiment of the first drain low-side voltage control circuit system 340. Fig.12 As depicted in FIG. 1 , the first drain low side voltage control circuit system 340 includes an example gate maximum voltage generator circuit system 1188 configured to receive the DC voltage 110 and generate a gate maximum voltage 1102. Fig.12 As further depicted in , the example low side modified AC component generator circuitry 1186 a is configured to receive the gate maximum voltage 1102 and the first AC input 106 and generate a first drain low side intermediate voltage 348 .

[0126] like Fig.12 , the gate maximum voltage generator circuit system 1188 includes a Zener diode 1294, a first resistive element 1292, and a second resistive element 1290, which are electrically connected in series between the electrical ground 112 and the DC voltage 110, wherein the anode of the Zener diode 1294 is electrically connected to the electrical ground 112, and the cathode of the Zener diode 1294 is electrically connected to the first resistive element 1292. A tap point 1291 between the first resistive element 1292 and the second resistive element 1290 is electrically connected to the drain terminal 1296a and the body terminal 1296d of the pMOS transistor 1296. In addition, a tap point 1293 between the Zener diode 1294 and the first resistive element 1292 is electrically connected to the gate terminal 1296b of the pMOS transistor 1296. The source terminal 1296c of the pMOS transistor 1296 is electrically connected to the electrical ground 112. Thus, the gate maximum voltage 1102 generated by the gate maximum voltage generator circuitry 1188 is based at least in part on the threshold voltage of the Zener diode 1294 and the threshold voltage of the pMOS transistor 1296. For example, in the event that the DC voltage 110 is below the threshold voltage of the Zener diode 1294, the Zener diode 1294 is turned off and the gate maximum voltage 1102 is substantially equal to the DC voltage 110. However, in the event that the DC voltage is greater than the Zener diode 1294 plus the threshold voltage of the pMOS transistor 1296, the pMOS transistor 1296 is enabled (e.g., drives current) and the gate maximum voltage 1102 is clamped.

[0127] like Fig.12 As further depicted in FIG. 1 , the low-side modified AC component generator circuitry 1186a includes an nMOS transistor 1298a. Fig.12, the source terminal 1298a-c of the nMOS transistor 1298a is electrically connected to the first AC input 106, and the gate terminal 1298a-b is electrically connected to the gate maximum voltage 1102. Therefore, the first drain low side intermediate voltage 348 generated at the drain terminal 1298a-a of the nMOS transistor 1298a prevents the voltage difference between the drain terminal 120a and the gate terminal 120b of the first low side transistor 118 from exceeding the maximum voltage rating of the first low side transistor 118.

[0128] Reference now Fig.13 , a specific embodiment of the first gate low-side voltage control circuit system 344 is provided. Fig.13 As depicted in FIG. 1 , the first gate low-side voltage control circuit system 344 includes an example gate maximum voltage generator circuit system 1188 configured to receive the DC voltage 110 and generate a gate maximum voltage 1102. Fig.13 As further depicted in , the example low side modified AC component generator circuitry 1186 b is configured to receive the gate maximum voltage 1102 and the second AC input 108 and generate a first gate low side intermediate voltage 352 .

[0129] like Fig.13 As depicted in , the first gate low side voltage control circuit system 344 includes a gate maximum voltage generator circuit system 1188 . Fig.13 The example embodiment of the gate maximum voltage generator circuit system 1188 depicted in FIG. 1 is equivalent to Fig.12 The gate maximum voltage generator circuit system 1188 is depicted in FIG. Fig.11 As shown in , in some embodiments, the first segment 1100 of the low side portion 304 of the bridge rectifier circuit system 300 may include a shared gate maximum voltage generator circuit system 1188 configured to generate a gate maximum voltage 1102, which is supplied to both the low side modified AC component generator circuit system 1186a and the low side modified AC component generator circuit system 1186b.

[0130] like Fig.13 As further depicted in FIG. 1 , the low-side modified AC component generator circuitry 1186 b includes an nMOS transistor 1298 b. Fig.13, the source terminal 1298b_c of the nMOS transistor 1298b is electrically connected to the second AC input 108, and the gate terminal 1298b_b is electrically connected to the gate maximum voltage 1102. Therefore, the first gate low side intermediate voltage 352 generated at the drain terminal 1298b_a of the nMOS transistor 1298b prevents the voltage difference between the gate terminal 120b and the drain terminal 120a and between the gate terminal 120b and the source terminal 120c of the second low side transistor 120 from exceeding the maximum voltage rating of the first low side transistor 118.

[0131] Reference now Fig.14 , alternative embodiments of the example intermediate voltage discharge circuit systems 456, 656 are provided. Fig.14 As depicted in FIG. 1 , the example intermediate voltage discharge circuit system 456, 656 includes an nMOS transistor 1404 in a diode configuration, wherein a gate terminal 1404b is electrically connected to a drain terminal 1404a. An AC input 1406 is received at a source terminal 1404c of the nMOS transistor 1404. In addition, the example intermediate voltage discharge circuit system 456, 656 includes a pMOS transistor 1402. Fig.14 As depicted in FIG, the drain terminal 1402a of the pMOS transistor 1402 is electrically connected to the drain terminal 1404a of the nMOS transistor 1404, the gate terminal 1402b is electrically connected to the gate minimum voltage 466, 666, the body terminal 1402d is electrically connected to the body voltage 1464, and the source terminal 1402c is electrically connected to the high side intermediate voltage 1434.

[0132] like Fig.14 As depicted in FIG. 1 , the example embodiments of the intermediate voltage discharge circuit system 456, 656 may be used in the first high-side voltage control circuit system 330, the second high-side voltage control circuit system 332, or both. For example, in the first high-side voltage control circuit system 330, the example embodiments of the intermediate voltage discharge circuit system 456, 656 may be used in the first high-side voltage control circuit system 330, the second high-side voltage control circuit system 332, or both. Fig.14 In the case of the intermediate voltage discharge circuit system 456, 656, the AC input 1406 is electrically connected to the first AC input 106, the bulk voltage 1464 is electrically connected to the first bulk voltage 464, and the high-side intermediate voltage 1434 is electrically connected to the first high-side intermediate voltage 334. Similarly, in the second high-side voltage control circuit system 332, the Fig.14 In the case of the intermediate voltage discharge circuit system 456 , 656 , the AC input 1406 is electrically connected to the second AC input 108 , the bulk voltage 1464 is electrically connected to the second bulk voltage 664 , and the high side intermediate voltage 1434 is electrically connected to the second high side intermediate voltage 336 .

[0133] Reference now Fig.15, a graph 1500 is provided that depicts example gate maximum voltages (eg, gate maximum voltages 802, 1102) given an example input DC voltage (eg, DC voltage 110). Fig.15 As depicted in , the example gate maximum voltage is substantially equal to the DC voltage in the case where the DC voltage is less than the maximum voltage 1502. For DC voltages above the maximum voltage 1502, the gate maximum voltage is substantially equal to the maximum voltage 1502.

[0134] As described herein, the maximum voltage 1502 is determined based on electrical components of the gate maximum voltage generator circuitry (e.g., gate maximum voltage generator circuitry 888, gate maximum voltage generator circuitry 1188). For example, in some embodiments, the maximum voltage 1502 may be determined based at least in part on a threshold voltage of a Zener diode (e.g., Zener diode 994) and / or a threshold voltage of a transistor (e.g., pMOS transistor 996, pMOS transistor 1196) within the gate maximum voltage generator circuitry.

[0135] Reference now Fig.16 , a graph 1600 is provided that depicts example gate minimum voltages (eg, gate minimum voltages 466, 666) for a given example input DC voltage (eg, DC voltage 110). Fig.16 , the example gate minimum voltage is equal to 0 volts when the DC voltage is below the gate minimum threshold voltage 1602. In the event that the DC voltage exceeds the gate minimum threshold voltage 1602, the gate minimum voltage is substantially equal to the DC voltage minus the gate minimum threshold voltage 1602.

[0136] As described herein, the gate minimum threshold voltage 1602 is determined based on electrical components of the gate minimum voltage generator circuitry (e.g., gate minimum voltage generator circuitry 458, 658). For example, in some embodiments, the gate minimum threshold voltage 1602 may be determined based at least in part on a threshold voltage of a Zener diode (e.g., Zener diode 570, 770) and / or a threshold voltage of a transistor (e.g., transistor 568, 768) that constitutes the gate minimum voltage generator circuitry. Fig.16 As shown in , in the case where the DC voltage exceeds the gate minimum threshold voltage 1602, the gate minimum voltage is substantially equal to the DC voltage minus the gate minimum threshold voltage 1602.

[0137] Reference now Fig.17, depicts a graph 1700a depicting an example modified AC component voltage 1704a (e.g., modified AC component voltage 401, modified AC component voltage 601) when the DC voltage is below the gate minimum threshold voltage and a graph 1700b depicting an example modified AC component voltage 1704b when the DC voltage is above the gate minimum threshold voltage.

[0138] like Fig.17 As depicted in FIG. 1700 , the modified AC minimum voltage 1702a, 1702b is determined based on the internal electrical components of the modified AC component generator circuitry (e.g., the modified AC component generator circuitry 460, 660). For example, in the case where the DC voltage is below the gate minimum threshold voltage 1602 (as depicted in graph 1700a) and the Zener diode (e.g., Zener diode 570, Zener diode 770) is not driving current (e.g., in the “off” state), the modified AC minimum voltage 1702a can be determined based on the threshold voltage of the transistor (e.g., transistor 574, transistor 774). In this case, when the AC input voltage is higher than the modified AC minimum voltage 1702a plus the threshold (absolute value) of any internal electrical components (e.g., pMOS transistors 574, 774), the modified AC component voltage 1704a can be substantially equal to the AC input voltage 1706a. However, in the event that the AC input voltage 1706a drops below the modified AC minimum voltage 1702a (plus the absolute value of the threshold of the internal electrical components (e.g., pMOS transistors 574, 774)), the modified AC component voltage 1704a remains substantially equal to the modified AC minimum voltage 1702a (plus the absolute value of the threshold of the internal electrical components (e.g., pMOS transistors 574, 774)).

[0139] In the case where the DC voltage is above the gate minimum threshold voltage 1602 (as depicted in graph 1700b) and the Zener diode (e.g., Zener diode 570, Zener diode 770) is enabled (e.g., driving current), the modified AC minimum voltage 1702b can be determined based on the gate minimum voltage (e.g., gate minimum voltage 466, 666) and the threshold voltage of the transistor (e.g., transistor 574, transistor 774). In this case, when the AC input voltage is above the modified AC minimum voltage 1702b plus the threshold (absolute value) of any internal electrical components (e.g., pMOS transistors 574, 774), the modified AC component voltage 1704b can be substantially equal to the AC input voltage 1706b. However, in the event that the AC input voltage 1706 b drops below the modified AC minimum voltage 1702 b (plus the absolute value of the thresholds of the internal electrical components (e.g., pMOS transistors 574, 774)), the modified AC component voltage 1704 b remains substantially equal to the modified AC minimum voltage 1702 b (plus the absolute value of the thresholds of the internal electrical components (e.g., pMOS transistors 574, 774)). By generating a modified AC input voltage that remains above the modified AC minimum voltages 1702 a, 1702 b, the voltage control circuitry reduces the stress on the transistors of the bridge rectifier circuitry.

[0140] Although this detailed description has set forth some embodiments of the present invention, the appended claims cover other embodiments that differ from the described embodiments of the present invention according to various modifications and improvements. For example, it will be appreciated by those skilled in the art that these principles can be applied to any electronic device that utilizes a bridge rectifier circuit system. For example, wireless power receivers, power inverters, charger circuits, motors, voltage regulators, and other similar electrical devices. Within the appended claims, unless the specific terms "components for..." or "steps for..." are used in a given claim, it is not intended that the claim be interpreted in accordance with 35 U.S.C. 112, paragraph 6.

[0141] The use of broader terms such as "comprising," "including," and "having" should be understood to support narrower terms such as "consisting of," "consisting essentially of," and "consisting essentially of." The use of terms such as "optionally," "may," "might," "likely to," and the like with respect to any element of an embodiment means that the element is not required, or alternatively the element is required, both options being within the scope of the embodiment(s). Moreover, reference to examples is for illustrative purposes only, and is not intended to be exclusive.

Claims

1. A bridge rectifier circuit, configured to receive an alternating current (AC) voltage and generate a direct current (DC) voltage, the bridge rectifier circuit comprising: a plurality of rectifying transistors; as well as a voltage control circuit system configured to output the intermediate voltage to the terminals of the rectifying transistor, Wherein the intermediate voltage prevents a voltage difference across the terminals from exceeding a maximum voltage rating of the rectifying transistor.

2. The bridge rectifier circuit according to claim 1, wherein: Receiving an alternating current across a first AC input and a second AC input, the bridge rectifier circuit further comprising: High side section, including: a first high-side transistor; and The second high-side transistor, wherein the high-side portion is configured to generate the DC voltage; and The low side section includes: a first low-side transistor; and The second low-side transistor, Wherein the low side portion is configured to be connected to an electrical ground reference.

3. The bridge rectifier circuit according to claim 2, in, a first high-side voltage control circuitry electrically connected to a terminal of the first high-side transistor, and Wherein, the second high-side voltage control circuit system is electrically connected to the terminal of the second high-side transistor.

4. The bridge rectifier circuit according to claim 3, wherein: The first high-side transistor is configured in a diode configuration, wherein a drain terminal of the first high-side transistor is electrically connected to a gate terminal of the first high-side transistor.

5. The bridge rectifier circuit according to claim 4, wherein: The first high-side voltage control circuitry is electrically connected to a source terminal of the first high-side transistor, and wherein the first high-side voltage control circuitry generates a first high-side intermediate voltage at the source terminal of the first high-side transistor based at least in part on the first AC input and the DC voltage.

6. The bridge rectifier circuit according to claim 5, wherein: When the first AC input is lower than a minimum input voltage, the first high-side voltage control circuit system generates a first high-side intermediate voltage at a source terminal of the first high-side transistor, wherein a difference between the first AC input and the first high-side intermediate voltage is less than a first high-side maximum voltage rating of the first high-side transistor.

7. The bridge rectifier circuit according to claim 5, wherein: The first high-side voltage control circuitry exhibits a negligible voltage drop across the first high-side voltage control circuitry with the first AC input being above a maximum output voltage.

8. The bridge rectifier circuit system according to claim 5, wherein: The first high-side voltage control circuit system includes a first high-side voltage control transistor, wherein the drain terminal of the first high-side voltage control transistor is electrically connected to the drain terminal of the first high-side transistor, wherein a source terminal of the first high-side voltage control transistor is electrically connected to the DC voltage, and Wherein a gate terminal of the first high-side voltage control transistor is configured to receive a first modified AC component voltage based at least in part on the first AC input and the DC voltage.

9. The bridge rectifier circuit system according to claim 8, wherein: The first modified AC component voltage remains above a minimum high-side voltage control transistor voltage.

10. The bridge rectifier circuit system according to claim 9, wherein: A gate minimum voltage generator circuitry generates a gate minimum voltage based at least in part on a voltage difference between the DC voltage and the electrical ground.

11. The bridge rectifier circuit system according to claim 10, wherein: The minimum high side voltage control transistor voltage is based at least in part on the gate minimum voltage, which is generated at least in part based on the DC voltage.

12. The bridge rectifier circuit system according to claim 8, wherein: The first high-side voltage control circuitry also includes an intermediate voltage discharge circuitry configured to discharge the first high-side intermediate voltage based at least in part on the first AC input.

13. The bridge rectifier circuit system according to claim 10, wherein: The first modified AC component voltage is generated by modified AC component generator circuitry.

14. The bridge rectifier circuit system according to claim 13, wherein: The first modified AC component generator circuitry generates the first modified AC component voltage based at least in part on the gate minimum voltage generated by the gate minimum voltage generator circuitry, the first AC input, and a first bulk voltage generated by a bulk voltage generator circuitry.

15. The bridge rectifier circuit according to claim 5, wherein: a first drain low side voltage control circuit system electrically connected to the drain terminal of the second low side transistor and to the first AC input, wherein a first gate low-side voltage control circuit system is electrically connected to a gate terminal of the second low-side transistor and to the second AC input, wherein a second drain low-side voltage control circuit system is electrically connected to the drain terminal of the first low-side transistor and to the second AC input, and Wherein, a second gate low-side voltage control circuit system is electrically connected to the gate terminal of the first low-side transistor and is electrically connected to the first AC input.

16. The bridge rectifier circuit according to claim 15, wherein: The first drain low side voltage control circuitry is configured to generate a first drain low side intermediate voltage at a drain of the second low side transistor based at least in part on the first AC input and the DC voltage.

17. The bridge rectifier circuit according to claim 16, wherein: The first drain low side voltage control circuitry generates the first drain low side intermediate voltage such that a voltage difference between a drain terminal of the second low side transistor and a gate terminal of the second low side transistor is less than a maximum voltage rating of the second low side transistor.

18. The bridge rectifier circuit according to claim 16, wherein: With the second AC input greater than the first AC input, the first drain low side voltage control circuitry exhibits a negligible voltage drop across the first drain low side voltage control circuitry.

19. The bridge rectifier circuit according to claim 16, wherein: The first drain low side voltage control circuit system generates the first drain low side intermediate voltage based at least in part on a gate maximum voltage generated by a gate maximum voltage generator circuit system and the first AC input, and wherein the first gate low side voltage control circuit system generates the first gate low side intermediate voltage based at least in part on the gate maximum voltage generated by the gate maximum voltage generator circuit system and the second AC input.

20. A wireless power receiver, comprising: a wireless power receiver coil; as well as A bridge rectifier circuit is configured to receive an alternating current (AC) voltage and generate a direct current (DC) voltage, the bridge rectifier circuit comprising: a plurality of rectifying transistors; voltage control circuitry configured to output an intermediate voltage to a terminal of the rectifying transistor, Wherein the intermediate voltage prevents a voltage difference across the terminals from exceeding a maximum voltage rating of the rectifying transistor.

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