Compatible step-down and step-up voltage conversion circuit and switching power supply conversion chip

Abstract

Embodiments of the present disclosure provide a voltage conversion circuit and a switching power supply conversion chip that are compatible with step-down and step-up operations, including: a main circuit configured to receive an input voltage and regulate an output voltage by controlling the charging and discharging of an inductor coupled to the input voltage; a mode control circuit configured to output a first voltage signal or a second voltage signal according to the magnitude relationship between the input voltage and the output voltage; a first transistor coupled between the main circuit and the output voltage and configured to have its gate voltage controlled by the voltage signal output by the mode control circuit; a voltage loop control circuit configured to generate control signals for switching a first power transistor and a second power transistor in the main circuit according to the feedback of the output voltage and a reference voltage; and a protection circuit configured to protect the first power transistor. This solves problems existing in existing BOOST-type circuits, such as a large inrush current passing from the input to the output after power-on, the voltage obtained during compatible step-down being inverted, and the soft start process of step-up being uneven.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the technical field of power supplies, and more specifically, to a voltage conversion circuit and a switching power supply conversion chip that are compatible with buck and boost operations. Background Art

[0002] The BOOST circuit is a switching DC boost circuit that converts the input voltage into a higher output voltage by setting a reference voltage and a feedback coefficient. The main structure and connection relationship of the BOOST circuit are as Figure 1 shown, including an inductor L1, two power transistors (MLS, MHS), a feedback network, and a control circuit. Among them, D1 and D2 are the parasitic diodes of the two power transistors respectively.

[0003] As Figure 1 can be seen, in the BOOST circuit, there is a path formed by the inductor L1 and the diode D2 from the input to the output. This will cause a large inrush current to pass through this path after the input is powered on, raising the output voltage to slightly lower than the input. This is an undesirable phenomenon at the application end of the BOOST circuit. A normal startup process of a BOOST circuit should be controlled by an enable signal. After the input is powered on and before the enable signal is enabled, there is no path from the input to the output. After the enable signal is enabled, the BOOST circuit starts soft startup, and the output voltage rises in a controlled manner. To address the aforementioned problem, currently existing solutions usually solve it by switching the connection relationship of the body terminal of the high-side power transistor MHS so that its body terminal is connected to the drain or source terminal to switch the direction of the parasitic diode D2. However, the current solution will reduce the robustness of the circuit and increase the design complexity.

[0004] In addition, although BOOST is a boost circuit, in some cases, buck or boost applications need to be combined. To address this application requirement problem, the common solution is to use a BUCK-BOOST circuit. For a conventional two-transistor BUCK-BOOST circuit, its output voltage is out of phase with the input voltage, which is very inconvenient to use. For example, if you want to implement the BOOST function of converting 3.3V to 5V, when the input voltage is 3.3V, only -5V can be output instead of 5V. For a 4-transistor BUCK-BOOST circuit, 4 power transistors are required, which greatly increases the cost and the design complexity.

[0005] In addition, for Figure 1In the BOOST boost circuit, during the soft start process, the traditional solution is to control the gate voltage of the MHS to charge the output with a constant current until after a certain time of timing, and then switch the gate of the MHS to 0V or the input voltage Vin, and continue the soft start process through the voltage loop until the output voltage rises to the target value. The inventor found that this soft start control method would cause the soft start process to be uneven because the slope of the output voltage rise in the first constant current charging stage is different from that in the second voltage loop control stage. Therefore, after the constant current charging until the output voltage is equal to the input voltage, the output voltage will be maintained for a period of time and then continue to rise. As Figure 2 As shown in the corresponding simulation waveform diagram, the problem with this soft start control method is that the output voltage will be maintained at the same level as the input voltage for a period of time, and this time will also vary with the load conditions. During this period, the output voltage does not actually reach the target voltage. Therefore, for the subsequent circuit, it may be in an abnormal working state at this time. Summary of the Invention

[0006] The embodiments described herein provide a voltage conversion circuit and a switching power supply conversion chip that are compatible with buck and boost, in order to solve the problems existing in the above BOOST boost circuit.

[0007] According to a first aspect of the present disclosure, there is provided a voltage conversion circuit that is compatible with buck and boost. The voltage conversion circuit includes: a main circuit, a first transistor, a mode control circuit, a voltage loop control circuit, and a protection circuit. Among them, the main circuit is configured to receive an input voltage, adjust the output voltage by controlling the charging and discharging of an inductor coupled to the input voltage, and implement the charging and discharging control of the inductor by controlling the switching of a first power transistor and a second power transistor coupled to the inductor; the mode control circuit is configured to output a first voltage signal when the output voltage is less than the input voltage, and output a second voltage signal when the output voltage is equal to or greater than the input voltage; the first transistor is coupled between the main circuit and the output voltage and is configured to use the first voltage signal or the second voltage signal as the control gate signal of the first transistor, so that the first transistor operates in different working states and realizes the boost or buck of the voltage conversion circuit; the voltage loop control circuit is configured to generate a first control signal and a second control signal according to the feedback of the output voltage and a reference voltage, and output the first control signal and the second control signal to the main circuit to respectively control the switching of the first power transistor and the second power transistor, so that the output voltage is stabilized to the target voltage value; the protection circuit is coupled to the first power transistor and is configured to protect the gate-source voltage of the first power transistor from exceeding the maximum gate-source voltage.

[0008] Optionally, the mode control circuit includes: a mode control module and a first driver. The mode control module is configured to generate a mode control signal according to the magnitude relationship between the output voltage and the input voltage. The first driver is configured to output a corresponding mode voltage according to the level state of the mode control signal. The mode voltage includes the first voltage signal and the second voltage signal.

[0009] Optionally, the mode control module includes: a first voltage dividing resistor string, a second voltage dividing resistor string, a first comparator, and a first inverter. The first voltage dividing resistor string is coupled to the input voltage and is configured to detect the input voltage and couple the obtained input voltage detection result to the negative input terminal of the first comparator. The second voltage dividing resistor string is coupled to the output voltage and is configured to detect the output voltage and couple the obtained output voltage detection result to the positive input terminal of the first comparator. The output terminal of the first comparator is coupled to the input terminal of the first inverter, and the output terminal of the first inverter outputs the mode control signal.

[0010] Optionally, the first end of the first driver is coupled to the mode control signal, the second end of the first driver outputs the first voltage signal or the second voltage signal, the third end of the first driver is coupled to the first voltage signal, and the fourth end of the first driver is coupled to the second voltage signal. When the level state of the mode control signal is high, the first voltage signal is output. When the level state of the mode control signal is low, the second voltage signal is output.

[0011] Optionally, the first transistor is a P-type MOS transistor, the first voltage signal is equal to the input voltage, and the second voltage signal is a zero voltage.

[0012] Optionally, the main circuit includes the inductor, the first power transistor, and the second power transistor. One end of the inductor is coupled to the input voltage, and the other end of the inductor is respectively coupled to the first pole of the first power transistor and the first pole of the second power transistor. The second pole of the first power transistor is respectively coupled to the protection circuit and the second pole of the first transistor, and the control pole of the first power transistor is coupled to the first control signal. The second pole of the second power transistor is coupled to the ground terminal, and the control pole of the second power transistor is coupled to the second control signal.

[0013] Optionally, the voltage loop control circuit includes: a third voltage dividing resistor string, a current source, a capacitor, an error amplifier, a second comparator, a flip-flop, a second driver, a third driver, and a second inverter. The third voltage dividing resistor string is respectively coupled to the output voltage and the first input terminal of the error amplifier. One end of the current source is coupled to the power supply voltage, and the other end of the current source is respectively coupled to one end of the capacitor and the second input terminal of the error amplifier. The other end of the capacitor is coupled to the ground terminal. The third input terminal of the error amplifier is coupled to a reference voltage, and the output terminal of the error amplifier is coupled to the negative input terminal of the second comparator. The positive input terminal of the second comparator is coupled to a ramp compensation signal, and the output terminal of the second comparator is coupled to the reset input terminal of the flip-flop. The set input terminal of the flip-flop is coupled to a clock signal, and the output terminal of the flip-flop is respectively coupled to the input terminal of the second driver and the input terminal of the second inverter. The output terminal of the second driver outputs the second control signal. The output terminal of the second inverter is coupled to the input terminal of the third driver, and the output terminal of the third driver outputs the first control signal.

[0014] Optionally, the protection circuit includes: a zener diode. The anode of the zener diode is coupled to the ground terminal, and the cathode of the zener diode is respectively coupled to the second electrode of the first power transistor and the second electrode of the first transistor.

[0015] Optionally, the target voltage values corresponding to the boost or buck conversion of the voltage conversion circuit are different, and the ratio between the resistors in the third voltage dividing resistor string is adjusted according to the target voltage value.

[0016] According to a second aspect of the present disclosure, there is provided a switching power conversion chip, which includes the buck-boost compatible voltage conversion circuit according to any one of the above first aspects.

[0017] In the buck-boost compatible voltage conversion circuit and the switching power conversion chip according to the embodiments of the present disclosure, mainly a first transistor and a mode control circuit are added. The mode control circuit can generate a first voltage signal or a second voltage signal according to the magnitude relationship between the output voltage and the input voltage. The obtained first voltage signal or second voltage signal is used as the control electrode signal of the first transistor, so that the first transistor operates in different operating states, and cooperates with the voltage loop control circuit to realize the boost or buck of the voltage conversion circuit, and can ensure the in-phase of the output voltage and the input voltage, as well as the smooth soft start during the boost function. In addition, before the voltage conversion circuit is powered on and enabled, by controlling the control electrode voltage of the first transistor, the current path between the input and the output can also be cut off, avoiding the output voltage from rising to slightly lower than the input voltage. Description of the Drawings

[0018] To more clearly illustrate the technical solutions of the embodiments of the present disclosure, the accompanying drawings of the embodiments will be briefly described below. It should be understood that the following-described accompanying drawings only relate to some embodiments of the present disclosure and do not limit the present disclosure, where:

[0019] Figure 1 shows a schematic circuit diagram of an existing BOOST-type circuit;

[0020] Figure 2 shows a schematic diagram of the simulation waveform corresponding to the soft start of an existing BOOST-type circuit;

[0021] Figure 3 shows a schematic block diagram of a voltage conversion circuit compatible with buck and boost in an embodiment of the present disclosure;

[0022] Figure 4 shows a schematic block diagram of another voltage conversion circuit compatible with buck and boost in an embodiment of the present disclosure;

[0023] Figure 5 shows a schematic diagram of the waveform corresponding to the soft start during the boost application of a voltage conversion circuit compatible with buck and boost in an embodiment of the present disclosure;

[0024] Figure 6 shows an exemplary circuit diagram of a mode control circuit in an embodiment of the present disclosure;

[0025] Figure 7 shows a schematic block diagram of yet another voltage conversion circuit compatible with buck and boost in an embodiment of the present disclosure;

[0026] The elements in the accompanying drawings are schematic and not drawn to scale. Detailed Embodiments

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are some, but not all, of the embodiments of the present disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of the present disclosure without creative efforts also fall within the scope of protection of the present disclosure.

[0028] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the subject matter of this disclosure pertains. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and the relevant art, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, a statement that two or more parts are "connected" or "coupled" together shall mean that the parts are directly joined together or joined through one or more intervening components. Additionally, terms such as "first" and "second" are used only to distinguish one component (or part of a component) from another component (or another part of a component).

[0029] In all embodiments of the present disclosure, since the source and drain of a metal-oxide-semiconductor (MOS) transistor are symmetric, and the conduction current directions between the source and drain of an N-type transistor and a P-type transistor are opposite, in the embodiments of the present disclosure, the controlled intermediate terminal of the MOS transistor is referred to as the control electrode, and the remaining two terminals of the MOS transistor are respectively referred to as the first electrode and the second electrode. Additionally, terms such as "first" and "second" are used only to distinguish one component (or part of a component) from another component (or another part of a component).

[0030] To solve problems existing in the existing BOOST-type circuit, such as a large inrush current passing from the input to the output after power-on, the obtained voltage being inverted when compatible with bucking, and the soft start process of boosting being non-smooth, a new voltage conversion circuit structure that is compatible with bucking and boosting is proposed. The buck-boost compatible voltage conversion circuit in the embodiments of the present disclosure improves the existing two-power-transistor-structured BOOST-type circuit by adding a first transistor and a mode control circuit, realizes the compatibility of bucking and boosting applications and smooth soft start by controlling the control electrode voltage of the first transistor, and also cuts off the path from the input to the output before enabling, achieving isolation between the input and output before enabling after power-on. The buck-boost compatible voltage conversion circuit of the present disclosure will be described in detail below.

[0031] Figure 3 A schematic block diagram of the buck-boost compatible voltage conversion circuit 100 according to an embodiment of the present disclosure is shown, as Figure 3 shown, the buck-boost compatible voltage conversion circuit 100 includes: a main circuit 110, a first transistor M1, a mode control circuit 120, a voltage loop control circuit 130, and a protection circuit 140,

[0032] Among them, the main circuit 110 is configured to receive an input voltage Vin, regulate an output voltage Vout by controlling the charging and discharging of an inductor L coupled to the input voltage Vin, and implement the charging and discharging control of the inductor L by controlling the switching of a first power transistor MHS and a second power transistor MLS coupled to the inductor L;

[0033] This application is an improvement based on the existing BOOST circuit. The structure of the main circuit 110 in the embodiment of this application is the same as that of the main circuit 110 in the existing BOOST circuit structure with two power transistors. The specific structure is as Figure 4 shown. The main circuit 110 includes an inductor L, a first power transistor MHS, and a second power transistor MLS. Among them, one end of the inductor L is coupled to the input voltage Vin, and the other end of the inductor L is respectively coupled to the first pole of the first power transistor MHS and the first pole of the second power transistor MLS; the second pole of the first power transistor MHS is respectively coupled to the protection circuit 140 and the second pole of the first transistor M1, and the control pole of the first power transistor MHS is coupled to the first control signal VG_H; the second pole of the second power transistor MLS is coupled to the ground terminal, and the control pole of the second power transistor MLS is coupled to the second control signal VG_L. The first control signal VG_H controls the switching of the first power transistor MHS, and the second control signal VG_L controls the switching of the second power transistor MLS. During the charging process, the second control signal VG_L controls the second power transistor MLS to close, and the first control signal VG_H controls the first power transistor MHS to turn off. The input voltage Vin charges the inductor L, and the current in the inductor L increases linearly at a certain rate, which is related to the size of the inductor L. As the current in the inductor L increases, some energy is stored in the inductor L; during the discharging process, the second control signal VG_L controls the second power transistor MLS to turn off, and the first control signal VG_H controls the first power transistor MHS to close. The energy in the inductor L slowly releases energy through a new path; the process of continuous charging and discharging of the inductor L can regulate the output voltage Vout.

[0034] The mode control circuit 120 is configured to control the control electrode voltage (gate voltage) of the first transistor M1, thereby controlling the operating state of the first transistor M1, and further controlling the voltage conversion circuit compatible with buck and boost to achieve the boost or buck function. The mode control circuit 120 generates a voltage control signal capable of controlling the first transistor M1 to be in different operating states according to the magnitude relationship between the input voltage Vin and the output voltage Vout. Specifically, the mode control circuit 120 is configured to output a first voltage signal V1 when the output voltage Vout is less than the input voltage Vin, and output a second voltage signal V2 when the output voltage Vout is equal to or greater than the input voltage Vin. Further, in the embodiment of the present application, the first voltage signal V1 is equal to the input voltage Vin, and the second voltage signal V2 is a zero voltage.

[0035] The first transistor M1 is coupled between the main circuit 110 and the output voltage Vout, and is configured to use the first voltage signal V1 or the second voltage signal V2 as the control electrode signal of the first transistor M1, so that the first transistor M1 operates in different operating states and realizes the boost or buck of the voltage conversion circuit. In the embodiment of the present application, the first transistor M1 is a P-type MOS transistor. During the boost function, the output voltage Vout is higher than the input voltage Vin. The mode control circuit 120 outputs the second voltage signal V2, and the second voltage signal V2 is a zero voltage. Then, the control electrode voltage of the first transistor M1 is zero, and the first transistor M1 operates in the deep linear region, equivalent to a small resistor. By the periodic switching of the first power transistor MHS and the second power transistor MLS, the output voltage Vout can be adjusted to the target voltage value. During the buck function, the output voltage Vout is lower than the input voltage Vin. The mode control circuit 120 outputs the first voltage signal V1, and the first voltage signal V1 is the input voltage Vin. Then, the control electrode voltage of the first transistor M1 is the input voltage Vin, and the first transistor M1 operates in the saturation region. By the periodic switching of the first power transistor MHS and the second power transistor MLS, the voltage at point A can be raised to a voltage value higher than the input voltage Vin. After that, the first transistor M1 is turned on, and the output voltage Vout will gradually approach the target voltage value. At this time, the voltage at point A is determined by the load current and Vin, that is, the voltage at point A is Vin plus the gate-source voltage VGS of the first transistor M1. In addition, the first transistor M1 can also play a role in isolating the input and output before enabling after the circuit is powered on and suppressing the inrush current.

[0036] The voltage loop control circuit 130 is configured to generate a first control signal VG_H and a second control signal VG_L based on the feedback of the output voltage Vout and the reference voltage Vref, and output the first control signal VG_H and the second control signal VG_L to the main circuit 110 to control the switching of the first power transistor MHS and the second power transistor MLS respectively, so as to stabilize the output voltage Vout to a target voltage value. In this application, the voltage loop control circuit 130 has the same structure as the voltage loop control circuit 130 in the existing BOOST circuit. Both obtain the switching control signal based on the feedback of the output voltage Vout, the reference voltage Vref, and the ramp compensation signal Vramp, so as to control the switching of the first power transistor MHS and the second power transistor MLS, and make the output voltage Vout equal to the target voltage value. Specifically, as Figure 4 shown, the voltage loop control circuit 130 includes a third voltage dividing resistor string 131, a current source I, a capacitor C, an error amplifier EA, a second comparator Comp2, a flip-flop 132, a second driver Driver2, a third driver Driver3, and a second inverter NOT2. Among them, the third voltage dividing resistor string 131 is respectively coupled to the output voltage Vout and the first input terminal of the error amplifier EA. The third voltage dividing resistor string 131 is used to obtain the feedback voltage of the output voltage Vout. One end of the current source I is coupled to the power supply voltage VDD, and the other end of the current source I is respectively coupled to one end of the capacitor C and the second input terminal of the error amplifier EA. The other end of the capacitor C is coupled to the ground terminal. The third input terminal of the error amplifier EA is coupled to the reference voltage Vref, and the output terminal of the error amplifier EA is coupled to the negative input terminal of the second comparator Comp2. The positive input terminal of the second comparator Comp2 is coupled to the ramp compensation signal Vramp, and the output terminal of the second comparator Comp2 is coupled to the reset input terminal R of the flip-flop 132. The set input terminal S of the flip-flop 132 is coupled to the clock signal Clk, and the output terminal Q of the flip-flop 132 is respectively coupled to the input terminal of the second driver Driver2 and the input terminal of the second inverter NOT2. The output terminal of the second driver Driver2 outputs the second control signal VG_L. The output terminal of the second inverter NOT2 is coupled to the input terminal of the third driver Driver3, and the output terminal of the third driver Driver3 outputs the first control signal VG_H. It should be noted that the target voltage value is different under the boost function and the buck function, and the ratio between the resistors in the third voltage dividing resistor string 131 is adjusted according to the target voltage value.

[0037] The protection circuit 140 is coupled to the first power transistor MHS in the main circuit 110 and is configured to protect the gate-source voltage of the first power transistor MHS from exceeding the maximum gate-source voltage. The protection circuit 140 in the embodiment of the present application is mainly used to protect the first power transistor MHS. For example, in the analysis process of the above buck function, when the gate voltage of the first transistor M1 is Vin and the voltage at point A is Vin + the gate-source voltage VGS of the first transistor M1, when the first power transistor MHS is to be turned on, the control electrode voltage of the first power transistor MHS is zero. At this time, the gate-source voltage of the first power transistor MHS will be relatively large and may exceed the maximum gate-source voltage of the first power transistor MHS. Therefore, it is necessary to add the protection circuit 140 to protect it.

[0038] Combined with Figure 3-4 The working principle of the voltage conversion circuit 100 compatible with buck and boost in the embodiment of the present application will be described: After the voltage conversion circuit 100 compatible with buck and boost is powered on and before it is enabled, Vout is zero and Vout is less than Vin. Therefore, the mode control circuit 120 outputs the second voltage signal V2, and the second voltage signal V2 is equal to Vin. The direction of the parasitic diode D3 of M1 is opposite to the direction of the parasitic diode D1 of MHS. Therefore, the current path between Vin and Vout can be blocked through M1, playing a role in isolating the input and output and suppressing the inrush current. After the circuit is enabled, it enters soft start. At the beginning, Vout is 0 and lower than Vin. The mode control circuit 120 outputs the second voltage signal V2 equal to Vin. The gate voltage of M1 is Vin, and M1 operates in the saturation region. With the charging of I to C (which is also the soft start capacitor C) and the action of the voltage loop control circuit 130, Vout rises linearly. If the target voltage value is less than Vin, that is, in the buck application, when Vout rises to equal the target voltage value, the soft start ends; if the target voltage value is greater than Vin, that is, in the boost application, the soft start has not ended. When Vout rises to equal Vin, the mode control circuit 120 outputs the first voltage signal V1 equal to the zero voltage, the gate voltage of M1 is the zero voltage, and M1 operates in the deep linear region. Then Vout continues to rise until it equals the target voltage value and the soft start ends. During the soft start process of the boost application, Vout rises linearly and there is no such Figure 2 platform time (the output voltage Vout will maintain at the same level as the input voltage Vin for a period of time) as shown in the prior art, realizing a smooth soft start. Exemplarily, as Figure 5 shown, it is a waveform schematic diagram of the soft start corresponding to the boost application of the voltage conversion circuit compatible with buck and boost in the embodiment of the present application. It can also be seen from Figure 5 that Vout rises linearly before reaching the target voltage value and there is no such Figure 2The platform time shown. Additionally, Vout and Vin are in phase, which is more convenient to use compared to the prior art where Vout and Vin are out of phase.

[0039] As can be seen from the above description, in the voltage conversion circuit that is compatible with buck and boost in the embodiments of the present disclosure, the first transistor M1 and the mode control circuit 120 are added. The mode control circuit 120 is capable of generating a first voltage signal V1 or a second voltage signal V2 according to the magnitude relationship between the output voltage Vout and the input voltage Vin. The obtained first voltage signal V1 or second voltage signal V2 serves as the control gate signal of the first transistor M1, enabling the first transistor M1 to operate in different working states, and cooperating with the voltage loop control circuit to achieve buck or boost of the voltage conversion circuit. Moreover, it can ensure that the output voltage Vout is in phase with the input voltage Vin, and smooth soft start during the boost function. Additionally, before the voltage conversion circuit is powered on and enabled, by controlling the control gate voltage of the first transistor M1, the current path between the input and output can also be cut off.

[0040] Further, as Figure 6 shown, the mode control circuit 120 includes: a mode control module 121, a first driver Driver1. Among them, the mode control module 121 is configured to generate a mode control signal MODE according to the magnitude relationship between the output voltage Vout and the input voltage Vin; the first driver Driver1 is configured to output a corresponding mode voltage according to the level state of the mode control signal MODE, and the mode voltage includes the first voltage signal V1 and the second voltage signal V2.

[0041] Further, as Figure 6 shown, the mode control module includes: a first voltage dividing resistor string 1211, a second voltage dividing resistor string 1212, a first comparator Comp1, a first inverter NOT1. Among them, the first voltage dividing resistor string 1211 is coupled to the input voltage Vin and is configured to detect the input voltage Vin, and couple the obtained input voltage Vin detection result to the negative input terminal of the first comparator Comp1; the second voltage dividing resistor string 1212 is coupled to the output voltage Vout and is configured to detect the output voltage Vout, and couple the obtained output voltage Vout detection result to the positive input terminal of the first comparator Comp1; the output terminal of the first comparator Comp1 is coupled to the input terminal of the first inverter NOT1, and the output terminal of the first inverter NOT1 outputs the mode control signal MODE. Both the first voltage dividing resistor string 1211 and the second voltage dividing resistor string 1212 are composed of two series resistors. Specifically, according to Figure 6According to the working principle of the medium mode control module, when the output voltage Vout is less than the input voltage Vin, the mode control signal MODE is at a high level; when the output voltage Vout is greater than or equal to the input voltage Vin, the mode control signal MODE is at a low level.

[0042] As Figure 6 described above, the first terminal of the first driver Driver1 is coupled to the mode control signal MODE, the second terminal of the first driver Driver1 outputs the first voltage signal V1 or the second voltage signal V2, the third terminal of the first driver Driver1 is coupled to the first voltage signal V1, and the fourth terminal of the first driver Driver1 is coupled to the second voltage signal V2. Wherein, when the level state of the mode control signal MODE is high (high level), the first voltage signal V1 is output; when the level state of the mode control signal MODE is low (low level), the second voltage signal V2 is output. Further, the first voltage signal V1 is equal to the input voltage Vin, and the second voltage signal V2 is a zero voltage.

[0043] Further, as Figure 7 shown, the protection circuit 140 is a zener diode DZ. The positive electrode of the zener diode DZ is coupled to the ground terminal, and the negative electrode of the zener diode DZ is respectively coupled to the second pole of the first power transistor MHS and the second pole of the first transistor M1. When the gate voltage of the M1 transistor is connected to Vin, and the voltage at point A is equal to Vin + VGS of M1. When MHS is to be turned on, the gate voltage of MHS is 0. At this time, the gate-source voltage of MHS will be relatively large. After adding DZ, the gate-source voltage of MHS can be protected from exceeding the maximum gate-source voltage. In addition, DZ can also play a protective role during an electrostatic discharge event (ESD event).

[0044] The embodiment of the present disclosure also provides a switching power conversion chip, and the switching power conversion chip includes the voltage conversion circuit 100 that is compatible with buck and boost described in the above embodiments of the present application. Therefore, the switching power conversion chip can be configured as a buck chip or a boost chip according to actual requirements, and input-output isolation can be achieved before enabling.

[0045] In summary, the voltage conversion circuit that is compatible with buck and boost in the embodiment of the present disclosure can achieve the compatibility of boost and buck applications and smooth soft start while ensuring a simple circuit structure and in-phase input and output. At the same time, it also cuts off the path from input to output before enabling to suppress inrush current.

[0046] Unless the context clearly indicates otherwise, as used herein and in the appended claims, the singular forms of words include the plural, and vice versa. Thus, when referring to the singular, it generally includes the plural of the corresponding term. Similarly, the terms "comprising" and "including" will be interpreted as inclusive rather than exclusive. Likewise, the term "including" and "or" should be interpreted as inclusive, unless such an interpretation is explicitly prohibited herein. Where the term "exemplary" is used herein, particularly when it is located after a list of terms, "exemplary" is merely illustrative and explanatory and should not be considered exclusive or exhaustive.

[0047] Further aspects and scopes of adaptability become apparent from the description provided herein. It should be understood that the various aspects of the present disclosure may be implemented individually or in combination with one or more other aspects. It should also be understood that the description herein and the specific examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure.

[0048] The above has described in detail several embodiments of the present disclosure. However, it is obvious that those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the present disclosure. The protection scope of the present disclosure is defined by the appended claims.

Claims

1. A voltage conversion circuit compatible with step-down and step-up, characterized in that The voltage conversion circuit includes: a main circuit, a first transistor, a mode control circuit, a voltage loop control circuit, and a protection circuit. Among them, the main circuit is configured to receive an input voltage, regulate the output voltage by controlling the charging and discharging of an inductor coupled to the input voltage, and implement the charging and discharging control of the inductor by controlling the switching of a first power transistor and a second power transistor coupled to the inductor. The mode control circuit is configured to output a first voltage signal when the output voltage is less than the input voltage, and output a second voltage signal when the output voltage is equal to or greater than the input voltage. The first voltage signal is equal to the input voltage, and the second voltage signal is a zero voltage. The first transistor is coupled between the main circuit and the output voltage, and is configured to use the first voltage signal or the second voltage signal as the control gate signal of the first transistor, so that the first transistor operates in different operating states and realizes the step-up or step-down of the voltage conversion circuit. The voltage loop control circuit is configured to generate a first control signal and a second control signal according to the feedback of the output voltage and a reference voltage, and output the first control signal and the second control signal to the main circuit to respectively control the switching of the first power transistor and the second power transistor, so that the output voltage is stabilized to a target voltage value. The protection circuit is coupled to the first power transistor and is configured to protect the gate-source voltage of the first power transistor from exceeding the maximum gate-source voltage.

2. The voltage conversion circuit compatible with buck and boost according to claim 1, wherein The mode control circuit includes: a mode control module and a first driver. Among them, the mode control module is configured to generate a mode control signal according to the magnitude relationship between the output voltage and the input voltage. The first driver is configured to output a corresponding mode voltage according to the level state of the mode control signal. The mode voltage includes the first voltage signal and the second voltage signal.

3. The voltage conversion circuit compatible with buck and boost according to claim 2, characterized in that, The mode control module includes: a first voltage dividing resistor string, a second voltage dividing resistor string, a first comparator, and a first inverter. Among them, the first voltage dividing resistor string is coupled to the input voltage and is configured to detect the input voltage, and couple the obtained input voltage detection result to the negative input terminal of the first comparator. The second voltage dividing resistor string is coupled to the output voltage and is configured to detect the output voltage, and couple the obtained output voltage detection result to the positive input terminal of the first comparator. The output terminal of the first comparator is coupled to the input terminal of the first inverter, and the output terminal of the first inverter outputs the mode control signal.

4. The voltage conversion circuit compatible with buck and boost according to claim 3, characterized in that, [[ID= 5. The voltage conversion circuit compatible with buck and boost according to claim 4, wherein The first transistor is a P-type MOS transistor.

6. The step-down and step-up compatible voltage conversion circuit according to claim 5, characterized in that, The main circuit includes the inductor, the first power transistor, and the second power transistor. One end of the inductor is coupled to the input voltage, and the other end of the inductor is respectively coupled to the first pole of the first power transistor and the first pole of the second power transistor. The second pole of the first power transistor is respectively coupled to the protection circuit and the second pole of the first transistor, and the control pole of the first power transistor is coupled to the first control signal. The second pole of the second power transistor is coupled to the ground terminal, and the control pole of the second power transistor is coupled to the second control signal.

7. The voltage conversion circuit compatible with step-down and step-up according to claim 6, wherein The voltage loop control circuit includes: a third voltage dividing resistor string, a current source, a capacitor, an error amplifier, a second comparator, a trigger, a second driver, a third driver, and a second inverter. The third voltage dividing resistor string is respectively coupled to the output voltage and the first input terminal of the error amplifier. One end of the current source is coupled to the power supply voltage, the other end of the current source is respectively coupled to one end of the capacitor and the second input terminal of the error amplifier, and the other end of the capacitor is coupled to the ground terminal. The third input terminal of the error amplifier is coupled to a reference voltage, and the output terminal of the error amplifier is coupled to the negative input terminal of the second comparator. The positive input terminal of the second comparator is coupled to a slope compensation signal, and the output terminal of the second comparator is coupled to the reset input terminal of the trigger. The set input terminal of the trigger is coupled to a clock signal, and the output terminal of the trigger is respectively coupled to the input terminal of the second driver and the input terminal of the second inverter. The output terminal of the second driver outputs the second control signal. The output terminal of the second inverter is coupled to the input terminal of the third driver, and the output terminal of the third driver outputs the first control signal.

8. The voltage conversion circuit compatible with buck and boost according to claim 5, characterized in that, The protection circuit includes: a zener diode. One end of the zener diode is coupled to the ground terminal, and the other end of the zener diode is respectively coupled to the second pole of the first power transistor and the second pole of the first transistor.

9. The step-down and step-up compatible voltage conversion circuit according to claim 7, wherein the corresponding target voltage values when the voltage conversion circuit realizes step-up or step-down are different, and the ratio between the resistors in the third voltage dividing resistor string is adjusted according to the target voltage value.

10. A switching power supply conversion chip, characterized in that, The switching power supply conversion chip includes the step-down and step-up compatible voltage conversion circuit according to any one of claims 1 to 9 above.

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