Output swing amplification circuit for annular voltage-controlled oscillator

Abstract

The invention discloses an output swing amplification circuit for an annular voltage-controlled oscillator, and the circuit employs a modular design, enables a differential output signal of the annular voltage-controlled oscillator to move a DC common mode level through a capacitor, and then obtains a small differential AC signal. Differential alternating-current small signals are sequentially processed through the differential input circuit, the swing amplification circuit and the double-end-to-single-end output circuit, and the complete conversion process from the differential small signals of the annular voltage-controlled oscillator to single-end full-swing square wave signals is efficiently achieved. The application of the differential structure effectively improves the anti-interference capability and reduces waveform distortion, the modular design reduces the circuit complexity and improves the amplification efficiency, the input end is compatible with the annular voltage-controlled oscillator circuit, and the output end can directly drive a digital circuit. The problems of low amplitude amplification efficiency, waveform distortion and high circuit complexity in a traditional circuit are solved, so that the quality and the stability of an output signal of the ring voltage-controlled oscillator are improved.

Description

Technical Field

[0001] The invention relates to the technical field of electronic power, and in particular to an output swing amplification circuit for a ring voltage-controlled oscillator. Background Art

[0002] As the core module of RF transceivers, clock generation circuits and frequency synthesis systems, the amplitude and waveform quality of the output signal of the ring voltage-controlled oscillator (VCO) directly affect the locking speed, phase noise performance and driving capability of the subsequent circuits (such as dividers and mixers) of the phase-locked loop (PLL). Ring voltage-controlled oscillators (Ring VCOs) are widely used in clock generation, serial links and low-power Internet of Things (IoT) systems due to their compact structure, wide tuning range and easy integration. However, as the CMOS process node enters the deep submicron stage and the power supply voltage drops to 1V or even lower, the core performance of the ring VCO faces severe challenges: 1. Limited swing and waveform degradation: Ring VCO is usually composed of multiple differential delay units connected end to end, and its single-stage output swing is limited by the margin between the power supply voltage and the transistor threshold voltage. Under low voltage, the differential swing of the delay unit is significantly attenuated, causing the overall ring oscillator output waveform to be closer to a sine wave rather than a full-swing square wave, which not only reduces the trigger reliability of the subsequent digital circuits (such as the divider), but also aggravates the phase noise due to the reduced slope; 2. Common-mode level mismatch: The differential output of the ring VCO usually has a high DC common-mode level (close to VDD / 2), while the subsequent circuits (such as digital control modules or single-ended logic gates) often require the common-mode level of the input signal to be close to ground (GND) or power supply (VDD). Direct coupling will cause signal distortion or static operating point offset due to level conflict. Traditional solutions rely on level shifting circuits, but introduce additional power consumption and delay; 3. Power consumption-area trade-off dilemma: To compensate for swing attenuation, existing technologies often use cascade amplifiers or dynamic current enhancement technology, but the former requires multiple gain stages (such as a common-source amplifier chain), which results in exponential increases in power consumption and area; the latter increases the swing by dynamically adjusting the tail current, but requires a complex bias control loop and is easily affected by parasitic parameters at high frequencies, resulting in reduced stability.

[0003] Limitations of existing solutions: 1. Passive inductor peaking: Although the swing amplitude at a specific frequency can be increased through LC resonance, the wide tuning characteristics of the ring VCO conflict with the narrowband characteristics of the on-chip inductor. In addition, the area occupied by the inductor and the sensitivity to process fluctuations make it unsuitable for high-integration scenarios.

[0004] 2. Adaptive body bias technology: Dynamically adjust the PMOS / NMOS body voltage to lower the threshold voltage to expand the swing, but it requires an additional charge pump or DAC circuit, which significantly increases the design complexity and power consumption, and is sensitive to process deviations.

[0005] In emerging applications such as millimeter-wave near-field communications and high-density sensor arrays, the system requires that the ring VCO can still output a rail-to-rail square wave signal at an ultra-low voltage (such as 0.6-0.8V) to directly drive the subsequent analog-to-digital hybrid circuit, while avoiding additional jitter or power consumption introduced by swing amplification. However, traditional solutions are difficult to balance low-voltage compatibility, signal integrity, and energy efficiency, becoming a key bottleneck restricting the development of high-efficiency RF SoCs.

[0006] For a ring VCO, the cascaded nature of its multi-stage delay cells causes the output signal swing to be limited by the weakest single stage, and parasitic capacitance further weakens the effective swing at high frequencies. Summary of the invention

[0007] The object of the present invention is to provide an output swing amplifier circuit for a ring voltage controlled oscillator, so as to solve the problems of low amplitude amplification efficiency, waveform distortion and high circuit complexity existing in traditional circuits.

[0008] The present invention provides an output swing amplification circuit for a ring voltage-controlled oscillator, comprising: A differential input circuit is used to obtain a differential signal by superimposing a differential AC small signal on a DC common mode level; The swing amplifier circuit comprises a differential input stage and a decision circuit; the differential input stage is used to receive the differential signal; the decision circuit amplifies the differential signal based on a positive feedback amplifier and converts it into a differential square wave signal; And, a double-ended to single-ended output circuit is used to convert the amplified differential square wave signal into a single-ended output square wave signal.

[0009] Further, the differential input circuit includes: a first PMOS transistor MP1 and a second PMOS transistor MP2; The source of the first PMOS transistor MP1 is electrically connected to the power supply voltage VDD, the gate receives the first differential AC small signal CLK, and the drain outputs the first differential signal to the first input terminal of the swing amplifier circuit; The source of the second PMOS transistor MP2 is electrically connected to the power supply voltage VDD, the gate receives the second differential AC small signal CLKB, and the drain outputs the second differential signal to the second input terminal of the swing amplifier circuit; The first current source IA and the second current source IB are electrically connected to the drains of the first PMOS transistor MP1 and the second PMOS transistor MP2 respectively and are grounded.

[0010] Further, the differential input stage includes a third PMOS transistor MP3 and a fourth PMOS transistor MP4; The sources of the third PMOS tube MP3 and the fourth PMOS tube MP4 are electrically connected to the power supply voltage, and the gates of the third PMOS tube MP3 and the fourth PMOS tube MP4 are respectively connected to the first differential signal and the second differential signal; the drains of the third PMOS tube MP3 and the fourth PMOS tube MP4 are connected to the first input terminal and the second input terminal of the decision circuit.

[0011] Further, the decision circuit includes a first NMOS transistor MN1, a second NMOS transistor MN2, a third NMOS transistor MN3 and a fourth NMOS transistor MN4; The gate of the first NMOS transistor MN1 is respectively connected to the drain of the fourth PMOS transistor MP4 and the drain of the second NMOS transistor MN2, and the drain of the first NMOS transistor MN1 is respectively connected to the gate of the second NMOS transistor MN2 and the drain of the third PMOS transistor MP3; The gate of the second NMOS transistor MN2 is respectively connected to the drain of the third PMOS transistor MP3 and the drain of the first NMOS transistor MN1, and the drain of the second NMOS transistor MN2 is respectively connected to the drain of the fourth PMOS transistor MP4 and the gate of the first NMOS transistor MN1; The sources of the first NMOS transistor MN1 and the second NMOS transistor MN2 are both grounded; The gate of the third NMOS transistor MN3 is connected to the drain of the first NMOS transistor MN1, the source is grounded, and the gate is connected to the drain of the third NMOS transistor MN3; The gate of the fourth NMOS transistor MN4 is connected to the drain of the second NMOS transistor MN2 , the source is grounded, and the gate is connected to the drain of the fourth NMOS transistor MN4 .

[0012] Further, the double-end to single-end output circuit includes a fifth PMOS tube MP5, a sixth PMOS tube MP6, a fifth NMOS tube MN5 and a sixth NMOS tube MN6; The sources of the fifth PMOS transistor MP5 and the sixth PMOS transistor MP6 are connected to the power supply voltage VDD, the gates are interconnected, the drains are connected to the drains of the fifth NMOS transistor MN5 and the sixth NMOS transistor MN6 respectively, and the gate of the fifth PMOS transistor MP5 is also connected to its drain; The sources of the fifth NMOS transistor MN5 and the sixth NMOS transistor MN6 are grounded, and the gates are connected to the drains of the third PMOS transistor MP3 and the fourth PMOS transistor MP4 respectively.

[0013] Furthermore, the ring voltage-controlled oscillator is a three-stage ring oscillator.

[0014] Furthermore, the first output terminal and the second output terminal of the ring voltage-controlled oscillator are coupled to the differential input circuit via a first capacitor C1 and a second capacitor C2, respectively.

[0015] Compared with the prior art, the present invention has at least the following technical effects: The present invention adopts modular design, and processes differential AC small signals in sequence through three functional modules: differential input circuit, swing amplification circuit and double-ended to single-ended output circuit, and efficiently realizes the complete conversion process from differential small signals of ring voltage-controlled oscillator to single-ended full-swing square wave signal. The application of differential structure effectively improves anti-interference ability and reduces waveform distortion, modular design reduces circuit complexity and improves amplification efficiency, and the input end is compatible with the ring voltage-controlled oscillator circuit, and the output end can directly drive the digital circuit, which solves the problems of low amplitude amplification efficiency, waveform distortion and high circuit complexity in traditional circuits, thereby improving the quality and stability of the output signal of the ring voltage-controlled oscillator and the adaptability of subsequent circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of the structure of a ring voltage controlled oscillator according to an embodiment of the present invention; Figure 2 It is a structural schematic diagram of an output swing amplifier circuit in one embodiment of the present invention; Figure 3 1 is a signal waveform diagram of a first differential AC small signal CLK in an embodiment of the present invention; Figure 4 is a signal waveform diagram of a second differential AC small signal CLKB in one embodiment of the present invention; Figure 5 4 is a waveform diagram of a single-ended output square wave signal in one embodiment of the present invention. DETAILED DESCRIPTION

[0017] The following is a description of an output swing amplifier circuit for a ring voltage controlled oscillator of the present invention in conjunction with a schematic diagram, wherein a preferred embodiment of the present invention is shown. It should be understood that those skilled in the art can modify the present invention described herein while still achieving the advantageous effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art, and not as a limitation of the present invention.

[0018] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and in non-precise proportions, and are only used to facilitate and clearly assist in illustrating the purpose of the embodiments of the present invention.

[0019] Please refer to Figure 1-Figure 2 This embodiment discloses an output swing amplification circuit for a ring voltage controlled oscillator, comprising: The differential input circuit 1 is used for obtaining a differential signal by superimposing a differential AC small signal on a DC common mode level.

[0020] A swing amplifier circuit 2, the swing amplifier circuit 2 includes a differential input stage and a decision circuit, wherein the differential input stage is used to receive the differential signal, and the decision circuit converts the differential signal into a differential square wave signal after amplification based on a positive feedback amplifier. And a double-ended to single-ended output circuit 3, used to convert the amplified differential square wave signal into a single-ended output square wave signal CLK_OUT.

[0021] The output swing amplification circuit for the ring voltage-controlled oscillator disclosed in this embodiment adopts a modular design, and the differential AC small signal output by the ring voltage-controlled oscillator is processed in sequence through three functional modules: differential input circuit 1, swing amplification circuit 2, and double-ended to single-ended output circuit 3, thereby efficiently realizing the complete conversion process from the differential small signal of the ring voltage-controlled oscillator to the single-ended full-swing square wave signal. The application of the differential structure effectively improves the anti-interference ability and reduces the waveform distortion, and the modular design reduces the circuit complexity and improves the amplification efficiency. At the same time, the input end is compatible with the ring voltage-controlled oscillator circuit, and the output end can directly drive the digital circuit. The characteristics solve the problems of low amplitude amplification efficiency, waveform distortion, and high circuit complexity in traditional circuits, thereby improving the quality and stability of the output signal of the ring voltage-controlled oscillator and the adaptability of subsequent circuits.

[0022] In a specific embodiment, please refer to Figure 1 , also including a ring voltage controlled oscillator.

[0023] In a specific embodiment, the ring voltage controlled oscillator is a three-stage ring oscillator.

[0024] Specifically, the three-stage ring oscillator includes three differential amplifiers connected in series.

[0025] Among them, the positive input terminal and the negative input terminal of the second differential amplifier U2 are electrically connected to the negative output terminal and the positive output terminal of the first differential amplifier U1, respectively, the positive input terminal and the negative input terminal of the third differential amplifier U3 are electrically connected to the negative output terminal and the positive output terminal of the second differential amplifier U2, respectively, the positive output terminal and the negative output terminal of the third differential amplifier U3 are electrically connected to the negative input terminal and the positive input terminal of the first differential amplifier U1, respectively, and the differential output terminal of the third differential amplifier U3 is coupled to the differential input circuit 1 through the first capacitor C1 and the second capacitor C2, respectively.

[0026] It can be understood that the ring voltage-controlled oscillator (VCO) is a current-controlled three-stage ring oscillator, and its output differential signals VP1 and VN1 are sinusoidal signals with a swing of about 0.6VDD (power supply voltage VDD) and a common-mode voltage of about 0.7VDD. After coupling through the first capacitor C1 and the second capacitor C2, differential AC small signals CLK and CLKB with the DC common-mode level removed are obtained. Since such a signal cannot be directly transmitted to the subsequent digital circuit, it is also necessary to shape it into a square wave and establish a new common-mode level at 0.5*VDD so that the swing of the final output signal reaches VDD.

[0027] In order to generate a square wave signal that meets the working requirements, the present invention is designed as follows Figure 2 The output swing amplifier circuit for a ring voltage-controlled oscillator shown in the figure comprises a differential input circuit 1, a swing amplifier circuit 2 and a double-ended to single-ended output circuit 3.

[0028] In a specific implementation, the differential input circuit 1 includes: a first PMOS transistor MP1 and a second PMOS transistor MP2.

[0029] Specifically, the source of the first PMOS tube MP1 is electrically connected to the power supply voltage VDD, the gate receives the first differential AC small signal CLK, and the drain outputs the first differential signal to the first input end of the swing amplifier circuit 2; the source of the second PMOS tube MP2 is electrically connected to the power supply voltage VDD, the gate receives the second differential AC small signal CLKB, and the drain outputs the second differential signal to the second input end of the swing amplifier circuit 2; the first current source IA and the second current source IB are electrically connected to the drains of the first PMOS tube MP1 and the second PMOS tube MP2 respectively and are grounded.

[0030] In this embodiment, the differential input circuit 1 establishes a stable DC common-mode level through a PMOS tube and a current source, and superimposes an AC small signal thereon, thereby maintaining the AC characteristics of the AC small signal and providing a stable operating point for subsequent amplification operations through the DC common-mode level.

[0031] In this embodiment, the swing amplifier circuit 2 includes: a differential input stage for receiving the first differential signal and the second differential signal, and a decision circuit for amplifying the differential signal and converting it into a differential square wave signal.

[0032] In a specific embodiment, the differential input stage includes a third PMOS transistor MP3 and a fourth PMOS transistor MP4.

[0033] Specifically, the sources of the third PMOS tube MP3 and the fourth PMOS tube MP4 are electrically connected to the power supply voltage VDD, and the gates of the third PMOS tube MP3 and the fourth PMOS tube MP4 are respectively connected to the first differential signal and the second differential signal; the drains of the third PMOS tube MP3 and the fourth PMOS tube MP4 are connected to the first input terminal and the second input terminal of the judgment circuit.

[0034] In another specific embodiment, the decision circuit includes a first NMOS transistor MN1, a second NMOS transistor MN2, a third NMOS transistor MN3 and a fourth NMOS transistor MN4.

[0035] The gate of the first NMOS transistor MN1 is respectively connected to the drain of the fourth PMOS transistor MP4 and the drain of the second NMOS transistor MN2, and the drain of the first NMOS transistor MN1 is respectively connected to the gate of the second NMOS transistor MN2 and the drain of the third PMOS transistor MP3; The gate of the second NMOS transistor MN2 is respectively connected to the drain of the third PMOS transistor MP3 and the drain of the first NMOS transistor MN1, and the drain of the second NMOS transistor MN2 is respectively connected to the drain of the fourth PMOS transistor MP4 and the gate of the first NMOS transistor MN1; The sources of the first NMOS transistor MN1 and the second NMOS transistor MN2 are both grounded; The gate of the third NMOS transistor MN3 is connected to the drain of the first NMOS transistor MN1, the source is grounded, and the gate is connected to the drain of the third NMOS transistor MN3; The gate of the fourth NMOS transistor MN4 is connected to the drain of the second NMOS transistor MN2 , the source is grounded, and the gate is connected to the drain of the fourth NMOS transistor MN4 .

[0036] Based on the above decision circuit, assuming that the currents of MP3 and MP4 are and , the drain voltages of MN3 and MN4 are and .if Much greater than When MN3 and MN2 are turned on, MN1 is turned off. , .at this time is about 0V, for: ; If it starts to grow and reduce , when the gate-source voltage of MN4 tube is equal to When the gate-source voltage of MN4 exceeds When the MN1 tube starts to draw current, Drops, and MN2 tube is cut off.

[0037] When the MN4 tube is about to start conducting (that is, the gate-source voltage of the MN4 tube approaches ), the current flowing through the MN2 tube is: ; The current flowing through MN3 is: ; The current in MN2 is a mirror image of the current in MN3 at the transition point, so: ; if = , then when the current When the output voltage reverses, if ≠ , the decision circuit will show hysteresis effect.

[0038] It can be seen that this embodiment forms a positive feedback amplifier through the cross connection of MN1 and MN2, and cooperates with the diode structure of MN3 and MN4 to introduce hysteresis characteristics in the differential signal amplification process. The positive feedback amplifier speeds up the signal flipping speed and provides a greater gain, while the diode structure produces a negative resistance characteristic, providing a hysteresis effect during the amplification process. This design not only enables the circuit to flip quickly when the signal reaches the threshold, improves the edge steepness of the output waveform, but also enhances the circuit's anti-noise ability through the hysteresis characteristic. At the same time, the source grounding design provides a stable reference potential for the circuit, ensuring the stability of the output signal. The overall design realizes efficient amplification and waveform shaping of the differential signal, and significantly improves the quality of the output differential square wave signal.

[0039] In another specific embodiment, the double-ended to single-ended output circuit 3 includes a fifth PMOS transistor MP5, a sixth PMOS transistor MP6, a fifth NMOS transistor MN5 and a sixth NMOS transistor MN6.

[0040] Specifically, the sources of the fifth PMOS tube MP5 and the sixth PMOS tube MP6 are connected to the power supply voltage VDD, the gates are interconnected, the drains are respectively connected to the drains of the fifth NMOS tube MN5 and the sixth NMOS tube MN6, and the gate of the fifth PMOS tube MP5 is also connected to its drain; the sources of the fifth NMOS tube MN5 and the sixth NMOS tube MN6 are grounded, and the gates are respectively connected to the drains of the third PMOS tube MP3 and the fourth PMOS tube MP4.

[0041] In this embodiment, the diode connection method of the PMOS tube ensures the stability of the bias current, and the gate interconnection design provides a precise current mirror characteristic. At the same time, the series structure in which the source is connected to the power supply and the ground respectively provides sufficient signal swing space. This circuit not only realizes efficient conversion of differential signals to single-ended signals, but also has good common-mode suppression capability.

[0042] In a specific embodiment, the operating frequency of the ring voltage controlled oscillator is 400 MHz, and the power supply voltage VDD is 1.5 V. The waveforms of VP1 and VN1 are respectively as follows: Figure 3 and Figure 4 As shown, the waveform of CLK_OUT is as follows Figure 5 shown.

[0043] Specifically, the output waveform of the ring voltage-controlled oscillator is a differential signal, including VP1 and VN1. The output waveform of the three-stage ring oscillator is a sine wave, the common mode level is 1V, and the signal swing is 1V. Through the swing amplifier circuit 2, the output waveform is effectively converted into a square wave, where the common mode level is 0.75V and the signal swing is 1.5V. In this way, the single-ended output square wave signal CLK_OUT after shaping and amplification meets the requirements of the subsequent digital circuit.

[0044] In summary, the capacitive coupling module of the present invention converts the high common-mode differential signal output by the ring VCO into a small AC signal with ground as the reference through the DC isolation characteristic, thereby eliminating the risk of level mismatch; subsequently, the swing amplifier circuit adopts a current multiplexing structure to achieve transconductance enhancement and swing expansion in a single-stage gain stage, thereby avoiding the area and power consumption accumulation of traditional multi-stage amplification; finally, the double-ended to single-ended circuit converts the amplified differential signal into a square wave aligned with the digital power rail, thereby ensuring the driving capability and anti-noise performance.

[0045] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. An output swing amplifier circuit for a ring voltage controlled oscillator, characterized in that: include: A differential input circuit is used to obtain a differential signal by superimposing a differential AC small signal on a DC common mode level; A swing amplifier circuit comprises a differential input stage and a decision circuit; the differential input stage is used to receive the differential signal; The decision circuit amplifies the differential signal based on a positive feedback amplifier and converts it into a differential square wave signal; And, a double-ended to single-ended output circuit is used to convert the amplified differential square wave signal into a single-ended output square wave signal.

2. The output swing amplifier circuit for a ring voltage controlled oscillator according to claim 1, characterized in that: The differential input circuit comprises: a first PMOS tube MP1 and a second PMOS tube MP2; The source of the first PMOS tube MP1 is electrically connected to the power supply voltage, the gate receives the first differential AC small signal CLK, and the drain outputs the first differential signal to the first input terminal of the swing amplifier circuit; The source of the second PMOS transistor MP2 is electrically connected to the power supply voltage, the gate receives the second differential AC small signal CLKB, and the drain outputs the second differential signal to the second input terminal of the swing amplifier circuit; The first current source IA and the second current source IB are electrically connected to the drains of the first PMOS transistor MP1 and the second PMOS transistor MP2 respectively and are grounded.

3. The output swing amplifier circuit for a ring voltage controlled oscillator according to claim 1, characterized in that: The differential input stage includes a third PMOS transistor MP3 and a fourth PMOS transistor MP4; The sources of the third PMOS tube MP3 and the fourth PMOS tube MP4 are electrically connected to the power supply voltage, and the gates of the third PMOS tube MP3 and the fourth PMOS tube MP4 are respectively connected to the first differential signal and the second differential signal; the drains of the third PMOS tube MP3 and the fourth PMOS tube MP4 are connected to the first input terminal and the second input terminal of the decision circuit.

4. The output swing amplifier circuit for a ring voltage controlled oscillator according to claim 3, characterized in that: The decision circuit includes a first NMOS transistor MN1, a second NMOS transistor MN2, a third NMOS transistor MN3 and a fourth NMOS transistor MN4; The gate of the first NMOS transistor MN1 is respectively connected to the drain of the fourth PMOS transistor MP4 and the drain of the second NMOS transistor MN2, and the drain of the first NMOS transistor MN1 is respectively connected to the gate of the second NMOS transistor MN2 and the drain of the third PMOS transistor MP3; The gate of the second NMOS transistor MN2 is respectively connected to the drain of the third PMOS transistor MP3 and the drain of the first NMOS transistor MN1, and the drain of the second NMOS transistor MN2 is respectively connected to the drain of the fourth PMOS transistor MP4 and the gate of the first NMOS transistor MN1; The sources of the first NMOS transistor MN1 and the second NMOS transistor MN2 are both grounded; The gate of the third NMOS transistor MN3 is connected to the drain of the first NMOS transistor MN1, the source is grounded, and the gate is connected to the drain of the third NMOS transistor MN3; The gate of the fourth NMOS transistor MN4 is connected to the drain of the second NMOS transistor MN2 , the source is grounded, and the gate is connected to the drain of the fourth NMOS transistor MN4 .

5. The output swing amplifier circuit for a ring voltage controlled oscillator according to claim 4, characterized in that: The double-end to single-end output circuit comprises a fifth PMOS tube MP5, a sixth PMOS tube MP6, a fifth NMOS tube MN5 and a sixth NMOS tube MN6; The sources of the fifth PMOS transistor MP5 and the sixth PMOS transistor MP6 are connected to the power supply voltage, the gates are interconnected, the drains are respectively connected to the drains of the fifth NMOS transistor MN5 and the sixth NMOS transistor MN6, and the gate of the fifth PMOS transistor MP5 is also connected to its drain; The sources of the fifth NMOS transistor MN5 and the sixth NMOS transistor MN6 are grounded, and the gates are connected to the drains of the third PMOS transistor MP3 and the fourth PMOS transistor MP4 respectively.

6. The output swing amplifier circuit for a ring voltage controlled oscillator according to claim 1, characterized in that: Also includes: A ring voltage controlled oscillator, a first capacitor C1 and a second capacitor C2; The first output terminal and the second output terminal of the ring voltage controlled oscillator are coupled to the differential input circuit through a first capacitor C1 and a second capacitor C2 respectively.

7. The output swing amplifier circuit for a ring voltage controlled oscillator according to claim 6, characterized in that: The ring voltage controlled oscillator is a three-stage ring oscillator.

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