A self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT manufacturing method

By fabricating a T-type P-GaN gate GaN-based RF HEMT using a self-aligned etching process, the problem of incomplete depletion of the two-dimensional electron gas in traditional GaN-based HEMT devices is solved, achieving enhanced operation and improved RF performance.

CN119789450BActive Publication Date: 2025-12-12HUAWEI TECH CO LTD
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Patent Information

Application Number
CN202411643959.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-18
Publication Date
2025-12-12
Estimated Expiration
2044-11-18

AI Technical Summary

Technical Problem

Traditional GaN-based HEMT devices cannot completely deplete the two-dimensional electron gas under the gate, resulting in a negative threshold voltage. This requires a negative bias voltage to shut down the device, increasing the complexity of device operation and safety risks, and also increasing the complexity of gate driving.

Method used

A self-aligned T-type P-GaN gate GaN-based RF HEMT is fabricated using a self-aligned etching process. By forming source and drain electrodes on both sides of the P-GaN gate pin and combining them with a dielectric-P-GaN gate pin-dielectric support structure, a T-type gate electrode is formed, realizing an enhancement-mode GaN RF HEMT device.

Benefits of technology

This enables enhanced device operation, simplifies circuit design, reduces gate drive complexity, and improves RF performance by reducing gate length.

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Abstract

The application discloses a self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT manufacturing method. Firstly, a composite buffer layer, a GaN channel layer, an isolation layer, a barrier layer and a P-GaN cap layer material are sequentially grown on a substrate, and a two-dimensional electron gas is formed between the GaN channel and the isolation layer. Then, the P-GaN cap layer in a partial region is removed, and a rectangular P-GaN gate leg is left. On both sides of the P-GaN gate leg, a source electrode and a drain electrode metal are deposited and annealed to form ohmic contacts of the source electrode and the drain electrode. Next, a layer of medium is deposited on the surface, and the medium is precisely etched above the P-GaN gate leg using a photoresist as a mask. By taking advantage of the thick sidewall medium of the P-GaN gate leg, a support structure of medium-P-GaN gate leg-medium is obtained. Then, a gate metal is deposited and peeled off. Finally, a T-shaped gate electrode with a P-GaN gate leg combined with a gate head of the gate metal is obtained. The scheme uses a self-aligned etching process to obtain a T-shaped gate electrode with a short gate length and a submicron, and realizes a GaN radio frequency HEMT device working in an enhancement mode.
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Description

TECHNICAL FIELD

[0001] The application relates to the technical field of semiconductor devices, in particular to a self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT manufacturing method. BACKGROUND

[0002] Gallium nitride, as a typical material of the third generation of semiconductors, has the advantages of large band gap (3.4 eV), high electron mobility and high electron saturation velocity, and therefore has wide application potential in the fields of next-generation radio frequency devices, power electrical devices and the like. Due to the unique polarization effect of the gallium nitride heterojunction structure, a high-concentration and high-mobility two-dimensional electron gas (2DEG) can be formed at the junction interface even when the material is not intentionally doped, so that the high electron mobility transistor (HEMT) prepared based on the gallium nitride heterojunction structure has the characteristics of high breakdown voltage, low on-resistance, high switching frequency, small size and the like, thereby becoming the preferred solution for developing high-performance, low-power and low-cost microwave devices, and playing an important role in the fields of wireless charging, laser radar, electric vehicles and intelligent transportation, in particular.

[0003] Since the two-dimensional electron gas concentration of the nitride heterojunction interface is very high and is formed when the heterojunction structure is formed, the traditional GaN-based HEMT device often exhibits a depletion type due to the inability to completely deplete the two-dimensional electron gas under the gate, that is, the threshold voltage is negative, and a negative bias voltage needs to be designed to turn off the device, which is very inconvenient for the safe operation of the device and the simplification of circuit design. The enhancement type device can avoid the risk of accidental opening and reduce the complexity of gate driving, and has greater advantages. The P-GaN gate technology in the enhancement type device has attracted widespread attention due to the advantages of stable threshold voltage, strong process controllability, suitability for large-scale production and commercial use, and is called the most promising enhancement type HEMT device preparation method at present. However, this technology still has some deficiencies at present. In order to make the device have more excellent performance at high frequency, a self-aligned etching process can be used to realize a T-shaped gate electrode with a short gate length and a submicron, and a GaN radio frequency HEMT device working in an enhancement mode. At the same time, the reduction of the gate length can greatly improve the radio frequency performance of the device. SUMMARY

[0004] In order to solve the above technical problems, the application provides a self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT manufacturing method, which comprises, from bottom to top, a substrate, a composite buffer layer, a channel layer, an isolation layer, a barrier layer and a P-GaN gate foot, and a two-dimensional electron gas is formed between the channel layer and the isolation layer interface; the P-GaN gate foot is a rectangle left after etching and removing a part of the P-GaN cap layer; a source electrode and a drain electrode are arranged on the upper end surface of the barrier layer on both sides of the P-GaN gate foot, and the source electrode, the drain electrode and the barrier layer form an ohmic contact; a support structure of medium-P-GaN gate foot-medium is obtained due to the thick sidewall medium of the P-GaN gate foot after depositing medium and performing accurate etching; a gate metal gate head is arranged above the support structure of medium-P-GaN gate foot-medium, and a T-shaped gate electrode is formed in combination with the P-GaN gate foot below.

[0005] In order to achieve the above purpose, the application is implemented according to the following technical scheme:

[0006] A self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT manufacturing method comprises the following steps:

[0007] S1: cleaning the surface of the substrate, and growing a composite buffer layer, a channel layer, an isolation layer, a barrier layer and a P-GaN cap layer on the substrate in sequence; and forming a two-dimensional electron gas between the channel layer and the isolation layer;

[0008] S2: isolating the device;

[0009] S3: defining a pattern by using a photolithography process, removing a part of the P-GaN cap layer, and leaving a rectangular P-GaN gate foot;

[0010] S4: defining a pattern by using a photolithography process, depositing a source electrode and a drain electrode metal on both sides of the P-GaN gate foot, and performing annealing to form an ohmic contact of the source electrode and the drain electrode;

[0011] S5: depositing a layer of medium on the surface of the barrier layer to form a medium layer, using photoresist as a mask, accurately etching the medium above the P-GaN gate foot, and obtaining a support structure of medium-P-GaN gate foot-medium by using the thick sidewall medium of the P-GaN gate foot;

[0012] S6: defining a gate head pattern by using a photolithography process, depositing a gate metal on the upper surface of the support structure of medium-P-GaN gate foot-medium to form a gate metal gate head, and performing stripping to obtain a T-shaped gate electrode of the P-GaN gate foot in combination with the gate metal gate head, and realizing a GaN radio frequency HEMT device in an enhancement mode.

[0013] Further, the material of the substrate is one of silicon, silicon carbide, sapphire and diamond.

[0014] Further, the composite buffer layer comprises three layers, from bottom to top, a nucleation layer, a transition layer and a buffer layer, the material of the nucleation layer adopts AlN or GaN, and the thickness is 100-300nm; the material of the transition layer adopts AlGaN, and the thickness is 200-1000nm; the material of the buffer layer adopts AlGaN or GaN, and the thickness is 100-3000nm.

[0015] Further, the material of the channel layer adopts GaN or InGaN, and the thickness is 50-500nm; the material of the isolation layer adopts AlN, and the thickness is 0.5-2nm; the material of the barrier layer adopts one of AlGaN, InGaN, AlN and InAlGaN, and the thickness is 5-40nm.

[0016] Further, the metal layer of the gate metal gate head is one of Ni / Au / Ni, Ti / Au / Ni and TiN / Au / Ni from bottom to top; the metal layer of the source electrode and the drain electrode is one of Ti / Al / Ni / Au, Ta / Al / W, Ti / Al / Ti / TiN and Ta / Al / Ni / Au from bottom to top.

[0017] Further, the P-GaN cap layer is a Mg-doped GaN cap layer high-temperature annealing, wherein the concentration of Mg is 1x10 18 -1x10 20 cm -3 , and the thickness is 30-150nm; the material of the dielectric layer adopts SiO2 or SiN, and the thickness is 20-500nm.

[0018] Compared with the prior art, the present application has the following beneficial effects:

[0019] Firstly, the present application utilizes a self-aligned etching process to define the range of the gate foot, to obtain a T-shaped gate electrode with a short gate length and a submicron, and to realize a GaN RF HEMT device with enhanced performance.

[0020] Secondly, the present application improves the RF performance of the device due to the reduction of the gate length. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a structure diagram of the self-aligned T-shaped P-GaN gate GaN-based RF HEMT of the present application.

[0022] Figure 2 is a flowchart of the preparation method of the self-aligned T-shaped P-GaN gate GaN-based RF HEMT of the present application: (a)-(g) are the production steps in sequence.

[0023] In the figure, the following labels are used: 1-substrate; 2-composite buffer layer; 3-channel layer; 4-isolation layer; 5-barrier layer; 6-P-GaN cap layer; 61-P-GaN gate pin; 7-source electrode; 8-drain electrode; 9-dielectric layer; 10-gate metal head. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. The specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0025] like Figure 1 As shown in the figure, this embodiment exemplarily demonstrates a self-aligned T-type P-GaN gate GaN-based radio frequency HEMT device. The device includes, from bottom to top, a substrate 1, a composite buffer layer 2, a channel layer 3, an isolation layer 4, a barrier layer 5, and a P-GaN gate pin 61. A two-dimensional electron gas is formed between the interface of the channel layer 3 and the isolation layer 4. The P-GaN gate pin 61 is a rectangle remaining after etching away a portion of the P-GaN cap layer 6. A source electrode 7 and a drain electrode 8 are disposed on the upper surface of the barrier layer 5 on both sides of the P-GaN gate pin 61, and the source electrode 7, drain electrode 8, and barrier layer 5 form an ohmic contact. The dielectric-P-GaN gate pin-dielectric support structure is a support structure obtained after depositing the dielectric and performing precise etching, due to the relatively thick dielectric sidewall of the P-GaN gate pin 61. A gate metal head 10 is disposed above the dielectric-P-GaN gate pin-dielectric support structure, which, together with the P-GaN gate pin 61 below, forms a T-type gate electrode.

[0026] In this embodiment, the substrate 1 is made of silicon, silicon carbide, sapphire, or diamond. The composite buffer layer 2 comprises three layers, from bottom to top: a nucleation layer 21, a transition layer 22, and a buffer layer 23. The nucleation layer 21 is made of AlN or GaN and has a thickness of 100-300 nm; the transition layer 22 is made of AlGaN and has a thickness of 200-1000 nm; and the buffer layer 23 is made of AlGaN or GaN and has a thickness of 100-3000 nm. The channel layer 3 is made of GaN or InGaN and has a thickness of 50-500 nm. The isolation layer 4 is made of AlN and has a thickness of 0.5-2 nm. The barrier layer 5 is made of AlGaN, InGaN, AlN, or InAlGaN and has a thickness of 5-40 nm. It forms a heterojunction with the channel layer 3, and due to the polarization effect, a two-dimensional electron gas channel is formed on one side of the channel layer 3. P-GaN cap layer 6 is formed by high-temperature annealing of Mg-doped GaN cap layer, wherein the Mg concentration is 1×10⁶. 18 -1×10 20 cm -3The thickness of the dielectric layer 9 is 30-150 nm. The dielectric layer 9 is made of either SiO2 or SiN, with a thickness of 20-500 nm. The gate electrode 10 metal layer is made of Ni / Au / Ni, Ti / Au / Ni, or TiN / Au / Ni. The source electrode 7 and drain electrode 8 metal layers are made of either Ti / Al / Ni / Au, Ta / Al / W, Ti / Al / Ti / TiN, or Ta / Al / Ni / Au.

[0027] Example 1

[0028] In this embodiment, the substrate 1 is made of P-type silicon with a thickness of 800 μm; the composite buffer layer 2 is divided into three parts: a 200 nm AlN nucleation layer 21, an 800 nm transition layer 22, and a 1000 nm GaN buffer layer 23; the channel layer 3 is made of GaN with a thickness of 200 nm; the isolation layer 4 is made of AlN with a thickness of 1 nm; the barrier layer 5 is made of AlGaN with an aluminum composition of 0.21 and a thickness of 15 nm; the P-GaN gate pin 61 has a thickness of 70 nm, and the doped impurity is Mg with a doping concentration of 2.5 × 10⁻⁶. 19 cm -3 The dielectric layer 9 is made of SiN with a thickness of 100nm; the source electrode 7 and drain electrode 8 are both made of Ti / Al / Ni / Au, and the gate metal head 10 is made of Ni / Au / Ni alloy.

[0029] Reference Figure 2 The specific production process is as follows:

[0030] Step 1: Clean the surface of the selected 800μm thick silicon substrate 1, such as... Figure 2 As shown in (a) in the figure.

[0031] At a high temperature of 1000℃, hydrogen gas is introduced into the reaction chamber to remove contaminants from the surface of substrate 1 and form a microscopic step structure on the surface of substrate 1 so that various epitaxial layers can be grown in subsequent epitaxial processes.

[0032] Step 2: On substrate 1, a composite buffer layer 2, a channel layer 3, an isolation layer 4, a barrier layer 5, and a P-GaN cap layer 6 are sequentially grown using metal-organic chemical vapor deposition. Figure 2 As shown in (b) of the diagram.

[0033] The composite buffer layer 2 consists of three layers. First, a 200 nm AlN nucleation layer 21 is grown on the substrate using MOCVD at a low temperature of 600 °C. Then, the temperature is raised to 1000 °C, and an 800 nm transition layer 22 is grown on the nucleation layer using MOCVD. Finally, a 1000 nm GaN buffer layer 23 is grown on the transition layer 22.

[0034] Step 3: Grow a 200 nm GaN channel layer 3 on the composite buffer layer 2 using the MOCVD method at 1000 °C.

[0035] Then, an isolation layer 4 of 1 nm is epitaxially formed on the channel layer 3, and an AlGaN barrier layer 5 of 15 nm is epitaxially formed on the isolation layer 4.

[0036] Step 4: Then, an epitaxial GaN cap layer is formed on barrier layer 5, and Mg is doped simultaneously at a doping concentration of 2.5 × 10⁻⁶. 19 cm -3 And annealing is performed to form a P-GaN cap layer 6.

[0037] Step 5: Clean the epitaxial wafer. This mainly includes cleaning organic and inorganic substances. The sample is ultrasonically cleaned with acetone solution for 5 minutes, then immersed in isopropanol solution and ultrasonically cleaned for 2 minutes to remove residual acetone from the sample surface. Finally, it is dried with a nitrogen gun.

[0038] Step Six: Isolate the countertop, such as... Figure 2 As shown in (c) in the figure.

[0039] Specifically, inductively coupled plasma etching (ICP) is used to etch away the entire P-GaN cap layer 6, AlGaN barrier layer 5, AlN isolation layer 4, and part of the GaN channel layer 3. The etching depth is 180nm, and the mesa should have neat edges and steep sidewalls.

[0040] Step 7: Using photolithography, a photoresist mask is fabricated. Then, reactive ion etching (RIE) is used to etch away the unmasked P-GaN cap layer 6, creating a mesas with clean edges and steep sidewalls. Figure 2 As shown in (d) in the figure.

[0041] Step 8: Using photolithography ohmic process, a photoresist mask is fabricated. The source electrode 7 and drain electrode 8 are then fabricated by electron beam evaporation. The multilayer metal used is Ti / Al / Ni / Au (Au on the top layer), with thicknesses of 20nm / 120nm / 40nm / 50nm for Ti / Al / Ni / Au. Finally, rapid annealing is performed for 30 seconds at 850℃ in a nitrogen atmosphere to form ohmic contacts between the source electrode 7 and drain electrode 8 and the barrier layer 5. Figure 2 As shown in (e) in the diagram.

[0042] Step Nine: A 100nm SiN dielectric layer is grown on the device surface using LPCVD technology. A photoresist mask is fabricated using photolithography. The dielectric layer without photoresist masking is etched away using reactive ion etching (RIE) technology. Taking advantage of the relatively thick dielectric layer 9 on the sidewall of the P-GaN gate pin 61, a composite support structure of dielectric-P-GaN gate pin-dielectric is obtained, such as...Figure 2 As shown in (f) in the figure.

[0043] Step 11: Define the gate head pattern using photolithography. Deposit the gate metal head 10 on the upper surface of the dielectric-P-GaN gate pin-dielectric support structure using electron beam evaporation. The gate metal head 10 is a multilayer Ni / Au / Ni metal with thicknesses of 50nm / 300nm / 10nm, and is then peeled off to form a T-shaped gate electrode combining the P-GaN gate pin and the gate metal head. Figure 2 As shown in (g) in the diagram.

[0044] By following the steps described above, a T-shaped gate electrode with a short gate length and submicron diameter can be obtained, enabling GaN RF HEMT devices to operate in enhancement mode.

[0045] Example 2

[0046] like Figure 2 As shown, this embodiment exemplarily describes another self-aligned T-type P-GaN gate GaN-based RF HEMT, which differs from Embodiment 1 in that: silicon carbide is used as the substrate 1, P-type doped, with a thickness of 300 μm; the composite buffer layer 2 is divided into three parts, namely a 200 nm GaN nucleation layer 21, a 500 nm Al layer 22, and a 200 nm GaN nucleation layer 23. 0.55 Ga 0.25 N transition layer 22, wherein the aluminum composition is 0.55, 1000 nm Al 0.05 Ga 0.25 N-buffer layer 23, wherein the aluminum content is 0.05%; the channel layer material is GaN with a thickness of 300 nm; the isolation layer 4 is made of AlN with a thickness of 1.5 nm; the barrier layer 5 is made of Al 0.15 The GaN structure contains 0.15% aluminum and has a thickness of 15 nm; the P-GaN cap layer 6 has a thickness of 60 nm and is doped with Mg at a concentration of 5 × 10⁻⁶. 19 cm -3 The dielectric layer 9 is made of SiN with a thickness of 100nm; the source electrode 7 and drain electrode 8 are made of Ta / Al / Ni / Au (Au is on the top layer, and the thickness of Ta / Al / Ni / Au is 20nm / 120nm / 40nm / 50nm); and the gate metal head 10 is made of Ti / Au / Ni alloy (the thickness of Ni / Au / Ni is 50nm / 150nm / 10nm).

[0047] Continue to refer to Figure 2 Using the same fabrication method as in Example 1, a T-shaped gate electrode with a short gate length and submicron can also be obtained to realize an enhancement-mode GaN RF HEMT device.

[0048] The technical solutions of the present application are not limited to the above specific embodiments, and any technical variations made according to the technical solutions of the present application fall within the protection scope of the present application.

Claims

1. A method for fabricating a self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT, characterized in that, The method comprises the following steps: S1: cleaning the surface of the substrate (1), sequentially growing a composite buffer layer (2), a channel layer (3), an isolation layer (4), a barrier layer (5) and a P-GaN cap layer (6) on the substrate (1), and forming a two-dimensional electron gas between the channel layer (3) and the isolation layer (4); S2: isolating the device; S3: defining a pattern by using a photolithography process, removing the P-GaN cap layer (6) in part of the region, and leaving a rectangular P-GaN gate foot (61); S4: defining a pattern by using a photolithography process, depositing a source electrode (7) and a drain electrode (8) metal on both sides of the P-GaN gate foot (61), and performing annealing to form an ohmic contact of the source electrode (7) and the drain electrode (8); S5: depositing a dielectric layer (9) on the surface of the barrier layer (5), using photoresist as a mask to accurately etch the dielectric above the P-GaN gate foot (61), and using the characteristic that the dielectric (9) on the side wall of the P-GaN gate foot (61) is relatively thick to obtain a support structure of dielectric-P-GaN gate foot-dielectric; S6: defining a gate head pattern by using a photolithography process, depositing a gate metal to form a gate metal gate head (10) on the upper surface of the support structure of dielectric-P-GaN gate foot-dielectric, and performing stripping to obtain a T-shaped gate electrode of the P-GaN gate foot (61) combined with the gate metal gate head (10).

2. The method of claim 1, wherein the self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT is characterized by: The material of the substrate (1) is one of silicon, silicon carbide, sapphire and diamond.

3. The method of claim 1, wherein the self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT is characterized by: The composite buffer layer (2) comprises three layers from bottom to top, a nucleation layer (21), a transition layer (22) and a buffer layer (23), the material of the nucleation layer (21) is AlN or GaN, and the thickness is 100-300 nm; the material of the transition layer (22) is AlGaN, and the thickness is 200-1000 nm; the material of the buffer layer (23) is AlGaN or GaN, and the thickness is 100-3000 nm.

4. The method of claim 1, wherein the self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT is characterized by: The material of the channel layer (3) is GaN or InGaN, and the thickness is 50-500 nm. The material of the isolation layer (4) is AlN, and the thickness is 0.5-2 nm; the material of the barrier layer (5) is one of AlGaN, InGaN, AlN and InAlGaN, and the thickness is 5-40 nm.

5. The method of claim 1, wherein the self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT is characterized by: The metal layer of the gate metal gate head (10) is one of Ni / Au / Ni, Ti / Au / Ni and TiN / Au / Ni from bottom to top; the metal layer of the source electrode (7) and the drain electrode (8) is one of Ti / Al / Ni / Au, Ta / Al / W, Ti / Al / Ti / TiN and Ta / Al / Ni / Au from bottom to top.

6. The method of claim 1, wherein the self-aligned T-shaped P-GaN gate GaN-based radio frequency HEMT is fabricated by: The P-GaN cap layer (6) is formed by high-temperature annealing of a Mg-doped GaN cap layer, wherein the concentration of Mg is 1×10⁻⁶. 18 -1×10 20 cm -3 The thickness is 30-150nm; the material of the dielectric layer (9) is SiO2 or SiN, and the thickness is 20-500nm.

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