Method for manufacturing a semiconductor structure
By pretreating the gap wall and substrate surface of the semiconductor device, adjusting the number and distribution density of functional groups, and using plasma bombardment and annealing treatment technology to uniformly distribute hydrogen bonds, solving the problem of uneven deposition of transition oxide layers and improving device performance.
Patent Information
- Application Number
- CN202510273245.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-10
- Publication Date
- 2025-06-06
- Estimated Expiration
- 2045-03-10
AI Technical Summary
During the production of semiconductor devices, the deposition rate and step coverage of the transition oxide layer are uneven, resulting in a degradation rate of device performance.
By pretreating the gap wall and the substrate surface, the number and distribution density of functional groups are adjusted, and hydrogen bonds are uniformly distributed using plasma bombardment and annealing treatment technology, thereby improving the deposition rate and step coverage of the transition oxide layer.
The uniform distribution of hydrogen bonds of functional groups is achieved, the deposition rate and step coverage of the transition oxide layer are improved, and the device performance is avoided.
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Figure CN119789507B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for manufacturing a semiconductor structure. Background Art
[0002] The development direction of semiconductor integrated circuits is to increase density and reduce components. In the manufacture of integrated circuits, self-aligned silicide technology is widely used. In order to avoid the loss of the sidewall structures on both sides of the gate structure and the exposed substrate surfaces on both sides in the subsequent process, a transition oxide layer process is usually added before the formation of self-aligned silicide. However, in the process of forming the transition oxide layer, there will inevitably be technical problems such as fast deposition rate at the opening, slow deposition rate on the sidewall, poor step coverage, and uneven etching of the subsequent silicide barrier layer due to the aspect ratio of the gap between adjacent gate structures, which ultimately affect the performance of semiconductor devices. Summary of the invention
[0003] The object of the present invention is to provide a method for manufacturing a semiconductor structure, so as to improve the deposition rate and step coverage of the transition oxide layer by reducing and / or increasing the number of functional groups contained in the surface layer of the spacer and the surface layer of the substrate on both sides thereof, adjusting the distribution density of the functional groups on the surface layer of the spacer and the surface layer of the substrate on both sides thereof.
[0004] In order to solve the above technical problems, the present invention provides a method for manufacturing a semiconductor structure, comprising:
[0005] A substrate is provided.
[0006] A plurality of gate structures separated from each other are formed on the substrate.
[0007] A spacer is formed on the side wall of the gate structure, and the surface of the spacer and the substrate includes functional groups containing at least hydrogen, oxygen and silicon elements.
[0008] The surface layer of the spacer and the surface layers of the substrate on both sides thereof are pretreated so that the number of functional groups contained in the surface layer of the spacer and the number of functional groups contained in the surface layer of the substrate on both sides thereof are within an error range.
[0009] In some optional examples, the material of the spacer may include nitride, and the nitride may include silicon nitride.
[0010] In some optional examples, the functional group may include at least one of a silicon-hydrogen bond or a hydrogen bond, and the dangling bond may include at least one of a silicon-containing dangling bond, an oxygen-containing dangling bond, a hydroxyl dangling bond, or a silicon-oxygen dangling bond.
[0011] In some optional examples, the pretreatment performed on the surface layer of the spacer and the surface layers of the substrate on both sides thereof may include: plasma treatment or annealing treatment.
[0012] In some optional examples, the step of pretreating the surface layer of the spacer and the surface layers of the substrate on both sides thereof may include:
[0013] A first gas is introduced to bombard the surface layer of the substrate on both sides of the spacer to break the chemical bonds between the hydrogen element and the silicon element in the functional groups in the surface layer of the substrate, and the formed hydrogen-containing dangling bonds are combined with the remaining dangling bonds to reduce the number of hydrogen bonds in the functional groups in the surface layer of the substrate.
[0014] A second gas is introduced to bombard the surface layer of the spacer to break the chemical bonds between the hydrogen element and the silicon element in the functional group in the surface layer of the spacer, and the formed hydrogen-containing dangling bonds are combined with the remaining dangling bonds to reduce the number of hydrogen bonds of the functional group in the surface layer of the spacer.
[0015] There is a first bombardment distance between the first gas and the surface of the substrate, there is a second bombardment distance between the second gas and the surface of the spacer, and the first bombardment distance is smaller than the second bombardment distance.
[0016] In some optional examples, the first gas may include argon, the second gas may include nitrogen, the first bombardment distance may range from 200 mil to 300 mil, and the second bombardment distance may range from 550 mil to 1100 mil.
[0017] In some optional examples, the step of pretreating the surface layer of the spacer and the surface layers of the substrate on both sides thereof may include:
[0018] Plasma gas is introduced to perform annealing treatment on the surface layer of the spacer and the surface layer of the substrate on both sides thereof, so that the plasma gas combines with the dangling bonds in the surface layer of the spacer and the surface layer of the substrate on both sides thereof, so as to increase the number of hydrogen bonds of the functional groups in the surface layer of the spacer and the surface layer of the substrate on both sides thereof.
[0019] In some optional examples, the plasma gas may include hydrogen, the flow rate of the hydrogen may range from 1 SLM to 50 SLM, the duration of the hydrogen introduction may range from 0.5 h to 2 h, and the temperature range of the annealing treatment may range from 300° C. to 600° C.
[0020] In some optional examples, the error range is: 0.1~0.5.
[0021] In some optional examples, after pre-treating the surface layer of the spacer and the surface layers of the substrate on both sides thereof, the method for manufacturing the semiconductor structure may further include:
[0022] A transition oxide layer is formed on the top surface of the gate structure and on the surface of the spacer and the substrate on both sides thereof.
[0023] A silicide blocking layer is formed on the transition oxide layer.
[0024] In some optional examples, the absorbance intensity of the infrared peak of the hydrogen bond in the infrared spectrum can be used to characterize the number of hydrogen bonds of the functional group, and the absorbance intensity of the infrared peak of the hydrogen bond in the infrared spectrum can range from 0.0005 to 0.0015.
[0025] Compared with the prior art, the technical solution provided by the present invention has at least one of the following beneficial effects:
[0026] The manufacturing method of the semiconductor structure provided by the present invention comprises: providing a substrate, forming a plurality of gate structures which are separated from each other and are located on the substrate, forming a spacer located on the side wall of the gate structure, wherein the surfaces of the spacer and the substrate include functional groups containing at least hydrogen, oxygen and silicon elements, and pre-treating the surface layer of the spacer and the surface layers of the substrate on both sides thereof so that the difference between the number of functional groups and dangling bonds contained in the surface layer of the spacer and the number of functional groups and dangling bonds contained in the surface layer of the substrate on both sides thereof is within an error range.
[0027] In the present invention, on the one hand, the surface layer of the spacer and the surface layer of the substrate on both sides are bombarded multiple times with plasma having different bombardment distances from the treated surface layer, so as to reduce the number of functional groups contained in the surface layer of the spacer and the surface layer of the substrate on both sides, and adjust the distribution density of the functional groups on the surface layer of the spacer and the surface layer of the substrate on both sides, thereby obtaining an unexpected effect: the hydrogen bonds in the functional groups are evenly distributed on the surface layer of the spacer and the surface layer of the substrate, thereby avoiding the problem of uneven distribution of the transition oxide layer formed subsequently due to the uneven distribution of hydrogen bonds on different surface layers; on the other hand, the surface layer of the spacer and the surface layer of the substrate on both sides are treated by annealing treatment, so as to reduce the amount of functional groups contained in the surface layer of the spacer and the surface layer of the substrate on both sides, thereby reducing ... The dangling bonds contained in the surface layer and the surface layers of the substrates on both sides are combined to reduce the number of dangling bonds contained in the surface layer of the spacer and the surface layers of the substrates on both sides, and then the plasma gas is continuously introduced to form uniformly distributed hydrogen bonds on the surface layer of the spacer and the surface layers of the substrates on both sides, thereby obtaining the unexpected effect of increasing the number of hydrogen bonds in the functional groups contained in the surface layer of the spacer and the surface layers of the substrates on both sides, thereby achieving uniform distribution of hydrogen bonds on the surface layer of the spacer and on the surface layer of the substrates, avoiding uneven distribution of hydrogen bonds on different surface layers that leads to uneven distribution of the subsequent formed transition oxide layer, improving the deposition step coverage of the transition oxide layer and improving the deposition rate of the transition oxide layer. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The accompanying drawings are used to provide a further understanding of the present application and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present application but do not constitute a limitation to the present application. In the accompanying drawings:
[0029] Figure 1 It is a schematic diagram of the local structure after forming a transition oxide layer in a semiconductor structure using the existing technology.
[0030] Figure 2 It is a schematic diagram of a process of manufacturing a semiconductor structure in one embodiment of the present invention.
[0031] Figure 3~Figure 5 FIG. 1 is a schematic diagram of a partial structure of a method for manufacturing a semiconductor structure in an embodiment of the present invention during the preparation process.
[0032] Figure 6 FIG. 1 is an exemplary diagram of the formation principle of the transition oxide layer during the formation of the transition oxide layer by the functional groups and dangling bonds on the surface of the spacer in one embodiment of the present invention.
[0033] Figure 7 The figure is an example of the formation principle of the transition oxide layer during the formation of the transition oxide layer by the functional groups and dangling bonds on the surface of the spacer after the spacer is subjected to plasma treatment in one embodiment of the present invention.
[0034] Figure 8 FIG. 4 is a graph showing the relationship between the plasma treatment time parameter and the coverage of the subsequently formed transition oxide layer in one embodiment of the present invention.
[0035] Fig. 9 Another exemplary diagram of the formation principle of the transition oxide layer during the formation of the transition oxide layer of the functional groups and dangling bonds on the surface of the spacer in one embodiment of the present invention.
[0036] Fig.10 Another exemplary diagram of the formation principle of the transition oxide layer is shown in the process of forming the transition oxide layer of the functional groups and dangling bonds on the surface of the spacer after the spacer is annealed in one embodiment of the present invention.
[0037] Fig.11 The figure is a curve diagram showing the relationship between the content of hydrogen gas introduced during the annealing process and the coverage of the transition oxide layer formed subsequently in one embodiment of the present invention.
[0038] Fig.12 FIG. 4 is a curve diagram showing the relationship between the hydrogen bond content and the coverage of the subsequently formed transition oxide layer in one embodiment of the present invention.
[0039] Wherein, the accompanying drawings are marked as follows:
[0040] 100 - substrate, 110 - gate oxide layer, 120 - gate layer, 251 - gate structure, 130 - spacer, 140 - transition oxide layer, 10 - gate stack structure, 20 - sidewall structure, 30 - oxide layer.
[0041] In the drawings, the same reference numerals are used for the same components, and the drawings are not drawn to scale. DETAILED DESCRIPTION
[0042] In order to make the technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. Although the exemplary implementation methods of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the implementation methods described here. On the contrary, these implementation methods are provided in order to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.
[0043] It will be understood that the meanings of “on,” “over,” and “over” in the present invention should be interpreted in the broadest manner, so that “on” not only means that it is “on” something without any intervening features or layers (i.e., directly on something), but also includes the meaning that it is “on” something with any intervening features or layers.
[0044] In the embodiments of the present invention, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be noted that the technical solutions recorded in the embodiments of the present invention can be combined arbitrarily without conflict.
[0045] Please refer to Figure 1 , Figure 1 FIG. 1 is a schematic diagram of a local structure after a transition oxide layer in a semiconductor structure is formed using the prior art. Figure 1 As shown, in the prior art, after forming the gate stack structure 10 and the sidewall structures 20 on both sides thereof, a deposition process is directly used to form an oxide layer 30 wrapped around the gate stack structure 10, the sidewall structure 20 and the outer surfaces of the substrates on both sides thereof; however, since the depth-to-width ratio of the gaps between adjacent gate stack structures 10 is relatively large, the oxide layer 30 will have a fast deposition rate at the openings of the gaps between adjacent gate stack structures 10 during the deposition process, and a slower deposition rate on the outer surfaces of the sidewall structures 20 exposed by the sidewalls of the gaps, i.e., the formed oxide layer 30 has a larger thickness at the openings of the gaps between the gate stack structures 10, which in turn causes the subsequently conformally formed silicide barrier layer (not shown) to further reduce the top opening size of the gap, resulting in that when an opening for forming a silicide layer is subsequently formed in the silicide barrier layer, the silicide barrier layer in some opening areas will inevitably not be removed cleanly, thereby causing the semiconductor device to fail.
[0046] In order to solve the above technical problems, the present invention provides a method for manufacturing a semiconductor structure, so as to improve the deposition rate and step coverage of the transition oxide layer by reducing and / or increasing the number of functional groups contained in the surface layer of the spacer and the surface layer of the substrate on both sides thereof, adjusting the distribution density of the functional groups on the surface layer of the spacer and the surface layer of the substrate on both sides thereof.
[0047] Please refer to Figure 2 , Figure 2 FIG. 1 is a flow chart of a method for manufacturing a semiconductor structure in one embodiment of the present invention. Figure 2 As shown, the method for manufacturing the semiconductor structure may include at least the following steps:
[0048] Step S201, providing a substrate.
[0049] Step S202 , forming a plurality of gate structures that are separated from each other and are located on the substrate.
[0050] Step S203 , forming a spacer on the sidewall of the gate structure, wherein the surface of the spacer and the substrate include functional groups and dangling bonds containing at least hydrogen, oxygen and silicon elements.
[0051] Step S204, pretreating the surface layer of the spacer and the surface layers of the substrate on both sides thereof, so that the difference between the number of functional groups and dangling bonds contained in the surface layer of the spacer and the number of functional groups and dangling bonds contained in the surface layer of the substrate on both sides thereof is within an error range.
[0052] In order to enable a person skilled in the art to which the present invention belongs to easily understand the method for manufacturing a semiconductor structure in the embodiment of the present invention, the following will further illustrate the method for manufacturing a semiconductor structure proposed by the present invention in combination with various structural schematic diagrams or partial structural schematic diagrams during the preparation process of the manufacturing method. Figure 3~Figure 5 FIG. 1 is a schematic diagram of a partial structure of a method for manufacturing a semiconductor structure provided in an embodiment of the present invention during the manufacturing process. Figure 3 to Figure 5 The method for manufacturing the semiconductor structure provided in this embodiment is described in detail.
[0053] It should be understood that in order to simplify Figure 3~Figure 5 , in the embodiment of the present invention Figure 3~Figure 5 The two gate structures 251 and the gap therebetween are formed in the substrate 100 for exemplary purposes only, and subsequent components are formed based on the two gate structures 251 , but the present invention is not limited thereto.
[0054] Please refer to Figure 3 , perform the above step S101: provide a substrate 100, wherein the substrate 100 is used as a platform for the subsequent formation of MOS transistors or CMOS transistors including components such as the gate structure, the spacer, the transition oxide layer and the silicide barrier layer. In one embodiment, the substrate 100 is any suitable substrate material known in the art, for example, it can be a silicon substrate, a germanium substrate, a silicon germanium substrate, a silicon carbide substrate, an epitaxial silicon substrate (EpitaxialSiliconSubstrate), a silicon on insulator (Silicon on Insulator, referred to as SOI) substrate or a germanium on insulator (Germanium on Insulator, referred to as GOI) substrate, or a substrate composed of other suitable materials, but not limited thereto. Those skilled in the art should easily understand that various required active components and / or passive components, such as epitaxial layers, trench isolation structures and / or well regions (not shown) can be further formed on or in the substrate 100 according to actual device requirements, but not limited thereto.
[0055] Please continue to refer to Figure 3, perform the above step S102: using at least one of deposition processes such as physical vapor deposition, chemical vapor deposition, atomic layer deposition, etc., to sequentially form a gate structure material layer (not shown) and a patterned photoresist layer (not shown) on the surface of the substrate 100, and using the patterned photoresist layer as a mask, using at least one of etching processes such as dry etching or wet etching to form a plurality of gate structures 251 spaced from each other along a direction parallel to the surface of the substrate 100 (hereinafter referred to as the horizontal direction) on the surface of the substrate 100. In one embodiment, the gate structure 251 may include a gate oxide layer 110 and a gate layer 120 stacked in sequence along a direction perpendicular to the surface of the substrate 100 (hereinafter referred to as the vertical direction), and the material of the gate oxide layer 110 may include an oxide, such as silicon dioxide, and the material of the gate layer 120 may include polysilicon or doped polysilicon, but is not limited thereto.
[0056] Please refer to Figure 4 , perform the above step S103: conformally form a spacer material layer (not shown) on the substrate 100 by a deposition process such as a chemical vapor deposition process, partially remove the spacer material layer by an etching process such as a dry etching process, and form spacers 130 for protecting the gate structure 251 only on the sidewalls of both sides of each gate structure 251, which are formed by the spacer material layer remaining after the removal. In one embodiment, the material of the spacer 130 may include an insulating material, and the insulating material may be, for example, an oxide or a nitride. In the embodiment of the present invention, the material of the spacer 130 is preferably set to be a nitride, such as silicon nitride.
[0057] It should be particularly noted that the spacer 130 and the surface layer of the substrate 100 made of silicon nitride will introduce different types of functional groups and dangling bonds during the deposition process, such as silicon-hydrogen bonds, hydrogen bonds, silicon-containing dangling bonds, oxygen-containing dangling bonds, hydroxyl dangling bonds and silicon-oxygen dangling bonds, etc. The presence of the different types of functional groups and dangling bonds will significantly affect the properties and applications of the silicon nitride (it may also be other materials and corresponding other types of functional groups and dangling bonds).
[0058] Specifically, the hydrogen bonds contained in the spacer 130 and the surface layer of the substrate 100 will serve as the transition oxide layer reaction gas (such as TEOS gas and O) in the subsequent process of forming the transition oxide layer. 2), that is, the landing point of the reaction gas after the reaction of the transition oxide layer, and whether the hydrogen bonds are evenly distributed on the surface of the spacer 130 and the substrate 100 has a greater impact on the subsequent formation of the transition oxide layer. Therefore, in order to make the number of hydrogen bonds contained in the surface layer of the spacer 130 and the number of hydrogen bonds contained in the surface layer of the substrate 100 roughly the same, the embodiment of the present invention proposes three methods for pre-treating the functional groups and dangling bonds contained in the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides thereof before forming the transition oxide layer, which are described in detail as follows.
[0059] Method 1: Execute the above step S104: bombard the surface of the spacer 130 and the substrate 100 on both sides thereof by introducing the first gas, so as to adjust the uneven distribution density of the functional groups on the surface of the spacer 130 and the surface of the substrate 100 on both sides thereof by reducing the number of functional groups contained in the surface of the spacer 130 and the surface of the substrate 100 on both sides thereof.
[0060] Specifically, a first gas (such as argon) may be introduced first to perform a plasma treatment at a first bombardment distance (also referred to as a short distance) on the surface layer of the substrate 100 on both sides of the spacer 130; and then a second gas (such as nitrogen) may be introduced to perform a plasma treatment at a second bombardment distance (also referred to as a long distance) on the surface layer of the spacer 130, so as to use the first gas or the second gas to interrupt the chemical bond between the hydrogen element and the silicon element in the functional group in the surface layer of the substrate 100 or in the surface layer of the spacer 130 (for example, interrupt the silicon-hydrogen bond), and form a hydrogen-containing dangling bond on the surface layer of the substrate 100 and the surface layer of the spacer 130, and the hydrogen-containing dangling bond may be unstable due to its own instability and the surface layer of the substrate 100. 00 and the remaining dangling bonds in the surface layer of the spacer 130 are combined to form stable saturated bonds (for example, the hydrogen-containing dangling bonds are combined with the hydroxyl dangling bonds to form water molecules), and then the water molecules are extracted out during the extraction step in the plasma treatment process, thereby reducing the number of hydrogen bonds of the functional groups in the surface layer of the substrate 100 and the surface layer of the spacer 130, that is, reducing the number of hydrogen bonds contained in the surface layer of the substrate 100 and the number of hydrogen bonds contained in the surface layer of the spacer 130 to a preset value; in one embodiment, the number of hydrogen bonds corresponding to the absorbance intensity of the infrared peak of the hydrogen bond in the infrared spectrum is reduced to a certain threshold value (for example, 0.0005) as the preset value, but is not limited thereto.
[0061] It should be understood that the first bombardment distance is the distance between the first gas and the surface of the substrate 100 when the first gas is introduced, and the second bombardment distance is the distance between the second gas and the surface of the spacer 130 when the second gas is introduced, and the first bombardment distance is smaller than the second bombardment distance. In one embodiment, the first gas is preferably argon, and the first bombardment distance may be: 200mil~300mil, for example, 200mil, 210mil, 220.2mil, 250.55mil, 260mil, 270mil, 280mil, 290mil, 300mil, etc.; the second gas is nitrogen, and the second bombardment distance may be: 550mil~1100mil, for example, 550mil, 600mil, 610mil, 650mil, 700mil, 800mil, 900mil, 1000mil, 1100mil, etc.; the flow rates of the first gas (for example, argon) and the second gas (for example, nitrogen) may be: 5000sccm~3 0000sccm, for example, it can be 5000sccm, 5100sccm, 5200sccm, 6000sccm, 7000sccm, 10000sccm, 15000sccm, 20000sccm, 25000sccm, 30000sccm, etc.; and the duration of the plasma bombardment of the surface layer with the first gas and the second gas can be: 30s~180s, for example, it can be 30s, 40s, 50s, 100s, 110s, 130s, 150s, 160s, 170s, 180s, etc., and the temperature range for the plasma bombardment of the first gas and the second gas can be specifically: 350℃~480℃, and the plasma energy is 200W~600W.
[0062] Please refer to Figure 6 and Figure 7 ,in Figure 6 FIG. 1 is an exemplary diagram of the formation principle of the transition oxide layer during the formation of the transition oxide layer by the functional groups and dangling bonds on the surface of the spacer in one embodiment of the present invention. Figure 7 This is an example diagram of the formation principle of the transition oxide layer after the spacer is first subjected to plasma treatment in one embodiment of the present invention, during the formation of the transition oxide layer, the functional groups and dangling bonds on the surface of the spacer are formed. Figure 6 and Figure 7 As shown, before forming the transition oxide layer, the surface of the spacer 130 and the substrate 100 is firstly subjected to plasma treatment (also referred to as plasma bombardment treatment) using the first gas and the second gas. This can reduce the number of hydrogen bonds with uneven distribution and high density on the surface of the spacer 130 and the substrate 100, thereby changing the uniformity of the distribution of hydrogen bonds.
[0063] Please refer to Figure 8 , Figure 8 FIG. 1 is a graph showing the relationship between the plasma treatment time parameter and the coverage of the subsequent transition oxide layer formed in one embodiment of the present invention. Figure 8 As shown, the coverage of the transition oxide layer is proportional to the time parameter of the plasma treatment, that is, as the time parameter of the plasma treatment increases, the coverage of the transition oxide layer gradually increases, that is, the uniformity of the formed transition oxide layer is better. Preferably, when the time parameter of the plasma treatment in the embodiment of the present invention (for example, the total time for introducing the first gas and the second gas) is about 120s, the coverage of the subsequently formed transition oxide layer is the best, for example, it can reach about 0.7~0.75, but is not limited to this.
[0064] Method 2: Execute the above step S104: Use plasma gas to anneal the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides thereof, so as to increase the number of hydrogen bonds in the functional groups contained in the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides thereof, thereby achieving uniform distribution of hydrogen bonds on the surface layer of the spacer 130 and on the surface layer of the substrate 100.
[0065] Specifically, plasma gas (such as hydrogen) can be introduced to perform annealing treatment on the surface layer of the spacer 130 and the surface layers of the substrate 100 on both sides thereof, so that the plasma gas combines with the dangling bonds in the surface layer of the spacer 130 and the surface layers of the substrate 100 on both sides thereof. For example, the ionized hydrogen ions will combine with the hydroxyl dangling bonds and the like in the surface layer of the spacer 130 and the surface layers of the substrate 100 on both sides thereof to form stable saturated bonds, that is, the hydrogen ions initially ionized during the annealing process are used to reduce the number of dangling bonds in the surface layer of the spacer 130 and the surface layers of the substrate 100 on both sides thereof, and then the hydrogen ions subsequently continuously ionized during the annealing process are used to further uniformly form a layer of hydrogen bonds on the surface layer of the spacer 130 and the surface layers of the substrate 100 on both sides thereof, so as to achieve the purpose of increasing the number of hydrogen bonds of the functional groups in the surface layer of the spacer 130 and the surface layers of the substrate 100 on both sides thereof. In one embodiment, the number of hydrogen bonds corresponding to the increase in the absorbance intensity of the infrared peak of the hydrogen bond in the infrared spectrum to a certain threshold value (e.g., 0.0015) can be used as the number of hydrogen bonds corresponding to the increase in the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides thereof, but the present invention is not limited thereto; the flow rate range of the plasma gas (e.g., hydrogen) can be: 1SLM~50SLM, for example, specifically 1SLM, 2SLM, 5SLM, 10SLM, 20SLM, 25SLM, 30SLM, 40SLM, 50SLM, etc.; the temperature range of the annealing treatment may be: 300°C ~ 600°C, for example, 300°C, 350°C, 400°C, 450°C, 500°C, 550°C, 600°C, etc., and the time range of the annealing treatment may be: 0.5h ~ 2h, for example, 0.5h, 0.7h, 0.8h, 0.9h, 1h, 1.1h, 1.2h, 1.5h, 1.6h, 1.7h, 2h, etc.
[0066] Please refer to Fig. 9 and Fig.10 ,in Fig. 9 FIG. 1 is another exemplary diagram of the formation principle of the transition oxide layer during the formation of the transition oxide layer by the functional groups and dangling bonds on the surface of the spacer in one embodiment of the present invention. Fig.10 Another example diagram of the formation principle of the transition oxide layer is shown in FIG. 1 , after the spacer is annealed in one embodiment of the present invention, during the formation of the transition oxide layer, the functional groups and dangling bonds on the surface of the spacer. Fig. 9 and Fig.10 As shown, before forming the transition oxide layer, the spacer 130 and the surface of the substrate 100 are annealed by introducing hydrogen gas, so as to increase the number of hydrogen bonds with uneven distribution and high density on the surface of the spacer 130 and the substrate 100, so as to change the distribution uniformity of the hydrogen bonds.
[0067] Please refer to Fig.11 , Fig.11 FIG. 1 is a graph showing the relationship between the content of hydrogen introduced during the annealing process and the coverage of the transition oxide layer formed subsequently in one embodiment of the present invention. Fig.11 As shown, the step coverage of the transition oxide layer (also referred to as coverage) is proportional to the content of hydrogen introduced during the annealing process, that is, as more hydrogen is introduced during the annealing process, the coverage of the transition oxide layer gradually increases, that is, the uniformity of the formed transition oxide layer is better. Preferably, when the content of hydrogen introduced during the annealing process in the embodiment of the present invention is about 15SLM~20SLM, the coverage of the subsequently formed transition oxide layer is the best, for example, it can reach about 0.5~0.6, but it is not limited to this.
[0068] It should be noted that studies have shown that the number of hydrogen bonds is directly proportional to the deposition rate of the transition oxide layer. Therefore, if the coverage of the subsequently formed transition oxide layer is maximized, the above-mentioned method 1 provided in the embodiment of the present invention is the best solution. If the deposition rate of the transition oxide layer is maximized, the above-mentioned method 2 provided in the embodiment of the present invention is the best solution. Based on this, in order to take into account both the coverage and deposition rate of the transition oxide layer, the embodiment of the present invention provides the following method 3, as described below.
[0069] Method three: Execute the above step S104: first use the introduced gas to bombard the surface layer of the spacer 130 and the substrate 100 on both sides to reduce the number of functional groups contained in the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides, and then use the introduced plasma gas (such as hydrogen) to anneal the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides to increase the number of hydrogen bonds in the functional groups contained in the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides.
[0070] Specifically, the method three in the embodiment of the present invention is to first perform the pretreatment method of the method one on the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides thereof at close range and long range, so that the hydrogen bonds in the surface layer of the spacer 130 and the substrate 100 on both sides thereof are reduced to a preset value, and then reuse the pretreatment method of the method two to increase the number of hydrogen bonds in the surface layer of the spacer 130 and the substrate 100 on both sides thereof, and the increased number must be within a preset error range, and the error range can be, for example, 0.1 to 0.5, that is, the number of hydrogen bonds contained in the surface layer of the spacer 130 is roughly the same as the number of hydrogen bonds contained in the surface layer of the substrate 100 on both sides thereof.
[0071] Please refer to Fig.12 , Fig.12 FIG. 1 is a graph showing the relationship between the hydrogen bond content and the coverage of the transition oxide layer formed subsequently in one embodiment of the present invention. Fig.12 As shown, in the process of treating the surface of the spacer 130 and the substrate 100 using method three in the embodiment of the present invention, the relationship between the content of hydrogen bonds on the surface of the spacer 130 and the substrate 100 and the coverage of the transition oxide layer formed subsequently is: the content of hydrogen bonds first decreases and then increases, while the coverage of the transition oxide layer first increases and then decreases; however, although the coverage of the transition oxide layer finally obtained by using method three in the embodiment of the present invention is reduced a little, for example, from 0.7 to 0.6, due to the increase in the number of hydrogen bonds, the deposition rate of the transition oxide layer will increase rapidly, that is, method three improves the deposition rate of the transition oxide layer to a great extent at the expense of part of the coverage, and also achieves the improvement of the step coverage of the transition oxide layer while taking into account the improvement of the deposition rate of the transition oxide layer.
[0072] Further, after performing the above step S204 to pre-treat the surface layer of the spacer 130 and the surface layers of the substrate 100 on both sides thereof in one of the three ways described above, the manufacturing method provided in the embodiment of the present invention may further include the following steps:
[0073] Please refer to Figure 5 , executing step S205: forming a transition oxide layer 140 on the top surface of the gate structure 251 and on the surface of the substrate 100 on both sides of the spacer 130 , and executing step S206: forming a silicide blocking layer (not shown) on the transition oxide layer 140 . In one embodiment, the material of the transition oxide layer 140 may be an oxide, such as silicon dioxide, and because the embodiment of the present invention performs the step S204 before performing the step S205 to make the number of hydrogen bonds contained in the surface layer of the spacer 130 and the surface layer of the substrate 100 on both sides thereof almost the same, and then in the process of forming the transition oxide layer 140 by using a plasma enhanced chemical vapor deposition process (PECVD) and ethyl orthosilicate and oxygen, the uniform distribution of hydrogen bonds as reaction sites on the surface layer of the spacer 130 and the substrate 100 on both sides thereof will affect the uniform distribution of the formed transition oxide layer 140; and then the formed silicide barrier layer is also uniformly distributed, that is, it will not be affected by the aspect ratio of the gap between the adjacent gate structures 251, so that in the process of removing part of the silicide barrier layer by an etching process to prepare for the subsequent formation of silicide, the material of the silicide barrier layer will not be left at the opening, that is, the purpose of improving the deposition step coverage of the transition oxide layer and avoiding failure of the semiconductor device is achieved.
[0074] It should be understood that the “common shape” in the embodiments of the present invention refers to constructing a continuous structural shape by utilizing the morphological similarities and associations between two or more shapes.
[0075] In summary, the manufacturing method of the semiconductor structure provided by the present invention includes: providing a substrate, forming a plurality of gate structures separated from each other and located on the substrate, forming a spacer located on the side wall of the gate structure, the surface of the spacer and the substrate including functional groups containing at least hydrogen, oxygen and silicon elements, and pre-treating the surface layer of the spacer and the surface layer of the substrate on both sides thereof so that the number of functional groups and dangling bonds contained in the surface layer of the spacer and the number of functional groups and dangling bonds contained in the surface layer of the substrate on both sides thereof are within an error range.
[0076] In the present invention, on the one hand, the surface layer of the spacer and the surface layer of the substrate on both sides are bombarded multiple times with plasma having different bombardment distances from the treated surface layer, so as to reduce the number of functional groups contained in the surface layer of the spacer and the surface layer of the substrate on both sides, and adjust the distribution density of the functional groups on the surface layer of the spacer and the surface layer of the substrate on both sides, thereby obtaining an unexpected effect: the hydrogen bonds in the functional groups are evenly distributed on the surface layer of the spacer and the surface layer of the substrate, thereby avoiding the problem of uneven distribution of the transition oxide layer formed subsequently due to the uneven distribution of hydrogen bonds on different surface layers; on the other hand, the surface layer of the spacer and the surface layer of the substrate on both sides are treated by annealing treatment, so as to reduce the amount of functional groups contained in the surface layer of the spacer and the surface layer of the substrate on both sides, thereby reducing ... The dangling bonds contained in the surface layer and the surface layers of the substrates on both sides are combined to reduce the number of dangling bonds contained in the surface layer of the spacer and the surface layers of the substrates on both sides, and then the plasma gas is continuously introduced to form uniformly distributed hydrogen bonds on the surface layer of the spacer and the surface layers of the substrates on both sides, thereby obtaining the unexpected effect of increasing the number of hydrogen bonds in the functional groups contained in the surface layer of the spacer and the surface layers of the substrates on both sides, thereby achieving uniform distribution of hydrogen bonds on the surface layer of the spacer and on the surface layer of the substrates, avoiding uneven distribution of hydrogen bonds on different surface layers that leads to uneven distribution of the subsequent formed transition oxide layer, improving the deposition step coverage of the transition oxide layer and improving the deposition rate of the transition oxide layer.
[0077] An embodiment of the present invention further provides an electronic device, including a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus.
[0078] Memory, used to store computer programs;
[0079] The processor is used to implement a method for manufacturing a semiconductor structure provided by an embodiment of the present invention when executing a program stored in the memory.
[0080] In addition, other implementations of the method for manufacturing a semiconductor structure implemented by the processor executing a program stored in the memory are the same as the implementations mentioned in the aforementioned method embodiment section and will not be repeated here.
[0081] The communication bus mentioned in the above control terminal can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.
[0082] The communication interface is used for communication between the above electronic device and other devices.
[0083] The memory may include a random access memory (RAM) or a non-volatile memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.
[0084] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.
[0085] In another embodiment of the present invention, a computer-readable storage medium is provided. The computer-readable storage medium stores instructions. When the instructions are executed on a computer, the computer executes a method for manufacturing a semiconductor structure described in any of the above embodiments.
[0086] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive Solid State Disk (SSD)), etc.
[0087] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.
[0088] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device, electronic device, and computer-readable storage medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.
[0089] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.
Claims
1. A method for manufacturing a semiconductor structure, characterized in that: include: providing a substrate; forming a plurality of gate structures separated from each other and located on the substrate; Forming a spacer on the sidewall of the gate structure, wherein the spacer and the surface of the substrate include functional groups and dangling bonds containing at least hydrogen, oxygen and silicon elements; The surface layer of the spacer and the surface layers of the substrate on both sides thereof are pretreated so that the difference between the number of functional groups and dangling bonds contained in the surface layer of the spacer and the number of functional groups and dangling bonds contained in the surface layer of the substrate on both sides thereof is within an error range; wherein the step of pretreating the surface layer of the spacer and the surface layers of the substrate on both sides thereof comprises: A first gas is introduced to bombard the surface layer of the substrate on both sides of the spacer to break the chemical bond between the hydrogen element and the silicon element in the functional group in the surface layer of the substrate, and the formed hydrogen-containing dangling bond is combined with the remaining dangling bonds to reduce the number of hydrogen bonds of the functional group in the surface layer of the substrate; A second gas is introduced to bombard the surface layer of the spacer to break the chemical bond between the hydrogen element and the silicon element in the functional group in the surface layer of the spacer, and the formed hydrogen-containing dangling bond is combined with the remaining dangling bonds to reduce the number of hydrogen bonds of the functional group in the surface layer of the spacer; There is a first bombardment distance between the first gas and the surface of the substrate, there is a second bombardment distance between the second gas and the surface of the spacer, and the first bombardment distance is smaller than the second bombardment distance.
2. The method for manufacturing a semiconductor structure according to claim 1, wherein: The material of the spacer includes nitride, and the nitride includes silicon nitride.
3. The method for manufacturing a semiconductor structure according to claim 2, wherein: The functional group includes at least one of a silicon-hydrogen bond or a hydrogen bond, and the dangling bond includes at least one of a silicon-containing dangling bond, an oxygen-containing dangling bond, a hydroxyl dangling bond, or a silicon-oxygen dangling bond.
4. The method for manufacturing a semiconductor structure according to claim 3, wherein: The pretreatment performed on the surface layer of the spacer and the surface layers of the substrate on both sides thereof includes: annealing treatment.
5. The method for manufacturing a semiconductor structure according to claim 1, wherein: The first gas includes argon, the second gas includes nitrogen, the first bombardment distance ranges from 200 mil to 300 mil, and the second bombardment distance ranges from 550 mil to 1100 mil.
6. The method for manufacturing a semiconductor structure according to claim 1 or 4, characterized in that: The step of pretreating the surface layer of the spacer and the surface layers of the substrate on both sides thereof comprises: Plasma gas is introduced to perform annealing treatment on the surface layer of the spacer and the surface layer of the substrate on both sides thereof, so that the plasma gas combines with the dangling bonds in the surface layer of the spacer and the surface layer of the substrate on both sides thereof, so as to increase the number of hydrogen bonds of the functional groups in the surface layer of the spacer and the surface layer of the substrate on both sides thereof.
7. The method for manufacturing a semiconductor structure according to claim 6, wherein: The plasma gas includes hydrogen, the flow rate of the hydrogen is in the range of 1 slm to 50 slm, the duration of the hydrogen is in the range of 0.5 h to 2 h, and the temperature of the annealing treatment is in the range of 300° C. to 600° C.
8. The method for manufacturing a semiconductor structure according to claim 1, wherein: The error range is: 0.1~0.
5.
9. The method for manufacturing a semiconductor structure according to claim 1, wherein: After pre-treating the surface layer of the spacer and the surface layers of the substrate on both sides thereof, the method further comprises: Forming a transition oxide layer on the top surface of the gate structure and on the surface of the spacer and the substrate on both sides thereof; A silicide blocking layer is formed on the transition oxide layer.
10. The method for manufacturing a semiconductor structure according to claim 6, wherein: The absorbance intensity of the infrared peak of the hydrogen bond in the infrared spectrum represents the number of hydrogen bonds of the functional group, and the absorbance intensity of the infrared peak of the hydrogen bond in the infrared spectrum ranges from 0.0005 to 0.0015.
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