Wafer measurement method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention discloses a wafer measurement method and device, electronic equipment and a storage medium. The method comprises the following steps: acquiring a reference image obtained by scanning a reference wafer; acquiring position information of reference crystal grains in the reference wafer according to the reference image so as to obtain a crystal grain distribution diagram; and performing morphology measurement on the to-be-measured crystal grains in the to-be-measured wafer according to the crystal grain distribution diagram to obtain morphology measurement data of the to-be-measured crystal grains. According to the scheme, real-time measurement can be carried out on the wafer based on the scanned three-dimensional data of the wafer in the wafer scanning process, and the measurement efficiency of the wafer can be improved.

Description

Technical Field

[0001] The present invention relates to the field of wafer measurement, and in particular to a wafer measurement method, device, electronic equipment, storage medium and computer program product. Background Art

[0002] Modern chips usually contain three-dimensional structures, such as transistor stacks, fine lines, and multi-layer metal interconnects. The characteristics of these structures have a significant impact on the performance and power consumption of the chip, so their three-dimensional characteristics need to be accurately measured. Wafer three-dimensional measurement technology is a key technology in the field of semiconductor manufacturing, which is used to evaluate and measure various characteristics and parameters on integrated circuits (chips) to ensure their performance and quality.

[0003] The three-dimensional measurement of wafers usually requires the use of measurement tools such as atomic force microscopes (AFM), transmission electron microscopes (TEM), and ion beam cutting machines (FIB) to obtain three-dimensional information at different levels on the wafer, including height, depth, volume, and contour. In related technologies, when collecting three-dimensional data of a wafer, it is necessary to scan the entire wafer to obtain a large amount of wafer three-dimensional data, and then identify, segment, and measure all the wafer three-dimensional data. This solution is time-consuming and has low measurement efficiency. Summary of the invention

[0004] The present invention is proposed in view of the above problems. The present invention provides a wafer measurement method, device, electronic device, storage medium and computer program product. This solution can perform real-time measurement of the wafer based on the three-dimensional wafer data obtained by scanning the wafer during the wafer scanning process, which is conducive to improving the measurement efficiency of the wafer.

[0005] According to one aspect of the present invention, a wafer measurement method is provided. The method comprises: obtaining a reference image obtained by scanning a reference wafer; obtaining position information of reference grains in the reference wafer according to the reference image to obtain a grain distribution map; and performing morphological measurement on the grains to be measured in the wafer to be measured according to the grain distribution map to obtain morphological measurement data of the grains to be measured.

[0006] Optionally, the reference image is obtained by scanning a reference wafer using a first image acquisition module according to a first preset scanning path; wherein the first preset scanning path is a zigzag or bow shape.

[0007] Optionally, position information of a reference grain in a reference wafer is obtained based on a reference image, including: performing cutting line identification on the reference image to obtain position information of each cutting line in the reference wafer; determining the position of each lattice divided by the cutting line based on the position information of each cutting line in the reference wafer to obtain position information of the lattice, wherein at least part of the lattice in the reference wafer includes a reference grain; and performing template matching in the reference image based on a preset grain template image and the position of the lattice to obtain position information of the reference grain.

[0008] Optionally, the grain distribution map includes position information of cutting paths, and the cutting paths are used to segment each reference grain in the reference image; after acquiring the position information of the reference grains in the reference wafer according to the reference image to obtain the grain distribution map, the method also includes: adjusting the orientation of the wafer to be tested according to the position information of the cutting paths, so that the orientation of the wafer to be tested meets the preset orientation requirements, and the adjustment includes rotation and / or translation; wherein, the structure of the wafer to be tested is the same as that of the reference wafer, and the preset orientation requirements meet: the cutting paths of the wafer to be tested are parallel or perpendicular to the preset direction.

[0009] Optionally, morphology measurement is performed on the grains to be tested in the wafer to be tested according to the grain distribution map, including: determining a region to be tested in the grain distribution map, the region to be tested includes a grain region where a target reference grain is located, and a position of the target reference grain in the reference wafer is consistent with a position of the grain to be tested in the wafer to be tested; based on the region to be tested, determining a second preset scanning path for a second image acquisition module when scanning the wafer to be tested, the scanning area covered by the second preset scanning path includes the region to be tested; and obtaining morphology measurement data obtained by scanning the wafer to be tested by the second image acquisition module according to the second preset scanning path.

[0010] Optionally, the reference image is obtained by scanning the reference wafer using a first image acquisition module while the reference wafer is placed on the transport control platform and the transport control platform is moving, and the grain distribution map includes transport control position information corresponding to the reference grain, and the transport control position information is the position information of the transport control platform when the first image acquisition module scans the reference grain; the morphology measurement data is obtained by scanning the wafer to be tested using a second image acquisition module while the wafer to be tested is placed on the transport control platform and the transport control platform is moving; the morphology measurement data is obtained by scanning the wafer to be tested using the second image acquisition module according to the second preset scanning path. The data include: when the transport control platform moves along the reverse path of the second preset scanning path, obtaining the current transport control position information of the transport control platform; when the current transport control position information matches the transport control position information corresponding to any reference grain, determining the grain region where the target grain to be tested corresponding to the reference grain is located according to the grain distribution map, and obtaining the regional morphology measurement data in the grain region where the target grain to be tested is located, the morphology measurement data includes the regional morphology measurement data corresponding to each grain to be tested in the wafer to be tested; wherein the position of the target grain to be tested in the wafer to be tested is consistent with the position of the reference grain in the reference wafer.

[0011] Optionally, the reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; and a scanning area covered by the second preset scanning path is smaller than a scanning area corresponding to the first preset scanning path.

[0012] Optionally, the grain distribution map includes position information of reference grains; the position information of reference grains includes: length and width of the reference grains, and includes: coordinates and / or row and column information of the center point of the reference grains, and the row and column information includes the row number and column number.

[0013] According to another aspect of the present invention, a wafer measuring device is also provided, including: a first acquisition module, used to acquire a reference image obtained by scanning a reference wafer; a second acquisition module, used to acquire position information of reference grains in the reference wafer according to the reference image to obtain a grain distribution map; and a morphology measurement module, used to perform morphology measurement on the grains to be measured in the wafer to be measured according to the grain distribution map to obtain morphology measurement data of the grains to be measured.

[0014] According to another aspect of the present invention, there is provided an electronic device, comprising: a processor and a memory, wherein the memory stores computer program instructions, and the computer program instructions are used to execute the above-mentioned wafer measurement method when the processor is running.

[0015] According to yet another aspect of the present invention, a storage medium is provided, on which program instructions are stored, and the program instructions are used to execute the above-mentioned wafer measurement method when running.

[0016] According to yet another aspect of the present invention, a computer program product is provided, comprising computer program instructions, wherein the computer program instructions are used to execute the wafer measurement method as described above when running.

[0017] The above technical solution measures the morphology of the tested grains of the same type of tested wafers through a grain distribution map containing the position information of the reference grains, and can quickly and accurately determine the tested grain to which the obtained morphology measurement data belongs and the position of the tested grain in the tested wafer during measurement, thereby saving the time for identifying and segmenting the morphology measurement data of all grains, which is beneficial to improving the wafer measurement efficiency. On the other hand, the morphology measurement data obtained by this method allows storage in units of single tested grains, and is stored in a data-based memory discrete storage method, so that the measured morphology measurement data does not need to be stored in a certain overall storage space of the computer, which is beneficial to reducing the occupation of computer resources by a large amount of measurement data.

[0018] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and other purposes, features and advantages of the present invention will become more apparent by describing the embodiments of the present invention in more detail in conjunction with the accompanying drawings. The accompanying drawings are used to provide a further understanding of the embodiments of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0020] Figure 1 A schematic flow chart of a wafer measurement method according to an embodiment of the present invention is shown;

[0021] Figure 2 A schematic diagram of the surface structure of a reference wafer according to an embodiment of the present invention is shown;

[0022] Figure 3 A schematic structural block diagram of a wafer measuring device according to an embodiment of the present invention is shown;

[0023] Figure 4 A schematic block diagram of an electronic device according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical scheme and advantages of the present invention more obvious, the exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments of the present invention, and it should be understood that the present invention is not limited to the exemplary embodiments described herein. Based on the embodiments of the present invention described in the present invention, all other embodiments obtained by those skilled in the art without creative work should fall within the protection scope of the present invention.

[0025] As described above, in the related art, when performing three-dimensional measurement on a wafer, it is necessary to scan the entire wafer to obtain a large amount of wafer three-dimensional data, and to identify, segment and measure all the wafer three-dimensional data, which takes a long time. An embodiment of the present invention provides a wafer measurement method, device, electronic device, storage medium and computer program product. This solution can perform real-time measurement of the wafer based on the wafer three-dimensional data obtained by scanning during the wafer scanning process, which is conducive to improving the measurement efficiency of the wafer.

[0026] See also Figure 1 As shown, it is a schematic flow chart of a wafer measurement method according to an embodiment of the present invention. According to one aspect of the present invention, a wafer measurement method is provided, the method comprising: step S110, step S120 and step S130.

[0027] In step S110 , a reference image obtained by scanning a reference wafer is acquired.

[0028] Exemplarily, the reference wafer may be any one of a plurality of wafers of the same model to be measured (i.e., wafers to be measured), or may be a non-wafer to be measured of the same model as the wafer to be measured. After determining the reference wafer, the reference wafer may be scanned using an image acquisition module. The image acquisition module may be a two-dimensional image acquisition module for acquiring two-dimensional information of the surface of a target object, or may be a three-dimensional image acquisition module for acquiring three-dimensional information of a target object. More specifically, the image acquisition module may be, for example, an industrial camera, a CCD camera, a CMOS camera, a laser confocal microscope (CLSM), a scanning probe microscope (SPM), a white light interferometer (WLI), and the like. In some embodiments, the scanning area of ​​the image acquisition module may cover the entire surface area of ​​the reference wafer or at least the surface area where all reference grains are located. In this case, the scanning of the reference wafer may be completed while the image acquisition module and the reference wafer remain relatively stationary, and a reference image of the entire surface area of ​​the reference wafer or the surface area where all reference grains are located may be obtained. In other embodiments, the scanning area of ​​the image acquisition module may only cover part of the surface area of ​​the reference wafer or specifically only cover the surface area where part of the reference grains of the reference wafer are located. In this case, the reference wafer can be fixedly placed on the transport control platform, the image acquisition module can be set at a specific position, the transport control platform can be controlled to move according to a preset path, and the reference wafer can be scanned by the image acquisition module during the movement of the transport control platform, and image processing algorithms such as image correction and splicing can be used to obtain a reference image that can include the entire surface area of ​​the reference wafer or the surface area where all the reference grains are located. The image correction algorithm can include, for example, gamma correction, histogram equalization, etc., and the image splicing algorithm can be, for example, Laplace pyramid fusion, weight-based fusion, etc. The specific position where the image acquisition module is located and the preset path of the transport control platform can satisfy: during the movement of the transport control platform, the union of the scanning areas of the image acquisition module can cover the entire surface area of ​​the reference wafer or the surface area where all the reference grains are located. Alternatively, the reference wafer can be set at a specific position, the image acquisition module can be controlled to move according to a preset path, and the image acquisition module scans the reference wafer during the movement. Similarly, an image processing algorithm can be used to obtain a reference image including the entire surface area of ​​the reference wafer or the surface area where all reference grains are located, and the specific position of the reference wafer and the preset path of the image acquisition module can satisfy: during the movement of the image acquisition module, the union of the scanning areas of the image acquisition module can cover the entire surface area of ​​the reference wafer or the surface area where all reference grains are located. It can be understood that the obtained reference image can be a grayscale image or an RGB image, etc.

[0029] In step S120 , position information of reference grains in a reference wafer is acquired according to the reference image to obtain a grain distribution map.

[0030] See also Figure 2 As shown, it is a schematic diagram of the surface structure of a reference wafer according to an embodiment of the present invention. The surface of the reference wafer may have multiple dicing lanes perpendicular to each other. Figure 2 In the image, a plurality of mutually perpendicular horizontal lines and a plurality of vertical lines represent a plurality of cutting paths, and each square divided by the plurality of cutting paths may represent a lattice. For any lattice, it may include a reference die, or it may not include a reference die. That is to say, all the lattices divided by the cutting paths on the reference wafer may include reference die, or may only partially include reference die. Exemplarily, the reference wafer in the reference image may include a plurality of reference die, and each reference die may have position information. The position information may include relative position information for indicating the relative position of the reference die in the reference wafer. For example, the position information of the reference die may include row and column information of the reference die in the reference wafer (including the number of rows and the number of columns to which it belongs). For another example, a coordinate system may be established in the reference wafer, and the position information of the reference die may include the coordinate information of the center point of the reference die in the established coordinate system. In some embodiments, the reference image is an image acquired by the image acquisition module during the movement of the transport control platform on which the reference wafer is placed. The transport control platform may have a transport control coordinate system, in which case the position information of the reference grain may also include the coordinate information when the transport control platform scans the corresponding reference grain in the transport control coordinate system. In other embodiments, the reference image is an image acquired by the image acquisition module during the movement process. Similarly, the image acquisition module may have a module coordinate system. In this case, the position information of the reference grain may also include the coordinate information when the image acquisition module scans the corresponding reference grain in the module coordinate system. After acquiring the position information of the reference grain, a die map (diemap) may be generated based on the position information of the reference grain, and the die map may represent the distribution of the reference grain in the reference wafer.

[0031] In step S130 , the morphology of the grains to be tested in the wafer to be tested is measured according to the grain distribution map to obtain morphology measurement data of the grains to be tested.

[0032] Exemplarily, the wafer to be tested may be a wafer of the same model as the reference wafer, that is, the distribution of each grain in the wafer to be tested in the wafer to be tested is consistent with the distribution of each grain in the reference wafer in the reference wafer. When the morphology of the grain to be tested in each wafer to be tested is measured, an image acquisition module may be used to scan the grain to be tested in the wafer to be tested. The image acquisition module used may be a three-dimensional image acquisition module for acquiring three-dimensional information of the target object, which may be the same as or different from the image acquisition module used when acquiring the reference image. When scanning the grain to be tested in the wafer to be tested, the position information of the reference grain in the grain distribution map may be matched with the position of the grain to be tested. Specifically, for each reference grain of the reference wafer, there may be a grain to be tested in the wafer to be tested that satisfies: the relative position of the grain to be tested in the wafer to be tested is consistent with the relative position of the reference grain in the reference wafer. When performing morphological measurement on each crystal grain to be tested, the position information of the crystal grain to be tested can be determined according to the crystal grain distribution map, and the obtained morphological measurement data can be determined as the morphological measurement data of the crystal grain corresponding to the position information in the wafer to be tested. The morphological measurement data can include, for example, the height, number, and spacing of the spherical solder joints (bumps) in the crystal grain to be tested, the height and width of the laid circuits, etc.

[0033] The above technical solution measures the morphology of the measured grain of the measured wafer through the grain distribution map containing the position information of the reference grain, and can quickly and accurately determine the measured grain to which the obtained morphology measurement data belongs and the position of the measured grain in the measured wafer during measurement, thereby saving the time for identifying and segmenting the morphology measurement data of all grains, which is beneficial to improving the wafer measurement efficiency. On the other hand, the morphology measurement data obtained by this method allows storage in units of single measured grains, and is stored in a data-based memory discrete storage method. It is not necessary to store the measured morphology measurement data in a centralized manner in a certain overall storage space of the computer, which is beneficial to reducing the occupation of computer resources by a large amount of measurement data.

[0034] Optionally, the reference image is obtained by scanning a reference wafer using a first image acquisition module according to a first preset scanning path; wherein the first preset scanning path is a zigzag or bow shape.

[0035] Exemplarily, the image acquisition module used to scan the reference wafer can be recorded as the first image acquisition module, and the scanning area of ​​the first image acquisition module can cover a partial surface area of ​​the reference wafer or specifically cover the surface area where a portion of the reference grains of the reference wafer are located. Before scanning the reference wafer, a first preset scanning path can be set. Exemplarily, the first preset scanning path can include a plurality of scanning lines, each of which can be straight and parallel to each other, and each scanning line can have a scanning start point and a scanning end point. The first preset scanning path can be zigzag-shaped, and when the first preset scanning path is zigzag-shaped, the direction of each scanning line from the scanning start point to the scanning end point can be the same. For the convenience of description, each scanning line is arranged in a direction perpendicular to each scanning line, and each scanning line is sequentially recorded as the first scanning line, the second scanning line, ..., the Nth scanning line (N is greater than 1). The first image acquisition module scans the reference wafer in a zigzag pattern, which may specifically include: scanning from the scan start point of each scan line to the scan end point of the scan line in order from the first scan line to the Nth scan line (or from the Nth scan line to the first scan line); or, scanning from the scan start point of each scan line to the scan end point of the scan line, and scanning from the scan end point of the scan line to the scan start point of the next scan line adjacent to the scan line in a straight line direction from the scan end point of the scan line to the scan start point of the next scan line adjacent to the scan line. The spacing between two adjacent scan lines may be the same or different. The spacing between two adjacent scan lines may satisfy: the union of the scan areas scanned by the first image acquisition module along one of the scan lines intersects with the union of the scan areas scanned along the other scan line, or there is an edge line in any one of the unions that coincides with an edge line in another union. Reference Figure 2 , showing several exemplary scanning lines L1 during zigzag scanning.

[0036] In some embodiments, the reference wafer can be fixedly set on the transport control platform, and the transport control platform can move according to a first preset motion path, and the first preset motion path can be the same as the trajectory of the first preset scanning path and in the opposite direction. The first preset motion path can include moving lines corresponding to each scanning line one by one, and the length of each moving line can be equal to the length of the corresponding scanning line. Each moving line can have a moving starting point and a moving end point, and the direction from the starting point of each moving line to the moving end point can be the same, and are opposite to the direction from the scanning starting point to the scanning end point in any scanning line. Correspondingly, the arrangement direction of each moving line is the same as the arrangement direction of the scanning line corresponding to each moving line, and each moving line is arranged according to the arrangement direction of each moving line, and each moving line can be recorded as the first moving line, the second moving line, ..., the Nth moving line (N is greater than 1). It can be understood that when the transport control platform moves according to the first preset motion path, the first image acquisition module can scan the reference wafer according to the first preset scanning path. Specifically, during the scanning process, the motion trajectory of the transport control platform is: the starting point of the first moving line—the end point of the first moving line—the starting point of the second moving line—the end point of the second moving line—the starting point of the third moving line—…—the end point of the Nth moving line. Moreover, the transport control platform moves in a straight line during the movement process. During the movement of the transport control platform, the first image acquisition module can scan the reference wafer when the transport control platform moves from the starting point of the current moving line to the end point of the moving line; or it can scan the reference wafer when the transport control platform moves from the starting point of the current moving line to the end point of the moving line, and scan the reference wafer when the end point of the current moving line moves to the starting point of the next moving line adjacent to the current moving line.

[0037] In other embodiments, when scanning the reference wafer, the reference wafer can remain stationary, and the first image acquisition module can be controlled to move along the second preset motion path. Similarly, the second preset motion path can be the same as the trajectory of the first preset scanning path and in the same direction. The second preset motion path can include moving lines corresponding to each scanning line one by one, and the length of each moving line can be equal to the length of the corresponding scanning line. Each moving line can have a starting point and an end point of movement, and the direction of each moving line from the starting point of movement to the end point of movement can be the same, and are the same as the direction from the scanning starting point to the scanning end point in any scanning line. Accordingly, the arrangement direction of each moving line is the same as the arrangement direction of the scanning line corresponding to each moving line, and each moving line is arranged according to the arrangement direction of each moving line, and each moving line can be recorded as the first moving line, the second moving line, ..., the Nth moving line (N is greater than 1). Specifically, during the scanning process, the motion trajectory of the first image acquisition module is: the starting point of the first moving line—the end point of the first moving line—the starting point of the second moving line—the end point of the second moving line—the starting point of the third moving line—…—the end point of the Nth moving line. Moreover, the first image acquisition module moves in a straight line during the movement process. During the movement of the first image acquisition module, the first image acquisition module can scan the reference wafer when the first image acquisition module moves from the starting point of the current moving line to the end point of the moving line; or the first image acquisition module can scan the reference wafer when the first image acquisition module moves from the starting point of the current moving line to the end point of the moving line, and scan the reference wafer when the end point of the current moving line moves to the starting point of the next moving line adjacent to the current moving line.

[0038] In a specific embodiment, the first preset scanning path is zigzag, and the scanning area of ​​the first image acquisition module is a rectangle. In this embodiment, the scanning lines included in the first preset scanning path are equal in length and spacing, and the line connecting the scanning starting points (or scanning end points) of each scanning line is a straight line, and the line is perpendicular to the scanning line. The spacing between any two adjacent scanning lines can satisfy: the union of the scanning areas scanned by the first image acquisition module along one of the scanning lines and the union of the scanning areas scanned along another scanning line share an edge line. More specifically, the scanning starting point and scanning end point of the first scanning line, and the scanning starting point and scanning end point of the Nth scanning line each correspond to a scanning area within the circumscribed rectangle of the reference wafer, share vertices with the circumscribed rectangle, and the four scanning areas each have different common vertices with the circumscribed rectangle.

[0039] Exemplarily, the first preset scanning path may also be in the shape of a bow, and its setting method is similar to the first preset scanning path in the shape of a bow. For the first preset scanning path in the shape of a bow, the scan lines it contains are of equal length, and the line connecting the endpoints of each scan line at any end is a straight line, which is perpendicular to any scan line, and for any two adjacent scan lines, the direction in which the scan start point of one scan line points to the scan end point is opposite to the direction in which the scan start point of the other scan line points to the scan end point. When the reference wafer and the first image acquisition module move relative to each other, the first preset motion path and motion trajectory of the transport control platform, or the second preset motion path and motion trajectory of the first image acquisition module are similar to the above-mentioned scheme, which will not be described in detail here. Reference Figure 2 , showing several exemplary scanning lines L2 during bow-shaped scanning.

[0040] The above technical solution can complete the scanning of the reference wafer in a short time along a shorter scanning path by setting the first preset scanning path to a zigzag or bow shape, and is conducive to reducing the area of ​​repeated scanning, and is not easy to miss the area that needs to be scanned in the reference wafer, thereby saving scanning time and improving measurement efficiency.

[0041] Optionally, position information of a reference grain in a reference wafer is obtained based on a reference image, including: performing cutting line identification on the reference image to obtain position information of each cutting line in the reference wafer; determining the position of each lattice divided by the cutting line based on the position information of each cutting line in the reference wafer to obtain position information of the lattice, wherein at least part of the lattice in the reference wafer includes a reference grain; and performing template matching in the reference image based on a preset grain template image and the position of the lattice to obtain position information of the reference grain.

[0042] Exemplarily, after acquiring a reference image, the cutting path in the reference image can be identified. Specifically, the reference image can be subjected to binarization, morphological processing (such as opening operation, closing operation, dilation and erosion, etc.) and straight line fitting (such as Hough transform) to extract the straight line in the reference image as the cutting path. The reference image may include multiple cutting paths, wherein, for each cutting path, part of the cutting paths in the reference image are parallel to the cutting path, and the remaining cutting paths (except the cutting path) are perpendicular to the cutting path. Each cutting path may have position information, and specifically, a coordinate system may be established in the acquired reference image, and the position information of each cutting path may include the coordinates of each point on each cutting path. Alternatively, the arrangement direction of the cutting paths in the reference image is recorded as the first direction and the second direction, the cutting paths arranged along the first direction are recorded as the first column cutting paths, the second column cutting paths, ..., the Kth column cutting paths (K is an integer and K>1), and the cutting paths arranged along the second direction are recorded as the first row cutting paths, the second row cutting paths, ..., the Mth row cutting paths (M is an integer and K>1), then the position information of each cutting path may include the row number or column number to which each cutting path belongs. It can be understood that the first direction is perpendicular to the second direction, the cutting paths arranged along the first direction are parallel to each other and the straight line on which each of them is located is parallel to the second direction, and the cutting paths arranged along the second direction are parallel to each other and the straight line on which each of them is located is parallel to the first direction.

[0043] Exemplarily, in the reference image, two adjacent and parallel cutting paths, and a rectangle formed by two other adjacent and parallel and perpendicular cutting paths can represent a lattice. For each lattice, the position information of the lattice can be determined based on the position information of the four cutting paths that constitute the lattice. Specifically, the center point coordinates of the lattice can be determined based on the coordinates of each point constituting the lattice in the four cutting paths, or the row and column information of the lattice can be determined based on the number of rows and columns to which the four cutting paths belong. For example, a lattice is surrounded by the fifth row of cutting paths, the sixth row of cutting paths, the second row of cutting paths, and the third row of cutting paths. The row and column information of the lattice can be in the second row and the fifth column in each lattice. Accordingly, the position information of the lattice can include the center point coordinates of the lattice, and can also include the row and column information of the lattice. After obtaining the position information of the lattice, a preset grain template image can be used to perform template matching with the reference image. Specifically, in the preset grain template image, lattices and feature information corresponding to the positions of each lattice of the reference wafer may be included, and the feature information of each lattice of the grain template image may be used to indicate whether the reference grain is contained in the lattice. Based on the preset grain template image and the positions of each lattice in the reference wafer, the reference lattice in the reference wafer and the position information of the reference lattice may be determined. The reference lattice may include a reference grain, and the position information of the reference grain contained may be determined based on the position information of the reference lattice. In some embodiments, the position information of the reference grain may be represented by the position information of the reference lattice to which it belongs.

[0044] The above technical solution can quickly and accurately obtain the position of each lattice divided by the cutting path based on the position of the cutting path by identifying the cutting path of the reference image. By matching with the preset grain template image, the position information of the effective reference lattice can be determined in the reference image, and then the position information of the reference grain can be determined, thereby achieving accurate positioning of the reference grain.

[0045] Optionally, the grain distribution map includes position information of cutting paths, and the cutting paths are used to segment each reference grain in the reference image; after acquiring the position information of the reference grains in the reference wafer according to the reference image to obtain the grain distribution map, the method also includes: adjusting the orientation of the wafer to be tested according to the position information of the cutting paths, so that the orientation of the wafer to be tested meets the preset orientation requirements, and the adjustment includes rotation and / or translation; wherein, the structure of the wafer to be tested is the same as that of the reference wafer, and the preset orientation requirements meet: the cutting paths of the wafer to be tested are parallel or perpendicular to the preset direction.

[0046] Exemplarily, the position information of the cutting path can be used to predict the orientation of the wafer to be tested to adjust the orientation of the wafer to be tested. For the same batch of wafers (including reference wafers and wafers to be tested with the same structure as the reference wafer), it can be considered that the orientation of each wafer is the same when loading, and the orientation of the reference wafer and the wafer to be tested can be determined based on the position information of the cutting path corresponding to the reference wafer. When the wafer is scanned using the image acquisition module, the wafer can be fixedly placed on the scanning platform. In some embodiments, the scanning platform can be a transport control platform for driving the movement of the wafer during the wafer scanning process; in other embodiments, the scanning platform can remain stationary when scanning the wafer. When the wafer is loaded onto the scanning platform, the orientation of the wafers of the same batch on the scanning platform is consistent. When it is determined that the wafer to be tested is offset according to the position information of the cutting path, the cutting path can be controlled to be parallel or perpendicular to the preset direction when the wafer to be tested is located on the scanning platform through rotation and / or translation operations. Specifically, the preset direction may be, for example, the extension direction of the processing line used to process each wafer (including the reference wafer and the target wafer). Before the wafer to be tested, a cutting path parallel to a certain direction may be used as a reference cutting path, and the reference cutting path after rotation may be parallel to the preset direction, and other cutting paths except the reference cutting path may be perpendicular to the preset direction.

[0047] The above technical scheme adjusts the orientation of the wafer to be tested according to the position information of the cutting path, and can more accurately judge the deviation of the physical position of the wafers in the current batch. By adjusting the orientation of the wafer to be tested, the cutting path of the wafer can be made parallel to the extension direction of the processing line, which is conducive to the subsequent precise processing of the wafer.

[0048] Optionally, morphology measurement is performed on the grains to be tested in the wafer to be tested according to the grain distribution map, including: determining a region to be tested in the grain distribution map, the region to be tested includes a grain region where a target reference grain is located, and a position of the target reference grain in the reference wafer is consistent with a position of the grain to be tested in the wafer to be tested; based on the region to be tested, determining a second preset scanning path for a second image acquisition module when scanning the wafer to be tested, the scanning area covered by the second preset scanning path includes the region to be tested; and obtaining morphology measurement data obtained by scanning the wafer to be tested by the second image acquisition module according to the second preset scanning path.

[0049] Exemplarily, the grains to be measured in the grain distribution map may include the area where all the grains in the grain distribution map are located, or may include some of the grains in all the grains, which can be selected by the user according to actual needs as target reference grains, and the grain area where the target reference grains are located is the area to be measured in the grain distribution map. For each wafer to be measured, the position of the grain to be measured in the wafer to be measured is consistent with the position of the target reference grain in the reference wafer. The area to be measured can be used to determine a second preset scanning path, and the second preset scanning path can be, for example, a zigzag shape, a bow shape, etc. When the second image acquisition module is used to scan the wafer to be measured according to the second preset scanning path, the union of the scanning areas of the second image acquisition module at each position can at least cover the area to be measured. The second image acquisition module can be a three-dimensional image acquisition module for acquiring three-dimensional information of the target object, which can be the same as or different from the first image acquisition module used when acquiring the reference image. In the process of scanning the wafer to be tested by the second image acquisition module, the morphology measurement data of the grains to be tested in the current scanning area can be obtained in real time. Specifically, when the second image acquisition module obtains the morphology measurement data, the position information of the grains in the current scanning area can be determined based on the relative position of the second image acquisition module and the wafer to be tested, so as to match the position information of the target reference grains in the grain distribution map, and then the obtained morphology measurement data is determined as the morphology measurement data of the reference grains at the corresponding positions in the reference wafer.

[0050] The above technical solution determines the area to be tested in the grain distribution map and can reset the second preset scanning path according to the determined area to be tested. In particular, when the area to be tested is only a partial surface area of ​​the wafer, the second preset scanning path can be shortened to reduce the scanning time and improve the measurement efficiency.

[0051] Optionally, the reference image is obtained by scanning the reference wafer using a first image acquisition module while the reference wafer is placed on the transport control platform and the transport control platform is moving, and the grain distribution map includes transport control position information corresponding to the reference grain, and the transport control position information is the position information of the transport control platform when the first image acquisition module scans the reference grain; the morphology measurement data is obtained by scanning the wafer to be tested using a second image acquisition module while the wafer to be tested is placed on the transport control platform and the transport control platform is moving; the morphology measurement data is obtained by scanning the wafer to be tested using the second image acquisition module according to the second preset scanning path. The data include: when the transport control platform moves along the reverse path of the second preset scanning path, obtaining the current transport control position information of the transport control platform; when the current transport control position information matches the transport control position information corresponding to any reference grain, determining the grain region where the target grain to be tested corresponding to the reference grain is located according to the grain distribution map, and obtaining the regional morphology measurement data in the grain region where the target grain to be tested is located, the morphology measurement data includes the regional morphology measurement data corresponding to each grain to be tested in the wafer to be tested; wherein the position of the target grain to be tested in the wafer to be tested is consistent with the position of the reference grain in the reference wafer.

[0052] Exemplarily, when collecting a reference image, a reference wafer can be placed on a transport control platform, and the transport control platform moves to drive the reference wafer to move. When the transport control platform moves, the first image acquisition module can scan the reference wafer. Moreover, for each reference grain scanned during the scanning process, the position information of the transport control platform can be obtained as the transport control position information of the reference grain when the reference grain is scanned, and the grain distribution map can include the transport control position information of each reference grain. Within the range of motion of the transport control platform, two mutually perpendicular grating rulers can be provided. For example, when the movable stage stops at a predetermined initial physical position, the reading of the grating ruler at this time can be set to 0, and the physical position can be determined as the origin O of the world coordinate system. A first grating ruler can be provided along the first direction through the origin O, and the axis where the first grating ruler is located can be used as the X-axis of the world coordinate system. A second grating ruler is provided perpendicular to the X-axis and through the origin O. The axis where the second grating ruler is located can be used as the Y-axis of the world coordinate system. After the above world coordinate system is established, each time the transport control platform and the wafer on the transport control platform move, the corresponding X-axis coordinate and Y-axis coordinate can be read from the first grating ruler and the second grating ruler, and the (X, Y) coordinate can be used to represent the transport control position information of each reference grain in the reference wafer. It can be understood that (X, Y) can be the coordinate data used to represent the displacement of the reference grain.

[0053] In some embodiments, after obtaining the grain distribution map, the orientation of the wafer to be tested can be adjusted according to the position information of the cutting path in the grain distribution map to control the cutting path of the wafer to be tested to be parallel or perpendicular to the preset direction. The orientation of the wafer to be tested can be adjusted by adjusting the orientation of the transport and control platform. Similarly, the adjustment can include translation and / or rotation. The second image acquisition module has the same position as the first image acquisition module, and the physical position of the center of the corresponding scanning area (i.e., the center of the field of view) is the same. In this case, after adjusting the orientation of the transport and control platform, the relative position of the first image acquisition module and the transport and control platform is different from the relative position of the second image acquisition module and the transport and control platform. Taking any point on the surface of the transport and control platform as an example, before adjusting the transport and control platform, its coordinates are marked as (x, y), and the transport and control position information of the reference grain at the corresponding position in the reference wafer is (x, y). After adjusting the transport and control platform, the transport and control coordinates of the point in the transport and control platform are obtained, which are recorded as (X, Y). Correspondingly, the transport and control position information of the grain to be tested at the corresponding position in the wafer to be tested is (X, Y). It can be understood that for each point on the surface of the transport control platform, there is a one-to-one mapping relationship between its coordinates before adjustment and its coordinates after adjustment. When determining the grain area where the currently scanned grain to be tested is located relative to the current wafer to be tested based on the grain distribution map, the reference grain in the grain distribution map corresponding to the currently scanned grain to be tested can be determined based on the mapping relationship between the transport control coordinates of the transport control platform before and after adjustment. Specifically, still taking the transport control coordinates of the transport control platform before and after adjustment as (x, y) and (X, Y) as an example, when the second image acquisition module scans the current grain to be tested and obtains the transport control coordinates of the grain to be tested as (X, Y), the current grain to be tested can be matched with the reference grain with the transport control coordinates (x, y) in the grain distribution map based on the mapping relationship. The grain region where the reference grain with the control coordinates (x, y) is located in the reference wafer can be determined as the grain region where the grain to be tested with the control coordinates (X, Y) is located in the wafer to be tested, and the regional morphology measurement data scanned by the second image acquisition module is determined to be the regional morphology measurement data of the grain in the grain region in the wafer to be tested (i.e., the target grain to be tested). It can be understood that the target grain to be tested in the wafer to be tested corresponds to the reference grain in the reference wafer that has a mapping relationship with the control position information of the target grain to be tested, and the position of the target grain to be tested in the wafer to be tested is consistent with the position of the corresponding reference grain in the reference wafer. The morphology measurement data of the wafer to be tested may include the regional morphology measurement data corresponding to the grains in each grain region (and the region where each grain to be tested is located) in the wafer to be tested.

[0054] Exemplarily, the test area of ​​the wafer to be tested can be determined in the reference image, and the second preset scanning path of the second image acquisition module can be determined according to the test area. The transport control platform can move along a reverse path (same trajectory as the second preset scanning path, but opposite direction) to the second preset scanning path. During the movement of the transport control platform, the current transport control position information (e.g., transport control coordinates) of the transport control platform can be obtained. It can be understood that the transport control position information of some points on the surface of the transport control platform can be used as the transport control position information of the grain to be tested in the wafer to be tested at the corresponding position.

[0055] The above technical scheme can match the operation and control position information of the grain to be tested with the operation and control position information of the reference grain, determine the relative position of the grain to be tested in the wafer to be tested according to the matching result, and match the obtained morphology measurement data with the grain at the corresponding position in the wafer to be tested obtained based on the matching result, thereby achieving accurate matching of the morphology measurement data obtained by the second image acquisition module at different positions of the operation and control platform to the grain at the corresponding position in the wafer to be tested.

[0056] Optionally, the reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; and a scanning area covered by the second preset scanning path is smaller than a scanning area corresponding to the first preset scanning path.

[0057] Exemplarily, when the first image acquisition module is used to scan the reference wafer according to the first preset scanning path, the scanning area can cover all reference grains in the reference wafer, and the obtained reference image can include the entire surface area of ​​the reference wafer or at least cover the surface area where all reference grains are located. The grain distribution map generated based on the reference image can include the grain area where all grains of the reference wafer are located. The area to be measured determined in the grain distribution map can be the grain area where some reference grains in the reference wafer are located. In other words, the area to be measured can be smaller than the scanning area of ​​the reference wafer scanned by the first image acquisition module. In this case, the scanning area covered by the second preset scanning path can be smaller than the scanning area corresponding to the first preset scanning path.

[0058] The above technical solution can effectively save the scanning time of the crystal grains to be tested and improve the measurement efficiency of each wafer to be tested.

[0059] Optionally, the grain distribution map includes position information of reference grains; the position information of reference grains includes: length and width of the reference grains, and includes: coordinates and / or row and column information of the center point of the reference grains, and the row and column information includes the row number and column number.

[0060] Exemplarily, in the grain distribution map, the position information of each reference grain may be recorded, and the position information of the reference grain may include the length and width of the reference grain and the coordinates of the center point of the reference grain (the coordinates are the coordinates in the coordinate system established in the grain distribution map). Alternatively, the position information of the reference grain may include the length and width of the reference grain, and the number of rows and columns to which the reference grain belongs in the grain distribution map. Alternatively, the position information of the reference grain may include the length and width of the reference grain, the coordinates of the center point of the reference grain, and the number of rows and columns to which the reference grain belongs in the grain distribution map.

[0061] The above technical solution can accurately and intuitively indicate the position of the reference grain in the reference wafer by setting the length, width, center point coordinates and / or row and column information of the reference grain in the grain distribution map, which is conducive to accurately positioning the grain to be tested whose corresponding position information is obtained when scanning the wafer to be tested in the wafer to be tested.

[0062] See also Figure 3 As shown, it is a schematic structural block diagram of a wafer measurement device according to an embodiment of the present invention. According to another aspect of the present invention, a wafer measurement device 300 is also provided, including:

[0063] A first acquisition module 310 is used to acquire a reference image obtained by scanning a reference wafer;

[0064] A second acquisition module 320 is used to acquire position information of reference grains in a reference wafer according to the reference image to obtain a grain distribution map;

[0065] The profile measurement module 330 is used to perform profile measurement on the crystal grains to be tested in the wafer to be tested according to the crystal grain distribution map to obtain profile measurement data of the crystal grains to be tested.

[0066] See also Figure 4 As shown, it is a schematic block diagram of an electronic device according to an embodiment of the present invention. According to another aspect of the present invention, an electronic device 400 is also provided, including: a processor 410 and a memory 420, wherein the memory 410 stores computer program instructions, and the computer program instructions are used by the processor 410 to execute the above-mentioned wafer measurement method when it is running.

[0067] According to another aspect of the present invention, a storage medium is also provided, on which program instructions are stored, and when the program instructions are executed by a computer or a processor, the computer or the processor executes the corresponding steps of the above-mentioned wafer measurement method of the embodiment of the present invention, and is used to implement the corresponding module in the above-mentioned wafer measurement device according to the embodiment of the present invention or the corresponding module in the above-mentioned wafer measurement device. The storage medium may include, for example, a memory card of a smart phone, a storage component of a tablet computer, a hard disk of a personal computer, a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a portable compact disk read-only memory (CD-ROM), a USB memory, or any combination of the above storage media. The computer-readable storage medium may be any combination of one or more computer-readable storage media.

[0068] According to yet another aspect of the present invention, a computer program product is provided, comprising computer program instructions, wherein the computer program instructions are used to execute the wafer measurement method as described above when running.

[0069] A person of ordinary skill in the art can understand the specific implementation and beneficial effects of the above-mentioned wafer measurement device by reading the above-mentioned detailed description of the wafer measurement method, and for the sake of brevity, it will not be repeated here.

[0070] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present invention thereto. Various changes and modifications may be made therein by one of ordinary skill in the art without departing from the scope and spirit of the present invention. All such changes and modifications are intended to be included within the scope of the present invention as required by the appended claims.

[0071] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0072] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0073] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0074] Similarly, it should be understood that in order to streamline the present invention and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present invention should not be interpreted as reflecting the following intention: the claimed invention requires more features than the features explicitly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby expressly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present invention.

[0075] It will be understood by those skilled in the art that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0076] In addition, those skilled in the art will appreciate that, although some embodiments herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present invention and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

[0077] The various component embodiments of the present invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. It should be understood by those skilled in the art that a microprocessor or a digital signal processor (DSP) may be used in practice to implement some or all of the functions of some modules in a wafer measurement device according to an embodiment of the present invention. The present invention may also be implemented as a device program (e.g., a computer program and a computer program product) for executing part or all of the methods described herein. Such a program implementing the present invention may be stored on a computer-readable medium, or may be in the form of one or more signals. Such a signal may be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0078] It should be noted that the above embodiments illustrate the present invention rather than limit it, and that those skilled in the art may devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets shall not be construed as a limitation on the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.

[0079] The above is only a specific embodiment or description of a specific embodiment of the present invention, and the protection scope of the present invention is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. The protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A wafer measurement method, characterized in that: include: Acquire a reference image obtained by scanning a reference wafer; Acquire position information of reference grains in the reference wafer according to the reference image to obtain a grain distribution map; The morphology of the crystal grains to be tested in the wafer to be tested is measured according to the crystal grain distribution map to obtain the morphology measurement data of the crystal grains to be tested.

2. The method according to claim 1, characterized in that The reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; Wherein, the first preset scanning path is a zigzag shape or a bow shape.

3. The method according to claim 1 or 2, characterized in that: The step of acquiring position information of reference grains in the reference wafer according to the reference image includes: Performing cutting lane identification on the reference image to obtain position information of each cutting lane in the reference wafer; Determine the position of each lattice divided by the scribe line based on the position information of each scribe line in the reference wafer to obtain the position information of the lattice, at least part of the lattice in the reference wafer includes the reference grain; Based on a preset grain template image and the position of the lattice, template matching is performed in the reference image to obtain the position information of the reference grain.

4. The method according to claim 1 or 2, characterized in that: The grain distribution map includes position information of cutting paths, and the cutting paths are used to segment each of the reference grains in the reference image; After acquiring the position information of the reference grains in the reference wafer according to the reference image to obtain a grain distribution map, the method further includes: Adjusting the orientation of the wafer to be tested according to the position information of the cutting path so that the orientation of the wafer to be tested meets a preset orientation requirement, wherein the adjustment includes rotation and / or translation; The structure of the wafer to be tested is the same as that of the reference wafer, and the preset orientation requirement is satisfied: the cutting path of the wafer to be tested is parallel or perpendicular to the preset direction.

5. The method according to claim 1 or 2, characterized in that: The step of measuring the morphology of the grains to be tested in the wafer to be tested according to the grain distribution map comprises: Determine a region to be tested in the grain distribution map, the region to be tested includes a grain region where a target reference grain is located, and a position of the target reference grain in the reference wafer is consistent with a position of the grain to be tested in the wafer to be tested; Determining a second preset scanning path of a second image acquisition module when scanning the wafer to be tested based on the area to be tested, wherein the scanning area covered by the second preset scanning path includes the area to be tested; The topography measurement data is obtained by scanning the wafer to be measured by the second image acquisition module according to the second preset scanning path.

6. The method according to claim 5, characterized in that The reference image is obtained by scanning the reference wafer using a first image acquisition module when the reference wafer is placed on a transportation control platform and the transportation control platform is moving, and the grain distribution map includes transportation control position information corresponding to the reference grain, and the transportation control position information is the position information of the transportation control platform when the first image acquisition module scans the reference grain; The topography measurement data is obtained by scanning the wafer to be measured using the second image acquisition module when the wafer to be measured is placed on the transport control platform and the transport control platform is moving; The acquiring of the topography measurement data obtained by scanning the wafer to be tested by the second image acquisition module according to the second preset scanning path includes: Acquiring current operation and control position information of the operation and control platform during the movement of the operation and control platform along the reverse path of the second preset scanning path; When the current operation and control position information matches the operation and control position information corresponding to any reference grain, the grain region where the target grain to be tested corresponding to the reference grain is located is determined according to the grain distribution map, and regional morphology measurement data in the grain region where the target grain to be tested is located is obtained, the morphology measurement data including the regional morphology measurement data corresponding to each grain to be tested in the wafer to be tested; The position of the target crystal grain to be tested in the wafer to be tested is consistent with the position of the reference crystal grain in the reference wafer.

7. The method according to claim 5, characterized in that The reference image is obtained by scanning the reference wafer using a first image acquisition module according to a first preset scanning path; The scanning area covered by the second preset scanning path is smaller than the scanning area corresponding to the first preset scanning path.

8. The method according to claim 1, characterized in that: The grain distribution map includes position information of the reference grains; The position information of the reference grain includes: the length and width of the reference grain, and includes: the coordinates and / or row and column information of the center point of the reference grain, and the row and column information includes the row number and the column number.

9. A wafer measuring device, characterized in that: include: A first acquisition module is used to acquire a reference image obtained by scanning a reference wafer; A second acquisition module, configured to acquire position information of reference grains in the reference wafer according to the reference image, so as to obtain a grain distribution map; The shape measurement module is used to perform shape measurement on the grains to be measured in the wafer to be measured according to the grain distribution map to obtain shape measurement data of the grains to be measured.

10. An electronic device comprising a processor and a memory, characterized in that: The memory stores computer program instructions, which are used by the processor to execute the wafer measurement method according to any one of claims 1 to 8 when the processor runs the computer program instructions.

11. A storage medium having program instructions stored thereon, characterized in that: The program instructions are used to execute the wafer measurement method according to any one of claims 1 to 8 when running.

12. A computer program product comprising computer program instructions, characterized in that The computer program instructions are used to execute the wafer measurement method according to any one of claims 1 to 8 when running.

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