Storage device and control method thereof

Abstract

The invention provides a storage device and a control method thereof, the device comprises a plurality of storage units, and physical addresses in the storage units are divided into normal read-write addresses or risk read-write addresses or high-risk read-write addresses according to risk coefficients of the physical addresses of the storage units; the main controller is electrically connected to the host and the storage unit, when the main controller reads out data from the storage unit and the risk coefficient of the read-out data reaches a threshold value, the main controller marks a physical address of the read-out data as a high-risk read-write address, and after part of the data or all the data is read out, the high-risk read-write address is written into the high-risk read-write address. And copying the data of the high-risk read-write address to the normal read-write address. The invention provides a storage device and a control method thereof, which can improve data storage reliability and device storage life.

Description

Technical Field

[0001] The present invention relates to the field of storage technology, and in particular to a storage device and a control method thereof. Background Art

[0002] In the actual use of storage devices, various internal and external conditions will cause the amount of charge stored in the storage unit to change. When the change in charge reaches a certain level, the threshold voltage curve of the storage device will shift, so the reading device will use the default voltage to read the storage device and will not be able to obtain the correct data.

[0003] When a read error occurs, the data can be re-read according to the re-read voltage table provided by the manufacturer until the read voltage that can be tried is reached or the correct data is read. If the data cannot be read correctly after all the re-read voltages that can be tried, the flash memory device determines the current storage block as a bad block, and the data in the bad block cannot be read accurately, which will lead to the risk of data loss. This management method will affect the service life of the storage device and the reliability of data storage. Summary of the invention

[0004] The object of the present invention is to provide a storage device and a control method thereof, which can improve data storage reliability and device storage life.

[0005] To solve the above technical problems, the present invention is achieved through the following technical solutions: The present invention provides a storage device, comprising: A plurality of storage units, wherein the physical addresses in the storage units are divided into normal read / write addresses, risky read / write addresses, or high-risk read / write addresses according to risk coefficients of the physical addresses of the storage units, wherein the risk coefficients include the number of error bits of read data, the number of rereads of the read data, and the number of erases of the storage units; a cache unit, electrically connected to the storage unit, the cache unit being a temporary storage area for read data and write data; and A main controller is electrically connected to the cache unit, the host and the storage unit, and reads data from the cache unit or the storage unit. If the risk factor of the read data reaches a threshold when reading the data, the main controller marks the physical address where the data is read as the high-risk read-write address, and after reading part of the data or all of the data, copies the data at the high-risk read-write address to the normal read-write address.

[0006] In one embodiment of the present invention, the main controller includes an error correction module. When reading data from the storage unit, the error correction module corrects the read data and obtains the number of error bits of the read data, wherein in the risk coefficient, the number of error bits is the number of error bits of a single data read.

[0007] In one embodiment of the present invention, the main controller includes a reread module. When the data read out under the default power supply voltage is erroneous, the reread module traverses the reread threshold voltage data until the read data is correct, wherein the number of rereads is the number of the reread threshold voltages called when reading a single piece of data.

[0008] In an embodiment of the present invention, the storage device includes a classification module, wherein the classification module is configured to: After reading out a single piece of data, if any item in the risk coefficient exceeds a first threshold value of the corresponding item, the physical address of the read data is replaced and marked as a risky physical address; and After reading a single piece of data, if any item in the risk coefficient exceeds the second threshold of the corresponding item, the physical address of the read data is remarked as a high-risk physical address, wherein the second threshold under the same item is greater than the first threshold.

[0009] In one embodiment of the present invention, a task queue is set in the storage device, and the task queue includes a host read task, a backup write task and a regular storage task, wherein the process of reading data from the storage unit includes at least one host read task, and in the process of reading all data, the priority of the regular storage task is lower than the priority of the backup write task, and the priority of the backup write task is lower than the priority of all the host read tasks.

[0010] In one embodiment of the present invention, in the process of reading data, the main controller is configured to: clear the read data before the read data is stored to the capacity threshold of the cache chip.

[0011] In one embodiment of the present invention, a task queue is set in the storage device, and the task queue includes a host read task, a backup write task and a regular storage task, wherein the process of reading data from the storage unit includes at least one host read task, and in the process of reading all the data, the priority of the regular storage task is lower than the priority of the backup write task and the priority of the host read task, and the host read task and the backup write task are alternated at intervals, and in the process of reading a single data, the priority of the regular storage task is lower than the priority of the backup write task and the host read task, and the priority of the backup write task is lower than the priority of the host read task.

[0012] In one embodiment of the present invention, in the process of reading data, the main controller is configured to: after a single host read task is completed, transfer the data in the cache chip to a designated storage unit, wherein the designated storage unit is the storage unit with the least number of erase times.

[0013] In one embodiment of the present invention, the storage device includes a flash memory chip, the flash memory chip includes multiple storage planes, wherein the storage unit is a storage block or a super block of the flash memory chip, wherein the super block includes multiple storage blocks with the same number and originating from different storage planes.

[0014] The present invention provides a control method for a storage device. Based on the storage device as described above, the control method comprises the following steps: When reading data from the storage device, obtaining a risk factor of a physical address of a storage unit, wherein the risk factor includes the number of error bits of the read data, the number of rereads of the read data, and the number of erases of the storage unit; According to the risk coefficient of the physical address of the storage unit, the physical address in the storage unit is divided into a normal read / write address, a risky read / write address, or a high-risk read / write address; and If the risk factor of the read data reaches a threshold when reading data, the physical address where the data is read is marked as the high-risk read / write address, and after reading part or all of the data, the data at the high-risk read / write address is copied to the normal read / write address.

[0015] As described above, the present invention provides a storage device and a control method thereof, which can ensure that data is not lost due to the near-life of the device, thereby improving the data storage reliability of the storage device, and can also prevent the storage blocks near the end of their life from being directly marked as bad blocks, thereby improving the service life of the storage device. The storage device and the control method thereof provided by the present invention can accurately determine what kind of storage unit is a storage block near the end of its life, thereby improving the rationality and management efficiency of the storage device's data management.

[0016] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0018] Figure 1FIG. 4 is a schematic diagram of the structure of a storage device in an embodiment of the present invention.

[0019] Figure 2 Schematic diagram of the internal structure of a storage plane in one embodiment of the present invention.

[0020] Figure 3 FIG. 1 is a schematic diagram of the functional structure of a storage firmware and a flash memory chip in one embodiment of the present invention.

[0021] Figure 4 FIG. 4 is a schematic diagram of address distribution in a storage unit according to an embodiment of the present invention.

[0022] Figure 5 The figure is a flow chart of a method for controlling a storage device according to an embodiment of the present invention.

[0023] In the figure: 10, host; 20, storage device; 30, main controller; 301, microprocessor; 302, host interface controller; 303, cache controller; 304, flash memory controller; 305, error correction module; S, flash memory chip; 40, storage plane; 410, storage block; 420, storage page; 430, super block; 50, memory; 50, control firmware; 60, control firmware; 610, read-write module; 620, reread module; 630, parameter acquisition module; 640, classification module; 650, backup module; 70, cache chip; B, storage unit; ADD1, normal physical address; ADD2, risky physical address; ADD3, high-risk physical address. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] The storage device 20 provided by the present invention is a flash memory or a storage device 20 including a flash memory, such as an embedded storage device 20 (embedded Multi Media Card, eMMC), a universal flash storage (Universal Flash Storage, UFS) and a solid state drive (Solid State Disk or Solid State Drive, SSD) and the like. Figure 1 and Figure 4As shown, the storage device 20 includes multiple main controllers 30, cache units and storage units B. The main controller 30 is electrically connected to the host 10, and the host 10 is a host computer. The cache unit is electrically connected to the main controller 30, and the cache unit is, for example, a random access memory. The storage unit B is electrically connected to the cache unit, and the storage unit B is a storage unit in the storage device 20.

[0026] See also Figures 1 to 4 As shown, in one embodiment of the present invention, the storage device 20 includes a flash memory chip S, and the flash memory chip S includes multiple storage planes 40. In this embodiment, the multiple storage planes 40 have unique numbers. The storage plane 40 includes multiple storage blocks 410, and the storage block 410 is a physical block (block) of the flash memory chip S. Each storage block 410 has a device number. The storage block 410 includes multiple storage pages 420, and the storage page 420 can be a physical page (page) of the flash memory chip S. In this embodiment, the storage unit B is a storage block 410 or a super block 430 of the flash memory chip S. The super block 430 includes multiple storage blocks 410 with the same number and originating from different storage planes 40. As shown Figure 2 As shown, the storage blocks 410 numbered 1 in the two storage planes 40 together form a super block 430 numbered 1. The super block 430 can be numbered according to the numbers of the storage blocks 410 in the super block 430.

[0027] See also Figure 1 and Figure 4 As shown, in one embodiment of the present invention, the physical address in the storage unit B is divided into a normal read / write address, a risky read / write address, or a high-risk read / write address according to the risk factor of the physical address of the storage unit B, wherein the risk factor includes the number of error bits of the read data, the number of rereads of the read data, and the number of erases of the storage unit B. The physical address of one of the storage pages 420 may correspond to a physical address of the storage unit B. Figure 4 As shown, the storage unit B includes multiple physical addresses. When the physical address of the storage page 420 meets the classification condition, the physical address of the storage page 420 can be marked as a normal physical address ADD1 or a risky read / write address or a high-risk read / write address. As the storage device 20 is used for a longer period of time, the marking of the physical address can be changed and replaced. When the storage device 20 leaves the factory, all physical addresses can be defaulted to the normal physical address ADD1.

[0028] See also Figure 1As shown, in one embodiment of the present invention, the main controller 30 includes a microprocessor 301, a host 10 interface controller, a cache controller 303, a flash memory controller 304, and an error correction module 305. The microprocessor 301 is a reduced instruction system computer (RISC), and is specifically an ARM processor. The microprocessor 301 is electrically connected to the host 10 interface controller, the cache controller 303, and the flash memory controller 304. The host 10 interface controller is electrically connected to the host 10 through an interface to receive instructions and data from the host 10, and to feed back data from the main controller 30. The connection interface between the host 10 and the main controller 30 can be a SATA hard disk, a high-speed serial computer expansion bus interface (Peripheral Component Interconnect express, PCIe), and a SAS interface. In this embodiment, the flash memory controller 304 is electrically connected to the error correction module 305 to correct the data read out of the flash memory chip S during the read process of the flash memory chip S. The error correction module 305 can complete error checking and correction of the data read from the flash memory chip S through a low density parity check code (LDPC), and obtain the number of error bits in the read data.

[0029] See also Figure 1 and Figure 3 As shown, in one embodiment of the present invention, the storage device 20 includes a memory 50, and the memory 50 stores a control firmware 60. The microprocessor 301 can call the control firmware 60 and implement the control method of the storage device 20 provided by the present invention. The control firmware 60 includes a read-write module 610 and a reread module 620. When the main controller 30 receives a read instruction or a write instruction from the host 10, the read-write module 610 supplies power to the MOS tube corresponding to the physical address according to the received instruction, thereby reading out the data. When the read data is wrong, the reread module 620 is enabled. The reread module 620 provides reread threshold voltage data and adjusts the power supply voltage of the MOS tube according to the reread threshold voltage data. When the reread still reads out the wrong data, the reread threshold voltage data can be replaced until the read data is correct or all the reread threshold voltage data that can be replaced are traversed. For example, the number of rereads is the number of reread threshold voltages called when reading a single piece of data.

[0030] See also Figure 1 and Figure 3As shown, in one embodiment of the present invention, the storage firmware includes a parameter acquisition module 630 and a classification module 640. The parameter acquisition module 630 is electrically connected to the error correction module 305, and receives the number of error bits when reading data. When the storage unit B is erased, the parameter acquisition module 630 counts the number of erases of the storage unit B, and the count number increases by one each time it is erased. The parameter acquisition module 630 is electrically connected to the reread module 620, and counts the number of rereads. The statistics of the number of erases of the storage unit B can be calculated based on the number of erase instructions issued by the host 10 and the microprocessor 301. The number of rereads can be calculated based on the number of calls to the reread threshold data by the reread module 620. The calculation of the parameter acquisition module 630 can be recorded or calculated based on the feedback information of the main controller 30. The classification module 640 and the parameter collection module 630 are electrically connected to the classification module 640 , and the classification module 640 can classify and mark the physical address of the data currently to be read out according to the risk coefficient collected by the parameter collection module 630 when reading out the current data.

[0031] See also Figures 1 to 4 As shown, in one embodiment of the present invention, multiple types of first thresholds and multiple types of second thresholds are set in the classification module 640, wherein under the same project type, the second threshold is greater than the first threshold. The types of the first threshold and the second threshold are set according to the project type of the risk factor. The items of the risk factor include the number of error bits of the read data, the number of rereads of the read data, and the number of erases of the storage unit B. When the number of error bits of the read data is less than the first threshold of the number of error bits, and when the number of rereads of the read data is less than the first threshold of the number of rereads of the read data, and when the number of erases of the storage unit B is less than the first threshold of the number of erases, the physical address of the read data is maintained as the normal physical address ADD1. When the data of any one of the number of error bits of the read data, the number of rereads of the read data, and the number of erases of the storage unit B is greater than or equal to the first threshold under the corresponding project, the physical address of the read data is changed and marked as the risky physical address ADD2. When any of the number of error bits in the read data, the number of rereads of the read data, and the number of erases of the storage unit B is greater than or equal to the second threshold under the corresponding item, the physical address of the read data is changed and marked as a high-risk physical address ADD3.

[0032] See also Figures 1 to 4As shown, in one embodiment of the present invention, it should be noted that the physical address of the current data is marked as a high-risk physical address ADD3. In the subsequent use of the storage device 20, if the performance of the read data is good, when the risk coefficient of the physical address is reduced, the high-risk physical address ADD3 can be adjusted to the risky physical address ADD2 or the normal physical address ADD1 according to the interval where the risk coefficient is located, and the risky physical address ADD2 can be adjusted to the normal physical address ADD1. Specifically, the risk coefficients of all items of the normal physical address ADD1 are less than the first threshold. The risk coefficients of all items of the risky physical address ADD2 are less than the second threshold, and the risk coefficient of at least one item is greater than or equal to the first threshold. The risk coefficient of at least one item of the high-risk physical address ADD3 is greater than or equal to the second threshold.

[0033] See also Figures 1 to 4 As shown, in one embodiment of the present invention, a bad block table is stored in part of the storage cell B. When the reread threshold voltage data of the storage cell B is traversed and the read data of the storage cell B is erroneous, the storage cell B is marked as a bad block and the address of the bad block is stored in the bad block table.

[0034] See also Figures 1 to 4 As shown, in one embodiment of the present invention, the storage firmware includes a backup module 650. A task queue is set in the storage device 20. When a physical address is marked as a high-risk physical address ADD3, the backup module 650 generates a backup write task and adds the backup write task to the task queue of the storage device 20. After reading a single data or reading all the data, the backup write task is executed. In the execution process of the backup write task, the data at the high-risk read and write address is copied to the normal read and write address to complete the transfer of the high-risk data. When reading a large amount of data, the storage device 20 splits the process of reading a large amount of data into multiple host read tasks according to its own processing capacity. Reading a single data refers to the process of reading data under a single host read task. Reading all data refers to reading all the data required by the host 10. In this embodiment, the process of reading data from storage unit B includes at least one host read task.

[0035] See also Figure 1 and Figure 2 As shown, it should be noted that when the cache chip 70 is enabled, in the process of reading data, the data is read from the flash memory chip S to the cache chip 70, and then read from the cache chip 70 to the host 10. At this time, in the control method provided by the present invention, after reading a single data, the backup write task of the single data currently read can be executed. When the cache chip 70 is not enabled, in the process of reading data, the host 10 directly reads data from the flash memory chip S. At this time, in the control method provided by the present invention, after reading all the data, the backup write task of the single data currently read can be executed.

[0036] See also Figures 1 to 4 As shown, in the present invention, the task queue includes a host read task, a backup write task and a regular storage task. Regular storage tasks can be garbage collection tasks, regular backup tasks and storage optimization tasks designed by designers, etc. The present invention does not limit the content of regular storage tasks. In one embodiment of the present invention, in the process of reading out all data, the priority of the regular storage task is lower than the priority of the backup write task, and the priority of the backup write task is lower than the priority of all host read tasks. That is, after all data is read, the backup write task is executed. In the process of reading out data, before the read data is stored in the capacity threshold of the cache chip 70, the main controller 30 clears the read data. Wherein, when the cache chip 70 is enabled, when the read data reaches the capacity threshold of the cache chip 70, the cache chip 70 is cleared first, and the next host read task is continued, so that the data required by the host 10 is read out as soon as possible.

[0037] See also Figures 1 to 4 As shown, in another embodiment of the present invention, in the process of reading out all data, the priority of the conventional storage task is lower than the priority of the backup write task and the priority of the host read task, and the host read task and the backup write task are alternated at intervals. In the process of reading out a single data, the priority of the conventional storage task is lower than the priority of the backup write task and the host read task, and the priority of the backup write task is lower than the priority of the host read task. In the process of reading out data, after a single host read task is completed, the data in the cache chip 70 is transferred to the designated storage unit B, wherein the designated storage unit B is the storage unit B with the least number of erases. Specifically, after a single data read is completed, the backup write task is directly enabled, and the data currently read out in the cache chip 70 is flushed to the storage chip, and the data is flushed to the designated storage unit B. Then the next host read task is executed.

[0038] See also Figure 1 and Figure 3 As shown, in one embodiment of the present invention, the main controller 30 includes an error correction module 305. When reading data from the storage unit B, the error correction module 305 corrects the read data and obtains the number of error bits of the read data, wherein in the risk coefficient, the number of error bits is the number of error bits of a single data read. It should be noted that the present invention uses the physical address as a unit to identify the address type and back up the data of the high-risk physical address ADD3. Whether the amount of data to be read by the host 10 is large or small, it will not affect the determination of the reliability of data storage by the present invention.

[0039] See also Figures 1 to 5 As shown, the present invention further provides a method for controlling a storage device 20, wherein the method includes steps S10 to S30.

[0040] Step S10, when reading data from the storage device 20, obtain the risk coefficient of the physical address of the storage unit B, where the risk coefficient includes the number of error bits of the read data, the number of rereads of the read data and the number of erases of the storage unit B.

[0041] Step S20: According to the risk coefficient of the physical address of the storage unit B, the physical address in the storage unit B is divided into a normal read / write address, a risky read / write address, or a high-risk read / write address.

[0042] Step S30: If the risk factor of the read data reaches a threshold when reading data, the physical address where the data is read is marked as a high-risk read / write address, and after reading part or all of the data, the data at the high-risk read / write address is copied to the normal read / write address.

[0043] The present invention provides a storage device and a control method thereof, wherein the storage device comprises a main controller, a cache unit and a storage unit. According to the risk coefficient of the physical address of the storage unit, the physical address in the storage unit is divided into a normal read-write address, a risky read-write address or a high-risk read-write address. The risk coefficient comprises the number of error bits of the read data, the number of rereads of the read data and the number of erases of the storage unit. The cache unit is electrically connected to the storage unit, and the cache unit is a temporary storage area for read data and write data. The main controller is electrically connected to the cache unit, a host and a storage unit. Data is read from the cache unit or the storage unit, wherein if the risk coefficient of the read data reaches a threshold when reading the data, the main controller marks the physical address where the data is read as a high-risk read-write address, and after reading part or all of the data, copies the data of the high-risk read-write address to the normal read-write address. The present invention can ensure that data is not lost due to the near life of the device, thereby improving the data storage reliability of the storage device, and can also avoid the storage block of the near life being directly marked as a bad block, thereby improving the service life of the storage device. The storage device and control method thereof provided by the present invention can accurately determine what kind of storage unit is a storage block with a near-end life span, thereby improving the rationality and efficiency of data management of the storage device.

[0044] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A storage device, characterized in that: include: A plurality of storage units, wherein the physical addresses in the storage units are divided into normal read / write addresses, risky read / write addresses, or high-risk read / write addresses according to risk coefficients of the physical addresses of the storage units; and A main controller is electrically connected to a host and the storage unit. When the main controller reads data from the storage unit, when the risk factor of the read data reaches a threshold value, the main controller marks the physical address where the data is read as the high-risk read-write address, and after reading part or all of the data, copies the data at the high-risk read-write address to the normal read-write address.

2. A storage device according to claim 1, characterized in that: The risk factor includes the number of error bits in the read data, the number of rereads of the read data and the number of erases of the storage unit, wherein the number of error bits is the number of error bits in reading a single data record, and the number of rereads is the number of times the main controller re-reads the data when an error occurs in the read data.

3. A storage device according to claim 1, characterized in that: The storage device comprises a classification module, wherein the classification module is configured to: After reading out a single piece of data, if any item in the risk coefficient exceeds the first threshold of the corresponding item, the physical address of the read data is replaced and marked as a risky physical address; as well as After reading a single piece of data, if any item in the risk coefficient exceeds the second threshold of the corresponding item, the physical address of the read data is remarked as a high-risk physical address, wherein the second threshold under the same item is greater than the first threshold.

4. A storage device according to claim 1, characterized in that: A task queue is set in the storage device, and the task queue includes a host read task, a backup write task and a regular storage task, wherein the process of reading data from the storage unit includes at least one host read task, and in the process of reading all data, the priority of the regular storage task is lower than the priority of the backup write task, and the priority of the backup write task is lower than the priority of all the host read tasks.

5. A storage device according to claim 4, characterized in that: The storage device includes a cache unit, which is electrically connected to the main controller and the storage unit. When the cache unit is enabled, data read from the storage unit is temporarily stored in the cache unit until the data temporarily stored in the cache unit reaches a preset refresh condition.

6. A storage device according to claim 5, characterized in that: In the process of reading data, the main controller is configured to transfer the data of the cache unit to a designated storage unit when the read data reaches a capacity threshold of the cache unit, and the designated storage unit is the storage unit with the least number of erase times.

7. A storage device according to claim 5, characterized in that: A task queue is set in the storage device, and the task queue includes a host read task, a backup write task and a regular storage task, wherein the process of reading data from the storage unit includes at least one host read task, and in the process of reading all the data, the priority of the regular storage task is lower than the priority of the backup write task and the priority of the host read task, and the host read task and the backup write task are alternated at intervals, and in the process of reading a single data, the priority of the regular storage task is lower than the priority of the backup write task and the host read task, and the priority of the backup write task is lower than the priority of the host read task.

8. A storage device according to claim 7, characterized in that: In the process of reading data, the main controller is configured to transfer the data in the cache unit to a designated storage unit after a single host read task is completed, wherein the designated storage unit is the storage unit with the least number of erase times.

9. The storage device according to claim 1, characterized in that: The storage device includes a flash memory chip, which includes multiple storage planes, wherein the storage unit is a storage block or a super block of the flash memory chip, wherein the super block includes multiple storage blocks with the same number and originating from different storage planes.

10. A method for controlling a storage device, based on the storage device according to claim 1, characterized in that: The control method comprises the following steps: When reading data from the storage device, obtaining a risk factor of a physical address of a storage unit, wherein the risk factor includes the number of error bits of the read data, the number of rereads of the read data, and the number of erases of the storage unit; According to the risk coefficient of the physical address of the storage unit, the physical address in the storage unit is divided into a normal read / write address, a risky read / write address, or a high-risk read / write address; and If the risk factor of the read data reaches a threshold when reading data, the physical address where the data is read is marked as the high-risk read / write address, and after reading part or all of the data, the data at the high-risk read / write address is copied to the normal read / write address.

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