A circuit schematic design method, device, equipment and medium

Abstract

The present application discloses a circuit schematic design method, device, equipment and medium, which relates to the field of circuit design technology and is used to solve the problems of low design efficiency and low design success rate in existing circuit schematic design schemes. The method comprises: designing a basic circuit schematic according to at least one component and at least one CBB circuit; wherein the basic circuit schematic does not include a power module and a clock module; for any power pin in the basic circuit schematic, determining whether the attribute value of any power pin meets the power design requirements; if it is determined that the attribute value of any power pin meets the power design requirements, allowing any power pin to continue to use its own historical power attribute value; merging power pins with the same power attribute value; and designing a power module according to the automatically recommended power devices to improve the design efficiency and design success rate.

Description

Technical Field

[0001] The present application relates to the technical field of circuit design, and provides a circuit schematic design method, device, equipment and medium. Background Art

[0002] Currently, circuit schematics are mostly drawn using dedicated Electronic Design Automation (EDA) tools, such as Cadence, Altium Designer, Mentor and other tools, and these tools basically use the process of "reading device data manual → drawing device schematic package → detailed design for device pins → detailed design of the entire board" to draw circuit schematics. Therefore, the existing circuit schematic drawing has the following disadvantages: (1) In order to fully understand the design of components, a lot of time must be spent reading data manuals, which requires relatively high professional and technical levels of designers; (2) Most of them use visual methods to check whether the connection relationship between devices is correct; (3) The connection relationship between devices is mostly represented by lines + network names, but when the number of components on a board increases, the circuit schematic has to use paging to control the number of components on each page, which is bound to bring inconvenience to the inspection and connection of the power supply and clock of the entire board; (4) The reuse of power supply circuits is inconvenient. Designers need to spend time to search for power supply circuit design solutions that meet the current requirements, and they also need to judge the correctness of the reused circuits. Summary of the invention

[0003] The present application provides a circuit schematic design method, device, equipment and medium, which are used to solve the problems of low design efficiency and low design success rate in existing circuit schematic design solutions.

[0004] In one aspect, a circuit schematic design method is provided, the method comprising:

[0005] Design a basic circuit schematic diagram according to at least one component and at least one CBB circuit; wherein the basic circuit schematic diagram does not include a power module and a clock module;

[0006] For any power pin in the basic circuit schematic, determine whether the attribute value of any power pin meets the power design requirements;

[0007] If it is determined that the attribute value of any power pin meets the power design requirement, then the any power pin is allowed to continue to use its own historical power attribute value;

[0008] Merge power pins with the same power attribute value;

[0009] A power module is designed according to the automatically recommended power device, wherein the power device meets the power design requirements.

[0010] Optionally, after designing a power module according to the automatically recommended power device, the method further includes:

[0011] The power-related pins of each device of the power module are automatically listed in the pin relationship table; wherein, in the pin relationship table, the pins connected in pairs are marked with the same color and network name.

[0012] Optionally, after designing a basic circuit schematic diagram according to at least one component and at least one CBB circuit, the method further includes:

[0013] For any clock pin in the basic circuit schematic, determine whether the attribute value of any clock pin meets the clock design requirements;

[0014] If it is determined that the attribute value of any clock pin meets the clock design requirement, then the any clock pin is allowed to continue to use its own historical clock attribute value;

[0015] Automatically analyze the input clock and output clock of the entire circuit board;

[0016] A clock module is designed according to the input clock and the output clock.

[0017] Optionally, the step of performing clock module design according to the input clock and the output clock includes:

[0018] Obtaining clock matching performed by a user according to the input clock and the output clock;

[0019] Automatically checking whether the clock attribute value of any clock pin in the clock matching meets the clock design requirements;

[0020] If the clock attribute value of any clock pin does not meet the clock design requirement, the user is prompted to re-match the clock.

[0021] Optionally, before designing a basic circuit schematic diagram according to at least one component and at least one CBB circuit, the method further includes:

[0022] Design and map the pins of multiple components in the software library;

[0023] Merging related pins of the same power supply in the plurality of components together;

[0024] Pin attributes are set for the multiple components and the multiple CBB circuits.

[0025] Optionally, the step of setting pin attributes for the multiple components and the multiple CBB circuits includes:

[0026] The clock pin attributes of the clock pins of the multiple components and the clock pins of the multiple CBB circuits are set respectively; wherein the clock pin attributes include frequency range, direction, level standard and common mode voltage requirement.

[0027] Optionally, the step of setting pin attributes for the multiple components and the multiple CBB circuits includes:

[0028] The power pin attributes of the power pins of the multiple components and the power pins of the multiple CBB circuits are set respectively; wherein the power pin attributes include input / output, voltage, current, ripple, noise, overshoot, whether independent power supply, timing and power supply chip type.

[0029] In one aspect, a circuit schematic design device is provided, the device comprising:

[0030] A first design unit is used to design a basic circuit schematic diagram according to at least one component and at least one CBB circuit; wherein the basic circuit schematic diagram does not include a power module and a clock module;

[0031] A design requirement determination unit, configured to determine, for any power supply pin in the basic circuit schematic, whether a property value of the any power supply pin meets a power supply design requirement;

[0032] an attribute value determining unit, configured to, if it is determined that the attribute value of any power pin meets the power design requirement, allow any power pin to continue to use its own historical power attribute value;

[0033] A pin merging unit, used for merging power pins with the same power attribute value;

[0034] The second design unit is used to design a power module according to the automatically recommended power device; wherein the power device meets the power design requirements.

[0035] On the one hand, an electronic device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein any one of the above methods is implemented when the processor executes the computer program.

[0036] In one aspect, a storage medium is provided, on which computer program instructions are stored, and when the computer program instructions are executed by a processor, any of the above methods is implemented.

[0037] Compared with the prior art, the beneficial effects of this application are:

[0038] In the present application, when performing circuit schematic design, first, a basic circuit schematic design can be performed based on at least one component and at least one CBB circuit; wherein the basic circuit schematic does not include a power module and a clock module; then, for any power pin in the basic circuit schematic, it can be determined whether the attribute value of any power pin meets the power design requirements; next, if it is determined that the attribute value of any power pin meets the power design requirements, any power pin can continue to use its own historical power attribute value; then, the power pins with the same power attribute value are merged; finally, a power module design can be performed based on the automatically recommended power device; wherein the power device meets the power design requirements.

[0039] Therefore, in the present application, since during the power supply design process, the power supply module design can be carried out according to the existing power supply devices automatically recommended by the software, compared with the prior art, the present application can not only greatly reduce the time for users to search, query, and master the hardware circuits by recommending devices to speed up the design efficiency, but also improve the design success rate by recommending "highly suitable" devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0041] Figure 1 An electronic device provided in an embodiment of the present application;

[0042] Figure 2 A schematic diagram of a circuit schematic design method provided in an embodiment of the present application;

[0043] Figure 3 A schematic diagram of pin attribute settings provided in an embodiment of the present application;

[0044] Figure 4 A schematic diagram of a power module design solution provided in an embodiment of the present application;

[0045] Figure 5 A schematic diagram of a clock module design solution provided in an embodiment of the present application;

[0046] Figure 6 A schematic diagram of a circuit schematic design device provided in an embodiment of the present application.

[0047] Markings in the figure: 10-circuit schematic design equipment, 101-processor, 102-memory, 103-I / O interface, 104-database, 60-circuit schematic design device, 601-first design unit, 602-design requirement determination unit, 603-attribute value determination unit, 604-pin merging unit, 605-second design unit, 606-connection relationship listing unit, 607-circuit design preparation unit. DETAILED DESCRIPTION

[0048] In order to make the purpose, technical scheme and advantages of the present application clearer, the technical scheme in the embodiment of the present application will be clearly and completely described below in conjunction with the drawings in the embodiment of the present application. Obviously, the described embodiment is only a part of the embodiment of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application. In the absence of conflict, the embodiments in the present application and the features in the embodiments can be combined with each other arbitrarily. In addition, although the logical order is shown in the flow chart, in some cases, the steps shown or described can be performed in an order different from that here.

[0049] Currently, circuit schematics are mostly drawn using dedicated Electronic Design Automation (EDA) tools, such as Cadence, Altium Designer, Mentor and other tools, and these tools basically use the process of "reading device data manual → drawing device schematic package → detailed design for device pins → detailed design of the entire board" to draw circuit schematics. Therefore, the existing circuit schematic drawing has the following disadvantages: (1) In order to fully understand the design of components, a lot of time must be spent reading data manuals, which requires relatively high professional and technical levels of designers; (2) Most of them use visual methods to check whether the connection relationship between devices is correct; (3) The connection relationship between devices is mostly represented by lines + network names, but when the number of components on a board increases, the circuit schematic has to use paging to control the number of components on each page, which is bound to bring inconvenience to the inspection and connection of the power supply and clock of the entire board; (4) The reuse of power supply circuits is inconvenient. Designers need to spend time to search for power supply circuit design solutions that meet the current requirements, and they also need to judge the correctness of the reused circuits.

[0050] Based on this, the embodiment of the present application provides a circuit schematic design method, in which a basic circuit schematic design can be performed based on at least one component and at least one CBB circuit; wherein the basic circuit schematic does not include a power module and a clock module; then, for any power pin in the basic circuit schematic, it can be determined whether the attribute value of any power pin meets the power design requirements; next, if it is determined that the attribute value of any power pin meets the power design requirements, any power pin can continue to use its own historical power attribute value; then, the power pins with the same power attribute value are merged; finally, the power module design can be performed based on the automatically recommended power device; wherein the power device meets the power design requirements. Therefore, in the present application, since the power module design can be performed based on the existing power device automatically recommended by the software during the power design process, compared with the prior art, the present application can not only greatly reduce the time for users to search, query, and master the hardware circuit by recommending devices to speed up the design efficiency, but also improve the design success rate by recommending devices with higher suitability.

[0051] After introducing the design ideas of the embodiments of the present application, the following briefly introduces the application scenarios to which the technical solutions of the embodiments of the present application can be applied. It should be noted that the application scenarios introduced below are only used to illustrate the embodiments of the present application and are not limited. In the specific implementation process, the technical solutions provided by the embodiments of the present application can be flexibly applied according to actual needs.

[0052] like Figure 1 As shown, an electronic device provided in an embodiment of the present application is provided, and the electronic device may specifically be a circuit schematic design device 10.

[0053] The circuit schematic design device 10 can be used for circuit schematic design, for example, a personal computer (PC), a server, a laptop, etc. The circuit schematic design device 10 may include one or more processors 101, a memory 102, an I / O interface 103, and a database 104. Specifically, the processor 101 may be a central processing unit (CPU), or a digital processing unit, etc. The memory 102 may be a volatile memory, such as a random-access memory (RAM); the memory 102 may also be a non-volatile memory, such as a read-only memory, a flash memory, a hard disk drive (HDD), or a solid-state drive (SSD); or the memory 102 may be any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 102 may be a combination of the above memories. The memory 102 may store some program instructions of the circuit schematic design method provided in the embodiment of the present application, and these program instructions can be used to implement the steps of the circuit schematic design method provided in the embodiment of the present application when executed by the processor 101, so as to solve the problems of low design efficiency and low design success rate in the existing circuit schematic design scheme. The database 104 may be used to store data such as components, CBB circuits, basic circuit schematics, power attribute values, clock attribute values, and pin relationship tables involved in the scheme provided in the embodiment of the present application.

[0054] In the embodiment of the present application, the circuit schematic design device 10 can obtain the design requirements through the I / O interface 103, and then the processor 101 of the circuit schematic design device 10 will improve the design efficiency and the design success rate according to the program instructions of the circuit schematic design method provided in the embodiment of the present application in the memory 102. In addition, data such as components, CBB circuits, basic circuit schematics, power attribute values, clock attribute values, and pin relationship tables can also be stored in the database 104.

[0055] Of course, the method provided in the embodiment of the present application is not limited to Figure 1 The application scenarios shown can also be used in other possible application scenarios, and the embodiments of the present application are not limited thereto. Figure 1 The functions that can be realized by each device in the application scenario shown will be described in the subsequent method embodiments, and will not be described in detail here. Below, the method of the embodiment of the present application will be introduced in conjunction with the accompanying drawings.

[0056] like Figure 2 FIG. 1 is a schematic diagram of a circuit schematic design method provided in an embodiment of the present application. The method can be performed by Figure 1 The circuit schematic design device 10 is used to perform the method. Specifically, the process of the method is described as follows.

[0057] Step 201: Design a basic circuit schematic diagram based on at least one component and at least one CBB circuit.

[0058] In the embodiment of the present application, the basic circuit schematic diagram does not include a power module and a clock module.

[0059] In order to improve the efficiency of circuit schematic design, in an embodiment of the present application, before performing basic circuit schematic design, preparatory work such as "pin mapping grouping" and "pin property setting" may also be performed.

[0060] Specifically, first, after adding each component to the software library, the pins of multiple components in the software library can be designed and mapped in groups; then, the related pins of the same power supply in multiple components can be merged together; finally, the pin properties of multiple components and multiple CBB circuits can be set, such as Figure 3 , which is a schematic diagram of pin attribute settings provided in an embodiment of the present application. In the present application, for the CBB circuit (referring to a reusable modular hardware circuit), since it has been designed and packaged into a modular circuit, it is not necessary to design and group the power-related pins of the CBB circuit.

[0061] Furthermore, in order to lower the technical threshold of design, when setting the pin attributes of multiple components and multiple CBB circuits, the clock pin attributes of the clock pins of the multiple components and the clock pins of the multiple CBB circuits can be set respectively; wherein the clock pin attributes include attributes such as frequency range, direction, level standard and common mode voltage requirements.

[0062] Of course, when setting pin attributes for multiple components and multiple CBB circuits, the power pin attributes of the multiple components and the power pins of the multiple CBB circuits can also be set separately; wherein the power pin attributes include input / output, voltage, current, ripple, noise, overshoot, whether independent power supply, timing and power supply chip type and other attributes.

[0063] In addition, in the step of setting pin properties, since the data related to the component pins are filled in by professional technicians, when designers use components, they only need to determine the model of the component, and the software will automatically extract the relevant data. As a result, for the users of the components, there is no need to read, understand, and master the contents of the data sheet to design the circuit schematic, thereby greatly reducing the design technology threshold.

[0064] Further, after the preparation work is completed, the subsequent circuit schematic design step can be performed, that is, components and / or CBB circuits can be placed on the circuit board. Specifically, a basic circuit schematic design can be performed based on at least one component and at least one CBB circuit, that is, at least one component and at least one CBB circuit are placed on the circuit board to obtain a basic circuit schematic.

[0065] Step 202: for any power pin in the basic circuit schematic, determine whether the attribute value of any power pin meets the power design requirements.

[0066] Step 203: If it is determined that the attribute value of any power pin meets the power design requirement, any power pin is allowed to continue to use its own historical power attribute value.

[0067] In an embodiment of the present application, if it is determined that the property value of any power pin does not meet the power design requirements, the property value of any power pin can be reset according to specific usage requirements to make it meet the specific usage requirements, for example, changing the voltage value, etc.

[0068] Step 204: performing a merging operation on power pins having the same power attribute value.

[0069] After the attribute values ​​of each power pin meet the specific use requirements, the subsequent power module design can be carried out. In order to improve the design efficiency, in the embodiment of the present application, the user can merge the power pins with the same attribute values ​​in the basic circuit schematic.

[0070] Step 205: Design a power module according to the automatically recommended power components, wherein the power components meet the power design requirements.

[0071] In the embodiment of the present application, after the merging work is completed, the software can automatically recommend power devices that meet the power design requirements according to the attribute values ​​of each power pin. Based on this, the power module design can be performed according to the automatically recommended power devices, and a network name can be proposed for the designed power module, such as Figure 4 , which is a schematic diagram of a power module design solution provided in an embodiment of the present application.

[0072] In addition, in order to facilitate the inspection and connection of the power supply of the entire board, in an embodiment of the present application, after the power module is designed according to the automatically recommended power supply devices, the power-related pins of each device of the power module can be automatically listed in the pin relationship table; wherein, in the pin relationship table, the pins connected together in pairs will be marked with the same color and network name.

[0073] Therefore, since the present application can summarize the power supply-related networks of the entire board in the form of "table + network name", compared with the prior art, the present application can clearly indicate the connection relationship between the power supplies of different components and the power pins.

[0074] In a possible implementation, after designing a basic circuit schematic diagram based on at least one component and at least one CBB circuit, a “clock module” may also be designed.

[0075] Specifically, firstly, for any clock pin in the basic circuit schematic diagram, it can be determined whether the attribute value of any clock pin meets the clock design requirements.

[0076] Then, if it is determined that the attribute value of any clock pin meets the clock design requirements, any clock pin is allowed to continue to use its own historical clock attribute value. In the embodiment of the present application, the determination process of this step is similar to the determination process of the power pin attribute value, that is, if it is determined that the attribute value of any clock pin does not meet the clock design requirements, the attribute value of any clock pin can be reset according to specific usage requirements to make it meet the specific usage requirements, for example, changing the frequency range, etc.

[0077] Next, the input clock and output clock in the entire circuit board can be automatically analyzed by software.

[0078] Finally, the clock module design can be performed based on the input clock and the output clock. Similarly, in order to facilitate the inspection and connection of the power supply of the entire board, in the embodiment of the present application, after the clock module design is performed, the clock-related pins of each device of the clock module can be automatically listed in the pin relationship table; wherein, in the pin relationship table, the pins connected together will be marked with the same color and network name, such as Figure 5 , which is a schematic diagram of a clock module design solution provided in an embodiment of the present application.

[0079] In one possible implementation, in order to improve the design success rate, in an embodiment of the present application, when designing a clock module based on an input clock and an output clock, first, the clock matching performed by the user based on the input clock and the output clock can be obtained (the user matches the clock based on actual usage); then, it can be automatically checked whether the clock attribute value of any clock pin in the clock matching meets the clock design requirements; finally, if the clock attribute value of any clock pin does not meet the clock design requirements, the user is prompted to re-match the clock.

[0080] Therefore, since the software can automatically check whether the connection relationship is wrong, and the components and CBB have filled in the voltage, current, frequency and other attributes, when the user is making the connection relationship between the pins of the components, the software automatically determines whether the user's connection relationship is correct through these attribute values, thereby greatly improving the design success rate and design efficiency.

[0081] In summary, compared with the prior art, the present application has the following advantages:

[0082] (1) Since pin attribute settings require professional technicians to fill in the data related to component pins, when designers use components, they only need to determine the component model, and the software will automatically extract the relevant data. Based on this, component users do not need to read, understand, and master the contents of the data sheet to design circuit schematics, which greatly reduces the design technology threshold.

[0083] (2) Since the components and CBB have already filled in the voltage, current, frequency and other attributes, when the user is making the connection relationship between the pins of the components, the software can automatically determine whether the user's connection relationship is correct based on these attribute values, thereby greatly improving the design success rate and design efficiency.

[0084] (3) When designing the power module and clock module, the software automatically lists the power and clock-related pins of each device in a table. If they are connected together, they will be marked with the same color and network name in the table. Therefore, the connection relationship between the pins of different components is clearly identified.

[0085] (4) During the power supply design process, after the user has determined the power supply network, the software will automatically recommend existing power supply device designs, reducing the time the user spends searching, querying, and mastering hardware circuits. Therefore, it not only facilitates circuit reuse, but also greatly improves design efficiency.

[0086] (5) Since the module design is carried out by recommending devices with higher suitability, the design success rate is greatly improved.

[0087] Based on the same inventive concept, the present application embodiment provides a circuit schematic design device 60, such as Figure 6 As shown, the circuit schematic design device 60 includes:

[0088] The first design unit 601 is used to design a basic circuit schematic diagram according to at least one component and at least one CBB circuit; wherein the basic circuit schematic diagram does not include a power module and a clock module;

[0089] A design requirement determination unit 602 is used to determine, for any power supply pin in the basic circuit schematic, whether a property value of any power supply pin meets the power supply design requirement;

[0090] The property value determination unit 603 is used to make any power pin continue to use its own historical power property value if it is determined that the property value of any power pin meets the power design requirement;

[0091] A pin merging unit 604, used for merging power pins with the same power attribute value;

[0092] The second design unit 605 is used to design a power module according to the automatically recommended power components, wherein the power components meet the power design requirements.

[0093] Optionally, the circuit schematic design device 60 further includes a connection relationship listing unit 606, which is used to:

[0094] The power-related pins of each device of the power module are automatically listed in the pin relationship table; wherein, in the pin relationship table, the pins connected together are marked with the same color and network name.

[0095] Optionally, the second design unit 605 is further configured to:

[0096] For any clock pin in the basic circuit schematic, determine whether the attribute value of any clock pin meets the clock design requirements;

[0097] If it is determined that the attribute value of any clock pin meets the clock design requirements, then any clock pin is allowed to continue to use its own historical clock attribute value;

[0098] Automatically analyze the input clock and output clock of the entire circuit board;

[0099] Design the clock module based on the input clock and output clock.

[0100] Optionally, the second design unit 605 is further configured to:

[0101] Get the clock matching performed by the user based on the input clock and output clock;

[0102] Automatically check whether the clock attribute value of any clock pin in the clock matching meets the clock design requirements;

[0103] If the clock attribute value of any clock pin does not meet the clock design requirements, the user is prompted to re-match the clock.

[0104] Optionally, the circuit schematic design device 60 further includes a circuit design preparation unit 607, which is used to:

[0105] Design and map the pins of multiple components in the software library;

[0106] Combine related pins of the same power supply in multiple components;

[0107] Set pin properties for multiple components and multiple CBB circuits.

[0108] Optionally, the circuit design preparation unit 607 is further used for:

[0109] The clock pin attributes of the clock pins of the multiple components and the clock pins of the multiple CBB circuits are set respectively; wherein the clock pin attributes include frequency range, direction, level standard and common mode voltage requirement.

[0110] Optionally, the circuit design preparation unit 607 is further used for:

[0111] The power pin attributes of the power pins of multiple components and the power pins of multiple CBB circuits are set respectively; wherein the power pin attributes include input / output, voltage, current, ripple, noise, overshoot, whether independent power supply, timing and power supply chip type.

[0112] The circuit schematic design device 60 can be used to perform Figure 2-Figure 5 The method executed in the embodiment shown in FIG. 6 is thus the function that can be realized by each functional module of the circuit schematic design device 60. Figure 2-Figure 5 The description of the illustrated embodiment is not repeated in detail.

[0113] In some possible implementations, various aspects of the method provided in the present application may also be implemented in the form of a program part, which includes a program code. When the program part is run on a computer device, the program code is used to enable the computer device to execute the steps of the method according to various exemplary embodiments of the present application described above in this specification. For example, the computer device may execute the following steps: Figure 2-Figure 5 The method performed in the illustrated embodiment.

[0114] Those skilled in the art can understand that all or part of the steps of the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, the steps of the above method embodiment are executed; and the aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks or optical disks. Alternatively, if the above integrated unit of the present invention is implemented in the form of a software function module and sold or used as an independent part, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present invention can be essentially or in other words, the part that contributes to the prior art can be embodied in the form of a software part, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to execute all or part of the methods described in various embodiments of the present invention. And the aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

[0115] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present application.

[0116] Obviously, those skilled in the art can make various changes and modifications to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A circuit schematic design method, characterized in that: The method comprises: Design and map the pins of multiple components in the software library; Merging related pins of the same power supply in the plurality of components together; Setting pin attributes for the multiple components and multiple CBB circuits; Design a basic circuit schematic diagram according to at least one component and at least one CBB circuit; wherein the basic circuit schematic diagram does not include a power module and a clock module; For any power pin in the basic circuit schematic, determine whether the attribute value of any power pin meets the power design requirements; If it is determined that the attribute value of any power pin meets the power design requirement, then the any power pin is allowed to continue to use its own historical power attribute value; Merge power pins with the same power attribute value; A power module is designed according to the automatically recommended power device, wherein the power device meets the power design requirements.

2. The method according to claim 1, characterized in that After designing a power module according to the automatically recommended power devices, the method further includes: The power-related pins of each device of the power module are automatically listed in the pin relationship table; wherein, in the pin relationship table, the pins connected in pairs are marked with the same color and network name.

3. The method according to claim 1, characterized in that After designing a basic circuit schematic diagram according to at least one component and at least one CBB circuit, the method further includes: For any clock pin in the basic circuit schematic, determine whether the attribute value of any clock pin meets the clock design requirements; If it is determined that the attribute value of any clock pin meets the clock design requirement, then the any clock pin is allowed to continue to use its own historical clock attribute value; Automatically analyze the input clock and output clock of the entire circuit board; A clock module is designed according to the input clock and the output clock.

4. The method according to claim 3, characterized in that The step of designing a clock module according to the input clock and the output clock comprises: Obtaining clock matching performed by a user according to the input clock and the output clock; Automatically checking whether the clock attribute value of any clock pin in the clock matching meets the clock design requirements; If the clock attribute value of any clock pin does not meet the clock design requirement, the user is prompted to re-match the clock.

5. The method according to claim 4, characterized in that The step of setting pin attributes for the multiple components and the multiple CBB circuits includes: The clock pin attributes of the clock pins of the multiple components and the clock pins of the multiple CBB circuits are set respectively; wherein the clock pin attributes include frequency range, direction, level standard and common mode voltage requirement.

6. The method according to claim 4, characterized in that The step of setting pin attributes for the multiple components and the multiple CBB circuits includes: The power pin attributes of the power pins of the multiple components and the power pins of the multiple CBB circuits are set respectively; wherein the power pin attributes include input / output, voltage, current, ripple, noise, overshoot, whether independent power supply, timing and power supply chip type.

7. A circuit schematic design device, characterized in that: The device comprises: A circuit design preparation unit is used to design and map the pins of multiple components in the software library; merge the related pins of the same power supply in the multiple components; and set the pin attributes of the multiple components and multiple CBB circuits; A first design unit is used to design a basic circuit schematic diagram according to at least one component and at least one CBB circuit; wherein the basic circuit schematic diagram does not include a power module and a clock module; A design requirement determination unit, configured to determine, for any power supply pin in the basic circuit schematic, whether a property value of the any power supply pin meets a power supply design requirement; an attribute value determining unit, configured to, if it is determined that the attribute value of any power pin meets the power design requirement, allow any power pin to continue to use its own historical power attribute value; A pin merging unit, used for merging power pins with the same power attribute value; The second design unit is used to design a power module according to the automatically recommended power device; wherein the power device meets the power design requirements.

8. An electronic device, characterized in that: The device comprises: A memory for storing program instructions; A processor is used to call the program instructions stored in the memory, and execute any method according to claims 1-6 according to the obtained program instructions.

9. A storage medium, characterized in that: The storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute any one of the methods of claims 1-6.

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