A quantum variational circuit and data processing method, device, medium and equipment

Abstract

The present invention relates to the field of quantum computing technology, and discloses a quantum variational circuit and a data processing method, including the steps of: applying an H gate to each qubit to create a superposition state of the qubits, and encoding input data into quantum encoded data; applying an input rotation gate to each qubit in the superposition state; applying a combined U gate between every two adjacent qubits to form a quantum variational circuit; performing multiple rounds of quantum evolution training processing on the quantum encoded data based on the quantum variational circuit; the combined U gate includes a CNOT gate configured between two adjacent qubits, an RX rotation gate and an RZ rotation gate configured on the first qubit among two adjacent qubits, and an RY rotation gate configured on the second qubit among two adjacent qubits. By applying the present invention, by constructing the above-mentioned quantum variational circuit, a quantum neural network can be formed to achieve fitting and classification tasks.

Description

Technical Field

[0001] The present invention relates to the field of quantum computing technology, and in particular, to a quantum variational circuit, a data processing method, an apparatus, a medium, and a device. Background Art

[0002] Quantum Variational Circuits (VQC) have extensive applications in quantum machine learning, quantum chemistry, and optimization problems. Designing efficient and entangled quantum variational circuits is crucial for enhancing quantum computing capabilities. However, as the number of qubits increases, the design and optimization of quantum circuits become increasingly complex. On the one hand, it is necessary to optimize quantum algorithms to reduce the required number of qubits, and on the other hand, it is necessary to optimize quantum circuits to reduce the depth of quantum circuits. Therefore, it is necessary to optimize the method for constructing complex quantum circuits to improve the flexibility and scalability of quantum variational circuit design. Summary of the Invention

[0003] The purpose of the present invention is to provide a quantum variational circuit, a data processing method, an apparatus, a medium, and a device, so as to improve the flexibility and scalability of quantum variational circuit design.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] According to one aspect of the present invention, there is provided a data processing method for a quantum variational circuit, including:

[0006] Applying an H gate to each qubit, where the H gate is used to create a superposition state of the qubit and encode the input data into quantum encoded data;

[0007] Applying an input rotation gate to each qubit in the superposition state;

[0008] Applying a combined U gate between every two adjacent qubits to form a quantum variational circuit;

[0009] Performing multiple rounds of quantum evolution training processing on the quantum encoded data generated by the H gate based on the quantum variational circuit;

[0010] The combined U gate includes a CNOT gate configured between two adjacent qubits, an RX rotation gate and an RZ rotation gate configured on the first qubit among two adjacent qubits, and an RY rotation gate configured on the second qubit among two adjacent qubits. By constructing the above quantum variational circuit, the input data is mapped to a quantum state, and then the quantum state is parameterized to form a quantum neural network for implementing fitting and classification tasks.

[0011] According to an embodiment of the present invention, the combined U gate is a forward combined U gate, and applying the combined U gate between every two adjacent qubits includes: from to sequentially applying a forward combined U gate to adjacent qubits and The forward combined U gate includes a CNOT gate configured between qubits and an RX and an RZ rotation gate configured on qubit and an RY rotation gate configured on qubit ; or,

[0012] The combined U gate is a reverse combined U gate, and applying the combined U gate between every two adjacent qubits includes: from to sequentially applying a reverse combined U gate to adjacent qubits and The reverse combined U gate includes a CNOT gate configured between qubits and an RX and an RZ rotation gate configured on qubit and an RY rotation gate configured on qubit where n is a natural number representing the number of qubits, .

[0013] According to an embodiment of the present invention, applying the combined U gate between every two adjacent qubits includes:

[0014] from to sequentially applying a forward combined U gate to adjacent qubits and The forward combined U gate includes a CNOT gate configured between qubits and an RX and an RZ rotation gate configured on qubit and an RY rotation gate configured on qubit ;

[0015] from to sequentially applying a reverse combined U gate to adjacent qubits and The reverse combined U gate includes a CNOT gate configured between qubits and an RX and an RZ rotation gate configured on qubit and an RY rotation gate configured on qubit RY rotation gates on, where n is a natural number, .

[0016] According to an embodiment of the present invention, applying a combined U gate between every two adjacent qubits includes:

[0017] From to Apply reverse combined U gates to adjacent qubits and in sequence. The reverse combined U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit , and a RY rotation gate configured on qubit ;

[0018] From to Apply forward combined U gates to adjacent qubits and in sequence. The forward combined U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit , and a RY rotation gate configured on qubit , where n is a natural number, .

[0019] According to an embodiment of the present invention, the forward combined U gate has the expression:

[0020] ;

[0021] Where represents the identity matrix. The relationship between the parameters of the expression and the corresponding operations and qubits is:

[0022] Corresponds to an RX rotation on the first qubit ;

[0023] Corresponds to a RY rotation on the second qubit ;

[0024] Corresponds to a RZ rotation on the first qubit ;

[0025] The control qubit The state is transferred to the target qubit for introducing entanglement between qubits and ;

[0026] The reverse combined U gate is expressed as:

[0027] ;

[0028] wherein represents the identity matrix. Similar to the forward combined U gate, the parameters of each rotation gate correspond to the rotation of a specific qubit, and the control qubit and the target qubit of the CNOT gate are reversely exchanged:

[0029] corresponds to the RX rotation on the first qubit ;

[0030] corresponds to the RY rotation on the second qubit ;

[0031] corresponds to the RZ rotation on the first qubit ;

[0032] is the reverse CNOT operation, i.e., the control qubit is and the target qubit is .

[0033] According to an embodiment of the present invention, the transformation matrix of the combined U gate is expressed as:

[0034] ;

[0035] wherein , represents the parameter of the embedded RX rotation gate, represents the parameter of the embedded RY rotation gate, represents the parameter of the embedded RZ rotation gate.

[0036] The present invention also provides a quantum variational circuit, including n qubits, where n is a natural number;

[0037] An H gate is applied to each qubit. The H gate is used to create a superposition state of the qubit and encode the input data into quantum encoded data;

[0038] Every two adjacent qubits are connected by a combined U gate; the combined U gate includes a CNOT gate configured between two adjacent qubits, an RX rotation gate and an RZ rotation gate configured on the first qubit among two adjacent qubits, and an RY rotation gate configured on the second qubit among two adjacent qubits.

[0039] On the other hand, the present invention also provides a data processing device for a quantum variational circuit, including:

[0040] A superposition initialization unit configured to apply an H gate to each qubit, where the H gate is used to create a superposition state of the qubit and encode the input data into quantum encoded data;

[0041] A parameter initialization unit configured to apply an input rotation gate to each qubit in a superposition state;

[0042] A quantum evolution unit configured to apply a combined U gate between every two adjacent qubits to form a quantum variational circuit; perform multiple rounds of quantum evolution training processing on the quantum encoded data generated by the H gate based on the quantum variational circuit;

[0043] The combined U gate includes a CNOT gate configured between two adjacent qubits, an RX rotation gate and an RZ rotation gate configured on the first qubit among two adjacent qubits, and an RY rotation gate configured on the second qubit among two adjacent qubits.

[0044] On the other hand, the present invention also provides a computer storage medium, in which instructions are stored, and when the instructions are run, the data processing method of the quantum variational circuit is implemented.

[0045] On the other hand, the present invention also provides a computing device, characterized by including a processor and a communication interface coupled to the processor; the processor is used to run a computer program or instructions to implement the data processing method of the quantum variational circuit.

[0046] A quantum variational circuit and a data processing method, device, medium and device provided by the present invention, through, achieve. Compared with the prior art, the beneficial effects produced by the present invention are as follows:

[0047] 1. On the one hand, the quantum variational circuit of the present invention can implement complex quantum algorithms with fewer quantum gates, and at the same time, the reduced circuit depth can significantly improve the operation efficiency of quantum algorithms;

[0048] 2. The network gradient descent graph of the quantum variational circuit of the present invention shows no problem of barren plateaus;

[0049] 3. The circuit of the quantum variational circuit of the present invention adopts a symmetric structure (forward and reverse CNOT chains), forming a V-shaped or inverted V-shaped topological structure, which improves the coupling of the quantum variational network;

[0050] 4. Between the entangled CNOT gates of the quantum variational circuit of the present invention, a variety of single-qubit rotation gates (RX, RY, RZ) are applied. These rotation gates increase the expressive power of the quantum variational circuit, increase the number of parameters, and at the same time control the growth of entanglement. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The drawings described herein are used to provide a further understanding of the present invention and form a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0052] Figure 1 is a flowchart of a quantum variational circuit and a data processing method according to an exemplary embodiment of the present invention;

[0053] Figure 2 is a schematic diagram of a V-shaped quantum variational circuit according to an exemplary embodiment of the present invention;

[0054] Figure 3 is a schematic diagram of a forward combined U gate according to an exemplary embodiment of the present invention;

[0055] Figure 4 is a schematic diagram of a reverse combined U gate according to an exemplary embodiment of the present invention;

[0056] Figure 5 is a schematic diagram of an existing fully connected quantum variational circuit according to an exemplary embodiment of the present invention;

[0057] Figure 6 is a network gradient descent diagram of a V-shaped quantum variational circuit according to an exemplary embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0058] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, terms such as "first" and "second" are used to distinguish the same items or similar items with basically the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds and do not limit their order. Those skilled in the art can understand that the terms "first" and "second" do not limit the quantity and execution order, and the terms "first" and "second" do not necessarily limit to be different.

[0059] It should be noted that in the present invention, words such as "exemplary" or "for example" are used to give examples, illustrations or explanations. Any embodiment or design solution described as "exemplary" or "for example" in the present invention should not be construed as being more preferred or having more advantages than other embodiments or design solutions. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0060] In the present invention, "at least one" means one or more, and "a plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. The following at least one (item) or its similar expression refers to any combination of these items, including any combination of single item (item) or plural items (items). For example, at least one (item) of a, b or c can represent: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b and c can be single or multiple.

[0061] Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0062] The present invention provides a method for constructing a quantum variational circuit with a complex topological structure in a modular manner. This method utilizes a series of quantum logic gate modules composed of specific quantum gates, and the quantum logic gate modules can be independently constructed and integrated into the overall circuit. By applying these quantum logic gate modules between adjacent qubits, a complex entanglement topological structure of the quantum circuit is achieved, and a quantum variational network with high parameter quantity, high coupling and effectively avoiding the barren plateau phenomenon is completed. Applying the quantum variational circuit and data processing method of the present invention, the repeatedly occurring quantum logic gate combinations in the quantum variational circuit are defined as a combined U gate, which serves as the basic building block of the quantum variational circuit. In particular, it is a method for constructing a quantum variational circuit network based on a V-shaped structure or an inverted V-shaped structure, which can avoid the "barren plateau" phenomenon in quantum computing.

[0063] As Figure 1 shown, a flowchart of the data processing method for the quantum variational circuit is given, and the method includes the following steps:

[0064] Step S1: Apply an H gate to each qubit. The H gate is used to create a superposition state of the qubit and encode the input data as quantum encoded data;

[0065] Step S2: Apply an input rotation gate to each qubit in the superposition state;

[0066] Step S3: Apply a combined U gate between every two adjacent qubits to form a quantum variational circuit;

[0067] Step S4: Perform multiple rounds of quantum evolution training on the quantum-encoded data generated by the H gate based on the quantum variational circuit.

[0068] Constructing the above quantum variational circuit can parameterize the input data through a series of quantum gates, constructing a parameterized quantum neural network, which can be trained for parameters subsequently. The quantum variational circuit can complete neural network tasks such as fitting and classification.

[0069] By constructing the above quantum variational circuit, the input data can be mapped to quantum states, and a series of quantum gates are used to parameterize these quantum states, thus forming a quantum neural network. The quantum variational circuit adopts a set of parameterized quantum gates, enabling the network to fit complex data patterns by adjusting the parameters of the quantum states. By optimizing these parameters, the quantum neural network can complete tasks such as data fitting, classification, and regression. The core of this method lies in utilizing the characteristics of quantum superposition and quantum entanglement, which can capture high-dimensional features and complex data structures that are difficult to handle by classical neural networks.

[0070] As Figure 2 shown, a schematic diagram of a V-shaped quantum variational circuit is given.

[0071] In Figure 2 the shown quantum variational circuit, n = 8 qubits are configured. For each qubit, first, an H gate is applied to put the qubit in a superposition state, and then a rotation gate RX is applied for inputting the quantum-encoded data. Subsequently, a quantum logic gate module, called a combined U gate, is applied between every two adjacent qubits. The combined U gate includes multiple quantum gates, specifically including a CNOT gate configured between two adjacent qubits, an RX rotation gate and an RZ rotation gate configured on the first qubit of two adjacent qubits, and an RY rotation gate configured on the second qubit of two adjacent qubits.

[0072] The combined U gate is divided into a forward combined U gate and a reverse combined U gate. During the construction of the quantum variational circuit, the forward combined U gate is applied first. As Figure 2 shown, from to the forward combined U gate is sequentially applied to adjacent qubits and . The forward combined U gate includes a CNOT gate configured between qubits and , an RX and an RZ rotation gate configured on qubit , and an RY rotation gate configured on qubit .

[0073] As shown Figure 3 in the figure, a schematic diagram of the forward combined U gate applied between adjacent qubits and is given.

[0074] Controlled-NOT gate (CNOT): , which is used to generate quantum entanglement between adjacent qubits and .

[0075] The RY rotation gate configured on qubit is used to perform a rotation in the Y-axis direction on , thereby adjusting its quantum state and realizing the manipulation of the amplitude of this qubit.

[0076] The RX rotation gate configured on qubit is used to perform a rotation in the X-axis direction on , adjusting the amplitude and phase of its quantum state.

[0077] The RZ rotation gate configured on qubit is used to perform a rotation in the Z-axis direction on , adjusting the phase difference of its quantum state.

[0078] The forward combined U gate constructs a parameterized quantum circuit by introducing entanglement (through the CNOT gate) between adjacent qubits and applying parameterizable single-qubit rotation gates (RX, RY, RZ), providing a basis for the training and parameter optimization of quantum variational circuits.

[0079] After applying the forward combined U gate, the reverse combined U gate is applied. As Figure 2 shown from to and in sequence, the reverse combined U gate is applied to adjacent qubits and . The reverse combined U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit .

[0080] As Figure 4 shown in the figure, a schematic diagram of the reverse combined U gate applied between adjacent qubits is given.

[0081] Controlled-NOT (CNOT) gate: is used to generate quantum entanglement between adjacent qubits and .

[0082] The RY rotation gate configured on qubit is used to perform a rotation in the Y-axis direction on , thereby adjusting its quantum state and achieving the manipulation of the amplitude of this qubit.

[0083] The RX rotation gate configured on qubit is used to perform a rotation in the X-axis direction on , adjusting the amplitude and phase of its quantum state.

[0084] The RZ rotation gate configured on qubit is used to perform a rotation in the Z-axis direction on , adjusting the phase difference of its quantum state.

[0085] The inverse composite U gate constructs a parameterized quantum circuit by introducing entanglement between adjacent qubits (through the CNOT gate) and applying parameterizable single-qubit rotation gates (RX, RY, RZ) to the qubits. By connecting the quantum circuits in reverse, the expressive power of the quantum variational circuit is further improved, providing a basis for training and parameter optimization.

[0086] By comparing Figure 3 the forward composite U gate shown in Figure 4 with the inverse composite U gate shown in

[0087] , it can be seen that the difference between the two lies in the direction of the CNOT gate. Figure 2 Referring to the V-shaped quantum variational circuit shown in

[0088] , it is also possible to first apply the inverse composite U gate and then apply the forward composite U gate to construct an inverted V-shaped quantum variational circuit, including the following steps: to successively apply the inverse composite U gate to adjacent qubits and . The inverse composite U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit , and a RY rotation gate configured on qubit , where .

[0089] After applying the reverse combined U gate, apply the forward combined U gate. From to successively apply the forward combined U gate to adjacent qubits and The forward combined U gate includes a CNOT gate configured between qubits and , an RX and RZ rotation gate configured on qubit , and an RY rotation gate configured on qubit . Thus, an inverted V-shaped quantum variational circuit is constructed.

[0090] After constructing the quantum variational circuit, the quantum variational circuit can be used as a network for training to obtain the quantum variational circuit parameters.

[0091] Example 1: Construct the forward combined U gate.

[0092] For adjacent qubits and , define the forward combined U gate . As Figure 3 shown, the forward combined U gate includes the following parts:

[0093] Controlled-NOT gate (CNOT gate): ;

[0094] RX and RZ rotation gates configured on qubit : ;

[0095] RY rotation gate configured on qubit : .

[0096] Therefore, the expression of the forward combined U gate is:

[0097] ;

[0098] where represents the identity matrix, indicating no operation on the corresponding qubit. corresponds to the RX rotation on the first qubit ; corresponds to the RY rotation on the second qubit ; corresponds to the RZ rotation on the first qubit ; transfer the state of the control qubit to the target qubit , for introducing qubits and entanglement between.

[0099] The matrix representation of the RZ rotation gate is: .

[0100] Therefore, the matrix representation A of RZ0(θ3) ⊗ I1 is:

[0101] ;

[0102] The matrix representation of the RX rotation gate is: ;

[0103] Therefore, the matrix representation B of RX0(θ1) ⊗ I1 is:

[0104] ;

[0105] The matrix representation of the RY rotation gate is: ;

[0106] Therefore, the matrix representation C of I0 ⊗ RY1(θ2) is:

[0107] ;

[0108] The matrix representation D of the controlled-NOT gate CNOT0,1 is: ;

[0109] Finally, the transformation matrix of the combined U gate can be calculated step by step:

[0110] First, calculate E = B * A: A is a diagonal matrix, and directly multiply the diagonal elements of A to the corresponding columns of B.

[0111] Then, calculate F = C * E: For the specific structure of C, the matrix is partitioned to simplify the calculation.

[0112] Finally, calculate U = D * F: The role of the matrix representation D of the controlled-NOT gate is to swap some rows of F. Therefore, the transformation matrix U of the combined U gate can be obtained by rearranging the rows of F. Combining the above calculations, the transformation matrix U is:

[0113] ;

[0114] Where: , represents the parameter of the embedded RX rotation gate, represents the parameter of the embedded RY rotation gate, represents the parameter embedded in the RZ rotation gate.

[0115] Example 2: Construct a reverse U gate.

[0116] For adjacent qubits and , define the reverse combined U gate . As Figure 4 shown, the reverse combined U gate includes the following parts:

[0117] Controlled-NOT gate (CNOT gate): ;

[0118] RX and RZ rotation gates configured on qubit : ;

[0119] RY rotation gate configured on qubit : .

[0120] Therefore, the expression of the reverse combined U gate is:

[0121] ,

[0122] where represents the identity matrix, indicating no operation on the corresponding qubit. corresponds to the RX rotation on the first qubit ; corresponds to the RY rotation on the second qubit ; corresponds to the RZ rotation on the first qubit ; is the reverse CNOT operation, i.e., the control bit is , and the target bit is .

[0123] The reverse combined U gate has a similar structure to the forward combined U gate , except that the direction of the controlled-NOT gate is opposite. Thus, the reverse combined U gate can be constructed with reference to Example 1.

[0124] Example 3: Construction of a V-shaped quantum variational circuit.

[0125] Apply the combined U gate between every two adjacent qubits, including:

[0126] From to successively apply the combined U gate to adjacent qubits and Apply the forward combined U gate, the forward combined U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit , and a RY rotation gate configured on qubit ;

[0127] From to , apply the reverse combined U gate to adjacent qubits and in sequence. The reverse combined U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit , and a RY rotation gate configured on qubit . Wherein, . Finally, a V-shaped quantum variational circuit is formed.

[0128] Example 4: Construction of an inverted V-shaped quantum variational circuit.

[0129] Applying the combined U gate between every two adjacent qubits includes:

[0130] From to , apply the reverse combined U gate to adjacent qubits and in sequence. The reverse combined U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit , and a RY rotation gate configured on qubit ;

[0131] From to , apply the forward combined U gate to adjacent qubits and in sequence. The forward combined U gate includes a CNOT gate configured between qubits and , RX and RZ rotation gates configured on qubit , and a RY rotation gate configured on qubit . Wherein, . Finally, an inverted V-shaped quantum variational circuit is formed.

[0132] Example 5: Data processing of V-shaped quantum variational circuit.

[0133] After constructing the quantum variational circuit, the quantum variational circuit can be trained as a network to obtain the quantum variational circuit parameters. The specific training process includes the following steps:

[0134] Step S51: Convert classical training data into quantum-encoded training data;

[0135] Convert classical data into quantum-encoded data through the RX gate. The classical data can then be processed in the quantum circuit.

[0136] Step S52: Initialize the quantum circuit parameters;

[0137] Initialize the adjustable parameters (such as rotation angles) in the quantum circuit. Initialize the parameters by adding small random perturbations to zero.

[0138] Step S53: Input the quantum-encoded training data into the quantum variational circuit for training to obtain the quantum variational circuit parameters;

[0139] The training process includes the following sub-steps:

[0140] Step S5301 Forward propagation: Input the quantum-encoded training data into the quantum variational circuit and obtain the output quantum state through a series of parameterized quantum gate operations.

[0141] Step S5302 Measure and calculate the expectation value: Measure the output quantum state and calculate the relevant physical quantity or expectation value to evaluate the performance of the circuit.

[0142] Step S5303 Calculate the loss function: Calculate the loss function based on the expectation value and the target value :

[0143] ;

[0144] where is a quantum circuit with parameters, is the measured Hamiltonian, is the initial quantum state.

[0145] Step S5304 Gradient calculation: Use the Parameter-Shift method to calculate the gradient of the loss function with respect to the circuit parameters.

[0146] For each parameter , the gradient can be expressed as:

[0147] ;

[0148] Step S5304 Parameter Update: Update the circuit parameters according to the gradient and the selected optimization algorithm 。

[0149] Update the parameters using the calculated gradient according to the selected optimization algorithm:

[0150] ;

[0151] wherein, is the learning rate.

[0152] Step S5305 Iterative Training: Repeat the above steps S5301 to S5304 until the loss function converges or reaches a predetermined number of training rounds.

[0153] Classical data is converted into a quantum state through quantum encoding techniques (such as amplitude encoding or phase encoding). The quantum state represents the embedding of the input data and becomes the basis for subsequent quantum computing. Input the quantum-encoded data to be processed into the trained quantum variational circuit, and through forward propagation and measurement, obtain the prediction result or classification result. These results can be used for classification, regression, or other quantum machine learning tasks. For example, input the quantum-encoded data of the quantum Transformer into the quantum variational circuit, and the classical Q, K, V matrices will be output. Through multiple trainings, the quantum variational circuit can adaptively adjust the parameters in the quantum circuit, thereby generating more efficient and accurate Q, K, V matrices.

[0154] Taking the V-shaped or inverted V-shaped quantum variational circuit as an example, the quantum variational circuit of the present invention constructs a CNOT gate chain forward / backward, ensuring that the connection type of the quantum circuit is the nearest neighbor type, and realizing local interaction by applying CNOT gates between adjacent qubits. This local interaction does not require all qubits to be fully connected and entangled, restricting the propagation of entanglement in the entire quantum variational circuit, preventing the quantum circuit system from becoming overly entangled, and effectively avoiding the barren plateau; at the same time, the shallower quantum circuit depth prevents the exponential growth of the Hilbert space in the deep circuit. A deep quantum circuit with random initialization will cause the gradient to disappear exponentially with the number of qubits.

[0155] As Figure 5 shown, a schematic diagram of the existing fully connected quantum circuit is given. The parameter comparison between the fully connected quantum circuit and the V-shaped quantum variational circuit of the present invention is shown in Table 1.

[0156] Table 1: Parameter comparison table between V-shaped quantum variational circuit and fully connected quantum circuit

[0157] ;

[0158] As shown in Table 1, it is shown that the V-shaped quantum variational circuit of the present invention requires a smaller depth, only 4n - 1, where n is the number of qubits used, to complete the construction of the same qubit network, which can effectively avoid the barren plateau. At the same time, the number of quantum gates required for the V-shaped quantum variational circuit is only 2n - 3, which is significantly lower than that of the fully connected quantum circuit . It shows that on the one hand, the quantum variational circuit of the present invention can implement complex quantum algorithms with fewer quantum gates, and at the same time, the reduced circuit depth can significantly improve the operation efficiency of quantum algorithms.

[0159] As Figure 6 shown, the network gradient descent diagram of the quantum variational circuit of the present invention is given, and it can be seen that there is no problem of barren plateau. The circuit of the quantum variational circuit adopts a symmetric structure (forward and reverse CNOT chains), forming a V-shaped or inverted V-shaped topological structure, which improves the coupling of the quantum variational network. This symmetry helps to maintain a balanced gradient in different parts of the circuit; between the entangled CNOT gates, a variety of single-qubit rotation gates (RX, RY, RZ) are applied. These rotation gates increase the expressive power of the quantum variational circuit, increase the number of parameters, and at the same time control the growth of entanglement.

[0160] In addition, according to an exemplary embodiment of the present invention, a computer-readable storage medium storing a computer program may also be provided. The computer-readable storage medium stores a computer program that, when executed by a processor, causes the processor to execute the data processing method of the quantum variational circuit according to the exemplary embodiment of the present invention. The computer-readable recording medium is any data storage device that can store data read by a computer system. Examples of computer-readable recording media include: read-only memory, random access memory, compact disc read-only memory, magnetic tape, floppy disk, optical data storage device, and carrier wave (such as data transmission through the Internet via a wired or wireless transmission path).

[0161] In addition, according to an exemplary embodiment of the present invention, a computing device may also be provided. The computing device includes a processor and a memory. The memory is used to store a computer program. The computer program is executed by the processor to cause the processor to execute the computer program of the data processing method of the quantum variational circuit according to the exemplary embodiment of the present invention.

[0162] Although the present invention has been described in connection with various embodiments, those skilled in the art will recognize other variations of the disclosed embodiments while practicing the claimed invention, by viewing the drawings, the disclosure, and the like. In the specification, the word "comprising" does not exclude other components or steps, and the singular "a" or "one" does not exclude a plurality. A single processor or other unit may perform several functions recited in the specification. Certain measures are recited in mutually different embodiments, but this does not mean that these measures cannot be combined to produce favorable results.

[0163] Although the invention has been described in connection with specific features and embodiments thereof, it will be apparent that various modifications and combinations can be made without departing from the spirit and scope of the invention. Accordingly, the specification and drawings are merely exemplary of the invention and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the invention. Obviously, those skilled in the art can make various changes and modifications to the invention without departing from the spirit and scope of the invention. Thus, if these modifications and variations of the invention are within the scope of the invention and its equivalent technologies, the invention is also intended to include these changes and modifications.

Claims

1. A data processing method for a quantum variational circuit, characterized in that: include: Applying an H gate to each qubit, the H gate is used to create a superposition state of the qubit and encode the input data into quantum coded data; Apply an input rotation gate to each qubit in superposition; Apply a combined U gate between every two adjacent qubits to form a quantum variational circuit; Based on the quantum variational circuit, multiple rounds of quantum evolution training are performed on the quantum coded data generated by the H gate; The combined U gate includes a CNOT gate configured between two adjacent quantum bits, an RX rotation gate and an RZ rotation gate configured on the first quantum bit of the two adjacent quantum bits, and an RY rotation gate configured on the second quantum bit of the two adjacent quantum bits; by constructing the above-mentioned quantum variational circuit, the input data is mapped to the quantum state, and then the quantum state is parameterized to form a quantum neural network for realizing fitting and classification tasks; The combined U gate is a forward combined U gate, and the combined U gate is applied between every two adjacent quantum bits, including: arrive For adjacent quantum bits and Apply a forward combination U gate, the forward combination U gate includes configuring a quantum bit and CNOT gates between them, configured on the quantum bit The RX and RZ revolving gates on the qubit RY revolving door on; or, The combined U gate is a reverse combined U gate, and applying the combined U gate between every two adjacent quantum bits includes: arrive For adjacent quantum bits and Applying a reverse combination U gate, the reverse combination U gate includes configuring a quantum bit and CNOT gates between them, configured on the quantum bit The RX and RZ revolving gates on the qubit RY revolving door on, where n is a natural number, representing the number of quantum bits, .

2. The data processing method of quantum variational circuit according to claim 1, characterized in that: The forward combination U gate is expressed as: ； in, Represents the unit matrix. According to the relationship between the parameters of the expression and the corresponding operations and quantum bits, it is: Corresponding to the first qubit RX on Rotate; Corresponding to the second qubit RY rotation on; Corresponding to the first qubit RZ rotation on; The control bit The state is passed to the target bit , used to introduce quantum bits and The entanglement between The reverse combination U gate is expressed as: ； in, Represents the identity matrix. Similar to the forward combination U-gate, the parameters of each rotation gate correspond to the rotation of a specific quantum bit. The control bit and target bit of the CNOT gate are reversely exchanged: Corresponding to the first qubit RX on Rotate; Corresponding to the second qubit RY rotation on; Corresponding to the first qubit RZ rotation on; It is the reverse CNOT operation, that is, the control bit is , the target bit is .

3. The data processing method of quantum variational circuit according to claim 1, characterized in that: The transformation matrix of the combined U gate is expressed as: in, , Indicates the parameters of the embedded RX revolving door, Indicates the parameters of the embedded RY revolving door. Represents the parameters embedded in the RZ revolving door.

4. A quantum variational circuit, characterized in that: It includes n quantum bits, where n is a natural number; Apply an H gate to each qubit, which is used to create a superposition state of the qubit and encode the input data into quantum coded data; Every two adjacent qubits are connected by a combined U gate; the combined U gate includes a CNOT gate configured between the two adjacent qubits, an RX revolving gate and an RZ revolving gate configured on the first qubit of the two adjacent qubits, and an RY revolving gate configured on the second qubit of the two adjacent qubits; The combined U gate is a forward combined U gate, and the combined U gate is applied between every two adjacent quantum bits, including: arrive For adjacent quantum bits and Apply a forward combination U gate, the forward combination U gate includes configuring a quantum bit and CNOT gates between them, configured on the quantum bit The RX and RZ revolving gates on the qubit RY revolving door on; or, The combined U gate is a reverse combined U gate, and applying the combined U gate between every two adjacent quantum bits includes: arrive For adjacent quantum bits and Applying a reverse combination U gate, the reverse combination U gate includes configuring a quantum bit and CNOT gates between them, configured on the quantum bit The RX and RZ revolving gates on the qubit RY revolving door on, where n is a natural number, representing the number of quantum bits, .

5. A data processing device for a quantum variational circuit, characterized in that: include: a superposition initialization unit configured to apply an H gate to each qubit, the H gate being used to create a superposition state of the qubit and encode input data into quantum coded data; a parameter initialization unit configured to apply an input rotation gate to each qubit in a superposition state; A quantum evolution unit, configured to apply a combined U-gate between every two adjacent quantum bits to form a quantum variational circuit; Based on the quantum variational circuit, multiple rounds of quantum evolution training are performed on the quantum coded data generated by the H gate; The combined U gate includes a CNOT gate configured between two adjacent qubits, an RX rotation gate and an RZ rotation gate configured on the first qubit of the two adjacent qubits, and an RY rotation gate configured on the second qubit of the two adjacent qubits; The combined U gate is a forward combined U gate, and the combined U gate is applied between every two adjacent quantum bits, including: arrive For adjacent quantum bits and Apply a forward combination U gate, the forward combination U gate includes configuring a quantum bit and CNOT gates between them, configured on the quantum bit The RX and RZ revolving gates on the qubit RY revolving door on; or, The combined U gate is a reverse combined U gate, and applying the combined U gate between every two adjacent quantum bits includes: arrive For adjacent quantum bits and Applying a reverse combination U gate, the reverse combination U gate includes configuring a quantum bit and CNOT gates between them, configured on the quantum bit The RX and RZ revolving gates on the qubit RY revolving door on, where n is a natural number, representing the number of quantum bits, .

6. A computer storage medium, characterized in that: The computer storage medium stores instructions, and when the instructions are executed, the data processing method for the quantum variational circuit described in any one of claims 1 to 3 is implemented.

7. A computing device, characterized in that It comprises a processor and a communication interface coupled to the processor; the processor is used to run a computer program or instruction to implement the data processing method of the quantum variational circuit described in any one of claims 1 to 3.

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