Graphics processor, graph drawing method, chip and electronic equipment

Abstract

The invention discloses a graphics processor, a graphics drawing method, a chip and electronic equipment, and belongs to the field of chips. The graphics processor comprises a geometric processing assembly line, and the geometric processing assembly line comprises a first task generation assembly line, a task control unit, a second task generation assembly line and a task execution unit. The task control unit is used for acquiring a first coloring result based on the received first task information in the single-pipeline mode, and outputting the first coloring result to a pipeline behind the geometric processing pipeline; and acquiring a first coloring result based on the received first task information in the double-pipeline mode, and controlling the first coloring result to enter a second task generation pipeline, and based on the received second task information, obtaining a second coloring result, and outputting the second coloring result to an assembly line behind the geometric processing assembly line. According to the geometric processing pipeline, geometric processing parts of different rendering pipelines can be combined into the same data stream.

Description

Technical Field

[0001] The present application relates to the field of chips, and in particular to a graphics processor, a graphics drawing method, a chip and an electronic device. Background Art

[0002] The graphics processing unit (GPU) provides a VTG rendering pipeline. The geometry processing pipeline in the VTG rendering pipeline is composed of vertex shaders, tessellation shaders (including shell shaders, tessellation stages, and domain shaders), and geometry shaders. In the VTG rendering pipeline, vertex shaders and geometry shaders are processed serially, which limits the efficiency of parallel computing and easily leads to performance bottlenecks.

[0003] The graphics processor in the related art also provides a mesh shading rendering pipeline. The geometry processing pipeline in the mesh shading rendering pipeline includes an amplification shader and a mesh shader. The mesh shader can process multiple vertices and fragments in parallel, thereby improving the performance of the graphics processor.

[0004] In the related art, a solution is provided for simultaneously setting an independent VTG rendering pipeline and a mesh shading rendering pipeline on a graphics processor, so that the VTG rendering pipeline and the mesh shading rendering pipeline can be used in a mixed manner. Summary of the invention

[0005] The present application provides a graphics processor, a graphics drawing method, a chip and an electronic device. The geometry processing pipeline provided by the present application can combine the geometry processing parts of different rendering pipelines into the same data stream.

[0006] According to one aspect of the present application, a graphics processor is provided, the graphics processor comprising a geometry processing pipeline, the geometry processing pipeline comprising a first task generation pipeline, a task control unit, a second task generation pipeline and a task execution unit, the first task generation pipeline is used to generate a first shader task corresponding to a first shader and first task information of the first shader task, the second task generation pipeline is used to generate a second shader task corresponding to a second shader and second task information of the second shader task;

[0007] A task execution unit, configured to receive and execute a first shader task in a single-pipeline mode to obtain a first shading result; and receive and execute a first shader task and a second shader task in a dual-pipeline mode to obtain a first shading result and a second shading result, respectively;

[0008] A task control unit, configured to obtain a first shading result based on the received first task information in a single pipeline mode, and output the first shading result to a pipeline after the geometry processing pipeline;

[0009] Also, in the dual-pipeline mode, based on the received first task information, a first shading result is obtained, and the first shading result is controlled to enter the second task generation pipeline; and, based on the received second task information, a second shading result is obtained, and the second shading result is output to the pipeline after the geometry processing pipeline.

[0010] According to one aspect of the present application, a graphics drawing method is provided, the method being applied to a graphics processor, the graphics processor comprising a geometry processing pipeline, the geometry processing pipeline comprising a first task generation pipeline, a task control unit, a second task generation pipeline and a task execution unit; the method comprising:

[0011] The first task generation pipeline generates a first shader task corresponding to the first shader and first task information of the first shader task;

[0012] The first task generation pipeline sends the first shader task to the task execution unit, and sends the first task information to the task control unit; the task execution unit executes the first shader task to obtain a first shader result;

[0013] In the single pipeline mode, the task control unit obtains a first shading result based on the first task information, and outputs the first shading result to a pipeline after the geometry processing pipeline;

[0014] In the dual-pipeline mode, the task control unit obtains the first shading result based on the first task information, and outputs the first shading result to the second task generation pipeline; the second task generation pipeline generates a second shader task corresponding to the second shader and the second task information of the second shader task based on the first shading result; the second task generation pipeline sends the second shader task to the task execution unit, and sends the second task information to the task control unit; the task execution unit executes the second shader task to obtain the second shading result; the task control unit obtains the second shading result based on the second task information, and outputs the second shading result to the pipeline after the geometry processing pipeline.

[0015] According to one aspect of the present application, a chip is provided, and the chip includes the above-mentioned graphics processor.

[0016] According to one aspect of the present application, a server is provided, and the server includes the above-mentioned graphics processor.

[0017] According to one aspect of the present application, an electronic device is provided, and the electronic device includes the above-mentioned graphics processor.

[0018] The beneficial effects brought about by the technical solution provided in the embodiments of the present application include at least the following.

[0019] Through the design of the first task generation pipeline, the second task generation pipeline and the task control unit, the geometry processing pipeline provided by the present application can combine the geometry processing parts in different rendering pipelines and implement them as the same data stream. At this time, the first task generation pipeline can be configured to generate shader tasks for different rendering pipelines, and the second task generation pipeline can also be configured to generate shader tasks for different rendering pipelines. Compared with the related art, the present application does not set up two geometry processing pipelines for the VTG rendering pipeline and the mesh shading rendering pipeline respectively, but only uses one geometry processing pipeline.

[0020] Furthermore, in dual-pipeline mode, the first shader task and the second shader task can be generated by the first task generation pipeline and the second task generation pipeline respectively. Thus, for shader applications that use a mixture of the VTG rendering pipeline and the mesh shading rendering pipeline, there is no need for additional synchronization alignment operations, and the hardware distribution can be naturally aligned. The first shader task generated by the first task generation pipeline in the VTG rendering pipeline and the mesh shading rendering pipeline is aligned, and the second shader task generated by the second task generation pipeline is aligned. Furthermore, regardless of whether it is the VTG rendering pipeline or the mesh shading rendering pipeline, the rendering order of the second shader task generated by the second task generation pipeline is naturally after the rendering order of the first shader task generated by the first task generation pipeline, that is, the rendering order is naturally guaranteed by the hardware. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 It is a schematic diagram of a geometry processing pipeline provided by an embodiment of the present application.

[0023] Figure 2 It is a schematic diagram of an allocation scheme for different shader combinations provided by an embodiment of the present application.

[0024] Figure 3 It is a schematic diagram of a geometry processing pipeline provided by an embodiment of the present application.

[0025] Figure 4 It is a schematic diagram of a geometry processing pipeline provided by an embodiment of the present application.

[0026] Figure 5 It is a schematic diagram of a task control unit provided in one embodiment of the present application.

[0027] Figure 6 It is a schematic diagram of a task control unit provided in one embodiment of the present application.

[0028] Figure 7 It is a schematic diagram of a task control unit provided in one embodiment of the present application.

[0029] Figure 8 It is a structural block diagram of an electronic device provided by an embodiment of the present application.

[0030] Fig. 9 It is a schematic diagram of the structure of a server provided in one embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below in conjunction with the accompanying drawings.

[0032] First, some terms in the embodiments of the present application are introduced:

[0033] Geometry processing pipeline: The graphics processor is mainly composed of two parts, the geometry processing pipeline and the pixel processing pipeline. The geometry processing pipeline is mainly used to process the geometric coordinates and shapes of the graphics, and the pixel processing pipeline is mainly used to perform pixel operations on the graphics. In the VTG rendering pipeline proposed by DX11.3, the geometry processing pipeline includes the vertex shader (Vertex Shader), the tessellation shader (including the hull shader (Hull Shader), the tessellation stage (Tessellator) and the domain shader (Domain Shader)) and the geometry shader (Geometry Shader). In the mesh shading rendering pipeline proposed by DX12, the geometry processing pipeline includes the amplification shader (Amplification Shader) and the mesh shader (Mesh Shader).

[0034] In the geometry processing pipeline of the VTG rendering pipeline, after receiving the drawing instruction, the initial drawing data first enters the vertex shader, and the vertex shader completes the coordinate transformation of the vertex. The vertex shader is processed based on the vertex as the basic unit. After the vertex shader is completed, it will enter the tessellation shader, which is an optional shader. In the tessellation shader, the shell shader completes the pre-calculation process of the tessellation, and the tessellation parameters output by the shell shader enter the tessellation stage. The tessellation stage calculates the new vertices after the tessellation according to the tessellation parameters, and the domain shader adjusts and calculates the coordinates of the new vertices. The domain shader inputs all vertices into the geometry shader, and the geometry shader adds, deletes, and modifies the vertices. The geometry shader is also an optional shader.

[0035] In the geometry processing pipeline of the mesh shading rendering pipeline, the magnification shader will magnify the received drawing data to generate more drawing data. The magnification shader is an optional shader. After the mesh shader obtains all the drawing data, it will process the drawing data of the entire mesh. The mesh shader can process the data of the entire mesh at one time, thereby realizing large-scale geometry data generation and processing.

[0036] Figure 1 1 is a schematic diagram of a geometry processing pipeline provided by an exemplary embodiment of the present application. The geometry processing pipeline 100 includes a first task generation pipeline 110, a task control unit 120, a second task generation pipeline 130 and a task execution unit 140. The first task generation pipeline 110 is used to generate a first shader task corresponding to a first shader, the first shader task refers to a task for realizing the function of the first shader, and is used to generate first task information corresponding to the first shader task, the first task information is related information of the first shader task; the second task generation pipeline 130 is used to generate a second shader task corresponding to a second shader, the second shader task refers to a task for realizing the function of the second shader, and is used to generate second task information corresponding to the second shader task, the second task information is related information of the second shader task. The task control unit 120 and the task execution unit 140 are connected to the first task generation pipeline 110 and the second task generation pipeline 130 respectively.

[0037] In the single-pipeline mode, the first task generation pipeline 110 generates a first shader task and first task information. The first task generation pipeline 110 sends the first shader task to the task execution unit 140, and sends the first task information to the task control unit 120. The task execution unit 140 receives the first shader task, executes the first shader task, and obtains a first shading result. The task control unit 120 receives the first task information, which includes the storage location and storage format of the first shading result. The task control unit 120 obtains the first shading result according to the instruction of the first task information, and outputs the first shading result to the pipeline after the geometry processing pipeline. In the single-pipeline mode, it refers to a mode in which only the first shader processing pipeline is started. The first shader processing pipeline includes the first task generation pipeline 110 and the task execution unit 140. The first shader processing pipeline is used to implement the function of the first shader.

[0038] In the present application, in single-pipeline mode, the type of the first shader is configurable. In one embodiment, in single-pipeline mode, the first shader may be at least one shader in the geometry processing part of the VTG rendering pipeline, that is, the first shader may be at least one of a vertex shader, a geometry shader, a shell shader, and a domain shader. Alternatively, the first shader may be a mesh shader in the geometry processing part of a mesh shading rendering pipeline. In single-pipeline mode, only the function of the first shader is implemented.

[0039] In the dual-pipeline mode, the first task generation pipeline 110 generates a first shader task and first task information, and the first task generation pipeline 110 sends the first shader task to the task execution unit 140, and sends the first task information to the task control unit 120. The task execution unit 140 executes the first shader task to obtain a first shading result; the task control unit 120 obtains the first shading result according to the instruction of the first task information, and controls the first shader task to enter the second task generation pipeline 130. Optionally, the first task information includes the storage location and storage format of the first shading result.

[0040] The second task generation pipeline 130 transmits the second shader task generated based on the first shading result to the task execution unit 140, and transmits the second task information corresponding to the second shader task to the task control unit 120; the task execution unit 140 executes the second shader task to obtain the second shading result; the task control unit 120 obtains the second shading result according to the instruction of the second task information, and controls the second shading result to be output to the pipeline after the geometry processing pipeline 100, and optionally, the second task information includes the storage location and storage format of the second shading result. The dual pipeline mode refers to the mode of starting the first shader processing pipeline and the second shader processing pipeline, the first shader processing pipeline includes the first task generation pipeline 110 and the task execution unit 140, the second shader processing pipeline includes the second task generation pipeline 130 and the task execution unit 140, the first shader processing pipeline is used to implement the function of the first shader, and the second shader processing pipeline is used to implement the function of the second shader.

[0041] In the present application, in dual-pipeline mode, the types of the first shader and the second shader are configurable. In one embodiment, in dual-pipeline mode, the first shader may be at least one shader in the geometry processing part of the VTG rendering pipeline, and the second shader may be at least one shader in the geometry processing part of the VTG rendering pipeline that is different from the first shader, that is, the first shader and the second shader include at least two of a vertex shader, a geometry shader, a shell shader, and a domain shader. Alternatively, in dual-pipeline mode, the first shader is an amplification shader in the geometry processing part of a mesh shading rendering pipeline, and the second shader is a mesh shader in the geometry processing part of a mesh shading rendering pipeline.

[0042] In one embodiment, the hardware units on the first task generation pipeline 110 and the hardware units on the second task generation pipeline 130 are different, that is, the two pipelines are completely independent. In another embodiment, the hardware units on the first task generation pipeline 110 and the hardware units on the second task generation pipeline 130 are partially the same, that is, the two processing pipelines have some shared hardware units.

[0043] In one embodiment, the first shading result or the second shading result output by the geometry processing pipeline will enter the pixel processing pipeline. The pixel processing pipeline includes a rasterization stage, a pixel shader, and an output blending part. Optionally, the pixel processing pipeline can be a pixel processing pipeline using tile rendering, a tile-based pixel processing pipeline with deferred rendering, etc., that is, the geometry processing pipeline provided by the present application is applicable to any type of pixel processing pipeline, that is, the geometry processing pipeline provided by the present application has wide applicability.

[0044] In summary, the present application provides a geometry processing pipeline that can mix and use geometry processing parts in different rendering pipelines. The geometry processing pipeline provided by the present application can combine the geometry processing parts in different rendering pipelines to implement the same data stream. In single-pipeline mode or dual-pipeline mode, the relevant shader in the present application can be a shader in the VTG rendering pipeline or a shader in the mesh shading rendering pipeline. At this time, the present application does not set up two geometry processing pipelines for the VTG rendering pipeline and the mesh shading rendering pipeline respectively, but a single geometry processing pipeline supports the geometry processing parts in the VTG rendering pipeline and the mesh shading rendering pipeline at the same time.

[0045] Moreover, in the dual-pipeline mode, the first shader task and the second shader task can be generated by the first task generation pipeline and the second task generation pipeline respectively. In this way, for a shader application that uses a mixture of the VTG rendering pipeline and the mesh shading rendering pipeline, there is no need to perform additional synchronization alignment operations, and the hardware distribution can be naturally aligned. The first shader task generated by the first task generation pipeline in the VTG rendering pipeline and the mesh shading rendering pipeline is aligned, and the second shader task generated by the second task generation pipeline in the VTG rendering pipeline and the mesh shading rendering pipeline is aligned.

[0046] Figure 2 It is shown that when the graphics processor uses various shader combinations, the first task generation pipeline and the second task generation pipeline are each responsible for generating shader tasks. Figure 2 It can be seen that when the graphics processor is set to use only vertex shaders, or vertex shaders plus geometry shaders, or mesh shaders, the single pipeline mode is started, and all shader tasks are generated by the first task generation pipeline.

[0047] When the graphics processor is set to use vertex shaders, shell shaders and domain shaders, the dual pipeline mode is started, and the first task generates a pipeline to generate shader tasks for vertex shaders and shell shaders, and the second task generates a pipeline to generate shader tasks for domain shaders; when the graphics processor is set to use vertex shaders, shell shaders, domain shaders and geometry shaders, the dual pipeline mode is started, and the first task generates a pipeline to generate shader tasks for vertex shaders and shell shaders, and the second task generates a pipeline to generate shader tasks for domain shaders and geometry shaders; when the graphics processor is set to use magnification shaders and mesh shaders, the dual pipeline mode is started, and the first task generates a pipeline to generate shader tasks for magnification shaders, and the second task generates a pipeline to generate shader tasks for mesh shaders.

[0048] In actual processing by the graphics processor, the functions of the vertex shader and the domain shader are similar, and the functions of the shell shader and the geometry shader are similar, that is, Figure 2 In the shader allocation method shown, the shader tasks generated by the first task generation pipeline and the second task generation pipeline are similar. Therefore, the first task generation pipeline and the second task generation pipeline can be instantiated from the same pipeline. At this time, even if two task generation pipelines are used, the present application does not need to spend more costs on pipeline development, and two task generation pipelines can be instantiated from the same task generation pipeline.

[0049] Figure 3A schematic diagram of a geometry processing pipeline provided by an exemplary embodiment of the present application is shown. The geometry processing pipeline 100 includes a first task generation pipeline 110, a task control unit 120, a second task generation pipeline 130 and a task execution unit 140. The first task generation pipeline 110 includes a first task generation unit 101, a first shader engine 102 and a shader task construction unit 103. The second task generation pipeline 130 includes a first mixing unit 104, a second shader engine 105 and a shader task construction unit 103. In the single pipeline mode, the task execution unit 140 receives the first shader task generated by the first task generation pipeline 110, the task execution unit 140 executes the first shader task to obtain a first shading result, the task control unit 120 receives the first task information corresponding to the first shader task, the task control unit 120 obtains the first shading result based on the first task information, and outputs the first shading result to the pipeline after the geometry processing pipeline.

[0050] In the dual-pipeline mode, the task execution unit 140 receives the first shader task generated by the first task generation pipeline 110, the task execution unit 140 executes the first shader task to obtain a first shading result, the task control unit 120 receives the first task information corresponding to the first shader task, the task control unit 120 obtains the first shading result based on the first task information, controls the first shading result to enter the second task generation pipeline 130, the second task generation pipeline 130 generates the second shader task and the second task information corresponding to the second shader task based on the first shading result, the second task generation pipeline 130 sends the second shader task to the task execution unit 140, and sends the second task information to the task control unit 120, the task execution unit 140 executes the second shader task to obtain a second shading result, the task control unit 120 obtains the second shading result based on the second task information, and outputs the second shading result to the pipeline after the geometry processing pipeline.

[0051] For the first task, a pipeline 110 is generated

[0052] The first task generating unit 101, based on the received drawing instruction, splits the drawing instruction into a plurality of first task packets, and sends the plurality of first task packets to the first shader engine 102. The drawing instruction includes at least one of a Draw instruction and a Dispatchmesh instruction, the Draw instruction is a drawing instruction for the VTG rendering pipeline, and the Dispatchmesh instruction is a drawing instruction for the mesh shading rendering pipeline.

[0053] In one embodiment, the drawing instruction instructs drawing a first number of triangles, each of the multiple first task packages contains at least one first task, and each first task instructs drawing one triangle. Schematically, the drawing instruction instructs drawing 100 triangles, which are split into 50 first task packages, each of which contains 2 first tasks, and each first task instructs drawing one triangle.

[0054] The first shader engine 102 generates a first shader task corresponding to the first shader, and sends the first shader task to the shader task construction unit 103. After receiving the multiple first task packages, the first shader engine 102 will assemble the multiple first task packages to generate the first shader task corresponding to the first shader. For example, the first task generation pipeline 110 is used to generate the shader task of the vertex shader, and the first shader engine 102 will assemble the shader task of the vertex shader from the multiple first task packages. The first shader engine 102 is used to add the first resource requirement information to the generated first shader task. The first resource requirement information is used to indicate the resources required to implement the first shader task, for example, the address of the result storage unit, the address of the temporary storage unit, the storage location of the first shading result, the storage format, etc.

[0055] The shader task construction unit 103 is used to allocate resources for the first shader task generated by the first shader engine 102. For example, the shader task construction unit 103 allocates address information of a temporary storage unit and address information of a result storage unit to the first shader task according to the first resource requirement information. The temporary storage unit is used to temporarily store data read and written when executing the first shader task, and the result storage unit is used to store the execution result of the first shader task. The shader task construction unit 103 sends the first shader task after resource allocation to the task control unit 120.

[0056] The shader task construction unit 103 is further configured to generate first task information corresponding to the first shader task, where the first task information is information about resources allocated to the first shader task.

[0057] Generate pipeline 130 for the second task

[0058] The first blending unit 104 performs surface tessellation or derives a mesh shader thread group based on the first shading result generated by the task execution unit 140, obtains first output data, and sends the first output data to the second shader engine 105. If the first shading result is a shading result of a shell shader, the first blending unit 104 performs surface tessellation to obtain first output data, the shading result of the shell shader includes a surface tessellation parameter, and the first blending unit 104 performs surface tessellation based on the surface tessellation parameter; if the first shading result is a shading result of an amplifying shader, the shading result of the amplifying shader includes a dispatchmesh parameter, and the first blending unit 104 generates a mesh shader thread group based on the dispatchmesh parameter, and the dispatchmesh parameter is used to indicate the number of mesh shader thread groups generated.

[0059] The second shader engine 105 generates a second shader task corresponding to the second shader, and sends the second shader task to the shader task construction unit 103. After receiving the first output data, the second shader engine 105 generates a second shader task corresponding to the second shader. For example, the second task generation pipeline 130 is used to generate a domain shader task, and the second shader engine 105 generates the domain shader task according to the result of the surface subdivision; for example, the second task generation pipeline is used to generate a mesh shader task, and the second shader engine 105 generates the mesh shader task according to the mesh shader thread group. The second shader engine 105 is used to add second resource requirement information to the generated second shader task, and the second resource requirement information is used to indicate the resources required to implement the second shader task, for example, the address information of the result storage unit, the address information of the temporary storage unit, the storage location of the second shading result, the storage format of the second shading result, etc.

[0060] The shader task construction unit 103 is used to allocate resources for the second shader task generated by the second shader engine 105. For example, the shader task construction unit 103 allocates address information of a temporary storage unit and address information of a result storage unit to the second shader task according to the second resource requirement information. The temporary storage unit is used to temporarily store data read and written when executing the second shader task, and the result storage unit is used to store the execution result of the second shader task. The shader task construction unit 103 sends the second shader task after resource allocation to the task execution unit 120.

[0061] The shader task construction unit 103 is further configured to generate second task information corresponding to the second shader task, where the second task information is information about resources allocated to the second shader task.

[0062] In the above embodiment, the first task generation pipeline 110 and the second task generation pipeline 130 have their own shader engines and a shared shader task construction unit. The sharing of the shader task construction unit can save hardware usage and reduce the hardware density on the graphics processor. Figure 2 In the shader task allocation method shown, the shader tasks to be generated by the first shader engine 102 and the second shader engine 105 are relatively similar. Therefore, the first shader engine 102 and the second shader engine 105 can be instantiated by the same hardware, which can save the cost of hardware development.

[0063] Figure 4 A schematic diagram of a geometry processing pipeline provided by another exemplary embodiment of the present application is shown. The geometry processing pipeline 100 includes a first shader processing pipeline, a task control unit 120 and a second shader processing pipeline. The first shader processing pipeline includes a first task generation pipeline 110, a task execution unit 140, a temporary storage unit 150 and a result storage unit 160. The first task generation pipeline 110 includes a first task generation unit 101, a first shader engine 102 and a shader task construction unit 103;

[0064] The second shader processing pipeline includes a second task generation pipeline 130 , a task execution unit 140 , a temporary storage unit 150 and a result storage unit 160 . The second task generation pipeline 130 includes a first mixing unit 104 , a second shader engine 105 and a shader task construction unit 103 .

[0065] In the single-pipeline mode, the task control unit 120 receives the first task information generated by the first shader processing pipeline, and the task control unit 120 obtains the first shading result generated by the first shader processing pipeline according to the first task information, and outputs the first shading result to the pipeline after the geometry processing pipeline. In the dual-pipeline mode, the task control unit 120 receives the first task information generated by the first shader processing pipeline, and the task control unit 120 obtains the first shading result generated by the first shader processing pipeline according to the first task information, controls the first shading result to enter the second shader processing pipeline, and the second shader processing pipeline will generate a second shader task and generate second task information based on the first shading result, and the second shader processing pipeline runs the second shader task to generate a second shading result, and the second shader processing pipeline transmits the second task information to the task control unit 120, and the task control unit 120 obtains the second shading result according to the second task information, and outputs the second shading result to the pipeline after the geometry processing pipeline.

[0066] For the first shader processing pipeline

[0067] The related introduction of the first task generation pipeline 110 and the task execution unit 140 can be found above and will not be repeated here.

[0068] When executing the first shader task, the task execution unit 140 obtains the required read and write data from the temporary storage unit 150. Optionally, the temporary storage unit 150 is an on-chip storage space of the graphics processor. Optionally, the temporary storage unit 150 is an off-chip storage space of the graphics processor.

[0069] The task execution unit 140 sends the execution result of the first shader task, that is, the first shading result, to the result storage unit 160. Optionally, the result storage unit 160 is a vertex buffer space. The task control unit 120 is connected to the result storage unit 160. When in the dual-pipeline mode, the task control unit 120 obtains the first shading result from the result storage unit 160 and sends the first shading result to the first blending unit 104. When in the single-pipeline mode, the task control unit 120 obtains the first shading result from the result storage unit 160 and sends the first result to the pipeline after the geometry processing pipeline 100.

[0070] For the second shader processing pipeline

[0071] The relevant introduction of the second task generation pipeline 130 and the task execution unit 140 can be found above and will not be repeated here.

[0072] When executing the second shader task, the task execution unit 140 obtains the required read and write data from the temporary storage unit 150, and sends the execution result of the second shader task to the result storage unit 160. Optionally, the temporary storage unit 150 is an on-chip storage space of the graphics processor. Optionally, the temporary storage unit 150 is an off-chip storage space of the graphics processor. When in dual-pipeline mode, after the second shader task is executed, the task control unit 120 can send the execution result of the second shader task, that is, the second shading result, to the pipeline after the geometry processing pipeline 100.

[0073] In an embodiment of the present application, the first shader processing pipeline and the second shader processing pipeline will share a result storage unit and a temporary storage unit. The sharing of the result storage unit and the temporary storage unit can save the use of hardware and reduce the hardware density on the graphics processor.

[0074] In one embodiment, in single-pipeline mode, the first task generation pipeline also sends the first shader task to the task control unit, the task control unit receives the first shader task, controls the first shader task to be output to the pipeline after the geometry processing pipeline, the first shader task is used to indicate the pipeline after the geometry processing pipeline, the shader task corresponding to the first shading result; optionally, the task control unit synchronously sends the first shader task and the first shading result to the pipeline after the geometry processing pipeline.

[0075] And, in the dual-pipeline mode, the first task generation pipeline also sends the first shader task to the task control unit, the task control unit receives the first shader task, controls the first shader task to enter the second task generation pipeline, and the first shader task is used to indicate the second task generation pipeline, the shader task corresponding to the first shading result; optionally, the task control unit sends the first shader task and the first shading result to the second task generation pipeline synchronously. It can be understood that based on the first shader task, the second task generation pipeline knows the shader task corresponding to the received first shading result, the second task generation pipeline knows the type of shader task to be generated, and avoids conflicts between the generated second shader task and the first shader task.

[0076] The second task generation pipeline also sends the second shader task to the task control unit. The task control unit receives the second shader task and controls the second shader task to be output to the pipeline after the geometry processing pipeline. The second shader task is used to indicate the pipeline after the geometry processing pipeline, the shader task corresponding to the second shading result; optionally, the task control unit sends the second shader task and the second shading result to the pipeline after the geometry processing pipeline synchronously.

[0077] The task control unit will control the direction of the two shader tasks. The first shader task generated by the first task generation pipeline can be sent to the pipeline after the geometry processing pipeline, or can be sent to the second task generation pipeline. The second shader task generated by the second task generation pipeline can only be sent to the pipeline after the geometry processing pipeline.

[0078] like Figure 5As shown, there are two FIFOs (First Input First Output) in the task control unit. The first FIFO 510 is used to store the first shader task, and the second FIFO 520 is used to store the second shader task. The first FIFO 510 is used to store the first shader task sent by the first task generation pipeline in the single pipeline mode and the dual pipeline mode; the second FIFO 520 is used to store the second shader task sent by the second task generation pipeline in the dual pipeline mode. In the single pipeline mode, the task control unit directly sends the first shader task in the first FIFO 510 to the pipeline after the geometry processing pipeline; in the dual pipeline mode, the task control unit sends the first shader task in the first FIFO 510 to the second task generation pipeline, and sends the second shader task in the second FIFO 520 to the pipeline after the geometry processing pipeline.

[0079] In the above embodiment, the task control unit will also route the first shader task and the second shader task. The geometry processing pipeline provided by the present application can support both the geometry processing part of the VTG rendering pipeline and the geometry processing part of the mesh shading rendering pipeline. When supporting the geometry processing part of the VTG rendering pipeline, it may be necessary to implement the functions of up to four serial shaders (vertex shader, shell shader, domain shader and geometry shader) at the same time. At this time, the functions supported by the geometry processing pipeline are more complex. The present application will route the shader tasks so that the next processing flow can know the specific task corresponding to the previous processing action. In complex processing scenarios, the stable and accurate operation of each part of the geometry processing pipeline can also be achieved.

[0080] In one embodiment, the user can set the shader used by the graphics processor in the shader application, such as using only the vertex shader, the vertex shader plus the geometry shader, etc. When the graphics processor switches from the dual-pipeline mode to the single-pipeline mode, a control flag will be inserted after the first shader task in the dual-pipeline mode, such as Figure 6 As shown, a first control mark 610 is inserted between the first shader task 1 and the first shader task 2. The first shader task 1 is the first shader task in the dual-pipeline mode, and the first shader task 2 is the first shader task in the single-pipeline mode.

[0081] When the task control unit detects the first control tag 610 after the first shader task 1 in the dual pipeline mode, the first shader task 2 after the first control tag 610 is blocked. The first shader task 1 and the first control tag 610 will be sent to the second task generation pipeline, and the first control tag 610 will be transparently transmitted back to the task control unit in the second task generation pipeline and transformed into the second control tag 620, and the first shader task 1 will be transformed into the second shader task and enter the task control unit. Figure 6 As shown, when the task control unit detects the second control tag 620 after the second shader task, it unblocks the first shader task 2 after the first control tag 610 and outputs the first shader task 2 after the first control tag 610 to the pipeline after the geometry processing pipeline.

[0082] Optional, combined with reference Figure 3 The first control tag after the first shader task 1 is inserted by the first task generating unit 101 , the first control tag 610 will be transparently transmitted in the first shader engine 102 and the shader task building unit 103 , and the first control tag 610 will enter the task control unit 120 .

[0083] In the above embodiment, when the dual-pipeline mode is switched to the single-pipeline mode, when the task control unit detects the first control mark, it will first block the first shader task 2 in the single-pipeline mode. When the second shader task in the dual-pipeline mode returns to the task control unit, the first shader task 2 in the single-pipeline mode will be routed. At this time, it is realized that all shader tasks in the dual-pipeline mode have been correctly routed, and then the shader tasks in the single-pipeline mode are routed. That is, the alignment and synchronization of the dual-pipeline mode and the single-pipeline mode can be achieved through the control mark, and the task control unit will not route the shader tasks of the dual-pipeline mode and the single-pipeline mode at the same time. At this time, the correctness of the rendering results can be guaranteed.

[0084] In one embodiment, when the GPU switches from single-pipeline mode to dual-pipeline mode, the task control unit only needs to continue routing shader tasks in order without additional synchronization operations. Figure 7 As shown, the first shader task 1 is the first shader task in the single-pipeline mode, the first shader task 2 is the first shader task in the dual-pipeline mode, the task control unit sends the first shader task 1 to the pipeline after the geometry processing pipeline, and then the task control unit sends the first shader task 2 to the second task generation pipeline, the second task generation pipeline will generate the second shader task based on the first shader task 2, the second task generation pipeline sends the second shader task to the task control unit, and the task control unit sends the second shader task to the pipeline after the geometry processing pipeline.

[0085] At this time, when switching from single-pipeline mode to dual-pipeline mode, the task control unit does not need to do additional waiting and synchronization, but only needs to route the first shader task and the second shader task in sequence. At this time, the hardware naturally ensures that the routing operations in single-pipeline mode and dual-pipeline mode are separate. The routing operations in dual-pipeline mode are performed only after the routing operations in single-pipeline mode are completed. At this time, it is guaranteed that the shader tasks sent to the pipeline after the geometry processing pipeline meet user expectations.

[0086] Figure 8 The structure block diagram of an electronic device 800 provided by an exemplary embodiment of the present application is shown. Optionally, the electronic device 800 includes a graphics processor provided by an embodiment of the present application.

[0087] Optionally, the electronic device may be a portable mobile terminal, such as a smart phone, a tablet computer, an MP3 player (Moving Picture Experts Group Audio Layer III), an MP4 player (Moving Picture Experts Group Audio Layer IV), a laptop computer, or a desktop computer. The electronic device 800 may also be referred to as a user device, a portable terminal, a laptop terminal, a desktop terminal, or other names. Generally, the electronic device 800 includes a processor 801 and a memory 802.

[0088] The processor 801 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 801 may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field-Programmable Gate Array), and PLA (Programmable Logic Array). The processor 801 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 801 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 801 may also include an AI (Artificial Intelligence) processor, which is used to process computing operations related to machine learning.

[0089] The memory 802 may include one or more computer-readable storage media, which may be non-transitory. The memory 802 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices and flash memory storage devices.

[0090] In some embodiments, the electronic device 800 may further include: a peripheral device interface 803 and at least one peripheral device. Those skilled in the art will appreciate that Figure 8 The structure shown in the figure does not constitute a limitation on the electronic device 800, and may include more or less components than those shown in the figure, or combine some components, or adopt a different component arrangement.

[0091] The present application also provides a chip, which includes a graphics processor as described in the above embodiment.

[0092] The present application also provides a graphics card, which includes a graphics processor as described in the above embodiment.

[0093] The present application also provides a server, which includes a graphics processor as described in the above embodiment.

[0094] Fig. 9A schematic diagram of the structure of a server provided by an exemplary embodiment of the present application is shown, where the server 900 includes multiple graphics processors 901, and at least one of the multiple graphics processors 901 includes the graphics processor introduced in the above-mentioned embodiment of the present application.

[0095] The present application also provides a computing cluster, which includes multiple servers, at least one of the multiple servers includes a graphics processor as described in the above embodiment.

Claims

1. A graphics processor, characterized in that: The graphics processor includes a geometry processing pipeline, the geometry processing pipeline includes a first task generation pipeline, a task control unit, a second task generation pipeline and a task execution unit, the first task generation pipeline is used to generate a first shader task corresponding to a first shader and first task information of the first shader task, the second task generation pipeline is used to generate a second shader task corresponding to a second shader and second task information of the second shader task; The task execution unit is used to receive and execute the first shader task in a single pipeline mode to obtain a first shading result; and, receiving and executing the first shader task and the second shader task in a dual-pipeline mode to obtain the first shader result and the second shader result, respectively; The task control unit is configured to obtain the first shading result based on the received first task information in the single pipeline mode, and output the first shading result to a pipeline after the geometry processing pipeline; and, in the dual-pipeline mode, obtaining the first shading result based on the received first task information, and controlling the first shading result to enter the second task generation pipeline; And, based on the received second task information, the second shading result is obtained, and the second shading result is output to a pipeline after the geometry processing pipeline.

2. The graphics processor according to claim 1, wherein: The first task generation pipeline includes a first shader engine, the second task generation pipeline includes a second shader engine, and the first shader engine and the second shader engine are hardware units independent of each other; The first shader engine is used to generate the first shader task in the single-pipeline mode or the dual-pipeline mode; The second shader engine is used to generate the second shader task in the dual pipeline mode.

3. The graphics processor according to claim 2, characterized in that: The first task generation pipeline further includes a first task generation unit; The first task generating unit is used to split the received drawing instruction into multiple first task packets in the single-pipeline mode or the dual-pipeline mode, and send the multiple first task packets to the first shader engine.

4. The graphics processor according to claim 2, characterized in that: The second task generation pipeline further includes a first mixing unit; The first mixing unit is used to perform surface subdivision or derive a mesh shader thread group operation based on the first shading result in the dual-pipeline mode to obtain first output data and send the first output data to the second shader engine.

5. The graphics processor according to claim 2, characterized in that: The first task generation pipeline and the second task generation pipeline share a shader task construction unit; The shader task construction unit is used to allocate resources to the first shader task in the single pipeline mode, and send the first shader task after the resource allocation to the task control unit; In the dual-pipeline mode, resources are allocated to the first shader task, and the first shader task after resource allocation is sent to the task control unit; and resources are allocated to the second shader task, and the second shader task after resource allocation is sent to the task control unit.

6. The graphics processor according to any one of claims 1 to 5, characterized in that: The geometry processing pipeline also includes a result storage unit; The result storage unit is used to store the execution result of the first shader task in the single-pipeline mode; and to store the execution result of the first shader task and the execution result of the second shader task in the dual-pipeline mode.

7. The graphics processor according to any one of claims 1 to 5, characterized in that: The geometry processing pipeline also includes a temporary storage unit; The temporary storage unit is used to temporarily store the data read and written when executing the first shader task in the single pipeline mode; and temporarily store the data read and written when executing the first shader task and the data read and written when executing the second shader task in the dual pipeline mode.

8. The graphics processor according to any one of claims 1 to 5, characterized in that: In any of the following situations, starting the single pipeline mode; The graphics processor is configured to use a vertex shader; The graphics processor is configured to use the vertex shader and the geometry shader; The graphics processor is configured to use a mesh shader.

9. The graphics processor according to any one of claims 1 to 5, characterized in that: In any of the following situations, starting the dual pipeline mode; The graphics processor is configured to use a vertex shader, a shell shader, and a domain shader; The graphics processor is configured to use the vertex shader, the shell shader, the domain shader and the geometry shader; The graphics processor is configured to use an amplification shader and a mesh shader.

10. The graphics processor according to claim 9, characterized in that: In a case where the graphics processor is configured to use the vertex shader, the hull shader, and the domain shader, the first shader includes the vertex shader and the hull shader, and the second shader includes the domain shader.

11. The graphics processor according to claim 9, characterized in that: In the case where the graphics processor is configured to use the vertex shader, the hull shader, the domain shader, and the geometry shader, the first shader includes the vertex shader and the hull shader, and the second shader includes the domain shader and the geometry shader.

12. The graphics processor according to claim 9, characterized in that: In a case where the graphics processor is configured to use the magnification shader and the mesh shader, the first shader includes the magnification shader and the second shader includes the mesh shader.

13. The graphics processor according to any one of claims 1 to 5, characterized in that: The task control unit includes a first first-in first-out queue and a second first-in first-out queue; The first first-in-first-out queue is used to store the first shader task sent by the first task generation pipeline in the single pipeline mode and the dual pipeline mode; The second first-in-first-out queue is used to store the second shader task sent by the second task generation pipeline in the dual-pipeline mode.

14. The graphics processor according to any one of claims 1 to 5, characterized in that: The task control unit is further configured to receive the first shader task in the single-pipeline mode, and control the first shader task to be output to a pipeline subsequent to the geometry processing pipeline.

15. The graphics processor according to any one of claims 1 to 5, characterized in that: The task control unit is also used to receive the first shader task in the dual pipeline mode, control the first shader task to enter the second task generation pipeline, the first shader task is used to instruct the second task generation pipeline, the shader task corresponding to the first shading result; receive the second shader task, and control the second shader task to output to the pipeline after the geometry processing pipeline.

16. The graphics processor according to any one of claims 1 to 5, characterized in that: The task control unit is further configured to, when the dual-pipeline mode is switched to the single-pipeline mode, block the first shader task after the first control mark when a first control mark is detected, the first shader task after the first control mark is the first shader task in the single-pipeline mode, and the first shader task before the first control mark is the first shader task in the dual-pipeline mode; When a second control tag is detected, a first shader task after the first control tag is unblocked and output to a pipeline after the geometry processing pipeline, wherein the second control tag is located after a second shader task.

17. A graphics drawing method, characterized in that: The method is applied to a graphics processor, the graphics processor includes a geometry processing pipeline, the geometry processing pipeline includes a first task generation pipeline, a task control unit, a second task generation pipeline and a task execution unit; the method includes: The first task generation pipeline generates a first shader task corresponding to a first shader and first task information of the first shader task; The first task generation pipeline sends the first shader task to the task execution unit, and sends the first task information to the task control unit; the task execution unit executes the first shader task to obtain a first shading result; In the single pipeline mode, the task control unit obtains the first shading result based on the first task information, and outputs the first shading result to the pipeline after the geometry processing pipeline; In the dual-pipeline mode, the task control unit obtains the first shading result based on the first task information, and outputs the first shading result to the second task generation pipeline; the second task generation pipeline generates a second shader task corresponding to the second shader and second task information of the second shader task based on the first shading result; the second task generation pipeline sends the second shader task to the task execution unit, and sends the second task information to the task control unit; the task execution unit executes the second shader task to obtain a second shading result; the task control unit obtains the second shading result based on the second task information, and outputs the second shading result to the pipeline after the geometry processing pipeline.

18. A chip, characterized in that: The chip comprises a graphics processor as claimed in any one of claims 1 to 16.

19. A server, characterized in that: The server comprises a graphics processor as claimed in any one of claims 1 to 16.

20. An electronic device, characterized in that: The electronic device comprises a graphics processor as claimed in any one of claims 1 to 16.

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