Method for rapid detection of multi-scale micro-defects, computer device and storage medium

By improving the YOLOv8 network structure and the Wise-GIoU loss function, the problem of low efficiency and accuracy of existing visual inspection algorithms in the identification of multi-scale micro-defects on circuit boards is solved, achieving efficient and accurate defect detection and improving the quality and efficiency of circuit board production.

CN119810430BActive Publication Date: 2025-11-28FOSHAN UNIVERSITY
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Patent Information

Application Number
CN202510309460.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-03-17
Publication Date
2025-11-28
Estimated Expiration
2045-03-17

AI Technical Summary

Technical Problem

Existing visual inspection algorithms are easily affected by external environmental interference when dealing with multi-scale micro-defects on high-density circuit boards, resulting in low recognition efficiency and accuracy, which makes it difficult to meet the technological development needs of the 3C industry. In particular, they are less effective in detecting small physical damage defects and flat and long virtual copper defects.

Method used

An improved YOLOv8 network structure is adopted, including a backbone network for small target enhancement, a neck network based on DCMAC-PAN structure, and a target detection network. The multi-scale feature fusion of feature maps is enhanced by the DAttention module, and the position and size of the prediction box are dynamically adjusted by combining the Wise-GIoU loss function to improve detection accuracy and efficiency.

Benefits of technology

It enables rapid and accurate detection of multi-scale micro-defects on circuit boards, improving detection efficiency and accuracy, enhancing the extraction of small target information and the fusion of multi-scale features, and improving the model's recognition ability in complex scenes.

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Abstract

The application discloses a rapid detection method for multi-scale micro defects, computer equipment and a storage medium, relates to the technical field of image processing, and comprises the following steps: collecting an image of a circuit board and performing pretreatment to obtain image detection data; and inputting the image detection data into a pre-built defect detection model to obtain a defect detection result; wherein the defect detection model is built based on an improved YOLOv8 network structure, and the improved YOLOv8 network structure comprises a small-target-enhanced backbone network, a neck network based on a DCMAC-PAN structure and a target detection network. The application can quickly and accurately detect multi-scale micro defects on the circuit board, and has high detection efficiency and detection accuracy.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of image processing, and in particular to a multi-scale micro-defect rapid detection method, a computer device and a storage medium. BACKGROUND

[0002] With the increasing demand of 3C industry and the improvement of production efficiency, modern equipment tends to be more and more precise, and PCB manufacturing process is also becoming mature, and the density of components per unit area of the circuit board is getting higher and higher. The micro-defects in various production processes will greatly affect the performance of the circuit board, and even destroy the entire circuit board. The existing visual detection algorithm is prone to be disturbed by the external environment when processing the micro-target detection task under high-density background, and the recognition efficiency and accuracy of multi-scale micro-defects are difficult to meet the technical development needs of 3C industry.

[0003] In actual industrial environment, short circuit, open circuit, missing hole and other defects may occur in the printing production process, and these defects are very small in dense circuit boards. Some existing algorithms have deficiencies in small target defects, and the precision and recall rate are often very low. In addition, the existing visual detection algorithm has poor detection effect for defects with variable scales. For example, there may be physical damage defects in the circuit board, and virtual copper defects may occur in the production process. These two defects have the characteristic of variable scale compared with short circuit and open circuit defects. Among them, the physical damage defect is often smaller and more difficult to detect. On the contrary, the virtual copper defect is larger, but it shows the characteristics of being flat and long, and the size of the defect is several times that of the physical damage. In addition, the circuit board has the characteristic of low recognition degree because the copper plate surface is covered with a layer of solder resist ink. Under relatively dark light, small defects are often very similar to normal lines, and existing visual detection models are prone to miss detection, resulting in a very low recall rate of the model. Furthermore, although the existing visual detection algorithm can achieve faster detection speed, the precision is difficult to guarantee.

[0004] The above-listed deficiencies of the existing visual detection algorithm are due to the deficiencies of the model in feature extraction of small targets, the loss of some important information in the multi-scale fusion process of small targets, and the excessive fusion of some features in the scale fusion process, which leads to the insufficient fusion of small targets and multi-scale targets by the model, and finally leads to poor model performance. SUMMARY

[0005] The technical problem to be solved by the present application is to provide a multi-scale micro-defect rapid detection method, a computer device and a storage medium, which can quickly and accurately detect multi-scale micro-defects on a circuit board with high detection efficiency and accuracy.

[0006] In order to solve the above technical problems, the application provides a fast detection method for multi-scale micro defects, comprising: collecting an image of a circuit board and pre-processing to obtain image detection data; inputting the image detection data into a pre-built defect detection model to obtain a defect detection result; wherein the defect detection model is built based on an improved YOLOv8 network structure, the improved YOLOv8 network structure comprises a small target enhanced backbone network, a neck network based on a DCMAC-PAN structure and a target detection network, and the training steps of the defect detection model comprise: performing offline data enhancement on the obtained image data set to obtain an image training data set; performing feature extraction of different levels on the image training data set through the small target enhanced backbone network and retaining the feature data of small targets to obtain feature maps of different levels; enhancing the fusion of multi-scale feature data in the feature map through a DAttention module, wherein the DAttention module is arranged at the tail end of the backbone network; enhancing the extraction of context information in the feature map through the neck network based on the DCMAC-PAN structure and promoting the fusion of feature maps of different levels to generate a feature map of multi-scale features; performing prediction processing on the feature map of multi-scale features through the target detection network to obtain a corresponding prediction box; dynamically adjusting the position and size of the prediction box through a Wise-GIoU loss function to obtain an optimal prediction box to complete the training of the model.

[0007] As an improvement of the above scheme, the step of performing offline data enhancement on the obtained image data set comprises: performing image augmentation processing on the obtained image data set to increase the image data in the image data set, wherein the image augmentation processing comprises any one or several of random flipping, random scaling, random cropping, brightness increase / decrease and Gaussian noise processing.

[0008] As an improvement of the above scheme, the improvement step of the small target enhanced backbone network comprises: adding a plurality of SpdConv modules in the original YOLOv8 network structure backbone network to enhance the feature extraction of small target information, wherein the added backbone network comprises a first Conv module, a second Conv module, a first SpdConv module, a first C2F module, a third Conv module, a second SpdConv module, a second C2F module, a fourth Conv module, a third SpdConv module, a third C2F module, a fifth Conv module, a fourth SpdConv module, a fourth C2F module and a SPPF module connected in sequence; a DAttention module connected with the SPPF module is introduced after the SPPF module to construct a small target enhanced backbone network; wherein the first Conv module is used to receive input image training data set, and the second C2F module, the third C2F module and the DAttention module output feature maps of different levels to the DCMAC-PAN structure respectively.

[0009] As an improvement of the above scheme, the improvement step of the neck network based on the DCMAC-PAN structure comprises: replacing the original structure with the DCMAC-PAN structure in the original neck network to enhance the extraction of context information in the feature map and integrate feature data of different scales; wherein the DySample module is used to replace the original up-sampling module in the DCMAC-PAN structure to retain more small target or finer granularity feature data;

[0010] The DCMAC-PAN structure comprises a first CA module, a first Conv2d module, a first DySample module, a second DySample module, a first feature fusion module, a second Conv2d module, a third Conv2d module and a second feature fusion module connected in sequence;

[0011] The first Conv2d module is further connected with the second feature fusion module, the second Conv2d module is further connected with the third feature fusion module, and the first DySample module is further connected with the third feature fusion module through the fourth feature fusion module; the feature maps of different levels output by the small target enhanced backbone network are input into the DCMAC-PAN structure through the first CA module, the fourth feature fusion module and a feature fusion module respectively, and the first feature fusion module, the second feature fusion module and the third feature fusion module respectively fuse the feature maps of different levels and output the corresponding multi-scale feature maps to the target detection network.

[0012] As an improvement of the above scheme, the first feature fusion module, the second feature fusion module, the third feature fusion module and the fourth feature fusion module are all CMAC modules, and the CAMC module can fuse feature information of different scales.

[0013] As an improvement of the above scheme, the CMAC module comprises a second CA module, a third CA module, a Conv2d module, a Multiply module, an Add module and a C2F module, the second CA module is connected with the Multiply module through the Conv2d module, the third CA module is connected with the Multiply module, the second CA module and the third CA module are respectively used for receiving feature maps of different levels, the Multiply module is connected with the C2F module through the Add module, and the C2F module is used for fusing feature maps of different levels and outputting a fusion result.

[0014] Correspondingly, the present application also provides a computer device comprising a memory and a processor, wherein the memory stores a computer program, and the processor realizes the steps of the above method when executing the computer program.

[0015] Correspondingly, the present application also provides a computer readable storage medium, which stores a computer program, and the computer program realizes the steps of the above method when executed by a processor.

[0016] The present application has the following beneficial effects:

[0017] The present application can quickly and accurately detect multi-scale micro defects on a circuit board through an improved defect detection model, and has high detection efficiency and detection accuracy, thereby improving the production and processing efficiency and production quality of the circuit board.

[0018] The defect detection model can enhance the feature data extraction performance of small targets and promote the fusion of multi-scale feature data in the feature map, integrate global information and local information, and improve the detection ability of small target information; the model also adopts a neck network of a DMAC-PAN network structure, uses DySample to replace the up-sampling module in the original structure, and combines the feature pyramid idea of PAN to effectively fuse feature maps of different levels, can strengthen the representation ability of features, and thus improve the recognition ability of the model to small targets in a complex scene; the model also uses a Wise-GIoU loss function to enhance the boundary box regression performance, dynamically adjusts the position and size of the prediction box, and thus obtains optimal prediction box information, improves the detection accuracy and detection efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is a flowchart of the rapid detection method for multi-scale micro defects of the present application;

[0020] Figure 2 is an improved training flowchart of the defect detection model of the present application;

[0021] Figure 3 is an improved structure diagram of the backbone network of the present application;

[0022] Figure 4 is an improved structure diagram of the neck network of the present application;

[0023] Figure 5 is a working structure diagram of the defect detection model of the present application;

[0024] Figure 6 is a structure diagram of the CMAC module of the present application;

[0025] Figure 7 is a change curve diagram of mAP@0.5 of the improved model and other models of the present application;

[0026] Figure 8 is a change curve diagram of mAP@0.5:0.95 of the improved model and other models of the present application. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below in combination with the drawings. It is hereby declared that the up, down, left, right, front, back, inner and outer directions appearing or about to appear in the present application in the text are based on the drawings of the present application, and are not specific limitations on the present application.

[0028] As shown in Figure 1 , the embodiment of the present application provides a rapid detection method for multi-scale micro defects, comprising:

[0029] S101, collecting an image of a circuit board and pre-processing to obtain image detection data;

[0030] It should be noted that the image data (such as the image data of the PCB) of the circuit board to be detected can be collected by an image collection device, and the collected image data can be pre-processed to improve the image quality, facilitate subsequent detection processing, and improve the detection accuracy. The image preprocessing means is a conventional technical means in the art, which will not be described in detail here.

[0031] S102, inputting the image detection data into a pre-built defect detection model to obtain a defect detection result;

[0032] It should be noted that the defect detection model trained in advance can quickly detect defects in image detection data, especially the detection and identification of multi-scale micro defects, so as to obtain a defect detection result with high accuracy; according to the detection result, the quality rate of the circuit board to be detected can be accurately determined and the good and poor products can be classified and processed, thereby improving the production and processing efficiency and production quality of the circuit board.

[0033] The defect detection model is built based on an improved YOLOv8 network structure, and the improved YOLOv8 network structure includes a small target enhanced backbone network, a neck network based on a DCMAC-PAN structure, and a target detection network. Figure 2 As shown in the figure, the training steps of the defect detection model include:

[0034] S201, offline data augmentation is performed on the acquired image data set to obtain an image training data set;

[0035] Specifically, the step of performing offline data augmentation on the acquired image data set includes image augmentation processing on the acquired image data set to increase the image data in the image data set, wherein the image augmentation processing includes any one or several of random flipping, random scaling, random cropping, brightness increase and decrease, and Gaussian noise processing.

[0036] It should be noted that the acquired image data set at least includes image data of the categories of mouse bite, missing hole, short circuit, open circuit, open circuit, virtual copper, stray, and normal. The image data set is subjected to image augmentation processing to obtain a larger number of image data for training, verification and testing. The image augmentation processing is to expand each picture data into 5 picture data through random flipping, random scaling, random cropping, brightness increase and decrease, and Gaussian noise operation, so as to obtain a large amount of image data for training, verification and testing.

[0037] The expanded image data can be divided into an image training data set, an image verification data set, and an image test data set according to a preset grouping rule. The above offline data augmentation method can ensure the stability of the model during training, help the model perform better during convergence, and significantly increase the diversity of the data set, thereby improving the robustness and generalization ability of the model.

[0038] Preferably, the preset grouping rule is a random division rule according to the training set: verification set: test set (8:1:1), but not limited thereto.

[0039] S202, the small target enhanced backbone network extracts features of different levels from the image training data set and retains small target feature data to obtain feature maps of different levels;

[0040] S203, enhancing fusion of multi-scale feature data in the feature map through a DAttention module, wherein a DAttention (Deformable Attention) layer is arranged at a tail end of the backbone network;

[0041] Specifically, the improvement step of the small target enhanced backbone network comprises:

[0042] Step 1, a plurality of SpdConv modules are added in the backbone network of the original YOLOv8 network structure to enhance feature extraction of small target information.

[0043] It should be noted that the original backbone feature extraction network has a problem of insufficient small target feature extraction capability, and for this problem, the present application introduces a plurality of SpdConv modules in the original backbone network. The SpdConv module can replace the step convolution and pooling layer in the existing CNN architecture. As shown in Figure 3 and 5 The added backbone network comprises a first Conv module, a second Conv module, a first SpdConv module, a first C2F module, a third Conv module, a second SpdConv module, a second C2F module, a fourth Conv module, a third SpdConv module, a third C2F module, a fifth Conv module, a fourth SpdConv module, a fourth C2F module and an SPPF (Spatial Pyramid Pooling Fast, high-efficiency spatial pyramid pooling) module connected in sequence; a DAttention module connected with the SPPF module is introduced after the SPPF module to construct a small target enhanced backbone network. The Conv module is a convolution module, which is used to extract feature information of input data (such as an image) through convolution operation. The C2F module is a feature fusion module, which is used to fuse different feature maps and output fusion results to improve the nonlinear ability and representation ability of the network, thereby improving the modeling ability of the network for complex data.

[0044] The SpdConv module is composed of a space-to-depth (SPD) layer and a non-step convolution (Conv) layer. The function of the space-to-depth (SPD) layer is to reduce each spatial dimension of the input feature map to the channel dimension while preserving the information within the channel; this can be achieved by mapping each pixel or feature of the input feature map to a channel, in which process the size of the spatial dimension will decrease while the size of the channel dimension will increase.

[0045] The non-step length convolution (Conv) layer is operated after the SPD layer, and is different from the existing conventional step length convolution, and the non-step length convolution does not move on the feature map, but performs a convolution operation on each pixel or feature mapping, which helps to reduce the problem of excessive downsampling that may occur in the SPD layer and retain more fine-grained information.

[0046] The combination of the SPD-Conv can make the input feature map output the result to the Conv layer after being converted by the SPD layer, and the Conv layer performs a convolution operation, so that the size of the spatial dimension can be reduced without losing information, while the information in the channel is retained, which helps to improve the detection performance of the CNN on low-resolution images and small objects.

[0047] Therefore, the SpdConv module can convert the spatial dimension of the feature map into the depth dimension to enhance the feature representation, thereby making up for the problem of insufficient information of the low-resolution image, better retaining the feature information of the small target, effectively extracting the small target information in the feature map compared with the traditional convolution, better capturing the edge and detail information, thereby strengthening the feature extraction capability of the model on the small target and improving the recognition accuracy.

[0048] Step 2, introducing a DAttention module connected with the SPPF module after the SPPF module to build a small target enhanced backbone network;

[0049] It should be noted that the SPPF module is used to obtain multi-scale feature information through different scale pooling operations, and the adaptability of the network to different size targets is enhanced. The SPPF module can significantly reduce the computational amount while ensuring the calculation precision by changing the implementation method of the pyramid pooling, thereby improving the calculation efficiency.

[0050] After the above steps of strengthening the feature extraction of the small target, the defect detection model uses the SPPF module to enhance the multi-scale feature representation of the feature map. In order to further strengthen the fusion of these multi-scale features, so that the model is more effective when processing objects of different sizes, the present application adds a DAttention module after the SPPF module to flexibly adjust the position and range of the attention or important features, and the sparse sampling mechanism can more accurately integrate global information and local information, improve the recognition ability of the model on small targets in complex scenes, and maintain high detection accuracy and efficient calculation.

[0051] Among them, as Figure 5As shown, the first Conv module in the small target enhanced backbone network is used to receive the input image training data set, and the second C2F module, the third C2F module and the DAttention module respectively output feature maps of different levels to the neck network based on the DCMAC-PAN structure. Through the small target enhanced backbone network, the feature extraction capability of the model for small targets can be effectively enhanced, and the recognition accuracy and efficiency can be improved.

[0052] S204, enhancing and extracting context information in the feature map through the neck network based on the DCMAC-PAN structure, and promoting fusion of feature maps of different levels to generate a feature map of multi-scale features;

[0053] Specifically, the improvement step of the neck network based on the DCMAC-PAN (Dynamic Channel Attention Feature Aggregation Network) structure includes: replacing the original PA-FPN network structure with the DCMAC-PAN structure in the original neck network to enhance the extraction of context information in the feature map and integrate feature data of different scales; wherein the DySample (Dynamic Up-Sampling) module is used to replace the original up-sampling module in the DCMAC-PAN structure to retain more small target or fine-grained feature data in the feature map.

[0054] As shown in the figure, Figure 4 The DCMAC-PAN structure includes a first CA module, a first Conv2d module (two-dimensional convolution module), a first DySample module, a second DySample module, a first feature fusion module, a second Conv2d module, a third Conv2d module and a second feature fusion module connected in sequence; wherein the CA (Channel Attention) module dynamically adjusts the importance of each channel to help the network better focus on important feature information, suppress useless or noise information, and improve the feature extraction capability.

[0055] The first Conv2d module is further connected with the second feature fusion module, the second Conv2d module is further connected with the third feature fusion module, and the first DySample module is further connected with the third feature fusion module through the fourth feature fusion module; the feature maps of different levels (i.e. the feature maps P3, P4 and P5 of different feature information) output by the small target enhanced backbone network are respectively input to the DCMAC-PAN structure through the first CA module, the fourth feature fusion module and the first feature fusion module. The first feature fusion module, the second feature fusion module and the third feature fusion module respectively fuse the feature maps of different levels and output the corresponding feature maps of multi-scale features to the target detection network.

[0056] In Figure 4In the middle, N3, N4 and N5 are the fused feature maps of different levels fused by the last bottom-up feature fusion of the pyramid structure, that is, the results output by the first feature fusion module, the second feature fusion module and the third feature fusion module. M4 and M5 are the labels of the intermediate fusion results or the intermediate fusion layers of the DCMAC-PAN structure to better represent the structure processing process.

[0057] It should be noted that the structure diagram of the neck network based on the DCMAC-PAN structure is as shown in Figure 4 By replacing the original up-sampling module with the DySample module, the information loss in the up-sampling process can be minimized to improve the sampling ability, thereby retaining more small target or finer-grained feature data. At the same time, by using the DCMAC-PAN structure, the original top-down structure can be improved to an aggregated structure from top to bottom and from bottom to top, which can better handle multi-scale features, improve the detection performance of the model on objects of different scales, and enhance the context information in the feature map, so that the recognition ability of the improved model in a complex scene is further improved.

[0058] The first feature fusion module, the second feature fusion module, the third feature fusion module and the fourth feature fusion module are all CMAC modules, which can fuse feature information of different scales and reduce the amount of parameters required for processing.

[0059] Further, as shown in Figure 6 The CMAC module includes a second CA module, a third CA module, a Conv2d module, a Multiply module, an Add module and a C2F module. The second CA module is connected with the Multiply module through the Conv2d module, the third CA module is connected with the Multiply module, Figure 6 Pi+1 is the feature map of the next level, and Ni is the newly fused feature map of the current level. The second CA module and the third CA module are respectively used to receive feature maps of different levels. The Multiply module is connected with the C2F module through the Add module, and the C2F module is used to fuse feature maps of different levels and output the fusion result.

[0060] The CA module is used to enhance important features in the input feature map and suppress unimportant features; the Conv2d module is used to extract local features in the image and help the model identify important information such as edges and textures in the image; the Multiply module can enhance the interaction between two feature maps and highlight their common features; the Add module uses the residual idea to increase new feature information while maintaining the integrity of the original feature map information; and finally the C2F module further fuses features and maintains the integrity of information between different feature layers. Through the CMAC module, different scale feature information can be fully fused, and compared with the original structure, more parameter quantity is reduced, which can speed up the training and inference speed of the model, thereby enhancing multi-scale feature fusion and improving the detection ability of objects of different scales.

[0061] S205, performing prediction processing on the feature map of the multi-scale feature through the target detection network to obtain a corresponding prediction box;

[0062] As shown in Figure 5 , the target detection network includes a plurality of Detect modules, and the target detection network is responsible for converting the input feature map into a final specific detection result, including target categories and bounding boxes (i.e., prediction boxes). In this embodiment, the target detection network can perform prediction processing (i.e., conversion processing) on the input feature map of the multi-scale feature to obtain a corresponding prediction box.

[0063] S206, dynamically adjusting the position and size of the prediction box through the Wise-GIoU loss function to obtain an optimal prediction box and thus complete the training of the model.

[0064] It should be noted that the Wise-GIoU loss function introduces a dynamic attention mechanism, which can dynamically adjust the attention degree of the loss function according to the difficulty of the sample, thereby improving the training efficiency and accuracy of the model.

[0065] In the prediction structure, the Detect module can obtain a corresponding prediction result, i.e., a prediction box after recognition, by performing prediction processing on the feature map of the multi-scale feature. By replacing the original CIoU loss function with the Wise-GIoU loss function, a dynamic attention mechanism can be introduced to enhance the bounding box regression performance in the target detection task; by dynamically adjusting the punishment degree, the accuracy of the bounding box regression and the generalization ability of the model can be improved. The Wise-GIoU loss function can enhance the ability of back propagation in the convolutional neural network, constantly update the weights of YOLOv8, adjust the position and size of the prediction box, and improve the accuracy of the prediction box, so as to obtain an optimal prediction box as a detection result and complete the training of the defect detection model.

[0066] In order to verify the effectiveness, feasibility and superiority of the method of the present application, the following specific examples are used to demonstrate the method of the present application.

[0067] In this embodiment, the PCB data set disclosed by Peking University is used for data experiment, and ablation experiment is performed with some base models to prove the effectiveness of the improvement of the present application. As shown in Table 1, the experimental comparison results of the improved model of the present application and other models (such as YOLOv8s, YOLOv8s+SPD, YOLOv8+SPD+HS-FPN, YOLOv8+SPD+DCMAC-PAN and YOLOv8+SPD+DCMAC-PAN+DAttention models) are shown. From the table, it can be seen that the improved model proposed in the present application has an mAP@0.5 improvement of 4.9% and an mAP@0.5:0.95 improvement of 3.0% under the condition of fewer parameters than the base model, and the processing efficiency is relatively high, the model detection processing time is short, and the recall rate reaches 87.8%, i.e. an increase of 6.6%. High recall rate can guarantee high reliability and low defect rate of products, which is crucial for PCB micro defect detection in industry.

[0068] Table 1 Comparison of different indicators of different models

[0069]

[0070] In order to more intuitively show the effectiveness of each improved part, as shown in Figures 7 to 8 The change curves of mAP@0.5 and mAP@0.5:0.95 of the improved model of the present application and other models are shown, wherein the horizontal coordinate epoch parameter represents the number of times the training data set is iterated in the training process. From the figure, it can be seen that the improvement of each module has different improvements on the performance of the model, so that the finally perfected improved model based on the present application can accurately detect the PCB micro defects in industry and improve the detection efficiency.

[0071] Further, the model proposed in the present application has good effect compared with the existing common mainstream target detection algorithms such as YOLOv5, YOLOv7, YOLOv10 and RT-DETR. As shown in Table 2, the experimental comparison results of the improved model of the present application and other model algorithms (such as YOLOv5s, YOLOv7-tiny, YOLOv10s, YOLOv10m and RT-DETR-r18 models) are shown. From the table, it can be seen that the improved model of the present application has higher mAP50 and mAP@0.5:0.95 values while maintaining a higher frame rate (Fps). In addition, in terms of accuracy and recall rate, the algorithm of the present application is superior to the existing algorithms, greatly improving the detection efficiency and accuracy.

[0072] Table 2 Comparison experiment of different model algorithms

[0073]

[0074] Therefore, the application not only realizes higher accuracy in the detection task, but also maintains real-time performance, so that the improved model has higher practical value in actual application.

[0075] Correspondingly, the application further provides a computer device including a memory and a processor, the memory stores a computer program, and the processor realizes the steps of the above method when executing the computer program.

[0076] Correspondingly, the application further provides a computer readable storage medium, which stores a computer program, and the computer program realizes the steps of the above method when executed by a processor.

[0077] In summary, the application can quickly and accurately detect multi-scale small defects on the circuit board through the improved defect detection model, has high detection efficiency and detection accuracy, and thus improves the production and processing efficiency and production quality of the circuit board.

[0078] The defect detection model can enhance the extraction performance of small target feature data and promote the fusion of multi-scale feature data in the feature map, integrate global information and local information, and improve the detection ability of small target information. The model also uses the neck network of the DMAC-PAN network structure, uses DySample to replace the up-sampling module in the original structure, and combines the feature pyramid idea of PAN to effectively fuse feature maps at different levels, which can strengthen the representation ability of features and improve the recognition ability of small targets in complex scenes. The model also uses the Wise-GIoU loss function to enhance the bounding box regression performance, dynamically adjusts the position and size of the prediction box, and thus obtains the optimal prediction box information, improves the detection accuracy and detection efficiency.

[0079] The above only discloses preferred embodiments of the application, and of course cannot limit the scope of the application, so equivalent changes made according to the claims of the application are still within the scope of the application.

Claims

1. A rapid detection method for multi-scale micro-defects, characterized in that, include: Images of the circuit board are acquired and preprocessed to obtain image detection data; The image detection data is input into a pre-built defect detection model to obtain defect detection results; The defect detection model is built upon an improved YOLOv8 network structure, which includes a small target enhancement backbone network, a neck network based on a DCMAC-PAN structure, and a target detection network. The training steps of the defect detection model include: Offline data augmentation was performed on the acquired image dataset to obtain an image training dataset. The image training dataset is subjected to feature extraction at different levels through a backbone network that enhances small targets, while retaining the feature data of small targets, in order to obtain feature maps at different levels. The fusion of multi-scale feature data in the feature map is enhanced by using the DAttention module, which is set at the end of the backbone network. The contextual information in the feature map is enhanced and extracted by a neck network based on the DCMAC-PAN structure, and the feature maps at different levels are fused to generate feature maps with multi-scale features. The feature maps of multi-scale features are processed by an object detection network to obtain the corresponding prediction boxes; The position and size of the predicted bounding box are dynamically adjusted by the Wise-GIoU loss function to obtain the optimal predicted bounding box and thus complete the training of the model. The improvement steps of the neck network based on the DCMAC-PAN structure include: The original structure is replaced by a DCMAC-PAN structure in the original neck network to enhance the extraction of contextual information in the feature maps and integrate feature data at different scales. In the DCMAC-PAN structure, the DySample module is used to replace the original upsampling module in order to retain more small target or finer-grained feature data; The DCMAC-PAN structure includes a first CA module, a first Conv2d module, a first DySample module, a second DySample module, a first feature fusion module, a second Conv2d module, a third Conv2d module, and a second feature fusion module connected in sequence. The first Conv2d module is also connected to the second feature fusion module, the second Conv2d module is also connected to the third feature fusion module, and the first DySample module is also connected to the third feature fusion module via the fourth feature fusion module. The feature maps of different levels output by the backbone network for small target enhancement are respectively input into the DCMAC-PAN structure via the first CA module, the fourth feature fusion module, and the first feature fusion module. The first feature fusion module, the second feature fusion module, and the third feature fusion module respectively fuse the feature maps of different levels and output the corresponding multi-scale feature maps to the target detection network. The first feature fusion module, the second feature fusion module, the third feature fusion module, and the fourth feature fusion module are all CMAC modules. The CMAC module includes a second CA module, a third CA module, a Conv2d module, a Multiply module, an Add module, and a C2F module. The second CA module is connected to the Multiply module via the Conv2d module, and the third CA module is connected to the Multiply module. The second CA module and the third CA module are used to receive feature maps of different levels, respectively. The Multiply module is connected to the C2F module via the Add module. The C2F module is used to fuse feature maps of different levels and output the fusion result.

2. The rapid detection method for multi-scale micro-defects according to claim 1, characterized in that, The steps for offline data augmentation of the acquired image dataset include: The acquired image dataset is subjected to image augmentation processing to increase the image data in the image dataset. The image augmentation processing includes any one or more of the following: random flipping, random scaling, random cropping, brightness adjustment, and Gaussian noise processing.

3. The rapid detection method for multi-scale micro-defects according to claim 1, characterized in that, The improvement steps of the small-objective-enhanced backbone network include: Multiple SpdConv modules are added to the backbone of the original YOLOv8 network structure to enhance feature extraction of small target information. The newly added backbone network includes the first Conv module, the second Conv module, the first SpdConv module, the first C2F module, the third Conv module, the second SpdConv module, the second C2F module, the fourth Conv module, the third SpdConv module, the third C2F module, the fifth Conv module, the fourth SpdConv module, the fourth C2F module, and the SPPF module, which are connected in sequence. A DAttention module connected to the SPPF module is introduced after the SPPF module to construct a small target enhancement backbone network; The first Conv module is used to receive the input image training dataset, and the second C2F module, the third C2F module and the DAttention module output feature maps of different levels to the DCMAC-PAN structure respectively.

4. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 3.

5. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 3.

Citation Information

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